VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 75152

Last change on this file since 75152 was 75152, checked in by vboxsync, 6 years ago

VMM: Nested VMX: bugref:9180 Build fix.

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1/* $Id: VMM.cpp 75152 2018-10-29 14:32:55Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_csam
32 * - @subpage pg_dbgf
33 * - @subpage pg_em
34 * - @subpage pg_gim
35 * - @subpage pg_gmm
36 * - @subpage pg_gvmm
37 * - @subpage pg_hm
38 * - @subpage pg_iem
39 * - @subpage pg_iom
40 * - @subpage pg_mm
41 * - @subpage pg_patm
42 * - @subpage pg_pdm
43 * - @subpage pg_pgm
44 * - @subpage pg_rem
45 * - @subpage pg_selm
46 * - @subpage pg_ssm
47 * - @subpage pg_stam
48 * - @subpage pg_tm
49 * - @subpage pg_trpm
50 * - @subpage pg_vm
51 *
52 *
53 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54 *
55 *
56 * @section sec_vmmstate VMM State
57 *
58 * @image html VM_Statechart_Diagram.gif
59 *
60 * To be written.
61 *
62 *
63 * @subsection subsec_vmm_init VMM Initialization
64 *
65 * To be written.
66 *
67 *
68 * @subsection subsec_vmm_term VMM Termination
69 *
70 * To be written.
71 *
72 *
73 * @section sec_vmm_limits VMM Limits
74 *
75 * There are various resource limits imposed by the VMM and it's
76 * sub-components. We'll list some of them here.
77 *
78 * On 64-bit hosts:
79 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80 * can be increased up to 64K - 1.
81 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83 * - A VM can be assigned all the memory we can use (16TB), however, the
84 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86 *
87 * On 32-bit hosts:
88 * - Max 127 VMs. Imposed by GMM's per page structure.
89 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 28-bit page ID used
91 * internally in GMM. It is also limited by PAE.
92 * - A VM can be assigned all the memory GMM can allocate, however, the
93 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95 *
96 */
97
98
99/*********************************************************************************************************************************
100* Header Files *
101*********************************************************************************************************************************/
102#define LOG_GROUP LOG_GROUP_VMM
103#include <VBox/vmm/vmm.h>
104#include <VBox/vmm/vmapi.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/vmm/cfgm.h>
107#include <VBox/vmm/pdmqueue.h>
108#include <VBox/vmm/pdmcritsect.h>
109#include <VBox/vmm/pdmcritsectrw.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/cpum.h>
112#include <VBox/vmm/gim.h>
113#include <VBox/vmm/mm.h>
114#include <VBox/vmm/nem.h>
115#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
116# include <VBox/vmm/iem.h>
117#endif
118#include <VBox/vmm/iom.h>
119#include <VBox/vmm/trpm.h>
120#include <VBox/vmm/selm.h>
121#include <VBox/vmm/em.h>
122#include <VBox/sup.h>
123#include <VBox/vmm/dbgf.h>
124#include <VBox/vmm/csam.h>
125#include <VBox/vmm/patm.h>
126#include <VBox/vmm/apic.h>
127#ifdef VBOX_WITH_REM
128# include <VBox/vmm/rem.h>
129#endif
130#include <VBox/vmm/ssm.h>
131#include <VBox/vmm/ftm.h>
132#include <VBox/vmm/tm.h>
133#include "VMMInternal.h"
134#include "VMMSwitcher.h"
135#include <VBox/vmm/vm.h>
136#include <VBox/vmm/uvm.h>
137
138#include <VBox/err.h>
139#include <VBox/param.h>
140#include <VBox/version.h>
141#include <VBox/vmm/hm.h>
142#include <iprt/assert.h>
143#include <iprt/alloc.h>
144#include <iprt/asm.h>
145#include <iprt/time.h>
146#include <iprt/semaphore.h>
147#include <iprt/stream.h>
148#include <iprt/string.h>
149#include <iprt/stdarg.h>
150#include <iprt/ctype.h>
151#include <iprt/x86.h>
152
153
154/*********************************************************************************************************************************
155* Defined Constants And Macros *
156*********************************************************************************************************************************/
157/** The saved state version. */
158#define VMM_SAVED_STATE_VERSION 4
159/** The saved state version used by v3.0 and earlier. (Teleportation) */
160#define VMM_SAVED_STATE_VERSION_3_0 3
161
162/** Macro for flushing the ring-0 logging. */
163#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
164 do { \
165 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
166 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
167 { /* likely? */ } \
168 else \
169 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
170 } while (0)
171
172
173/*********************************************************************************************************************************
174* Internal Functions *
175*********************************************************************************************************************************/
176static int vmmR3InitStacks(PVM pVM);
177static int vmmR3InitLoggers(PVM pVM);
178static void vmmR3InitRegisterStats(PVM pVM);
179static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
180static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
181static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
182static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
183 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
184static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
185static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
186
187
188/**
189 * Initializes the VMM.
190 *
191 * @returns VBox status code.
192 * @param pVM The cross context VM structure.
193 */
194VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
195{
196 LogFlow(("VMMR3Init\n"));
197
198 /*
199 * Assert alignment, sizes and order.
200 */
201 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
202 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
203 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
204
205 /*
206 * Init basic VM VMM members.
207 */
208 pVM->vmm.s.offVM = RT_UOFFSETOF(VM, vmm);
209 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
210 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
211 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
212 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
213 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
214 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
215 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
216 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
217 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
218
219 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
220 * The EMT yield interval. The EMT yielding is a hack we employ to play a
221 * bit nicer with the rest of the system (like for instance the GUI).
222 */
223 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
224 23 /* Value arrived at after experimenting with the grub boot prompt. */);
225 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
226
227
228 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
229 * Controls whether we employ per-cpu preemption timers to limit the time
230 * spent executing guest code. This option is not available on all
231 * platforms and we will silently ignore this setting then. If we are
232 * running in VT-x mode, we will use the VMX-preemption timer instead of
233 * this one when possible.
234 */
235 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
236 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
237 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
238
239 /*
240 * Initialize the VMM rendezvous semaphores.
241 */
242 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
243 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
244 return VERR_NO_MEMORY;
245 for (VMCPUID i = 0; i < pVM->cCpus; i++)
246 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
247 for (VMCPUID i = 0; i < pVM->cCpus; i++)
248 {
249 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
250 AssertRCReturn(rc, rc);
251 }
252 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
253 AssertRCReturn(rc, rc);
254 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
255 AssertRCReturn(rc, rc);
256 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
257 AssertRCReturn(rc, rc);
258 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
259 AssertRCReturn(rc, rc);
260 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
261 AssertRCReturn(rc, rc);
262 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
263 AssertRCReturn(rc, rc);
264 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
265 AssertRCReturn(rc, rc);
266 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
267 AssertRCReturn(rc, rc);
268
269 /*
270 * Register the saved state data unit.
271 */
272 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
273 NULL, NULL, NULL,
274 NULL, vmmR3Save, NULL,
275 NULL, vmmR3Load, NULL);
276 if (RT_FAILURE(rc))
277 return rc;
278
279 /*
280 * Register the Ring-0 VM handle with the session for fast ioctl calls.
281 */
282 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
283 if (RT_FAILURE(rc))
284 return rc;
285
286 /*
287 * Init various sub-components.
288 */
289 rc = vmmR3SwitcherInit(pVM);
290 if (RT_SUCCESS(rc))
291 {
292 rc = vmmR3InitStacks(pVM);
293 if (RT_SUCCESS(rc))
294 {
295 rc = vmmR3InitLoggers(pVM);
296
297#ifdef VBOX_WITH_NMI
298 /*
299 * Allocate mapping for the host APIC.
300 */
301 if (RT_SUCCESS(rc))
302 {
303 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
304 AssertRC(rc);
305 }
306#endif
307 if (RT_SUCCESS(rc))
308 {
309 /*
310 * Debug info and statistics.
311 */
312 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
313 vmmR3InitRegisterStats(pVM);
314 vmmInitFormatTypes();
315
316 return VINF_SUCCESS;
317 }
318 }
319 /** @todo Need failure cleanup. */
320
321 //more todo in here?
322 //if (RT_SUCCESS(rc))
323 //{
324 //}
325 //int rc2 = vmmR3TermCoreCode(pVM);
326 //AssertRC(rc2));
327 }
328
329 return rc;
330}
331
332
333/**
334 * Allocate & setup the VMM RC stack(s) (for EMTs).
335 *
336 * The stacks are also used for long jumps in Ring-0.
337 *
338 * @returns VBox status code.
339 * @param pVM The cross context VM structure.
340 *
341 * @remarks The optional guard page gets it protection setup up during R3 init
342 * completion because of init order issues.
343 */
344static int vmmR3InitStacks(PVM pVM)
345{
346 int rc = VINF_SUCCESS;
347#ifdef VMM_R0_SWITCH_STACK
348 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
349#else
350 uint32_t fFlags = 0;
351#endif
352
353 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
354 {
355 PVMCPU pVCpu = &pVM->aCpus[idCpu];
356
357#ifdef VBOX_STRICT_VMM_STACK
358 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
359#else
360 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
361#endif
362 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
363 if (RT_SUCCESS(rc))
364 {
365#ifdef VBOX_STRICT_VMM_STACK
366 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
367#endif
368#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
369 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
370 if (VM_IS_RAW_MODE_ENABLED(pVM))
371 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
372 else
373#endif
374 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
375 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
376 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
377 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
378
379 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
380 }
381 }
382
383 return rc;
384}
385
386
387/**
388 * Initialize the loggers.
389 *
390 * @returns VBox status code.
391 * @param pVM The cross context VM structure.
392 */
393static int vmmR3InitLoggers(PVM pVM)
394{
395 int rc;
396#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
397
398 /*
399 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
400 */
401#ifdef LOG_ENABLED
402 PRTLOGGER pLogger = RTLogDefaultInstance();
403 if (pLogger)
404 {
405 if (VM_IS_RAW_MODE_ENABLED(pVM))
406 {
407 pVM->vmm.s.cbRCLogger = RT_UOFFSETOF_DYN(RTLOGGERRC, afGroups[pLogger->cGroups]);
408 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
409 if (RT_FAILURE(rc))
410 return rc;
411 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
412 }
413
414# ifdef VBOX_WITH_R0_LOGGING
415 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
416 for (VMCPUID i = 0; i < pVM->cCpus; i++)
417 {
418 PVMCPU pVCpu = &pVM->aCpus[i];
419 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
420 (void **)&pVCpu->vmm.s.pR0LoggerR3);
421 if (RT_FAILURE(rc))
422 return rc;
423 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
424 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
425 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
426 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
427 }
428# endif
429 }
430#endif /* LOG_ENABLED */
431
432 /*
433 * Release logging.
434 */
435 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
436 if (pRelLogger)
437 {
438#ifdef VBOX_WITH_RC_RELEASE_LOGGING
439 /*
440 * Allocate RC release logger instances (finalized in the relocator).
441 */
442 if (VM_IS_RAW_MODE_ENABLED(pVM))
443 {
444 pVM->vmm.s.cbRCRelLogger = RT_UOFFSETOF_DYN(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
445 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
446 if (RT_FAILURE(rc))
447 return rc;
448 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
449 }
450#endif
451
452 /*
453 * Ring-0 release logger.
454 */
455 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
456 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
457 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
458
459 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
460 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
461 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
462
463 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
464
465 for (VMCPUID i = 0; i < pVM->cCpus; i++)
466 {
467 PVMCPU pVCpu = &pVM->aCpus[i];
468 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
469 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
470 if (RT_FAILURE(rc))
471 return rc;
472 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
473 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
474 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
475 pVmmLogger->pVM = pVM->pVMR0;
476 pVmmLogger->cbLogger = (uint32_t)cbLogger;
477 pVmmLogger->fCreated = false;
478 pVmmLogger->fFlushingDisabled = false;
479 pVmmLogger->fRegistered = false;
480 pVmmLogger->idCpu = i;
481
482 char szR0ThreadName[16];
483 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
484 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
485 pfnLoggerWrapper, pfnLoggerFlush,
486 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
487 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
488
489 /* We only update the release log instance here. */
490 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
491 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
492 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
493
494 pVmmLogger->fCreated = true;
495 }
496 }
497
498 return VINF_SUCCESS;
499}
500
501
502/**
503 * VMMR3Init worker that register the statistics with STAM.
504 *
505 * @param pVM The cross context VM structure.
506 */
507static void vmmR3InitRegisterStats(PVM pVM)
508{
509 RT_NOREF_PV(pVM);
510
511 /*
512 * Statistics.
513 */
514 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
519 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
520 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
521 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
522 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
523 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
524 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
525 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
526 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
527 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
528 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
529 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
530 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
531 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
532 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
533 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
534 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
535 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
536 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
537 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
538 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
539 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
540 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
541 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
542 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
543 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
544 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
545 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
546 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
547 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
548 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
549 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
550 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
551 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
552 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
553 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
554 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
555 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
556 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
557 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
558 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
559 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
560 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
561 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
562 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
563 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
564 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
565 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
566 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
567 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
568 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
569 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
570 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
571 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
572 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
573 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
574 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
575 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
576 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
577 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
578
579#ifdef VBOX_WITH_STATISTICS
580 for (VMCPUID i = 0; i < pVM->cCpus; i++)
581 {
582 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
583 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
584 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
585 }
586#endif
587}
588
589
590/**
591 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
592 *
593 * @returns VBox status code.
594 * @param pVM The cross context VM structure.
595 * @param pVCpu The cross context per CPU structure.
596 * @thread EMT(pVCpu)
597 */
598static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
599{
600 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
601}
602
603
604/**
605 * Initializes the R0 VMM.
606 *
607 * @returns VBox status code.
608 * @param pVM The cross context VM structure.
609 */
610VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
611{
612 int rc;
613 PVMCPU pVCpu = VMMGetCpu(pVM);
614 Assert(pVCpu && pVCpu->idCpu == 0);
615
616#ifdef LOG_ENABLED
617 /*
618 * Initialize the ring-0 logger if we haven't done so yet.
619 */
620 if ( pVCpu->vmm.s.pR0LoggerR3
621 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
622 {
623 rc = VMMR3UpdateLoggers(pVM);
624 if (RT_FAILURE(rc))
625 return rc;
626 }
627#endif
628
629 /*
630 * Call Ring-0 entry with init code.
631 */
632 for (;;)
633 {
634#ifdef NO_SUPCALLR0VMM
635 //rc = VERR_GENERAL_FAILURE;
636 rc = VINF_SUCCESS;
637#else
638 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
639#endif
640 /*
641 * Flush the logs.
642 */
643#ifdef LOG_ENABLED
644 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
645#endif
646 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
647 if (rc != VINF_VMM_CALL_HOST)
648 break;
649 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
650 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
651 break;
652 /* Resume R0 */
653 }
654
655 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
656 {
657 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
658 if (RT_SUCCESS(rc))
659 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
660 }
661
662 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
663 if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
664 LogRel(("VMM: Enabled thread-context hooks\n"));
665 else
666 LogRel(("VMM: Thread-context hooks unavailable\n"));
667
668 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
669 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
670 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
671 else
672 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
673 if (pVM->vmm.s.fIsPreemptPossible)
674 LogRel(("VMM: Kernel preemption is possible\n"));
675 else
676 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
677
678 /*
679 * Send all EMTs to ring-0 to get their logger initialized.
680 */
681 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
682 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
683
684 return rc;
685}
686
687
688#ifdef VBOX_WITH_RAW_MODE
689/**
690 * Initializes the RC VMM.
691 *
692 * @returns VBox status code.
693 * @param pVM The cross context VM structure.
694 */
695VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
696{
697 PVMCPU pVCpu = VMMGetCpu(pVM);
698 Assert(pVCpu && pVCpu->idCpu == 0);
699
700 /* In VMX mode, there's no need to init RC. */
701 if (!VM_IS_RAW_MODE_ENABLED(pVM))
702 return VINF_SUCCESS;
703
704 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
705
706 /*
707 * Call VMMRCInit():
708 * -# resolve the address.
709 * -# setup stackframe and EIP to use the trampoline.
710 * -# do a generic hypervisor call.
711 */
712 RTRCPTR RCPtrEP;
713 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
714 if (RT_SUCCESS(rc))
715 {
716 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
717 uint64_t u64TS = RTTimeProgramStartNanoTS();
718 CPUMPushHyper(pVCpu, RT_HI_U32(u64TS)); /* Param 4: The program startup TS - Hi. */
719 CPUMPushHyper(pVCpu, RT_LO_U32(u64TS)); /* Param 4: The program startup TS - Lo. */
720 CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
721 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
722 CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
723 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
724 CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
725 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
726 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
727 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
728
729 for (;;)
730 {
731#ifdef NO_SUPCALLR0VMM
732 //rc = VERR_GENERAL_FAILURE;
733 rc = VINF_SUCCESS;
734#else
735 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
736#endif
737#ifdef LOG_ENABLED
738 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
739 if ( pLogger
740 && pLogger->offScratch > 0)
741 RTLogFlushRC(NULL, pLogger);
742#endif
743#ifdef VBOX_WITH_RC_RELEASE_LOGGING
744 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
745 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
746 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
747#endif
748 if (rc != VINF_VMM_CALL_HOST)
749 break;
750 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
751 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
752 break;
753 }
754
755 /* Don't trigger assertions or guru if raw-mode is unavailable. */
756 if (rc != VERR_SUPDRV_NO_RAW_MODE_HYPER_V_ROOT)
757 {
758 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
759 {
760 VMMR3FatalDump(pVM, pVCpu, rc);
761 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
762 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
763 }
764 AssertRC(rc);
765 }
766 }
767 return rc;
768}
769#endif /* VBOX_WITH_RAW_MODE */
770
771
772/**
773 * Called when an init phase completes.
774 *
775 * @returns VBox status code.
776 * @param pVM The cross context VM structure.
777 * @param enmWhat Which init phase.
778 */
779VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
780{
781 int rc = VINF_SUCCESS;
782
783 switch (enmWhat)
784 {
785 case VMINITCOMPLETED_RING3:
786 {
787 /*
788 * Set page attributes to r/w for stack pages.
789 */
790 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
791 {
792 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
793 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
794 AssertRCReturn(rc, rc);
795 }
796
797 /*
798 * Create the EMT yield timer.
799 */
800 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
801 AssertRCReturn(rc, rc);
802
803 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
804 AssertRCReturn(rc, rc);
805
806#ifdef VBOX_WITH_NMI
807 /*
808 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
809 */
810 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
811 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
812 AssertRCReturn(rc, rc);
813#endif
814
815#ifdef VBOX_STRICT_VMM_STACK
816 /*
817 * Setup the stack guard pages: Two inaccessible pages at each sides of the
818 * stack to catch over/under-flows.
819 */
820 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
821 {
822 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
823
824 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
825 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
826
827 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
828 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
829 }
830 pVM->vmm.s.fStackGuardsStationed = true;
831#endif
832 break;
833 }
834
835 case VMINITCOMPLETED_HM:
836 {
837 /*
838 * Disable the periodic preemption timers if we can use the
839 * VMX-preemption timer instead.
840 */
841 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
842 && HMR3IsVmxPreemptionTimerUsed(pVM))
843 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
844 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
845
846 /*
847 * Last chance for GIM to update its CPUID leaves if it requires
848 * knowledge/information from HM initialization.
849 */
850 rc = GIMR3InitCompleted(pVM);
851 AssertRCReturn(rc, rc);
852
853 /*
854 * CPUM's post-initialization (print CPUIDs).
855 */
856 CPUMR3LogCpuIds(pVM);
857 break;
858 }
859
860 default: /* shuts up gcc */
861 break;
862 }
863
864 return rc;
865}
866
867
868/**
869 * Terminate the VMM bits.
870 *
871 * @returns VBox status code.
872 * @param pVM The cross context VM structure.
873 */
874VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
875{
876 PVMCPU pVCpu = VMMGetCpu(pVM);
877 Assert(pVCpu && pVCpu->idCpu == 0);
878
879 /*
880 * Call Ring-0 entry with termination code.
881 */
882 int rc;
883 for (;;)
884 {
885#ifdef NO_SUPCALLR0VMM
886 //rc = VERR_GENERAL_FAILURE;
887 rc = VINF_SUCCESS;
888#else
889 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
890#endif
891 /*
892 * Flush the logs.
893 */
894#ifdef LOG_ENABLED
895 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
896#endif
897 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
898 if (rc != VINF_VMM_CALL_HOST)
899 break;
900 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
901 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
902 break;
903 /* Resume R0 */
904 }
905 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
906 {
907 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
908 if (RT_SUCCESS(rc))
909 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
910 }
911
912 for (VMCPUID i = 0; i < pVM->cCpus; i++)
913 {
914 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
915 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
916 }
917 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
918 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
919 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
920 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
921 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
922 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
923 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
924 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
925 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
926 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
927 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
928 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
929 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
930 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
931 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
932 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
933
934#ifdef VBOX_STRICT_VMM_STACK
935 /*
936 * Make the two stack guard pages present again.
937 */
938 if (pVM->vmm.s.fStackGuardsStationed)
939 {
940 for (VMCPUID i = 0; i < pVM->cCpus; i++)
941 {
942 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
943 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
944 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
945 }
946 pVM->vmm.s.fStackGuardsStationed = false;
947 }
948#endif
949
950 vmmTermFormatTypes();
951 return rc;
952}
953
954
955/**
956 * Applies relocations to data and code managed by this
957 * component. This function will be called at init and
958 * whenever the VMM need to relocate it self inside the GC.
959 *
960 * The VMM will need to apply relocations to the core code.
961 *
962 * @param pVM The cross context VM structure.
963 * @param offDelta The relocation delta.
964 */
965VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
966{
967 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
968
969 /*
970 * Recalc the RC address.
971 */
972#ifdef VBOX_WITH_RAW_MODE
973 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
974#endif
975
976 /*
977 * The stack.
978 */
979 for (VMCPUID i = 0; i < pVM->cCpus; i++)
980 {
981 PVMCPU pVCpu = &pVM->aCpus[i];
982
983 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
984
985 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
986 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
987 }
988
989 /*
990 * All the switchers.
991 */
992 vmmR3SwitcherRelocate(pVM, offDelta);
993
994 /*
995 * Get other RC entry points.
996 */
997 if (VM_IS_RAW_MODE_ENABLED(pVM))
998 {
999 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
1000 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
1001
1002 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
1003 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
1004 }
1005
1006 /*
1007 * Update the logger.
1008 */
1009 VMMR3UpdateLoggers(pVM);
1010}
1011
1012
1013/**
1014 * Updates the settings for the RC and R0 loggers.
1015 *
1016 * @returns VBox status code.
1017 * @param pVM The cross context VM structure.
1018 */
1019VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
1020{
1021 /*
1022 * Simply clone the logger instance (for RC).
1023 */
1024 int rc = VINF_SUCCESS;
1025 RTRCPTR RCPtrLoggerFlush = 0;
1026
1027 if ( pVM->vmm.s.pRCLoggerR3
1028#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1029 || pVM->vmm.s.pRCRelLoggerR3
1030#endif
1031 )
1032 {
1033 Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1034 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
1035 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
1036 }
1037
1038 if (pVM->vmm.s.pRCLoggerR3)
1039 {
1040 Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1041 RTRCPTR RCPtrLoggerWrapper = 0;
1042 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
1043 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
1044
1045 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1046 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
1047 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
1048 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
1049 }
1050
1051#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1052 if (pVM->vmm.s.pRCRelLoggerR3)
1053 {
1054 Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1055 RTRCPTR RCPtrLoggerWrapper = 0;
1056 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
1057 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
1058
1059 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1060 rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
1061 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
1062 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
1063 }
1064#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
1065
1066#ifdef LOG_ENABLED
1067 /*
1068 * For the ring-0 EMT logger, we use a per-thread logger instance
1069 * in ring-0. Only initialize it once.
1070 */
1071 PRTLOGGER const pDefault = RTLogDefaultInstance();
1072 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1073 {
1074 PVMCPU pVCpu = &pVM->aCpus[i];
1075 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1076 if (pR0LoggerR3)
1077 {
1078 if (!pR0LoggerR3->fCreated)
1079 {
1080 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
1081 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
1082 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
1083
1084 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
1085 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
1086 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
1087
1088 char szR0ThreadName[16];
1089 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
1090 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
1091 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
1092 pfnLoggerWrapper, pfnLoggerFlush,
1093 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
1094 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
1095
1096 pR0LoggerR3->idCpu = i;
1097 pR0LoggerR3->fCreated = true;
1098 pR0LoggerR3->fFlushingDisabled = false;
1099 }
1100
1101 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
1102 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
1103 AssertRC(rc);
1104 }
1105 }
1106#endif
1107 return rc;
1108}
1109
1110
1111/**
1112 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
1113 *
1114 * @returns Pointer to the buffer.
1115 * @param pVM The cross context VM structure.
1116 */
1117VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1118{
1119 if (!VM_IS_RAW_MODE_ENABLED(pVM))
1120 return pVM->vmm.s.szRing0AssertMsg1;
1121
1122 RTRCPTR RCPtr;
1123 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
1124 if (RT_SUCCESS(rc))
1125 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1126
1127 return NULL;
1128}
1129
1130
1131/**
1132 * Returns the VMCPU of the specified virtual CPU.
1133 *
1134 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1135 *
1136 * @param pUVM The user mode VM handle.
1137 * @param idCpu The ID of the virtual CPU.
1138 */
1139VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1140{
1141 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1142 AssertReturn(idCpu < pUVM->cCpus, NULL);
1143 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1144 return &pUVM->pVM->aCpus[idCpu];
1145}
1146
1147
1148/**
1149 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1150 *
1151 * @returns Pointer to the buffer.
1152 * @param pVM The cross context VM structure.
1153 */
1154VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1155{
1156 if (!VM_IS_RAW_MODE_ENABLED(pVM))
1157 return pVM->vmm.s.szRing0AssertMsg2;
1158
1159 RTRCPTR RCPtr;
1160 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1161 if (RT_SUCCESS(rc))
1162 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1163
1164 return NULL;
1165}
1166
1167
1168/**
1169 * Execute state save operation.
1170 *
1171 * @returns VBox status code.
1172 * @param pVM The cross context VM structure.
1173 * @param pSSM SSM operation handle.
1174 */
1175static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1176{
1177 LogFlow(("vmmR3Save:\n"));
1178
1179 /*
1180 * Save the started/stopped state of all CPUs except 0 as it will always
1181 * be running. This avoids breaking the saved state version. :-)
1182 */
1183 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1184 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1185
1186 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1187}
1188
1189
1190/**
1191 * Execute state load operation.
1192 *
1193 * @returns VBox status code.
1194 * @param pVM The cross context VM structure.
1195 * @param pSSM SSM operation handle.
1196 * @param uVersion Data layout version.
1197 * @param uPass The data pass.
1198 */
1199static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1200{
1201 LogFlow(("vmmR3Load:\n"));
1202 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1203
1204 /*
1205 * Validate version.
1206 */
1207 if ( uVersion != VMM_SAVED_STATE_VERSION
1208 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1209 {
1210 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1211 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1212 }
1213
1214 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1215 {
1216 /* Ignore the stack bottom, stack pointer and stack bits. */
1217 RTRCPTR RCPtrIgnored;
1218 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1219 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1220#ifdef RT_OS_DARWIN
1221 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1222 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1223 && SSMR3HandleRevision(pSSM) >= 48858
1224 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1225 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1226 )
1227 SSMR3Skip(pSSM, 16384);
1228 else
1229 SSMR3Skip(pSSM, 8192);
1230#else
1231 SSMR3Skip(pSSM, 8192);
1232#endif
1233 }
1234
1235 /*
1236 * Restore the VMCPU states. VCPU 0 is always started.
1237 */
1238 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1239 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1240 {
1241 bool fStarted;
1242 int rc = SSMR3GetBool(pSSM, &fStarted);
1243 if (RT_FAILURE(rc))
1244 return rc;
1245 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1246 }
1247
1248 /* terminator */
1249 uint32_t u32;
1250 int rc = SSMR3GetU32(pSSM, &u32);
1251 if (RT_FAILURE(rc))
1252 return rc;
1253 if (u32 != UINT32_MAX)
1254 {
1255 AssertMsgFailed(("u32=%#x\n", u32));
1256 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1257 }
1258 return VINF_SUCCESS;
1259}
1260
1261
1262#ifdef VBOX_WITH_RAW_MODE
1263/**
1264 * Resolve a builtin RC symbol.
1265 *
1266 * Called by PDM when loading or relocating RC modules.
1267 *
1268 * @returns VBox status
1269 * @param pVM The cross context VM structure.
1270 * @param pszSymbol Symbol to resolve.
1271 * @param pRCPtrValue Where to store the symbol value.
1272 *
1273 * @remark This has to work before VMMR3Relocate() is called.
1274 */
1275VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1276{
1277 if (!strcmp(pszSymbol, "g_Logger"))
1278 {
1279 if (pVM->vmm.s.pRCLoggerR3)
1280 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1281 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1282 }
1283 else if (!strcmp(pszSymbol, "g_RelLogger"))
1284 {
1285# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1286 if (pVM->vmm.s.pRCRelLoggerR3)
1287 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1288 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1289# else
1290 *pRCPtrValue = NIL_RTRCPTR;
1291# endif
1292 }
1293 else
1294 return VERR_SYMBOL_NOT_FOUND;
1295 return VINF_SUCCESS;
1296}
1297#endif /* VBOX_WITH_RAW_MODE */
1298
1299
1300/**
1301 * Suspends the CPU yielder.
1302 *
1303 * @param pVM The cross context VM structure.
1304 */
1305VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1306{
1307 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1308 if (!pVM->vmm.s.cYieldResumeMillies)
1309 {
1310 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1311 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1312 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1313 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1314 else
1315 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1316 TMTimerStop(pVM->vmm.s.pYieldTimer);
1317 }
1318 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1319}
1320
1321
1322/**
1323 * Stops the CPU yielder.
1324 *
1325 * @param pVM The cross context VM structure.
1326 */
1327VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1328{
1329 if (!pVM->vmm.s.cYieldResumeMillies)
1330 TMTimerStop(pVM->vmm.s.pYieldTimer);
1331 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1332 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1333}
1334
1335
1336/**
1337 * Resumes the CPU yielder when it has been a suspended or stopped.
1338 *
1339 * @param pVM The cross context VM structure.
1340 */
1341VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1342{
1343 if (pVM->vmm.s.cYieldResumeMillies)
1344 {
1345 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1346 pVM->vmm.s.cYieldResumeMillies = 0;
1347 }
1348}
1349
1350
1351/**
1352 * Internal timer callback function.
1353 *
1354 * @param pVM The cross context VM structure.
1355 * @param pTimer The timer handle.
1356 * @param pvUser User argument specified upon timer creation.
1357 */
1358static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1359{
1360 NOREF(pvUser);
1361
1362 /*
1363 * This really needs some careful tuning. While we shouldn't be too greedy since
1364 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1365 * because that'll cause us to stop up.
1366 *
1367 * The current logic is to use the default interval when there is no lag worth
1368 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1369 *
1370 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1371 * so the lag is up to date.)
1372 */
1373 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1374 if ( u64Lag < 50000000 /* 50ms */
1375 || ( u64Lag < 1000000000 /* 1s */
1376 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1377 )
1378 {
1379 uint64_t u64Elapsed = RTTimeNanoTS();
1380 pVM->vmm.s.u64LastYield = u64Elapsed;
1381
1382 RTThreadYield();
1383
1384#ifdef LOG_ENABLED
1385 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1386 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1387#endif
1388 }
1389 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1390}
1391
1392
1393#ifdef VBOX_WITH_RAW_MODE
1394/**
1395 * Executes guest code in the raw-mode context.
1396 *
1397 * @param pVM The cross context VM structure.
1398 * @param pVCpu The cross context virtual CPU structure.
1399 */
1400VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1401{
1402 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1403
1404 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1405
1406 /*
1407 * Set the hypervisor to resume executing a CPUM resume function
1408 * in CPUMRCA.asm.
1409 */
1410 CPUMSetHyperState(pVCpu,
1411 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1412 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1413 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1414 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1415 0, /* eax */
1416 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1417
1418 /*
1419 * We hide log flushes (outer) and hypervisor interrupts (inner).
1420 */
1421 for (;;)
1422 {
1423#ifdef VBOX_STRICT
1424 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1425 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1426 PGMMapCheck(pVM);
1427# ifdef VBOX_WITH_SAFE_STR
1428 SELMR3CheckShadowTR(pVM);
1429# endif
1430#endif
1431 int rc;
1432 do
1433 {
1434#ifdef NO_SUPCALLR0VMM
1435 rc = VERR_GENERAL_FAILURE;
1436#else
1437 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1438 if (RT_LIKELY(rc == VINF_SUCCESS))
1439 rc = pVCpu->vmm.s.iLastGZRc;
1440#endif
1441 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1442
1443 /*
1444 * Flush the logs.
1445 */
1446#ifdef LOG_ENABLED
1447 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1448 if ( pLogger
1449 && pLogger->offScratch > 0)
1450 RTLogFlushRC(NULL, pLogger);
1451#endif
1452#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1453 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1454 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1455 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1456#endif
1457 if (rc != VINF_VMM_CALL_HOST)
1458 {
1459 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1460 return rc;
1461 }
1462 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1463 if (RT_FAILURE(rc))
1464 return rc;
1465 /* Resume GC */
1466 }
1467}
1468#endif /* VBOX_WITH_RAW_MODE */
1469
1470
1471/**
1472 * Executes guest code (Intel VT-x and AMD-V).
1473 *
1474 * @param pVM The cross context VM structure.
1475 * @param pVCpu The cross context virtual CPU structure.
1476 */
1477VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1478{
1479 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1480
1481 for (;;)
1482 {
1483 int rc;
1484 do
1485 {
1486#ifdef NO_SUPCALLR0VMM
1487 rc = VERR_GENERAL_FAILURE;
1488#else
1489 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1490 if (RT_LIKELY(rc == VINF_SUCCESS))
1491 rc = pVCpu->vmm.s.iLastGZRc;
1492#endif
1493 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1494
1495#if 0 /** @todo triggers too often */
1496 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1497#endif
1498
1499 /*
1500 * Flush the logs
1501 */
1502#ifdef LOG_ENABLED
1503 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1504#endif
1505 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1506 if (rc != VINF_VMM_CALL_HOST)
1507 {
1508 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1509 return rc;
1510 }
1511 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1512 if (RT_FAILURE(rc))
1513 return rc;
1514 /* Resume R0 */
1515 }
1516}
1517
1518
1519/**
1520 * Perform one of the fast I/O control VMMR0 operation.
1521 *
1522 * @returns VBox strict status code.
1523 * @param pVM The cross context VM structure.
1524 * @param pVCpu The cross context virtual CPU structure.
1525 * @param enmOperation The operation to perform.
1526 */
1527VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1528{
1529 for (;;)
1530 {
1531 VBOXSTRICTRC rcStrict;
1532 do
1533 {
1534#ifdef NO_SUPCALLR0VMM
1535 rcStrict = VERR_GENERAL_FAILURE;
1536#else
1537 rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1538 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1539 rcStrict = pVCpu->vmm.s.iLastGZRc;
1540#endif
1541 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1542
1543 /*
1544 * Flush the logs
1545 */
1546#ifdef LOG_ENABLED
1547 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1548#endif
1549 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1550 if (rcStrict != VINF_VMM_CALL_HOST)
1551 return rcStrict;
1552 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1553 if (RT_FAILURE(rc))
1554 return rc;
1555 /* Resume R0 */
1556 }
1557}
1558
1559
1560/**
1561 * VCPU worker for VMMR3SendStartupIpi.
1562 *
1563 * @param pVM The cross context VM structure.
1564 * @param idCpu Virtual CPU to perform SIPI on.
1565 * @param uVector The SIPI vector.
1566 */
1567static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1568{
1569 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1570 VMCPU_ASSERT_EMT(pVCpu);
1571
1572 /*
1573 * In the INIT state, the target CPU is only responsive to an SIPI.
1574 * This is also true for when when the CPU is in VMX non-root mode.
1575 *
1576 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1577 * See Intel spec. 26.6.2 "Activity State".
1578 */
1579 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1580 return VINF_SUCCESS;
1581
1582
1583 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1584#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1585 if (CPUMIsGuestInVmxRootMode(pCtx))
1586 {
1587 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1588 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1589 return IEMExecVmxVmexitStartupIpi(pVCpu, uVector);
1590
1591 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1592 return VINF_SUCCESS;
1593 }
1594#endif
1595
1596 pCtx->cs.Sel = uVector << 8;
1597 pCtx->cs.ValidSel = uVector << 8;
1598 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1599 pCtx->cs.u64Base = uVector << 12;
1600 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1601 pCtx->rip = 0;
1602
1603 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1604
1605# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1606 EMSetState(pVCpu, EMSTATE_HALTED);
1607 return VINF_EM_RESCHEDULE;
1608# else /* And if we go the VMCPU::enmState way it can stay here. */
1609 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1610 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1611 return VINF_SUCCESS;
1612# endif
1613}
1614
1615
1616/**
1617 * VCPU worker for VMMR3SendInitIpi.
1618 *
1619 * @returns VBox status code.
1620 * @param pVM The cross context VM structure.
1621 * @param idCpu Virtual CPU to perform SIPI on.
1622 */
1623static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1624{
1625 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1626 VMCPU_ASSERT_EMT(pVCpu);
1627
1628 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1629
1630 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1631 * wait-for-SIPI state. Verify. */
1632
1633 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1634#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1635 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1636 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1637 return IEMExecVmxVmexitInitIpi(pVCpu);
1638#endif
1639
1640 /** @todo Figure out how to handle a nested-guest intercepts here for INIT
1641 * IPI (e.g. SVM_EXIT_INIT). */
1642
1643 PGMR3ResetCpu(pVM, pVCpu);
1644 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1645 APICR3InitIpi(pVCpu);
1646 TRPMR3ResetCpu(pVCpu);
1647 CPUMR3ResetCpu(pVM, pVCpu);
1648 EMR3ResetCpu(pVCpu);
1649 HMR3ResetCpu(pVCpu);
1650 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1651
1652 /* This will trickle up on the target EMT. */
1653 return VINF_EM_WAIT_SIPI;
1654}
1655
1656
1657/**
1658 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1659 * vector-dependent state and unhalting processor.
1660 *
1661 * @param pVM The cross context VM structure.
1662 * @param idCpu Virtual CPU to perform SIPI on.
1663 * @param uVector SIPI vector.
1664 */
1665VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1666{
1667 AssertReturnVoid(idCpu < pVM->cCpus);
1668
1669 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1670 AssertRC(rc);
1671}
1672
1673
1674/**
1675 * Sends init IPI to the virtual CPU.
1676 *
1677 * @param pVM The cross context VM structure.
1678 * @param idCpu Virtual CPU to perform int IPI on.
1679 */
1680VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1681{
1682 AssertReturnVoid(idCpu < pVM->cCpus);
1683
1684 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1685 AssertRC(rc);
1686}
1687
1688
1689/**
1690 * Registers the guest memory range that can be used for patching.
1691 *
1692 * @returns VBox status code.
1693 * @param pVM The cross context VM structure.
1694 * @param pPatchMem Patch memory range.
1695 * @param cbPatchMem Size of the memory range.
1696 */
1697VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1698{
1699 VM_ASSERT_EMT(pVM);
1700 if (HMIsEnabled(pVM))
1701 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1702
1703 return VERR_NOT_SUPPORTED;
1704}
1705
1706
1707/**
1708 * Deregisters the guest memory range that can be used for patching.
1709 *
1710 * @returns VBox status code.
1711 * @param pVM The cross context VM structure.
1712 * @param pPatchMem Patch memory range.
1713 * @param cbPatchMem Size of the memory range.
1714 */
1715VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1716{
1717 if (HMIsEnabled(pVM))
1718 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1719
1720 return VINF_SUCCESS;
1721}
1722
1723
1724/**
1725 * Common recursion handler for the other EMTs.
1726 *
1727 * @returns Strict VBox status code.
1728 * @param pVM The cross context VM structure.
1729 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1730 * @param rcStrict Current status code to be combined with the one
1731 * from this recursion and returned.
1732 */
1733static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1734{
1735 int rc2;
1736
1737 /*
1738 * We wait here while the initiator of this recursion reconfigures
1739 * everything. The last EMT to get in signals the initiator.
1740 */
1741 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1742 {
1743 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1744 AssertLogRelRC(rc2);
1745 }
1746
1747 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1748 AssertLogRelRC(rc2);
1749
1750 /*
1751 * Do the normal rendezvous processing.
1752 */
1753 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1754 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1755
1756 /*
1757 * Wait for the initiator to restore everything.
1758 */
1759 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1760 AssertLogRelRC(rc2);
1761
1762 /*
1763 * Last thread out of here signals the initiator.
1764 */
1765 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1766 {
1767 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1768 AssertLogRelRC(rc2);
1769 }
1770
1771 /*
1772 * Merge status codes and return.
1773 */
1774 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1775 if ( rcStrict2 != VINF_SUCCESS
1776 && ( rcStrict == VINF_SUCCESS
1777 || rcStrict > rcStrict2))
1778 rcStrict = rcStrict2;
1779 return rcStrict;
1780}
1781
1782
1783/**
1784 * Count returns and have the last non-caller EMT wake up the caller.
1785 *
1786 * @returns VBox strict informational status code for EM scheduling. No failures
1787 * will be returned here, those are for the caller only.
1788 *
1789 * @param pVM The cross context VM structure.
1790 * @param rcStrict The current accumulated recursive status code,
1791 * to be merged with i32RendezvousStatus and
1792 * returned.
1793 */
1794DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1795{
1796 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1797
1798 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1799 if (cReturned == pVM->cCpus - 1U)
1800 {
1801 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1802 AssertLogRelRC(rc);
1803 }
1804
1805 /*
1806 * Merge the status codes, ignoring error statuses in this code path.
1807 */
1808 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1809 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1810 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1811 VERR_IPE_UNEXPECTED_INFO_STATUS);
1812
1813 if (RT_SUCCESS(rcStrict2))
1814 {
1815 if ( rcStrict2 != VINF_SUCCESS
1816 && ( rcStrict == VINF_SUCCESS
1817 || rcStrict > rcStrict2))
1818 rcStrict = rcStrict2;
1819 }
1820 return rcStrict;
1821}
1822
1823
1824/**
1825 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1826 *
1827 * @returns VBox strict informational status code for EM scheduling. No failures
1828 * will be returned here, those are for the caller only. When
1829 * fIsCaller is set, VINF_SUCCESS is always returned.
1830 *
1831 * @param pVM The cross context VM structure.
1832 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1833 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1834 * not.
1835 * @param fFlags The flags.
1836 * @param pfnRendezvous The callback.
1837 * @param pvUser The user argument for the callback.
1838 */
1839static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1840 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1841{
1842 int rc;
1843 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1844
1845 /*
1846 * Enter, the last EMT triggers the next callback phase.
1847 */
1848 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1849 if (cEntered != pVM->cCpus)
1850 {
1851 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1852 {
1853 /* Wait for our turn. */
1854 for (;;)
1855 {
1856 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1857 AssertLogRelRC(rc);
1858 if (!pVM->vmm.s.fRendezvousRecursion)
1859 break;
1860 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1861 }
1862 }
1863 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1864 {
1865 /* Wait for the last EMT to arrive and wake everyone up. */
1866 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1867 AssertLogRelRC(rc);
1868 Assert(!pVM->vmm.s.fRendezvousRecursion);
1869 }
1870 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1871 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1872 {
1873 /* Wait for our turn. */
1874 for (;;)
1875 {
1876 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1877 AssertLogRelRC(rc);
1878 if (!pVM->vmm.s.fRendezvousRecursion)
1879 break;
1880 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1881 }
1882 }
1883 else
1884 {
1885 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1886
1887 /*
1888 * The execute once is handled specially to optimize the code flow.
1889 *
1890 * The last EMT to arrive will perform the callback and the other
1891 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1892 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1893 * returns, that EMT will initiate the normal return sequence.
1894 */
1895 if (!fIsCaller)
1896 {
1897 for (;;)
1898 {
1899 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1900 AssertLogRelRC(rc);
1901 if (!pVM->vmm.s.fRendezvousRecursion)
1902 break;
1903 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1904 }
1905
1906 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1907 }
1908 return VINF_SUCCESS;
1909 }
1910 }
1911 else
1912 {
1913 /*
1914 * All EMTs are waiting, clear the FF and take action according to the
1915 * execution method.
1916 */
1917 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1918
1919 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1920 {
1921 /* Wake up everyone. */
1922 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1923 AssertLogRelRC(rc);
1924 }
1925 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1926 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1927 {
1928 /* Figure out who to wake up and wake it up. If it's ourself, then
1929 it's easy otherwise wait for our turn. */
1930 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1931 ? 0
1932 : pVM->cCpus - 1U;
1933 if (pVCpu->idCpu != iFirst)
1934 {
1935 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1936 AssertLogRelRC(rc);
1937 for (;;)
1938 {
1939 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1940 AssertLogRelRC(rc);
1941 if (!pVM->vmm.s.fRendezvousRecursion)
1942 break;
1943 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1944 }
1945 }
1946 }
1947 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1948 }
1949
1950
1951 /*
1952 * Do the callback and update the status if necessary.
1953 */
1954 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1955 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1956 {
1957 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1958 if (rcStrict2 != VINF_SUCCESS)
1959 {
1960 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1961 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1962 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1963 int32_t i32RendezvousStatus;
1964 do
1965 {
1966 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1967 if ( rcStrict2 == i32RendezvousStatus
1968 || RT_FAILURE(i32RendezvousStatus)
1969 || ( i32RendezvousStatus != VINF_SUCCESS
1970 && rcStrict2 > i32RendezvousStatus))
1971 break;
1972 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1973 }
1974 }
1975
1976 /*
1977 * Increment the done counter and take action depending on whether we're
1978 * the last to finish callback execution.
1979 */
1980 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1981 if ( cDone != pVM->cCpus
1982 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1983 {
1984 /* Signal the next EMT? */
1985 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1986 {
1987 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1988 AssertLogRelRC(rc);
1989 }
1990 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1991 {
1992 Assert(cDone == pVCpu->idCpu + 1U);
1993 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1994 AssertLogRelRC(rc);
1995 }
1996 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1997 {
1998 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1999 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
2000 AssertLogRelRC(rc);
2001 }
2002
2003 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
2004 if (!fIsCaller)
2005 {
2006 for (;;)
2007 {
2008 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
2009 AssertLogRelRC(rc);
2010 if (!pVM->vmm.s.fRendezvousRecursion)
2011 break;
2012 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
2013 }
2014 }
2015 }
2016 else
2017 {
2018 /* Callback execution is all done, tell the rest to return. */
2019 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
2020 AssertLogRelRC(rc);
2021 }
2022
2023 if (!fIsCaller)
2024 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
2025 return rcStrictRecursion;
2026}
2027
2028
2029/**
2030 * Called in response to VM_FF_EMT_RENDEZVOUS.
2031 *
2032 * @returns VBox strict status code - EM scheduling. No errors will be returned
2033 * here, nor will any non-EM scheduling status codes be returned.
2034 *
2035 * @param pVM The cross context VM structure.
2036 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
2037 *
2038 * @thread EMT
2039 */
2040VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
2041{
2042 Assert(!pVCpu->vmm.s.fInRendezvous);
2043 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
2044 pVCpu->vmm.s.fInRendezvous = true;
2045 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
2046 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
2047 pVCpu->vmm.s.fInRendezvous = false;
2048 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2049 return VBOXSTRICTRC_TODO(rcStrict);
2050}
2051
2052
2053/**
2054 * Helper for resetting an single wakeup event sempahore.
2055 *
2056 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
2057 * @param hEvt The event semaphore to reset.
2058 */
2059static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
2060{
2061 for (uint32_t cLoops = 0; ; cLoops++)
2062 {
2063 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
2064 if (rc != VINF_SUCCESS || cLoops > _4K)
2065 return rc;
2066 }
2067}
2068
2069
2070/**
2071 * Worker for VMMR3EmtRendezvous that handles recursion.
2072 *
2073 * @returns VBox strict status code. This will be the first error,
2074 * VINF_SUCCESS, or an EM scheduling status code.
2075 *
2076 * @param pVM The cross context VM structure.
2077 * @param pVCpu The cross context virtual CPU structure of the
2078 * calling EMT.
2079 * @param fFlags Flags indicating execution methods. See
2080 * grp_VMMR3EmtRendezvous_fFlags.
2081 * @param pfnRendezvous The callback.
2082 * @param pvUser User argument for the callback.
2083 *
2084 * @thread EMT(pVCpu)
2085 */
2086static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
2087 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2088{
2089 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
2090 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2091 Assert(pVCpu->vmm.s.fInRendezvous);
2092
2093 /*
2094 * Save the current state.
2095 */
2096 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2097 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
2098 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
2099 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
2100 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
2101
2102 /*
2103 * Check preconditions and save the current state.
2104 */
2105 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2106 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2107 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2108 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2109 VERR_INTERNAL_ERROR);
2110 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
2111 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
2112
2113 /*
2114 * Reset the recursion prep and pop semaphores.
2115 */
2116 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2117 AssertLogRelRCReturn(rc, rc);
2118 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2119 AssertLogRelRCReturn(rc, rc);
2120 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
2121 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2122 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
2123 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2124
2125 /*
2126 * Usher the other thread into the recursion routine.
2127 */
2128 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
2129 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
2130
2131 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
2132 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
2133 while (cLeft-- > 0)
2134 {
2135 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
2136 AssertLogRelRC(rc);
2137 }
2138 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
2139 {
2140 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
2141 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
2142 {
2143 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
2144 AssertLogRelRC(rc);
2145 }
2146 }
2147 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
2148 {
2149 Assert(cLeft == pVCpu->idCpu);
2150 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
2151 {
2152 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
2153 AssertLogRelRC(rc);
2154 }
2155 }
2156 else
2157 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2158 VERR_INTERNAL_ERROR_4);
2159
2160 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
2161 AssertLogRelRC(rc);
2162 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2163 AssertLogRelRC(rc);
2164
2165
2166 /*
2167 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
2168 */
2169 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2170 {
2171 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2172 AssertLogRelRC(rc);
2173 }
2174
2175 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2176
2177 /*
2178 * Clear the slate and setup the new rendezvous.
2179 */
2180 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2181 {
2182 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2183 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2184 }
2185 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2186 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2187 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2188 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2189
2190 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2191 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2192 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2193 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2194 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2195 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2196 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2197 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2198
2199 /*
2200 * We're ready to go now, do normal rendezvous processing.
2201 */
2202 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2203 AssertLogRelRC(rc);
2204
2205 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
2206
2207 /*
2208 * The caller waits for the other EMTs to be done, return and waiting on the
2209 * pop semaphore.
2210 */
2211 for (;;)
2212 {
2213 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2214 AssertLogRelRC(rc);
2215 if (!pVM->vmm.s.fRendezvousRecursion)
2216 break;
2217 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2218 }
2219
2220 /*
2221 * Get the return code and merge it with the above recursion status.
2222 */
2223 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2224 if ( rcStrict2 != VINF_SUCCESS
2225 && ( rcStrict == VINF_SUCCESS
2226 || rcStrict > rcStrict2))
2227 rcStrict = rcStrict2;
2228
2229 /*
2230 * Restore the parent rendezvous state.
2231 */
2232 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2233 {
2234 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2235 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2236 }
2237 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2238 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2239 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2240 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2241
2242 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2243 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2244 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2245 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2246 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2247 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2248 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
2249
2250 /*
2251 * Usher the other EMTs back to their parent recursion routine, waiting
2252 * for them to all get there before we return (makes sure they've been
2253 * scheduled and are past the pop event sem, see below).
2254 */
2255 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2256 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2257 AssertLogRelRC(rc);
2258
2259 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2260 {
2261 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2262 AssertLogRelRC(rc);
2263 }
2264
2265 /*
2266 * We must reset the pop semaphore on the way out (doing the pop caller too,
2267 * just in case). The parent may be another recursion.
2268 */
2269 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2270 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2271
2272 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2273
2274 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2275 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2276 return rcStrict;
2277}
2278
2279
2280/**
2281 * EMT rendezvous.
2282 *
2283 * Gathers all the EMTs and execute some code on each of them, either in a one
2284 * by one fashion or all at once.
2285 *
2286 * @returns VBox strict status code. This will be the first error,
2287 * VINF_SUCCESS, or an EM scheduling status code.
2288 *
2289 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2290 * doesn't support it or if the recursion is too deep.
2291 *
2292 * @param pVM The cross context VM structure.
2293 * @param fFlags Flags indicating execution methods. See
2294 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2295 * descending and ascending rendezvous types support
2296 * recursion from inside @a pfnRendezvous.
2297 * @param pfnRendezvous The callback.
2298 * @param pvUser User argument for the callback.
2299 *
2300 * @thread Any.
2301 */
2302VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2303{
2304 /*
2305 * Validate input.
2306 */
2307 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2308 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2309 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2310 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2311 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2312 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2313 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2314 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2315
2316 VBOXSTRICTRC rcStrict;
2317 PVMCPU pVCpu = VMMGetCpu(pVM);
2318 if (!pVCpu)
2319 {
2320 /*
2321 * Forward the request to an EMT thread.
2322 */
2323 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2324 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2325 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2326 else
2327 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2328 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2329 }
2330 else if ( pVM->cCpus == 1
2331 || ( pVM->enmVMState == VMSTATE_DESTROYING
2332 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2333 {
2334 /*
2335 * Shortcut for the single EMT case.
2336 *
2337 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2338 * during vmR3Destroy after other emulation threads have started terminating.
2339 */
2340 if (!pVCpu->vmm.s.fInRendezvous)
2341 {
2342 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2343 pVCpu->vmm.s.fInRendezvous = true;
2344 pVM->vmm.s.fRendezvousFlags = fFlags;
2345 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2346 pVCpu->vmm.s.fInRendezvous = false;
2347 }
2348 else
2349 {
2350 /* Recursion. Do the same checks as in the SMP case. */
2351 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2352 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2353 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2354 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2355 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2356 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2357 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2358 , VERR_DEADLOCK);
2359
2360 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2361 pVM->vmm.s.cRendezvousRecursions++;
2362 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2363 pVM->vmm.s.fRendezvousFlags = fFlags;
2364
2365 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2366
2367 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2368 pVM->vmm.s.cRendezvousRecursions--;
2369 }
2370 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2371 }
2372 else
2373 {
2374 /*
2375 * Spin lock. If busy, check for recursion, if not recursing wait for
2376 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2377 */
2378 int rc;
2379 rcStrict = VINF_SUCCESS;
2380 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2381 {
2382 /* Allow recursion in some cases. */
2383 if ( pVCpu->vmm.s.fInRendezvous
2384 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2385 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2386 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2387 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2388 ))
2389 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2390
2391 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2392 VERR_DEADLOCK);
2393
2394 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2395 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2396 {
2397 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2398 {
2399 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2400 if ( rc != VINF_SUCCESS
2401 && ( rcStrict == VINF_SUCCESS
2402 || rcStrict > rc))
2403 rcStrict = rc;
2404 /** @todo Perhaps deal with termination here? */
2405 }
2406 ASMNopPause();
2407 }
2408 }
2409
2410 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2411 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2412 Assert(!pVCpu->vmm.s.fInRendezvous);
2413 pVCpu->vmm.s.fInRendezvous = true;
2414
2415 /*
2416 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2417 */
2418 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2419 {
2420 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2421 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2422 }
2423 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2424 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2425 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2426 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2427 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2428 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2429 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2430 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2431 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2432 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2433 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2434
2435 /*
2436 * Set the FF and poke the other EMTs.
2437 */
2438 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2439 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2440
2441 /*
2442 * Do the same ourselves.
2443 */
2444 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2445
2446 /*
2447 * The caller waits for the other EMTs to be done and return before doing
2448 * the cleanup. This makes away with wakeup / reset races we would otherwise
2449 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2450 */
2451 for (;;)
2452 {
2453 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2454 AssertLogRelRC(rc);
2455 if (!pVM->vmm.s.fRendezvousRecursion)
2456 break;
2457 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2458 }
2459
2460 /*
2461 * Get the return code and clean up a little bit.
2462 */
2463 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2464 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2465
2466 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2467 pVCpu->vmm.s.fInRendezvous = false;
2468
2469 /*
2470 * Merge rcStrict, rcStrict2 and rcStrict3.
2471 */
2472 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2473 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2474 if ( rcStrict2 != VINF_SUCCESS
2475 && ( rcStrict == VINF_SUCCESS
2476 || rcStrict > rcStrict2))
2477 rcStrict = rcStrict2;
2478 if ( rcStrict3 != VINF_SUCCESS
2479 && ( rcStrict == VINF_SUCCESS
2480 || rcStrict > rcStrict3))
2481 rcStrict = rcStrict3;
2482 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2483 }
2484
2485 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2486 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2487 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2488 VERR_IPE_UNEXPECTED_INFO_STATUS);
2489 return VBOXSTRICTRC_VAL(rcStrict);
2490}
2491
2492
2493/**
2494 * Read from the ring 0 jump buffer stack.
2495 *
2496 * @returns VBox status code.
2497 *
2498 * @param pVM The cross context VM structure.
2499 * @param idCpu The ID of the source CPU context (for the address).
2500 * @param R0Addr Where to start reading.
2501 * @param pvBuf Where to store the data we've read.
2502 * @param cbRead The number of bytes to read.
2503 */
2504VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2505{
2506 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2507 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2508 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2509
2510 int rc;
2511#ifdef VMM_R0_SWITCH_STACK
2512 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2513#else
2514 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2515#endif
2516 if ( off < VMM_STACK_SIZE
2517 && off + cbRead <= VMM_STACK_SIZE)
2518 {
2519 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2520 rc = VINF_SUCCESS;
2521 }
2522 else
2523 rc = VERR_INVALID_POINTER;
2524
2525 /* Supply the setjmp return RIP/EIP. */
2526 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2527 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2528 {
2529 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2530 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2531 size_t offDst = 0;
2532 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2533 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2534 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2535 {
2536 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2537 Assert(offSrc < cbSrc);
2538 pbSrc -= offSrc;
2539 cbSrc -= offSrc;
2540 }
2541 if (cbSrc > cbRead - offDst)
2542 cbSrc = cbRead - offDst;
2543 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2544
2545 if (cbSrc == cbRead)
2546 rc = VINF_SUCCESS;
2547 }
2548
2549 return rc;
2550}
2551
2552
2553/**
2554 * Used by the DBGF stack unwinder to initialize the register state.
2555 *
2556 * @param pUVM The user mode VM handle.
2557 * @param idCpu The ID of the CPU being unwound.
2558 * @param pState The unwind state to initialize.
2559 */
2560VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2561{
2562 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2563 AssertReturnVoid(pVCpu);
2564
2565 /*
2566 * Locate the resume point on the stack.
2567 */
2568#ifdef VMM_R0_SWITCH_STACK
2569 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2570 AssertReturnVoid(off < VMM_STACK_SIZE);
2571#else
2572 uintptr_t off = 0;
2573#endif
2574
2575#ifdef RT_ARCH_AMD64
2576 /*
2577 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2578 */
2579# ifdef VBOX_STRICT
2580 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2581 off += 8; /* RESUME_MAGIC */
2582# endif
2583# ifdef RT_OS_WINDOWS
2584 off += 0xa0; /* XMM6 thru XMM15 */
2585# endif
2586 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2587 off += 8;
2588 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2589 off += 8;
2590# ifdef RT_OS_WINDOWS
2591 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2592 off += 8;
2593 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2594 off += 8;
2595# endif
2596 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2597 off += 8;
2598 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2599 off += 8;
2600 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2601 off += 8;
2602 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2603 off += 8;
2604 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2605 off += 8;
2606 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2607 off += 8;
2608
2609#elif defined(RT_ARCH_X86)
2610 /*
2611 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2612 */
2613# ifdef VBOX_STRICT
2614 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2615 off += 4; /* RESUME_MAGIC */
2616# endif
2617 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2618 off += 4;
2619 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2620 off += 4;
2621 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2622 off += 4;
2623 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2624 off += 4;
2625 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2626 off += 4;
2627 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2628 off += 4;
2629#else
2630# error "Port me"
2631#endif
2632
2633 /*
2634 * This is all we really need here, though the above helps if the assembly
2635 * doesn't contain unwind info (currently only on win/64, so that is useful).
2636 */
2637 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2638 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2639}
2640
2641#ifdef VBOX_WITH_RAW_MODE
2642
2643/**
2644 * Calls a RC function.
2645 *
2646 * @param pVM The cross context VM structure.
2647 * @param RCPtrEntry The address of the RC function.
2648 * @param cArgs The number of arguments in the ....
2649 * @param ... Arguments to the function.
2650 */
2651VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2652{
2653 va_list args;
2654 va_start(args, cArgs);
2655 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2656 va_end(args);
2657 return rc;
2658}
2659
2660
2661/**
2662 * Calls a RC function.
2663 *
2664 * @param pVM The cross context VM structure.
2665 * @param RCPtrEntry The address of the RC function.
2666 * @param cArgs The number of arguments in the ....
2667 * @param args Arguments to the function.
2668 */
2669VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2670{
2671 /* Raw mode implies 1 VCPU. */
2672 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2673 PVMCPU pVCpu = &pVM->aCpus[0];
2674
2675 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2676
2677 /*
2678 * Setup the call frame using the trampoline.
2679 */
2680 CPUMSetHyperState(pVCpu,
2681 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2682 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2683 RCPtrEntry, /* eax */
2684 cArgs /* edx */
2685 );
2686
2687#if 0
2688 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2689#endif
2690 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2691 int i = cArgs;
2692 while (i-- > 0)
2693 *pFrame++ = va_arg(args, RTGCUINTPTR32);
2694
2695 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2696 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2697
2698 /*
2699 * We hide log flushes (outer) and hypervisor interrupts (inner).
2700 */
2701 for (;;)
2702 {
2703 int rc;
2704 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2705 do
2706 {
2707#ifdef NO_SUPCALLR0VMM
2708 rc = VERR_GENERAL_FAILURE;
2709#else
2710 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2711 if (RT_LIKELY(rc == VINF_SUCCESS))
2712 rc = pVCpu->vmm.s.iLastGZRc;
2713#endif
2714 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2715
2716 /*
2717 * Flush the loggers.
2718 */
2719#ifdef LOG_ENABLED
2720 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2721 if ( pLogger
2722 && pLogger->offScratch > 0)
2723 RTLogFlushRC(NULL, pLogger);
2724#endif
2725#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2726 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2727 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2728 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2729#endif
2730 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2731 VMMR3FatalDump(pVM, pVCpu, rc);
2732 if (rc != VINF_VMM_CALL_HOST)
2733 {
2734 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2735 return rc;
2736 }
2737 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2738 if (RT_FAILURE(rc))
2739 return rc;
2740 }
2741}
2742
2743#endif /* VBOX_WITH_RAW_MODE */
2744
2745/**
2746 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2747 *
2748 * @returns VBox status code.
2749 * @param pVM The cross context VM structure.
2750 * @param uOperation Operation to execute.
2751 * @param u64Arg Constant argument.
2752 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2753 * details.
2754 */
2755VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2756{
2757 PVMCPU pVCpu = VMMGetCpu(pVM);
2758 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2759 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2760}
2761
2762
2763/**
2764 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2765 *
2766 * @returns VBox status code.
2767 * @param pVM The cross context VM structure.
2768 * @param pVCpu The cross context VM structure.
2769 * @param enmOperation Operation to execute.
2770 * @param u64Arg Constant argument.
2771 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2772 * details.
2773 */
2774VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2775{
2776 int rc;
2777 for (;;)
2778 {
2779#ifdef NO_SUPCALLR0VMM
2780 rc = VERR_GENERAL_FAILURE;
2781#else
2782 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2783#endif
2784 /*
2785 * Flush the logs.
2786 */
2787#ifdef LOG_ENABLED
2788 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2789#endif
2790 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2791 if (rc != VINF_VMM_CALL_HOST)
2792 break;
2793 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2794 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2795 break;
2796 /* Resume R0 */
2797 }
2798
2799 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2800 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2801 VERR_IPE_UNEXPECTED_INFO_STATUS);
2802 return rc;
2803}
2804
2805
2806#ifdef VBOX_WITH_RAW_MODE
2807/**
2808 * Resumes executing hypervisor code when interrupted by a queue flush or a
2809 * debug event.
2810 *
2811 * @returns VBox status code.
2812 * @param pVM The cross context VM structure.
2813 * @param pVCpu The cross context virtual CPU structure.
2814 */
2815VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2816{
2817 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2818 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2819
2820 /*
2821 * We hide log flushes (outer) and hypervisor interrupts (inner).
2822 */
2823 for (;;)
2824 {
2825 int rc;
2826 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2827 do
2828 {
2829# ifdef NO_SUPCALLR0VMM
2830 rc = VERR_GENERAL_FAILURE;
2831# else
2832 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2833 if (RT_LIKELY(rc == VINF_SUCCESS))
2834 rc = pVCpu->vmm.s.iLastGZRc;
2835# endif
2836 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2837
2838 /*
2839 * Flush the loggers.
2840 */
2841# ifdef LOG_ENABLED
2842 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2843 if ( pLogger
2844 && pLogger->offScratch > 0)
2845 RTLogFlushRC(NULL, pLogger);
2846# endif
2847# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2848 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2849 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2850 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2851# endif
2852 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2853 VMMR3FatalDump(pVM, pVCpu, rc);
2854 if (rc != VINF_VMM_CALL_HOST)
2855 {
2856 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2857 return rc;
2858 }
2859 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2860 if (RT_FAILURE(rc))
2861 return rc;
2862 }
2863}
2864#endif /* VBOX_WITH_RAW_MODE */
2865
2866
2867/**
2868 * Service a call to the ring-3 host code.
2869 *
2870 * @returns VBox status code.
2871 * @param pVM The cross context VM structure.
2872 * @param pVCpu The cross context virtual CPU structure.
2873 * @remarks Careful with critsects.
2874 */
2875static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2876{
2877 /*
2878 * We must also check for pending critsect exits or else we can deadlock
2879 * when entering other critsects here.
2880 */
2881 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2882 PDMCritSectBothFF(pVCpu);
2883
2884 switch (pVCpu->vmm.s.enmCallRing3Operation)
2885 {
2886 /*
2887 * Acquire a critical section.
2888 */
2889 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2890 {
2891 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2892 true /*fCallRing3*/);
2893 break;
2894 }
2895
2896 /*
2897 * Enter a r/w critical section exclusively.
2898 */
2899 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2900 {
2901 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2902 true /*fCallRing3*/);
2903 break;
2904 }
2905
2906 /*
2907 * Enter a r/w critical section shared.
2908 */
2909 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2910 {
2911 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2912 true /*fCallRing3*/);
2913 break;
2914 }
2915
2916 /*
2917 * Acquire the PDM lock.
2918 */
2919 case VMMCALLRING3_PDM_LOCK:
2920 {
2921 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2922 break;
2923 }
2924
2925 /*
2926 * Grow the PGM pool.
2927 */
2928 case VMMCALLRING3_PGM_POOL_GROW:
2929 {
2930 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2931 break;
2932 }
2933
2934 /*
2935 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2936 */
2937 case VMMCALLRING3_PGM_MAP_CHUNK:
2938 {
2939 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2940 break;
2941 }
2942
2943 /*
2944 * Allocates more handy pages.
2945 */
2946 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2947 {
2948 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2949 break;
2950 }
2951
2952 /*
2953 * Allocates a large page.
2954 */
2955 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2956 {
2957 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2958 break;
2959 }
2960
2961 /*
2962 * Acquire the PGM lock.
2963 */
2964 case VMMCALLRING3_PGM_LOCK:
2965 {
2966 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2967 break;
2968 }
2969
2970 /*
2971 * Acquire the MM hypervisor heap lock.
2972 */
2973 case VMMCALLRING3_MMHYPER_LOCK:
2974 {
2975 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2976 break;
2977 }
2978
2979#ifdef VBOX_WITH_REM
2980 /*
2981 * Flush REM handler notifications.
2982 */
2983 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2984 {
2985 REMR3ReplayHandlerNotifications(pVM);
2986 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2987 break;
2988 }
2989#endif
2990
2991 /*
2992 * This is a noop. We just take this route to avoid unnecessary
2993 * tests in the loops.
2994 */
2995 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2996 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2997 LogAlways(("*FLUSH*\n"));
2998 break;
2999
3000 /*
3001 * Set the VM error message.
3002 */
3003 case VMMCALLRING3_VM_SET_ERROR:
3004 VMR3SetErrorWorker(pVM);
3005 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
3006 break;
3007
3008 /*
3009 * Set the VM runtime error message.
3010 */
3011 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
3012 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
3013 break;
3014
3015 /*
3016 * Signal a ring 0 hypervisor assertion.
3017 * Cancel the longjmp operation that's in progress.
3018 */
3019 case VMMCALLRING3_VM_R0_ASSERTION:
3020 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
3021 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
3022#ifdef RT_ARCH_X86
3023 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
3024#else
3025 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
3026#endif
3027#ifdef VMM_R0_SWITCH_STACK
3028 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
3029#endif
3030 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
3031 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
3032 return VERR_VMM_RING0_ASSERTION;
3033
3034 /*
3035 * A forced switch to ring 0 for preemption purposes.
3036 */
3037 case VMMCALLRING3_VM_R0_PREEMPT:
3038 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
3039 break;
3040
3041 case VMMCALLRING3_FTM_SET_CHECKPOINT:
3042 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
3043 break;
3044
3045 default:
3046 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
3047 return VERR_VMM_UNKNOWN_RING3_CALL;
3048 }
3049
3050 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
3051 return VINF_SUCCESS;
3052}
3053
3054
3055/**
3056 * Displays the Force action Flags.
3057 *
3058 * @param pVM The cross context VM structure.
3059 * @param pHlp The output helpers.
3060 * @param pszArgs The additional arguments (ignored).
3061 */
3062static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
3063{
3064 int c;
3065 uint32_t f;
3066 NOREF(pszArgs);
3067
3068#define PRINT_FLAG(prf,flag) do { \
3069 if (f & (prf##flag)) \
3070 { \
3071 static const char *s_psz = #flag; \
3072 if (!(c % 6)) \
3073 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
3074 else \
3075 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
3076 c++; \
3077 f &= ~(prf##flag); \
3078 } \
3079 } while (0)
3080
3081#define PRINT_GROUP(prf,grp,sfx) do { \
3082 if (f & (prf##grp##sfx)) \
3083 { \
3084 static const char *s_psz = #grp; \
3085 if (!(c % 5)) \
3086 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
3087 else \
3088 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
3089 c++; \
3090 } \
3091 } while (0)
3092
3093 /*
3094 * The global flags.
3095 */
3096 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
3097 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
3098
3099 /* show the flag mnemonics */
3100 c = 0;
3101 f = fGlobalForcedActions;
3102 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
3103 PRINT_FLAG(VM_FF_,PDM_QUEUES);
3104 PRINT_FLAG(VM_FF_,PDM_DMA);
3105 PRINT_FLAG(VM_FF_,DBGF);
3106 PRINT_FLAG(VM_FF_,REQUEST);
3107 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
3108 PRINT_FLAG(VM_FF_,RESET);
3109 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
3110 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
3111 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
3112 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
3113 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
3114 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
3115 if (f)
3116 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
3117 else
3118 pHlp->pfnPrintf(pHlp, "\n");
3119
3120 /* the groups */
3121 c = 0;
3122 f = fGlobalForcedActions;
3123 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
3124 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
3125 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
3126 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
3127 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
3128 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
3129 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
3130 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
3131 if (c)
3132 pHlp->pfnPrintf(pHlp, "\n");
3133
3134 /*
3135 * Per CPU flags.
3136 */
3137 for (VMCPUID i = 0; i < pVM->cCpus; i++)
3138 {
3139 const uint64_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
3140 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
3141
3142 /* show the flag mnemonics */
3143 c = 0;
3144 f = fLocalForcedActions;
3145 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
3146 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
3147 PRINT_FLAG(VMCPU_FF_,TIMER);
3148 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
3149 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
3150 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
3151 PRINT_FLAG(VMCPU_FF_,UNHALT);
3152 PRINT_FLAG(VMCPU_FF_,IEM);
3153 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
3154 PRINT_FLAG(VMCPU_FF_,DBGF);
3155 PRINT_FLAG(VMCPU_FF_,REQUEST);
3156 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
3157 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
3158 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
3159 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
3160 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
3161 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
3162 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
3163 PRINT_FLAG(VMCPU_FF_,TO_R3);
3164 PRINT_FLAG(VMCPU_FF_,IOM);
3165#ifdef VBOX_WITH_RAW_MODE
3166 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
3167 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
3168 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
3169 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
3170 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
3171 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
3172 PRINT_FLAG(VMCPU_FF_,CPUM);
3173#endif
3174 if (f)
3175 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
3176 else
3177 pHlp->pfnPrintf(pHlp, "\n");
3178
3179 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
3180 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
3181
3182 /* the groups */
3183 c = 0;
3184 f = fLocalForcedActions;
3185 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
3186 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
3187 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
3188 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
3189 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
3190 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
3191 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
3192 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
3193 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
3194 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
3195 if (c)
3196 pHlp->pfnPrintf(pHlp, "\n");
3197 }
3198
3199#undef PRINT_FLAG
3200#undef PRINT_GROUP
3201}
3202
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