VMM.cpp@ 80003

Last change on this file since 80003 was 80003, checked in by vboxsync, 5 years ago
VMM: Kicking out raw-mode (work in progress). bugref:9517
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1	/* $Id: VMM.cpp 80003 2019-07-26 13:37:47Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_csam
32	* - @subpage pg_dbgf
33	* - @subpage pg_em
34	* - @subpage pg_gim
35	* - @subpage pg_gmm
36	* - @subpage pg_gvmm
37	* - @subpage pg_hm
38	* - @subpage pg_iem
39	* - @subpage pg_iom
40	* - @subpage pg_mm
41	* - @subpage pg_patm
42	* - @subpage pg_pdm
43	* - @subpage pg_pgm
44	* - @subpage pg_rem
45	* - @subpage pg_selm
46	* - @subpage pg_ssm
47	* - @subpage pg_stam
48	* - @subpage pg_tm
49	* - @subpage pg_trpm
50	* - @subpage pg_vm
51	*
52	*
53	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54	*
55	*
56	* @section sec_vmmstate VMM State
57	*
58	* @image html VM_Statechart_Diagram.gif
59	*
60	* To be written.
61	*
62	*
63	* @subsection subsec_vmm_init VMM Initialization
64	*
65	* To be written.
66	*
67	*
68	* @subsection subsec_vmm_term VMM Termination
69	*
70	* To be written.
71	*
72	*
73	* @section sec_vmm_limits VMM Limits
74	*
75	* There are various resource limits imposed by the VMM and it's
76	* sub-components. We'll list some of them here.
77	*
78	* On 64-bit hosts:
79	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80	* can be increased up to 64K - 1.
81	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83	* - A VM can be assigned all the memory we can use (16TB), however, the
84	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86	*
87	* On 32-bit hosts:
88	* - Max 127 VMs. Imposed by GMM's per page structure.
89	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 28-bit page ID used
91	* internally in GMM. It is also limited by PAE.
92	* - A VM can be assigned all the memory GMM can allocate, however, the
93	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95	*
96	*/
97
98
99	/*********************************************************************************************************************************
100	* Header Files *
101	*********************************************************************************************************************************/
102	#define LOG_GROUP LOG_GROUP_VMM
103	#include <VBox/vmm/vmm.h>
104	#include <VBox/vmm/vmapi.h>
105	#include <VBox/vmm/pgm.h>
106	#include <VBox/vmm/cfgm.h>
107	#include <VBox/vmm/pdmqueue.h>
108	#include <VBox/vmm/pdmcritsect.h>
109	#include <VBox/vmm/pdmcritsectrw.h>
110	#include <VBox/vmm/pdmapi.h>
111	#include <VBox/vmm/cpum.h>
112	#include <VBox/vmm/gim.h>
113	#include <VBox/vmm/mm.h>
114	#include <VBox/vmm/nem.h>
115	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
116	# include <VBox/vmm/iem.h>
117	#endif
118	#include <VBox/vmm/iom.h>
119	#include <VBox/vmm/trpm.h>
120	#include <VBox/vmm/selm.h>
121	#include <VBox/vmm/em.h>
122	#include <VBox/sup.h>
123	#include <VBox/vmm/dbgf.h>
124	#include <VBox/vmm/csam.h>
125	#include <VBox/vmm/patm.h>
126	#include <VBox/vmm/apic.h>
127	#ifdef VBOX_WITH_REM
128	# include <VBox/vmm/rem.h>
129	#endif
130	#include <VBox/vmm/ssm.h>
131	#include <VBox/vmm/ftm.h>
132	#include <VBox/vmm/tm.h>
133	#include "VMMInternal.h"
134	#include <VBox/vmm/vm.h>
135	#include <VBox/vmm/uvm.h>
136
137	#include <VBox/err.h>
138	#include <VBox/param.h>
139	#include <VBox/version.h>
140	#include <VBox/vmm/hm.h>
141	#include <iprt/assert.h>
142	#include <iprt/alloc.h>
143	#include <iprt/asm.h>
144	#include <iprt/time.h>
145	#include <iprt/semaphore.h>
146	#include <iprt/stream.h>
147	#include <iprt/string.h>
148	#include <iprt/stdarg.h>
149	#include <iprt/ctype.h>
150	#include <iprt/x86.h>
151
152
153	/*********************************************************************************************************************************
154	* Defined Constants And Macros *
155	*********************************************************************************************************************************/
156	/** The saved state version. */
157	#define VMM_SAVED_STATE_VERSION 4
158	/** The saved state version used by v3.0 and earlier. (Teleportation) */
159	#define VMM_SAVED_STATE_VERSION_3_0 3
160
161	/** Macro for flushing the ring-0 logging. */
162	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
163	do { \
164	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
165	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
166	{ /* likely? */ } \
167	else \
168	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
169	} while (0)
170
171
172	/*********************************************************************************************************************************
173	* Internal Functions *
174	*********************************************************************************************************************************/
175	static int vmmR3InitStacks(PVM pVM);
176	static int vmmR3InitLoggers(PVM pVM);
177	static void vmmR3InitRegisterStats(PVM pVM);
178	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
179	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
180	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
181	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
182	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
183	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
184	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
185
186
187	/**
188	* Initializes the VMM.
189	*
190	* @returns VBox status code.
191	* @param pVM The cross context VM structure.
192	*/
193	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
194	{
195	LogFlow(("VMMR3Init\n"));
196
197	/*
198	* Assert alignment, sizes and order.
199	*/
200	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
201	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
202
203	/*
204	* Init basic VM VMM members.
205	*/
206	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
207	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
212	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
213	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
214	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
215
216	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
217	* The EMT yield interval. The EMT yielding is a hack we employ to play a
218	* bit nicer with the rest of the system (like for instance the GUI).
219	*/
220	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
221	23 /* Value arrived at after experimenting with the grub boot prompt. */);
222	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
223
224
225	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
226	* Controls whether we employ per-cpu preemption timers to limit the time
227	* spent executing guest code. This option is not available on all
228	* platforms and we will silently ignore this setting then. If we are
229	* running in VT-x mode, we will use the VMX-preemption timer instead of
230	* this one when possible.
231	*/
232	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
233	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
234	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
235
236	/*
237	* Initialize the VMM rendezvous semaphores.
238	*/
239	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
240	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
241	return VERR_NO_MEMORY;
242	for (VMCPUID i = 0; i < pVM->cCpus; i++)
243	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
244	for (VMCPUID i = 0; i < pVM->cCpus; i++)
245	{
246	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
247	AssertRCReturn(rc, rc);
248	}
249	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
262	AssertRCReturn(rc, rc);
263	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
264	AssertRCReturn(rc, rc);
265
266	/*
267	* Register the saved state data unit.
268	*/
269	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
270	NULL, NULL, NULL,
271	NULL, vmmR3Save, NULL,
272	NULL, vmmR3Load, NULL);
273	if (RT_FAILURE(rc))
274	return rc;
275
276	/*
277	* Register the Ring-0 VM handle with the session for fast ioctl calls.
278	*/
279	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
280	if (RT_FAILURE(rc))
281	return rc;
282
283	/*
284	* Init various sub-components.
285	*/
286	rc = vmmR3InitStacks(pVM);
287	if (RT_SUCCESS(rc))
288	{
289	rc = vmmR3InitLoggers(pVM);
290
291	#ifdef VBOX_WITH_NMI
292	/*
293	* Allocate mapping for the host APIC.
294	*/
295	if (RT_SUCCESS(rc))
296	{
297	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
298	AssertRC(rc);
299	}
300	#endif
301	if (RT_SUCCESS(rc))
302	{
303	/*
304	* Debug info and statistics.
305	*/
306	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
307	vmmR3InitRegisterStats(pVM);
308	vmmInitFormatTypes();
309
310	return VINF_SUCCESS;
311	}
312	}
313	/** @todo Need failure cleanup? */
314
315	return rc;
316	}
317
318
319	/**
320	* Allocate & setup the VMM RC stack(s) (for EMTs).
321	*
322	* The stacks are also used for long jumps in Ring-0.
323	*
324	* @returns VBox status code.
325	* @param pVM The cross context VM structure.
326	*
327	* @remarks The optional guard page gets it protection setup up during R3 init
328	* completion because of init order issues.
329	*/
330	static int vmmR3InitStacks(PVM pVM)
331	{
332	int rc = VINF_SUCCESS;
333	#ifdef VMM_R0_SWITCH_STACK
334	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
335	#else
336	uint32_t fFlags = 0;
337	#endif
338
339	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
340	{
341	PVMCPU pVCpu = &pVM->aCpus[idCpu];
342
343	#ifdef VBOX_STRICT_VMM_STACK
344	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
345	#else
346	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
347	#endif
348	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
349	if (RT_SUCCESS(rc))
350	{
351	#ifdef VBOX_STRICT_VMM_STACK
352	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
353	#endif
354	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
355	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
356	if (VM_IS_RAW_MODE_ENABLED(pVM))
357	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
358	else
359	#endif
360	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
361
362	}
363	}
364
365	return rc;
366	}
367
368
369	/**
370	* Initialize the loggers.
371	*
372	* @returns VBox status code.
373	* @param pVM The cross context VM structure.
374	*/
375	static int vmmR3InitLoggers(PVM pVM)
376	{
377	int rc;
378	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
379
380	/*
381	* Allocate R0 Logger instance (finalized in the relocator).
382	*/
383	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
384	PRTLOGGER pLogger = RTLogDefaultInstance();
385	if (pLogger)
386	{
387	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
388	for (VMCPUID i = 0; i < pVM->cCpus; i++)
389	{
390	PVMCPU pVCpu = &pVM->aCpus[i];
391	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
392	(void **)&pVCpu->vmm.s.pR0LoggerR3);
393	if (RT_FAILURE(rc))
394	return rc;
395	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
396	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
397	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
398	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
399	}
400	}
401	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
402
403	/*
404	* Release logging.
405	*/
406	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
407	if (pRelLogger)
408	{
409	/*
410	* Ring-0 release logger.
411	*/
412	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
413	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
414	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
415
416	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
417	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
418	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
419
420	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
421
422	for (VMCPUID i = 0; i < pVM->cCpus; i++)
423	{
424	PVMCPU pVCpu = &pVM->aCpus[i];
425	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
426	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
427	if (RT_FAILURE(rc))
428	return rc;
429	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
430	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
431	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
432	pVmmLogger->pVM = pVM->pVMR0;
433	pVmmLogger->cbLogger = (uint32_t)cbLogger;
434	pVmmLogger->fCreated = false;
435	pVmmLogger->fFlushingDisabled = false;
436	pVmmLogger->fRegistered = false;
437	pVmmLogger->idCpu = i;
438
439	char szR0ThreadName[16];
440	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
441	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
442	pfnLoggerWrapper, pfnLoggerFlush,
443	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
444	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
445
446	/* We only update the release log instance here. */
447	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
448	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
449	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
450
451	pVmmLogger->fCreated = true;
452	}
453	}
454
455	return VINF_SUCCESS;
456	}
457
458
459	/**
460	* VMMR3Init worker that register the statistics with STAM.
461	*
462	* @param pVM The cross context VM structure.
463	*/
464	static void vmmR3InitRegisterStats(PVM pVM)
465	{
466	RT_NOREF_PV(pVM);
467
468	/*
469	* Statistics.
470	*/
471	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
522	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
523	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
524	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
525	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
526	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
527	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
528	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
529	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
530	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
531	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
532	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
533	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
534	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
535
536	#ifdef VBOX_WITH_STATISTICS
537	for (VMCPUID i = 0; i < pVM->cCpus; i++)
538	{
539	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
540	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
541	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
542	}
543	#endif
544	for (VMCPUID i = 0; i < pVM->cCpus; i++)
545	{
546	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
547	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
548	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
549	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
550	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
551	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
552	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
553	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
554	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
555	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
556	}
557	}
558
559
560	/**
561	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
562	*
563	* @returns VBox status code.
564	* @param pVM The cross context VM structure.
565	* @param pVCpu The cross context per CPU structure.
566	* @thread EMT(pVCpu)
567	*/
568	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
569	{
570	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
571	}
572
573
574	/**
575	* Initializes the R0 VMM.
576	*
577	* @returns VBox status code.
578	* @param pVM The cross context VM structure.
579	*/
580	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
581	{
582	int rc;
583	PVMCPU pVCpu = VMMGetCpu(pVM);
584	Assert(pVCpu && pVCpu->idCpu == 0);
585
586	#ifdef LOG_ENABLED
587	/*
588	* Initialize the ring-0 logger if we haven't done so yet.
589	*/
590	if ( pVCpu->vmm.s.pR0LoggerR3
591	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
592	{
593	rc = VMMR3UpdateLoggers(pVM);
594	if (RT_FAILURE(rc))
595	return rc;
596	}
597	#endif
598
599	/*
600	* Call Ring-0 entry with init code.
601	*/
602	for (;;)
603	{
604	#ifdef NO_SUPCALLR0VMM
605	//rc = VERR_GENERAL_FAILURE;
606	rc = VINF_SUCCESS;
607	#else
608	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
609	#endif
610	/*
611	* Flush the logs.
612	*/
613	#ifdef LOG_ENABLED
614	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
615	#endif
616	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
617	if (rc != VINF_VMM_CALL_HOST)
618	break;
619	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
620	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
621	break;
622	/* Resume R0 */
623	}
624
625	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
626	{
627	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
628	if (RT_SUCCESS(rc))
629	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
630	}
631
632	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
633	if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
634	LogRel(("VMM: Enabled thread-context hooks\n"));
635	else
636	LogRel(("VMM: Thread-context hooks unavailable\n"));
637
638	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
639	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
640	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
641	else
642	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
643	if (pVM->vmm.s.fIsPreemptPossible)
644	LogRel(("VMM: Kernel preemption is possible\n"));
645	else
646	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
647
648	/*
649	* Send all EMTs to ring-0 to get their logger initialized.
650	*/
651	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
652	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
653
654	return rc;
655	}
656
657
658	#ifdef VBOX_WITH_RAW_MODE
659	/**
660	* Initializes the RC VMM.
661	*
662	* @returns VBox status code.
663	* @param pVM The cross context VM structure.
664	*/
665	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
666	{
667	PVMCPU pVCpu = VMMGetCpu(pVM);
668	Assert(pVCpu && pVCpu->idCpu == 0);
669
670	/* In VMX mode, there's no need to init RC. */
671	if (!VM_IS_RAW_MODE_ENABLED(pVM))
672	return VINF_SUCCESS;
673
674	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
675
676	/*
677	* Call VMMRCInit():
678	* -# resolve the address.
679	* -# setup stackframe and EIP to use the trampoline.
680	* -# do a generic hypervisor call.
681	*/
682	RTRCPTR RCPtrEP;
683	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
684	if (RT_SUCCESS(rc))
685	{
686	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
687	uint64_t u64TS = RTTimeProgramStartNanoTS();
688	CPUMPushHyper(pVCpu, RT_HI_U32(u64TS)); /* Param 4: The program startup TS - Hi. */
689	CPUMPushHyper(pVCpu, RT_LO_U32(u64TS)); /* Param 4: The program startup TS - Lo. */
690	CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
691	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
692	CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
693	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
694	CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
695	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
696	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
697	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
698
699	for (;;)
700	{
701	#ifdef NO_SUPCALLR0VMM
702	//rc = VERR_GENERAL_FAILURE;
703	rc = VINF_SUCCESS;
704	#else
705	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
706	#endif
707	#ifdef LOG_ENABLED
708	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
709	if ( pLogger
710	&& pLogger->offScratch > 0)
711	RTLogFlushRC(NULL, pLogger);
712	#endif
713	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
714	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
715	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
716	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
717	#endif
718	if (rc != VINF_VMM_CALL_HOST)
719	break;
720	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
721	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
722	break;
723	}
724
725	/* Don't trigger assertions or guru if raw-mode is unavailable. */
726	if (rc != VERR_SUPDRV_NO_RAW_MODE_HYPER_V_ROOT)
727	{
728	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
729	{
730	VMMR3FatalDump(pVM, pVCpu, rc);
731	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
732	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
733	}
734	AssertRC(rc);
735	}
736	}
737	return rc;
738	}
739	#endif /* VBOX_WITH_RAW_MODE */
740
741
742	/**
743	* Called when an init phase completes.
744	*
745	* @returns VBox status code.
746	* @param pVM The cross context VM structure.
747	* @param enmWhat Which init phase.
748	*/
749	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
750	{
751	int rc = VINF_SUCCESS;
752
753	switch (enmWhat)
754	{
755	case VMINITCOMPLETED_RING3:
756	{
757	/*
758	* Create the EMT yield timer.
759	*/
760	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
761	AssertRCReturn(rc, rc);
762
763	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
764	AssertRCReturn(rc, rc);
765	break;
766	}
767
768	case VMINITCOMPLETED_HM:
769	{
770	/*
771	* Disable the periodic preemption timers if we can use the
772	* VMX-preemption timer instead.
773	*/
774	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
775	&& HMR3IsVmxPreemptionTimerUsed(pVM))
776	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
777	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
778
779	/*
780	* Last chance for GIM to update its CPUID leaves if it requires
781	* knowledge/information from HM initialization.
782	*/
783	rc = GIMR3InitCompleted(pVM);
784	AssertRCReturn(rc, rc);
785
786	/*
787	* CPUM's post-initialization (print CPUIDs).
788	*/
789	CPUMR3LogCpuIdAndMsrFeatures(pVM);
790	break;
791	}
792
793	default: /* shuts up gcc */
794	break;
795	}
796
797	return rc;
798	}
799
800
801	/**
802	* Terminate the VMM bits.
803	*
804	* @returns VBox status code.
805	* @param pVM The cross context VM structure.
806	*/
807	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
808	{
809	PVMCPU pVCpu = VMMGetCpu(pVM);
810	Assert(pVCpu && pVCpu->idCpu == 0);
811
812	/*
813	* Call Ring-0 entry with termination code.
814	*/
815	int rc;
816	for (;;)
817	{
818	#ifdef NO_SUPCALLR0VMM
819	//rc = VERR_GENERAL_FAILURE;
820	rc = VINF_SUCCESS;
821	#else
822	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
823	#endif
824	/*
825	* Flush the logs.
826	*/
827	#ifdef LOG_ENABLED
828	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
829	#endif
830	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
831	if (rc != VINF_VMM_CALL_HOST)
832	break;
833	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
834	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
835	break;
836	/* Resume R0 */
837	}
838	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
839	{
840	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
841	if (RT_SUCCESS(rc))
842	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
843	}
844
845	for (VMCPUID i = 0; i < pVM->cCpus; i++)
846	{
847	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
848	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
849	}
850	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
851	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
852	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
853	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
854	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
855	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
856	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
857	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
858	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
859	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
860	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
861	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
862	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
863	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
864	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
865	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
866
867	vmmTermFormatTypes();
868	return rc;
869	}
870
871
872	/**
873	* Applies relocations to data and code managed by this
874	* component. This function will be called at init and
875	* whenever the VMM need to relocate it self inside the GC.
876	*
877	* The VMM will need to apply relocations to the core code.
878	*
879	* @param pVM The cross context VM structure.
880	* @param offDelta The relocation delta.
881	*/
882	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
883	{
884	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
885
886	/*
887	* Update the logger.
888	*/
889	VMMR3UpdateLoggers(pVM);
890	}
891
892
893	/**
894	* Updates the settings for the RC and R0 loggers.
895	*
896	* @returns VBox status code.
897	* @param pVM The cross context VM structure.
898	*/
899	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
900	{
901	int rc = VINF_SUCCESS;
902
903	#ifdef LOG_ENABLED
904	/*
905	* For the ring-0 EMT logger, we use a per-thread logger instance
906	* in ring-0. Only initialize it once.
907	*/
908	PRTLOGGER const pDefault = RTLogDefaultInstance();
909	for (VMCPUID i = 0; i < pVM->cCpus; i++)
910	{
911	PVMCPU pVCpu = &pVM->aCpus[i];
912	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
913	if (pR0LoggerR3)
914	{
915	if (!pR0LoggerR3->fCreated)
916	{
917	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
918	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
919	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
920
921	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
922	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
923	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
924
925	char szR0ThreadName[16];
926	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
927	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
928	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
929	pfnLoggerWrapper, pfnLoggerFlush,
930	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
931	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
932
933	pR0LoggerR3->idCpu = i;
934	pR0LoggerR3->fCreated = true;
935	pR0LoggerR3->fFlushingDisabled = false;
936	}
937
938	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
939	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
940	AssertRC(rc);
941	}
942	}
943	#endif
944
945	return rc;
946	}
947
948
949	/**
950	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
951	*
952	* @returns Pointer to the buffer.
953	* @param pVM The cross context VM structure.
954	*/
955	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
956	{
957	if (!VM_IS_RAW_MODE_ENABLED(pVM))
958	return pVM->vmm.s.szRing0AssertMsg1;
959
960	RTRCPTR RCPtr;
961	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
962	if (RT_SUCCESS(rc))
963	return (const char *)MMHyperRCToR3(pVM, RCPtr);
964
965	return NULL;
966	}
967
968
969	/**
970	* Returns the VMCPU of the specified virtual CPU.
971	*
972	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
973	*
974	* @param pUVM The user mode VM handle.
975	* @param idCpu The ID of the virtual CPU.
976	*/
977	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
978	{
979	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
980	AssertReturn(idCpu < pUVM->cCpus, NULL);
981	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
982	return &pUVM->pVM->aCpus[idCpu];
983	}
984
985
986	/**
987	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
988	*
989	* @returns Pointer to the buffer.
990	* @param pVM The cross context VM structure.
991	*/
992	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
993	{
994	if (!VM_IS_RAW_MODE_ENABLED(pVM))
995	return pVM->vmm.s.szRing0AssertMsg2;
996
997	RTRCPTR RCPtr;
998	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
999	if (RT_SUCCESS(rc))
1000	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1001
1002	return NULL;
1003	}
1004
1005
1006	/**
1007	* Execute state save operation.
1008	*
1009	* @returns VBox status code.
1010	* @param pVM The cross context VM structure.
1011	* @param pSSM SSM operation handle.
1012	*/
1013	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1014	{
1015	LogFlow(("vmmR3Save:\n"));
1016
1017	/*
1018	* Save the started/stopped state of all CPUs except 0 as it will always
1019	* be running. This avoids breaking the saved state version. :-)
1020	*/
1021	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1022	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1023
1024	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1025	}
1026
1027
1028	/**
1029	* Execute state load operation.
1030	*
1031	* @returns VBox status code.
1032	* @param pVM The cross context VM structure.
1033	* @param pSSM SSM operation handle.
1034	* @param uVersion Data layout version.
1035	* @param uPass The data pass.
1036	*/
1037	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1038	{
1039	LogFlow(("vmmR3Load:\n"));
1040	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1041
1042	/*
1043	* Validate version.
1044	*/
1045	if ( uVersion != VMM_SAVED_STATE_VERSION
1046	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1047	{
1048	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1049	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1050	}
1051
1052	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1053	{
1054	/* Ignore the stack bottom, stack pointer and stack bits. */
1055	RTRCPTR RCPtrIgnored;
1056	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1057	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1058	#ifdef RT_OS_DARWIN
1059	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1060	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1061	&& SSMR3HandleRevision(pSSM) >= 48858
1062	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1063	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1064	)
1065	SSMR3Skip(pSSM, 16384);
1066	else
1067	SSMR3Skip(pSSM, 8192);
1068	#else
1069	SSMR3Skip(pSSM, 8192);
1070	#endif
1071	}
1072
1073	/*
1074	* Restore the VMCPU states. VCPU 0 is always started.
1075	*/
1076	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1077	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1078	{
1079	bool fStarted;
1080	int rc = SSMR3GetBool(pSSM, &fStarted);
1081	if (RT_FAILURE(rc))
1082	return rc;
1083	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1084	}
1085
1086	/* terminator */
1087	uint32_t u32;
1088	int rc = SSMR3GetU32(pSSM, &u32);
1089	if (RT_FAILURE(rc))
1090	return rc;
1091	if (u32 != UINT32_MAX)
1092	{
1093	AssertMsgFailed(("u32=%#x\n", u32));
1094	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1095	}
1096	return VINF_SUCCESS;
1097	}
1098
1099
1100	#ifdef VBOX_WITH_RAW_MODE
1101	/**
1102	* Resolve a builtin RC symbol.
1103	*
1104	* Called by PDM when loading or relocating RC modules.
1105	*
1106	* @returns VBox status
1107	* @param pVM The cross context VM structure.
1108	* @param pszSymbol Symbol to resolve.
1109	* @param pRCPtrValue Where to store the symbol value.
1110	*
1111	* @remark This has to work before VMMR3Relocate() is called.
1112	*/
1113	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1114	{
1115	if (!strcmp(pszSymbol, "g_Logger"))
1116	{
1117	if (pVM->vmm.s.pRCLoggerR3)
1118	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1119	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1120	}
1121	else if (!strcmp(pszSymbol, "g_RelLogger"))
1122	{
1123	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1124	if (pVM->vmm.s.pRCRelLoggerR3)
1125	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1126	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1127	# else
1128	*pRCPtrValue = NIL_RTRCPTR;
1129	# endif
1130	}
1131	else
1132	return VERR_SYMBOL_NOT_FOUND;
1133	return VINF_SUCCESS;
1134	}
1135	#endif /* VBOX_WITH_RAW_MODE */
1136
1137
1138	/**
1139	* Suspends the CPU yielder.
1140	*
1141	* @param pVM The cross context VM structure.
1142	*/
1143	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1144	{
1145	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1146	if (!pVM->vmm.s.cYieldResumeMillies)
1147	{
1148	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1149	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1150	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1151	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1152	else
1153	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1154	TMTimerStop(pVM->vmm.s.pYieldTimer);
1155	}
1156	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1157	}
1158
1159
1160	/**
1161	* Stops the CPU yielder.
1162	*
1163	* @param pVM The cross context VM structure.
1164	*/
1165	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1166	{
1167	if (!pVM->vmm.s.cYieldResumeMillies)
1168	TMTimerStop(pVM->vmm.s.pYieldTimer);
1169	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1170	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1171	}
1172
1173
1174	/**
1175	* Resumes the CPU yielder when it has been a suspended or stopped.
1176	*
1177	* @param pVM The cross context VM structure.
1178	*/
1179	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1180	{
1181	if (pVM->vmm.s.cYieldResumeMillies)
1182	{
1183	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1184	pVM->vmm.s.cYieldResumeMillies = 0;
1185	}
1186	}
1187
1188
1189	/**
1190	* Internal timer callback function.
1191	*
1192	* @param pVM The cross context VM structure.
1193	* @param pTimer The timer handle.
1194	* @param pvUser User argument specified upon timer creation.
1195	*/
1196	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1197	{
1198	NOREF(pvUser);
1199
1200	/*
1201	* This really needs some careful tuning. While we shouldn't be too greedy since
1202	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1203	* because that'll cause us to stop up.
1204	*
1205	* The current logic is to use the default interval when there is no lag worth
1206	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1207	*
1208	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1209	* so the lag is up to date.)
1210	*/
1211	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1212	if ( u64Lag < 50000000 /* 50ms */
1213	\|\| ( u64Lag < 1000000000 /* 1s */
1214	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1215	)
1216	{
1217	uint64_t u64Elapsed = RTTimeNanoTS();
1218	pVM->vmm.s.u64LastYield = u64Elapsed;
1219
1220	RTThreadYield();
1221
1222	#ifdef LOG_ENABLED
1223	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1224	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1225	#endif
1226	}
1227	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1228	}
1229
1230
1231	#ifdef VBOX_WITH_RAW_MODE
1232	/**
1233	* Executes guest code in the raw-mode context.
1234	*
1235	* @param pVM The cross context VM structure.
1236	* @param pVCpu The cross context virtual CPU structure.
1237	*/
1238	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1239	{
1240	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1241
1242	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1243
1244	/*
1245	* Set the hypervisor to resume executing a CPUM resume function
1246	* in CPUMRCA.asm.
1247	*/
1248	CPUMSetHyperState(pVCpu,
1249	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1250	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1251	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1252	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1253	0, /* eax */
1254	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1255
1256	/*
1257	* We hide log flushes (outer) and hypervisor interrupts (inner).
1258	*/
1259	for (;;)
1260	{
1261	#ifdef VBOX_STRICT
1262	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1263	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1264	PGMMapCheck(pVM);
1265	# ifdef VBOX_WITH_SAFE_STR
1266	SELMR3CheckShadowTR(pVM);
1267	# endif
1268	#endif
1269	int rc;
1270	do
1271	{
1272	#ifdef NO_SUPCALLR0VMM
1273	rc = VERR_GENERAL_FAILURE;
1274	#else
1275	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1276	if (RT_LIKELY(rc == VINF_SUCCESS))
1277	rc = pVCpu->vmm.s.iLastGZRc;
1278	#endif
1279	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1280
1281	/*
1282	* Flush the logs.
1283	*/
1284	#ifdef LOG_ENABLED
1285	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1286	if ( pLogger
1287	&& pLogger->offScratch > 0)
1288	RTLogFlushRC(NULL, pLogger);
1289	#endif
1290	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1291	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1292	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1293	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1294	#endif
1295	if (rc != VINF_VMM_CALL_HOST)
1296	{
1297	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1298	return rc;
1299	}
1300	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1301	if (RT_FAILURE(rc))
1302	return rc;
1303	/* Resume GC */
1304	}
1305	}
1306	#endif /* VBOX_WITH_RAW_MODE */
1307
1308
1309	/**
1310	* Executes guest code (Intel VT-x and AMD-V).
1311	*
1312	* @param pVM The cross context VM structure.
1313	* @param pVCpu The cross context virtual CPU structure.
1314	*/
1315	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1316	{
1317	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1318
1319	for (;;)
1320	{
1321	int rc;
1322	do
1323	{
1324	#ifdef NO_SUPCALLR0VMM
1325	rc = VERR_GENERAL_FAILURE;
1326	#else
1327	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1328	if (RT_LIKELY(rc == VINF_SUCCESS))
1329	rc = pVCpu->vmm.s.iLastGZRc;
1330	#endif
1331	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1332
1333	#if 0 /** @todo triggers too often */
1334	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1335	#endif
1336
1337	/*
1338	* Flush the logs
1339	*/
1340	#ifdef LOG_ENABLED
1341	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1342	#endif
1343	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1344	if (rc != VINF_VMM_CALL_HOST)
1345	{
1346	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1347	return rc;
1348	}
1349	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1350	if (RT_FAILURE(rc))
1351	return rc;
1352	/* Resume R0 */
1353	}
1354	}
1355
1356
1357	/**
1358	* Perform one of the fast I/O control VMMR0 operation.
1359	*
1360	* @returns VBox strict status code.
1361	* @param pVM The cross context VM structure.
1362	* @param pVCpu The cross context virtual CPU structure.
1363	* @param enmOperation The operation to perform.
1364	*/
1365	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1366	{
1367	for (;;)
1368	{
1369	VBOXSTRICTRC rcStrict;
1370	do
1371	{
1372	#ifdef NO_SUPCALLR0VMM
1373	rcStrict = VERR_GENERAL_FAILURE;
1374	#else
1375	rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1376	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1377	rcStrict = pVCpu->vmm.s.iLastGZRc;
1378	#endif
1379	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1380
1381	/*
1382	* Flush the logs
1383	*/
1384	#ifdef LOG_ENABLED
1385	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1386	#endif
1387	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1388	if (rcStrict != VINF_VMM_CALL_HOST)
1389	return rcStrict;
1390	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1391	if (RT_FAILURE(rc))
1392	return rc;
1393	/* Resume R0 */
1394	}
1395	}
1396
1397
1398	/**
1399	* VCPU worker for VMMR3SendStartupIpi.
1400	*
1401	* @param pVM The cross context VM structure.
1402	* @param idCpu Virtual CPU to perform SIPI on.
1403	* @param uVector The SIPI vector.
1404	*/
1405	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1406	{
1407	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1408	VMCPU_ASSERT_EMT(pVCpu);
1409
1410	/*
1411	* In the INIT state, the target CPU is only responsive to an SIPI.
1412	* This is also true for when when the CPU is in VMX non-root mode.
1413	*
1414	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1415	* See Intel spec. 26.6.2 "Activity State".
1416	*/
1417	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1418	return VINF_SUCCESS;
1419
1420	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1421	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1422	if (CPUMIsGuestInVmxRootMode(pCtx))
1423	{
1424	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1425	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1426	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1427
1428	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1429	return VINF_SUCCESS;
1430	}
1431	#endif
1432
1433	pCtx->cs.Sel = uVector << 8;
1434	pCtx->cs.ValidSel = uVector << 8;
1435	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1436	pCtx->cs.u64Base = uVector << 12;
1437	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1438	pCtx->rip = 0;
1439
1440	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1441
1442	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1443	EMSetState(pVCpu, EMSTATE_HALTED);
1444	return VINF_EM_RESCHEDULE;
1445	# else /* And if we go the VMCPU::enmState way it can stay here. */
1446	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1447	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1448	return VINF_SUCCESS;
1449	# endif
1450	}
1451
1452
1453	/**
1454	* VCPU worker for VMMR3SendInitIpi.
1455	*
1456	* @returns VBox status code.
1457	* @param pVM The cross context VM structure.
1458	* @param idCpu Virtual CPU to perform SIPI on.
1459	*/
1460	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1461	{
1462	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1463	VMCPU_ASSERT_EMT(pVCpu);
1464
1465	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1466
1467	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1468	* wait-for-SIPI state. Verify. */
1469
1470	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1471	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1472	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1473	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1474	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1475	#endif
1476
1477	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1478	* IPI (e.g. SVM_EXIT_INIT). */
1479
1480	PGMR3ResetCpu(pVM, pVCpu);
1481	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1482	APICR3InitIpi(pVCpu);
1483	TRPMR3ResetCpu(pVCpu);
1484	CPUMR3ResetCpu(pVM, pVCpu);
1485	EMR3ResetCpu(pVCpu);
1486	HMR3ResetCpu(pVCpu);
1487	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1488
1489	/* This will trickle up on the target EMT. */
1490	return VINF_EM_WAIT_SIPI;
1491	}
1492
1493
1494	/**
1495	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1496	* vector-dependent state and unhalting processor.
1497	*
1498	* @param pVM The cross context VM structure.
1499	* @param idCpu Virtual CPU to perform SIPI on.
1500	* @param uVector SIPI vector.
1501	*/
1502	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1503	{
1504	AssertReturnVoid(idCpu < pVM->cCpus);
1505
1506	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1507	AssertRC(rc);
1508	}
1509
1510
1511	/**
1512	* Sends init IPI to the virtual CPU.
1513	*
1514	* @param pVM The cross context VM structure.
1515	* @param idCpu Virtual CPU to perform int IPI on.
1516	*/
1517	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1518	{
1519	AssertReturnVoid(idCpu < pVM->cCpus);
1520
1521	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1522	AssertRC(rc);
1523	}
1524
1525
1526	/**
1527	* Registers the guest memory range that can be used for patching.
1528	*
1529	* @returns VBox status code.
1530	* @param pVM The cross context VM structure.
1531	* @param pPatchMem Patch memory range.
1532	* @param cbPatchMem Size of the memory range.
1533	*/
1534	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1535	{
1536	VM_ASSERT_EMT(pVM);
1537	if (HMIsEnabled(pVM))
1538	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1539
1540	return VERR_NOT_SUPPORTED;
1541	}
1542
1543
1544	/**
1545	* Deregisters the guest memory range that can be used for patching.
1546	*
1547	* @returns VBox status code.
1548	* @param pVM The cross context VM structure.
1549	* @param pPatchMem Patch memory range.
1550	* @param cbPatchMem Size of the memory range.
1551	*/
1552	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1553	{
1554	if (HMIsEnabled(pVM))
1555	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1556
1557	return VINF_SUCCESS;
1558	}
1559
1560
1561	/**
1562	* Common recursion handler for the other EMTs.
1563	*
1564	* @returns Strict VBox status code.
1565	* @param pVM The cross context VM structure.
1566	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1567	* @param rcStrict Current status code to be combined with the one
1568	* from this recursion and returned.
1569	*/
1570	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1571	{
1572	int rc2;
1573
1574	/*
1575	* We wait here while the initiator of this recursion reconfigures
1576	* everything. The last EMT to get in signals the initiator.
1577	*/
1578	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1579	{
1580	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1581	AssertLogRelRC(rc2);
1582	}
1583
1584	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1585	AssertLogRelRC(rc2);
1586
1587	/*
1588	* Do the normal rendezvous processing.
1589	*/
1590	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1591	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1592
1593	/*
1594	* Wait for the initiator to restore everything.
1595	*/
1596	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1597	AssertLogRelRC(rc2);
1598
1599	/*
1600	* Last thread out of here signals the initiator.
1601	*/
1602	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1603	{
1604	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1605	AssertLogRelRC(rc2);
1606	}
1607
1608	/*
1609	* Merge status codes and return.
1610	*/
1611	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1612	if ( rcStrict2 != VINF_SUCCESS
1613	&& ( rcStrict == VINF_SUCCESS
1614	\|\| rcStrict > rcStrict2))
1615	rcStrict = rcStrict2;
1616	return rcStrict;
1617	}
1618
1619
1620	/**
1621	* Count returns and have the last non-caller EMT wake up the caller.
1622	*
1623	* @returns VBox strict informational status code for EM scheduling. No failures
1624	* will be returned here, those are for the caller only.
1625	*
1626	* @param pVM The cross context VM structure.
1627	* @param rcStrict The current accumulated recursive status code,
1628	* to be merged with i32RendezvousStatus and
1629	* returned.
1630	*/
1631	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1632	{
1633	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1634
1635	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1636	if (cReturned == pVM->cCpus - 1U)
1637	{
1638	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1639	AssertLogRelRC(rc);
1640	}
1641
1642	/*
1643	* Merge the status codes, ignoring error statuses in this code path.
1644	*/
1645	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1646	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1647	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1648	VERR_IPE_UNEXPECTED_INFO_STATUS);
1649
1650	if (RT_SUCCESS(rcStrict2))
1651	{
1652	if ( rcStrict2 != VINF_SUCCESS
1653	&& ( rcStrict == VINF_SUCCESS
1654	\|\| rcStrict > rcStrict2))
1655	rcStrict = rcStrict2;
1656	}
1657	return rcStrict;
1658	}
1659
1660
1661	/**
1662	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1663	*
1664	* @returns VBox strict informational status code for EM scheduling. No failures
1665	* will be returned here, those are for the caller only. When
1666	* fIsCaller is set, VINF_SUCCESS is always returned.
1667	*
1668	* @param pVM The cross context VM structure.
1669	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1670	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1671	* not.
1672	* @param fFlags The flags.
1673	* @param pfnRendezvous The callback.
1674	* @param pvUser The user argument for the callback.
1675	*/
1676	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1677	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1678	{
1679	int rc;
1680	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1681
1682	/*
1683	* Enter, the last EMT triggers the next callback phase.
1684	*/
1685	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1686	if (cEntered != pVM->cCpus)
1687	{
1688	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1689	{
1690	/* Wait for our turn. */
1691	for (;;)
1692	{
1693	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1694	AssertLogRelRC(rc);
1695	if (!pVM->vmm.s.fRendezvousRecursion)
1696	break;
1697	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1698	}
1699	}
1700	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1701	{
1702	/* Wait for the last EMT to arrive and wake everyone up. */
1703	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1704	AssertLogRelRC(rc);
1705	Assert(!pVM->vmm.s.fRendezvousRecursion);
1706	}
1707	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1708	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1709	{
1710	/* Wait for our turn. */
1711	for (;;)
1712	{
1713	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1714	AssertLogRelRC(rc);
1715	if (!pVM->vmm.s.fRendezvousRecursion)
1716	break;
1717	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1718	}
1719	}
1720	else
1721	{
1722	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1723
1724	/*
1725	* The execute once is handled specially to optimize the code flow.
1726	*
1727	* The last EMT to arrive will perform the callback and the other
1728	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1729	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1730	* returns, that EMT will initiate the normal return sequence.
1731	*/
1732	if (!fIsCaller)
1733	{
1734	for (;;)
1735	{
1736	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1737	AssertLogRelRC(rc);
1738	if (!pVM->vmm.s.fRendezvousRecursion)
1739	break;
1740	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1741	}
1742
1743	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1744	}
1745	return VINF_SUCCESS;
1746	}
1747	}
1748	else
1749	{
1750	/*
1751	* All EMTs are waiting, clear the FF and take action according to the
1752	* execution method.
1753	*/
1754	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1755
1756	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1757	{
1758	/* Wake up everyone. */
1759	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1760	AssertLogRelRC(rc);
1761	}
1762	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1763	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1764	{
1765	/* Figure out who to wake up and wake it up. If it's ourself, then
1766	it's easy otherwise wait for our turn. */
1767	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1768	? 0
1769	: pVM->cCpus - 1U;
1770	if (pVCpu->idCpu != iFirst)
1771	{
1772	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1773	AssertLogRelRC(rc);
1774	for (;;)
1775	{
1776	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1777	AssertLogRelRC(rc);
1778	if (!pVM->vmm.s.fRendezvousRecursion)
1779	break;
1780	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1781	}
1782	}
1783	}
1784	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1785	}
1786
1787
1788	/*
1789	* Do the callback and update the status if necessary.
1790	*/
1791	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1792	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1793	{
1794	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1795	if (rcStrict2 != VINF_SUCCESS)
1796	{
1797	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1798	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1799	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1800	int32_t i32RendezvousStatus;
1801	do
1802	{
1803	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1804	if ( rcStrict2 == i32RendezvousStatus
1805	\|\| RT_FAILURE(i32RendezvousStatus)
1806	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1807	&& rcStrict2 > i32RendezvousStatus))
1808	break;
1809	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1810	}
1811	}
1812
1813	/*
1814	* Increment the done counter and take action depending on whether we're
1815	* the last to finish callback execution.
1816	*/
1817	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1818	if ( cDone != pVM->cCpus
1819	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1820	{
1821	/* Signal the next EMT? */
1822	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1823	{
1824	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1825	AssertLogRelRC(rc);
1826	}
1827	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1828	{
1829	Assert(cDone == pVCpu->idCpu + 1U);
1830	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1831	AssertLogRelRC(rc);
1832	}
1833	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1834	{
1835	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1836	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1837	AssertLogRelRC(rc);
1838	}
1839
1840	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1841	if (!fIsCaller)
1842	{
1843	for (;;)
1844	{
1845	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1846	AssertLogRelRC(rc);
1847	if (!pVM->vmm.s.fRendezvousRecursion)
1848	break;
1849	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1850	}
1851	}
1852	}
1853	else
1854	{
1855	/* Callback execution is all done, tell the rest to return. */
1856	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1857	AssertLogRelRC(rc);
1858	}
1859
1860	if (!fIsCaller)
1861	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1862	return rcStrictRecursion;
1863	}
1864
1865
1866	/**
1867	* Called in response to VM_FF_EMT_RENDEZVOUS.
1868	*
1869	* @returns VBox strict status code - EM scheduling. No errors will be returned
1870	* here, nor will any non-EM scheduling status codes be returned.
1871	*
1872	* @param pVM The cross context VM structure.
1873	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1874	*
1875	* @thread EMT
1876	*/
1877	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1878	{
1879	Assert(!pVCpu->vmm.s.fInRendezvous);
1880	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1881	pVCpu->vmm.s.fInRendezvous = true;
1882	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1883	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1884	pVCpu->vmm.s.fInRendezvous = false;
1885	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1886	return VBOXSTRICTRC_TODO(rcStrict);
1887	}
1888
1889
1890	/**
1891	* Helper for resetting an single wakeup event sempahore.
1892	*
1893	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1894	* @param hEvt The event semaphore to reset.
1895	*/
1896	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1897	{
1898	for (uint32_t cLoops = 0; ; cLoops++)
1899	{
1900	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1901	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1902	return rc;
1903	}
1904	}
1905
1906
1907	/**
1908	* Worker for VMMR3EmtRendezvous that handles recursion.
1909	*
1910	* @returns VBox strict status code. This will be the first error,
1911	* VINF_SUCCESS, or an EM scheduling status code.
1912	*
1913	* @param pVM The cross context VM structure.
1914	* @param pVCpu The cross context virtual CPU structure of the
1915	* calling EMT.
1916	* @param fFlags Flags indicating execution methods. See
1917	* grp_VMMR3EmtRendezvous_fFlags.
1918	* @param pfnRendezvous The callback.
1919	* @param pvUser User argument for the callback.
1920	*
1921	* @thread EMT(pVCpu)
1922	*/
1923	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1924	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1925	{
1926	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1927	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1928	Assert(pVCpu->vmm.s.fInRendezvous);
1929
1930	/*
1931	* Save the current state.
1932	*/
1933	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1934	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1935	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1936	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1937	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1938
1939	/*
1940	* Check preconditions and save the current state.
1941	*/
1942	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1943	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1944	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1945	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1946	VERR_INTERNAL_ERROR);
1947	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1948	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1949
1950	/*
1951	* Reset the recursion prep and pop semaphores.
1952	*/
1953	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1954	AssertLogRelRCReturn(rc, rc);
1955	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1956	AssertLogRelRCReturn(rc, rc);
1957	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1958	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1959	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1960	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1961
1962	/*
1963	* Usher the other thread into the recursion routine.
1964	*/
1965	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1966	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1967
1968	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1969	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1970	while (cLeft-- > 0)
1971	{
1972	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1973	AssertLogRelRC(rc);
1974	}
1975	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1976	{
1977	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1978	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1979	{
1980	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1981	AssertLogRelRC(rc);
1982	}
1983	}
1984	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1985	{
1986	Assert(cLeft == pVCpu->idCpu);
1987	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1988	{
1989	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1990	AssertLogRelRC(rc);
1991	}
1992	}
1993	else
1994	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1995	VERR_INTERNAL_ERROR_4);
1996
1997	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1998	AssertLogRelRC(rc);
1999	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2000	AssertLogRelRC(rc);
2001
2002
2003	/*
2004	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
2005	*/
2006	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2007	{
2008	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2009	AssertLogRelRC(rc);
2010	}
2011
2012	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2013
2014	/*
2015	* Clear the slate and setup the new rendezvous.
2016	*/
2017	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2018	{
2019	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2020	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2021	}
2022	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2023	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2024	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2025	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2026
2027	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2028	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2029	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2030	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2031	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2032	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2033	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2034	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2035
2036	/*
2037	* We're ready to go now, do normal rendezvous processing.
2038	*/
2039	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2040	AssertLogRelRC(rc);
2041
2042	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
2043
2044	/*
2045	* The caller waits for the other EMTs to be done, return and waiting on the
2046	* pop semaphore.
2047	*/
2048	for (;;)
2049	{
2050	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2051	AssertLogRelRC(rc);
2052	if (!pVM->vmm.s.fRendezvousRecursion)
2053	break;
2054	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2055	}
2056
2057	/*
2058	* Get the return code and merge it with the above recursion status.
2059	*/
2060	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2061	if ( rcStrict2 != VINF_SUCCESS
2062	&& ( rcStrict == VINF_SUCCESS
2063	\|\| rcStrict > rcStrict2))
2064	rcStrict = rcStrict2;
2065
2066	/*
2067	* Restore the parent rendezvous state.
2068	*/
2069	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2070	{
2071	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2072	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2073	}
2074	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2075	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2076	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2077	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2078
2079	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2080	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2081	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2082	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2083	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2084	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2085	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2086
2087	/*
2088	* Usher the other EMTs back to their parent recursion routine, waiting
2089	* for them to all get there before we return (makes sure they've been
2090	* scheduled and are past the pop event sem, see below).
2091	*/
2092	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2093	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2094	AssertLogRelRC(rc);
2095
2096	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2097	{
2098	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2099	AssertLogRelRC(rc);
2100	}
2101
2102	/*
2103	* We must reset the pop semaphore on the way out (doing the pop caller too,
2104	* just in case). The parent may be another recursion.
2105	*/
2106	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2107	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2108
2109	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2110
2111	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2112	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2113	return rcStrict;
2114	}
2115
2116
2117	/**
2118	* EMT rendezvous.
2119	*
2120	* Gathers all the EMTs and execute some code on each of them, either in a one
2121	* by one fashion or all at once.
2122	*
2123	* @returns VBox strict status code. This will be the first error,
2124	* VINF_SUCCESS, or an EM scheduling status code.
2125	*
2126	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2127	* doesn't support it or if the recursion is too deep.
2128	*
2129	* @param pVM The cross context VM structure.
2130	* @param fFlags Flags indicating execution methods. See
2131	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2132	* descending and ascending rendezvous types support
2133	* recursion from inside @a pfnRendezvous.
2134	* @param pfnRendezvous The callback.
2135	* @param pvUser User argument for the callback.
2136	*
2137	* @thread Any.
2138	*/
2139	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2140	{
2141	/*
2142	* Validate input.
2143	*/
2144	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2145	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2146	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2147	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2148	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2149	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2150	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2151	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2152
2153	VBOXSTRICTRC rcStrict;
2154	PVMCPU pVCpu = VMMGetCpu(pVM);
2155	if (!pVCpu)
2156	{
2157	/*
2158	* Forward the request to an EMT thread.
2159	*/
2160	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2161	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2162	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2163	else
2164	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2165	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2166	}
2167	else if ( pVM->cCpus == 1
2168	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2169	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2170	{
2171	/*
2172	* Shortcut for the single EMT case.
2173	*
2174	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2175	* during vmR3Destroy after other emulation threads have started terminating.
2176	*/
2177	if (!pVCpu->vmm.s.fInRendezvous)
2178	{
2179	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2180	pVCpu->vmm.s.fInRendezvous = true;
2181	pVM->vmm.s.fRendezvousFlags = fFlags;
2182	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2183	pVCpu->vmm.s.fInRendezvous = false;
2184	}
2185	else
2186	{
2187	/* Recursion. Do the same checks as in the SMP case. */
2188	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2189	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2190	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2191	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2192	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2193	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2194	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2195	, VERR_DEADLOCK);
2196
2197	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2198	pVM->vmm.s.cRendezvousRecursions++;
2199	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2200	pVM->vmm.s.fRendezvousFlags = fFlags;
2201
2202	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2203
2204	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2205	pVM->vmm.s.cRendezvousRecursions--;
2206	}
2207	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2208	}
2209	else
2210	{
2211	/*
2212	* Spin lock. If busy, check for recursion, if not recursing wait for
2213	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2214	*/
2215	int rc;
2216	rcStrict = VINF_SUCCESS;
2217	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2218	{
2219	/* Allow recursion in some cases. */
2220	if ( pVCpu->vmm.s.fInRendezvous
2221	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2222	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2223	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2224	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2225	))
2226	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2227
2228	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2229	VERR_DEADLOCK);
2230
2231	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2232	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2233	{
2234	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2235	{
2236	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2237	if ( rc != VINF_SUCCESS
2238	&& ( rcStrict == VINF_SUCCESS
2239	\|\| rcStrict > rc))
2240	rcStrict = rc;
2241	/** @todo Perhaps deal with termination here? */
2242	}
2243	ASMNopPause();
2244	}
2245	}
2246
2247	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2248	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2249	Assert(!pVCpu->vmm.s.fInRendezvous);
2250	pVCpu->vmm.s.fInRendezvous = true;
2251
2252	/*
2253	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2254	*/
2255	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2256	{
2257	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2258	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2259	}
2260	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2261	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2262	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2263	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2264	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2265	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2266	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2267	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2268	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2269	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2270	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2271
2272	/*
2273	* Set the FF and poke the other EMTs.
2274	*/
2275	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2276	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2277
2278	/*
2279	* Do the same ourselves.
2280	*/
2281	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2282
2283	/*
2284	* The caller waits for the other EMTs to be done and return before doing
2285	* the cleanup. This makes away with wakeup / reset races we would otherwise
2286	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2287	*/
2288	for (;;)
2289	{
2290	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2291	AssertLogRelRC(rc);
2292	if (!pVM->vmm.s.fRendezvousRecursion)
2293	break;
2294	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2295	}
2296
2297	/*
2298	* Get the return code and clean up a little bit.
2299	*/
2300	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2301	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2302
2303	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2304	pVCpu->vmm.s.fInRendezvous = false;
2305
2306	/*
2307	* Merge rcStrict, rcStrict2 and rcStrict3.
2308	*/
2309	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2310	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2311	if ( rcStrict2 != VINF_SUCCESS
2312	&& ( rcStrict == VINF_SUCCESS
2313	\|\| rcStrict > rcStrict2))
2314	rcStrict = rcStrict2;
2315	if ( rcStrict3 != VINF_SUCCESS
2316	&& ( rcStrict == VINF_SUCCESS
2317	\|\| rcStrict > rcStrict3))
2318	rcStrict = rcStrict3;
2319	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2320	}
2321
2322	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2323	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2324	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2325	VERR_IPE_UNEXPECTED_INFO_STATUS);
2326	return VBOXSTRICTRC_VAL(rcStrict);
2327	}
2328
2329
2330	/**
2331	* Interface for vmR3SetHaltMethodU.
2332	*
2333	* @param pVCpu The cross context virtual CPU structure of the
2334	* calling EMT.
2335	* @param fMayHaltInRing0 The new state.
2336	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2337	* @thread EMT(pVCpu)
2338	*
2339	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2340	* component.
2341	*/
2342	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2343	{
2344	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2345	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2346	}
2347
2348
2349	/**
2350	* Read from the ring 0 jump buffer stack.
2351	*
2352	* @returns VBox status code.
2353	*
2354	* @param pVM The cross context VM structure.
2355	* @param idCpu The ID of the source CPU context (for the address).
2356	* @param R0Addr Where to start reading.
2357	* @param pvBuf Where to store the data we've read.
2358	* @param cbRead The number of bytes to read.
2359	*/
2360	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2361	{
2362	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2363	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2364	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2365
2366	int rc;
2367	#ifdef VMM_R0_SWITCH_STACK
2368	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2369	#else
2370	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2371	#endif
2372	if ( off < VMM_STACK_SIZE
2373	&& off + cbRead <= VMM_STACK_SIZE)
2374	{
2375	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2376	rc = VINF_SUCCESS;
2377	}
2378	else
2379	rc = VERR_INVALID_POINTER;
2380
2381	/* Supply the setjmp return RIP/EIP. */
2382	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2383	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2384	{
2385	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2386	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2387	size_t offDst = 0;
2388	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2389	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2390	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2391	{
2392	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2393	Assert(offSrc < cbSrc);
2394	pbSrc -= offSrc;
2395	cbSrc -= offSrc;
2396	}
2397	if (cbSrc > cbRead - offDst)
2398	cbSrc = cbRead - offDst;
2399	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2400
2401	if (cbSrc == cbRead)
2402	rc = VINF_SUCCESS;
2403	}
2404
2405	return rc;
2406	}
2407
2408
2409	/**
2410	* Used by the DBGF stack unwinder to initialize the register state.
2411	*
2412	* @param pUVM The user mode VM handle.
2413	* @param idCpu The ID of the CPU being unwound.
2414	* @param pState The unwind state to initialize.
2415	*/
2416	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2417	{
2418	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2419	AssertReturnVoid(pVCpu);
2420
2421	/*
2422	* Locate the resume point on the stack.
2423	*/
2424	#ifdef VMM_R0_SWITCH_STACK
2425	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2426	AssertReturnVoid(off < VMM_STACK_SIZE);
2427	#else
2428	uintptr_t off = 0;
2429	#endif
2430
2431	#ifdef RT_ARCH_AMD64
2432	/*
2433	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2434	*/
2435	# ifdef VBOX_STRICT
2436	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2437	off += 8; /* RESUME_MAGIC */
2438	# endif
2439	# ifdef RT_OS_WINDOWS
2440	off += 0xa0; /* XMM6 thru XMM15 */
2441	# endif
2442	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2443	off += 8;
2444	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2445	off += 8;
2446	# ifdef RT_OS_WINDOWS
2447	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2448	off += 8;
2449	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2450	off += 8;
2451	# endif
2452	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2453	off += 8;
2454	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2455	off += 8;
2456	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2457	off += 8;
2458	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2459	off += 8;
2460	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2461	off += 8;
2462	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2463	off += 8;
2464
2465	#elif defined(RT_ARCH_X86)
2466	/*
2467	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2468	*/
2469	# ifdef VBOX_STRICT
2470	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2471	off += 4; /* RESUME_MAGIC */
2472	# endif
2473	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2474	off += 4;
2475	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2476	off += 4;
2477	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2478	off += 4;
2479	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2480	off += 4;
2481	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2482	off += 4;
2483	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2484	off += 4;
2485	#else
2486	# error "Port me"
2487	#endif
2488
2489	/*
2490	* This is all we really need here, though the above helps if the assembly
2491	* doesn't contain unwind info (currently only on win/64, so that is useful).
2492	*/
2493	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2494	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2495	}
2496
2497	#ifdef VBOX_WITH_RAW_MODE
2498
2499	/**
2500	* Calls a RC function.
2501	*
2502	* @param pVM The cross context VM structure.
2503	* @param RCPtrEntry The address of the RC function.
2504	* @param cArgs The number of arguments in the ....
2505	* @param ... Arguments to the function.
2506	*/
2507	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2508	{
2509	va_list args;
2510	va_start(args, cArgs);
2511	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2512	va_end(args);
2513	return rc;
2514	}
2515
2516
2517	/**
2518	* Calls a RC function.
2519	*
2520	* @param pVM The cross context VM structure.
2521	* @param RCPtrEntry The address of the RC function.
2522	* @param cArgs The number of arguments in the ....
2523	* @param args Arguments to the function.
2524	*/
2525	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2526	{
2527	/* Raw mode implies 1 VCPU. */
2528	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2529	PVMCPU pVCpu = &pVM->aCpus[0];
2530
2531	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2532
2533	/*
2534	* Setup the call frame using the trampoline.
2535	*/
2536	CPUMSetHyperState(pVCpu,
2537	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2538	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2539	RCPtrEntry, /* eax */
2540	cArgs /* edx */
2541	);
2542
2543	#if 0
2544	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2545	#endif
2546	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2547	int i = cArgs;
2548	while (i-- > 0)
2549	*pFrame++ = va_arg(args, RTGCUINTPTR32);
2550
2551	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2552	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2553
2554	/*
2555	* We hide log flushes (outer) and hypervisor interrupts (inner).
2556	*/
2557	for (;;)
2558	{
2559	int rc;
2560	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2561	do
2562	{
2563	#ifdef NO_SUPCALLR0VMM
2564	rc = VERR_GENERAL_FAILURE;
2565	#else
2566	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2567	if (RT_LIKELY(rc == VINF_SUCCESS))
2568	rc = pVCpu->vmm.s.iLastGZRc;
2569	#endif
2570	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2571
2572	/*
2573	* Flush the loggers.
2574	*/
2575	#ifdef LOG_ENABLED
2576	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2577	if ( pLogger
2578	&& pLogger->offScratch > 0)
2579	RTLogFlushRC(NULL, pLogger);
2580	#endif
2581	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2582	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2583	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2584	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2585	#endif
2586	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2587	VMMR3FatalDump(pVM, pVCpu, rc);
2588	if (rc != VINF_VMM_CALL_HOST)
2589	{
2590	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2591	return rc;
2592	}
2593	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2594	if (RT_FAILURE(rc))
2595	return rc;
2596	}
2597	}
2598
2599	#endif /* VBOX_WITH_RAW_MODE */
2600
2601	/**
2602	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2603	*
2604	* @returns VBox status code.
2605	* @param pVM The cross context VM structure.
2606	* @param uOperation Operation to execute.
2607	* @param u64Arg Constant argument.
2608	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2609	* details.
2610	*/
2611	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2612	{
2613	PVMCPU pVCpu = VMMGetCpu(pVM);
2614	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2615	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2616	}
2617
2618
2619	/**
2620	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2621	*
2622	* @returns VBox status code.
2623	* @param pVM The cross context VM structure.
2624	* @param pVCpu The cross context VM structure.
2625	* @param enmOperation Operation to execute.
2626	* @param u64Arg Constant argument.
2627	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2628	* details.
2629	*/
2630	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2631	{
2632	int rc;
2633	for (;;)
2634	{
2635	#ifdef NO_SUPCALLR0VMM
2636	rc = VERR_GENERAL_FAILURE;
2637	#else
2638	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2639	#endif
2640	/*
2641	* Flush the logs.
2642	*/
2643	#ifdef LOG_ENABLED
2644	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2645	#endif
2646	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2647	if (rc != VINF_VMM_CALL_HOST)
2648	break;
2649	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2650	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2651	break;
2652	/* Resume R0 */
2653	}
2654
2655	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2656	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2657	VERR_IPE_UNEXPECTED_INFO_STATUS);
2658	return rc;
2659	}
2660
2661
2662	#ifdef VBOX_WITH_RAW_MODE
2663	/**
2664	* Resumes executing hypervisor code when interrupted by a queue flush or a
2665	* debug event.
2666	*
2667	* @returns VBox status code.
2668	* @param pVM The cross context VM structure.
2669	* @param pVCpu The cross context virtual CPU structure.
2670	*/
2671	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2672	{
2673	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2674	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2675
2676	/*
2677	* We hide log flushes (outer) and hypervisor interrupts (inner).
2678	*/
2679	for (;;)
2680	{
2681	int rc;
2682	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2683	do
2684	{
2685	# ifdef NO_SUPCALLR0VMM
2686	rc = VERR_GENERAL_FAILURE;
2687	# else
2688	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2689	if (RT_LIKELY(rc == VINF_SUCCESS))
2690	rc = pVCpu->vmm.s.iLastGZRc;
2691	# endif
2692	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2693
2694	/*
2695	* Flush the loggers.
2696	*/
2697	# ifdef LOG_ENABLED
2698	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2699	if ( pLogger
2700	&& pLogger->offScratch > 0)
2701	RTLogFlushRC(NULL, pLogger);
2702	# endif
2703	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2704	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2705	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2706	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2707	# endif
2708	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2709	VMMR3FatalDump(pVM, pVCpu, rc);
2710	if (rc != VINF_VMM_CALL_HOST)
2711	{
2712	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2713	return rc;
2714	}
2715	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2716	if (RT_FAILURE(rc))
2717	return rc;
2718	}
2719	}
2720	#endif /* VBOX_WITH_RAW_MODE */
2721
2722
2723	/**
2724	* Service a call to the ring-3 host code.
2725	*
2726	* @returns VBox status code.
2727	* @param pVM The cross context VM structure.
2728	* @param pVCpu The cross context virtual CPU structure.
2729	* @remarks Careful with critsects.
2730	*/
2731	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2732	{
2733	/*
2734	* We must also check for pending critsect exits or else we can deadlock
2735	* when entering other critsects here.
2736	*/
2737	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2738	PDMCritSectBothFF(pVCpu);
2739
2740	switch (pVCpu->vmm.s.enmCallRing3Operation)
2741	{
2742	/*
2743	* Acquire a critical section.
2744	*/
2745	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2746	{
2747	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2748	true /fCallRing3/);
2749	break;
2750	}
2751
2752	/*
2753	* Enter a r/w critical section exclusively.
2754	*/
2755	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2756	{
2757	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2758	true /fCallRing3/);
2759	break;
2760	}
2761
2762	/*
2763	* Enter a r/w critical section shared.
2764	*/
2765	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2766	{
2767	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2768	true /fCallRing3/);
2769	break;
2770	}
2771
2772	/*
2773	* Acquire the PDM lock.
2774	*/
2775	case VMMCALLRING3_PDM_LOCK:
2776	{
2777	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2778	break;
2779	}
2780
2781	/*
2782	* Grow the PGM pool.
2783	*/
2784	case VMMCALLRING3_PGM_POOL_GROW:
2785	{
2786	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2787	break;
2788	}
2789
2790	/*
2791	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2792	*/
2793	case VMMCALLRING3_PGM_MAP_CHUNK:
2794	{
2795	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2796	break;
2797	}
2798
2799	/*
2800	* Allocates more handy pages.
2801	*/
2802	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2803	{
2804	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2805	break;
2806	}
2807
2808	/*
2809	* Allocates a large page.
2810	*/
2811	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2812	{
2813	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2814	break;
2815	}
2816
2817	/*
2818	* Acquire the PGM lock.
2819	*/
2820	case VMMCALLRING3_PGM_LOCK:
2821	{
2822	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2823	break;
2824	}
2825
2826	/*
2827	* Acquire the MM hypervisor heap lock.
2828	*/
2829	case VMMCALLRING3_MMHYPER_LOCK:
2830	{
2831	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2832	break;
2833	}
2834
2835	#ifdef VBOX_WITH_REM
2836	/*
2837	* Flush REM handler notifications.
2838	*/
2839	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2840	{
2841	REMR3ReplayHandlerNotifications(pVM);
2842	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2843	break;
2844	}
2845	#endif
2846
2847	/*
2848	* This is a noop. We just take this route to avoid unnecessary
2849	* tests in the loops.
2850	*/
2851	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2852	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2853	LogAlways(("FLUSH\n"));
2854	break;
2855
2856	/*
2857	* Set the VM error message.
2858	*/
2859	case VMMCALLRING3_VM_SET_ERROR:
2860	VMR3SetErrorWorker(pVM);
2861	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2862	break;
2863
2864	/*
2865	* Set the VM runtime error message.
2866	*/
2867	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2868	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2869	break;
2870
2871	/*
2872	* Signal a ring 0 hypervisor assertion.
2873	* Cancel the longjmp operation that's in progress.
2874	*/
2875	case VMMCALLRING3_VM_R0_ASSERTION:
2876	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2877	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2878	#ifdef RT_ARCH_X86
2879	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2880	#else
2881	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2882	#endif
2883	#ifdef VMM_R0_SWITCH_STACK
2884	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2885	#endif
2886	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2887	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2888	return VERR_VMM_RING0_ASSERTION;
2889
2890	/*
2891	* A forced switch to ring 0 for preemption purposes.
2892	*/
2893	case VMMCALLRING3_VM_R0_PREEMPT:
2894	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2895	break;
2896
2897	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2898	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2899	break;
2900
2901	default:
2902	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2903	return VERR_VMM_UNKNOWN_RING3_CALL;
2904	}
2905
2906	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2907	return VINF_SUCCESS;
2908	}
2909
2910
2911	/**
2912	* Displays the Force action Flags.
2913	*
2914	* @param pVM The cross context VM structure.
2915	* @param pHlp The output helpers.
2916	* @param pszArgs The additional arguments (ignored).
2917	*/
2918	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2919	{
2920	int c;
2921	uint32_t f;
2922	NOREF(pszArgs);
2923
2924	#define PRINT_FLAG(prf,flag) do { \
2925	if (f & (prf##flag)) \
2926	{ \
2927	static const char *s_psz = #flag; \
2928	if (!(c % 6)) \
2929	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2930	else \
2931	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2932	c++; \
2933	f &= ~(prf##flag); \
2934	} \
2935	} while (0)
2936
2937	#define PRINT_GROUP(prf,grp,sfx) do { \
2938	if (f & (prf##grp##sfx)) \
2939	{ \
2940	static const char *s_psz = #grp; \
2941	if (!(c % 5)) \
2942	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2943	else \
2944	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2945	c++; \
2946	} \
2947	} while (0)
2948
2949	/*
2950	* The global flags.
2951	*/
2952	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2953	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2954
2955	/* show the flag mnemonics */
2956	c = 0;
2957	f = fGlobalForcedActions;
2958	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2959	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2960	PRINT_FLAG(VM_FF_,PDM_DMA);
2961	PRINT_FLAG(VM_FF_,DBGF);
2962	PRINT_FLAG(VM_FF_,REQUEST);
2963	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2964	PRINT_FLAG(VM_FF_,RESET);
2965	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2966	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2967	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2968	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2969	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2970	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2971	if (f)
2972	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2973	else
2974	pHlp->pfnPrintf(pHlp, "\n");
2975
2976	/* the groups */
2977	c = 0;
2978	f = fGlobalForcedActions;
2979	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2980	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2981	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2982	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2983	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2984	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2985	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2986	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2987	if (c)
2988	pHlp->pfnPrintf(pHlp, "\n");
2989
2990	/*
2991	* Per CPU flags.
2992	*/
2993	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2994	{
2995	const uint64_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2996	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2997
2998	/* show the flag mnemonics */
2999	c = 0;
3000	f = fLocalForcedActions;
3001	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
3002	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
3003	PRINT_FLAG(VMCPU_FF_,TIMER);
3004	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
3005	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
3006	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
3007	PRINT_FLAG(VMCPU_FF_,UNHALT);
3008	PRINT_FLAG(VMCPU_FF_,IEM);
3009	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
3010	PRINT_FLAG(VMCPU_FF_,DBGF);
3011	PRINT_FLAG(VMCPU_FF_,REQUEST);
3012	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
3013	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
3014	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
3015	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
3016	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
3017	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
3018	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
3019	PRINT_FLAG(VMCPU_FF_,TO_R3);
3020	PRINT_FLAG(VMCPU_FF_,IOM);
3021	#ifdef VBOX_WITH_RAW_MODE
3022	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
3023	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
3024	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
3025	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
3026	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
3027	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
3028	PRINT_FLAG(VMCPU_FF_,CPUM);
3029	#endif
3030	if (f)
3031	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
3032	else
3033	pHlp->pfnPrintf(pHlp, "\n");
3034
3035	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
3036	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
3037
3038	/* the groups */
3039	c = 0;
3040	f = fLocalForcedActions;
3041	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
3042	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
3043	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
3044	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
3045	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
3046	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
3047	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
3048	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
3049	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
3050	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
3051	if (c)
3052	pHlp->pfnPrintf(pHlp, "\n");
3053	}
3054
3055	#undef PRINT_FLAG
3056	#undef PRINT_GROUP
3057	}
3058

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 80003

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