VMM.cpp@ 80005

Last change on this file since 80005 was 80005, checked in by vboxsync, 6 years ago
VMM: Kicking out raw-mode (work in progress). bugref:9517
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1	/* $Id: VMM.cpp 80005 2019-07-26 13:51:44Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_csam
32	* - @subpage pg_dbgf
33	* - @subpage pg_em
34	* - @subpage pg_gim
35	* - @subpage pg_gmm
36	* - @subpage pg_gvmm
37	* - @subpage pg_hm
38	* - @subpage pg_iem
39	* - @subpage pg_iom
40	* - @subpage pg_mm
41	* - @subpage pg_patm
42	* - @subpage pg_pdm
43	* - @subpage pg_pgm
44	* - @subpage pg_rem
45	* - @subpage pg_selm
46	* - @subpage pg_ssm
47	* - @subpage pg_stam
48	* - @subpage pg_tm
49	* - @subpage pg_trpm
50	* - @subpage pg_vm
51	*
52	*
53	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54	*
55	*
56	* @section sec_vmmstate VMM State
57	*
58	* @image html VM_Statechart_Diagram.gif
59	*
60	* To be written.
61	*
62	*
63	* @subsection subsec_vmm_init VMM Initialization
64	*
65	* To be written.
66	*
67	*
68	* @subsection subsec_vmm_term VMM Termination
69	*
70	* To be written.
71	*
72	*
73	* @section sec_vmm_limits VMM Limits
74	*
75	* There are various resource limits imposed by the VMM and it's
76	* sub-components. We'll list some of them here.
77	*
78	* On 64-bit hosts:
79	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80	* can be increased up to 64K - 1.
81	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83	* - A VM can be assigned all the memory we can use (16TB), however, the
84	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86	*
87	* On 32-bit hosts:
88	* - Max 127 VMs. Imposed by GMM's per page structure.
89	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 28-bit page ID used
91	* internally in GMM. It is also limited by PAE.
92	* - A VM can be assigned all the memory GMM can allocate, however, the
93	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95	*
96	*/
97
98
99	/*********************************************************************************************************************************
100	* Header Files *
101	*********************************************************************************************************************************/
102	#define LOG_GROUP LOG_GROUP_VMM
103	#include <VBox/vmm/vmm.h>
104	#include <VBox/vmm/vmapi.h>
105	#include <VBox/vmm/pgm.h>
106	#include <VBox/vmm/cfgm.h>
107	#include <VBox/vmm/pdmqueue.h>
108	#include <VBox/vmm/pdmcritsect.h>
109	#include <VBox/vmm/pdmcritsectrw.h>
110	#include <VBox/vmm/pdmapi.h>
111	#include <VBox/vmm/cpum.h>
112	#include <VBox/vmm/gim.h>
113	#include <VBox/vmm/mm.h>
114	#include <VBox/vmm/nem.h>
115	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
116	# include <VBox/vmm/iem.h>
117	#endif
118	#include <VBox/vmm/iom.h>
119	#include <VBox/vmm/trpm.h>
120	#include <VBox/vmm/selm.h>
121	#include <VBox/vmm/em.h>
122	#include <VBox/sup.h>
123	#include <VBox/vmm/dbgf.h>
124	#include <VBox/vmm/apic.h>
125	#ifdef VBOX_WITH_REM
126	# include <VBox/vmm/rem.h>
127	#endif
128	#include <VBox/vmm/ssm.h>
129	#include <VBox/vmm/ftm.h>
130	#include <VBox/vmm/tm.h>
131	#include "VMMInternal.h"
132	#include <VBox/vmm/vm.h>
133	#include <VBox/vmm/uvm.h>
134
135	#include <VBox/err.h>
136	#include <VBox/param.h>
137	#include <VBox/version.h>
138	#include <VBox/vmm/hm.h>
139	#include <iprt/assert.h>
140	#include <iprt/alloc.h>
141	#include <iprt/asm.h>
142	#include <iprt/time.h>
143	#include <iprt/semaphore.h>
144	#include <iprt/stream.h>
145	#include <iprt/string.h>
146	#include <iprt/stdarg.h>
147	#include <iprt/ctype.h>
148	#include <iprt/x86.h>
149
150
151	/*********************************************************************************************************************************
152	* Defined Constants And Macros *
153	*********************************************************************************************************************************/
154	/** The saved state version. */
155	#define VMM_SAVED_STATE_VERSION 4
156	/** The saved state version used by v3.0 and earlier. (Teleportation) */
157	#define VMM_SAVED_STATE_VERSION_3_0 3
158
159	/** Macro for flushing the ring-0 logging. */
160	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
161	do { \
162	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
163	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
164	{ /* likely? */ } \
165	else \
166	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
167	} while (0)
168
169
170	/*********************************************************************************************************************************
171	* Internal Functions *
172	*********************************************************************************************************************************/
173	static int vmmR3InitStacks(PVM pVM);
174	static int vmmR3InitLoggers(PVM pVM);
175	static void vmmR3InitRegisterStats(PVM pVM);
176	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
177	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
178	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
179	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
180	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
181	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
182	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
183
184
185	/**
186	* Initializes the VMM.
187	*
188	* @returns VBox status code.
189	* @param pVM The cross context VM structure.
190	*/
191	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
192	{
193	LogFlow(("VMMR3Init\n"));
194
195	/*
196	* Assert alignment, sizes and order.
197	*/
198	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
199	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
200
201	/*
202	* Init basic VM VMM members.
203	*/
204	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
205	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
206	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
208	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
209	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
211	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
212	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
213
214	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
215	* The EMT yield interval. The EMT yielding is a hack we employ to play a
216	* bit nicer with the rest of the system (like for instance the GUI).
217	*/
218	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
219	23 /* Value arrived at after experimenting with the grub boot prompt. */);
220	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
221
222
223	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
224	* Controls whether we employ per-cpu preemption timers to limit the time
225	* spent executing guest code. This option is not available on all
226	* platforms and we will silently ignore this setting then. If we are
227	* running in VT-x mode, we will use the VMX-preemption timer instead of
228	* this one when possible.
229	*/
230	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
231	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
232	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
233
234	/*
235	* Initialize the VMM rendezvous semaphores.
236	*/
237	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
238	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
239	return VERR_NO_MEMORY;
240	for (VMCPUID i = 0; i < pVM->cCpus; i++)
241	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
242	for (VMCPUID i = 0; i < pVM->cCpus; i++)
243	{
244	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
245	AssertRCReturn(rc, rc);
246	}
247	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
262	AssertRCReturn(rc, rc);
263
264	/*
265	* Register the saved state data unit.
266	*/
267	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
268	NULL, NULL, NULL,
269	NULL, vmmR3Save, NULL,
270	NULL, vmmR3Load, NULL);
271	if (RT_FAILURE(rc))
272	return rc;
273
274	/*
275	* Register the Ring-0 VM handle with the session for fast ioctl calls.
276	*/
277	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
278	if (RT_FAILURE(rc))
279	return rc;
280
281	/*
282	* Init various sub-components.
283	*/
284	rc = vmmR3InitStacks(pVM);
285	if (RT_SUCCESS(rc))
286	{
287	rc = vmmR3InitLoggers(pVM);
288
289	#ifdef VBOX_WITH_NMI
290	/*
291	* Allocate mapping for the host APIC.
292	*/
293	if (RT_SUCCESS(rc))
294	{
295	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
296	AssertRC(rc);
297	}
298	#endif
299	if (RT_SUCCESS(rc))
300	{
301	/*
302	* Debug info and statistics.
303	*/
304	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
305	vmmR3InitRegisterStats(pVM);
306	vmmInitFormatTypes();
307
308	return VINF_SUCCESS;
309	}
310	}
311	/** @todo Need failure cleanup? */
312
313	return rc;
314	}
315
316
317	/**
318	* Allocate & setup the VMM RC stack(s) (for EMTs).
319	*
320	* The stacks are also used for long jumps in Ring-0.
321	*
322	* @returns VBox status code.
323	* @param pVM The cross context VM structure.
324	*
325	* @remarks The optional guard page gets it protection setup up during R3 init
326	* completion because of init order issues.
327	*/
328	static int vmmR3InitStacks(PVM pVM)
329	{
330	int rc = VINF_SUCCESS;
331	#ifdef VMM_R0_SWITCH_STACK
332	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
333	#else
334	uint32_t fFlags = 0;
335	#endif
336
337	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
338	{
339	PVMCPU pVCpu = &pVM->aCpus[idCpu];
340
341	#ifdef VBOX_STRICT_VMM_STACK
342	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
343	#else
344	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
345	#endif
346	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
347	if (RT_SUCCESS(rc))
348	{
349	#ifdef VBOX_STRICT_VMM_STACK
350	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
351	#endif
352	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
353	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
354	if (VM_IS_RAW_MODE_ENABLED(pVM))
355	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
356	else
357	#endif
358	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
359
360	}
361	}
362
363	return rc;
364	}
365
366
367	/**
368	* Initialize the loggers.
369	*
370	* @returns VBox status code.
371	* @param pVM The cross context VM structure.
372	*/
373	static int vmmR3InitLoggers(PVM pVM)
374	{
375	int rc;
376	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
377
378	/*
379	* Allocate R0 Logger instance (finalized in the relocator).
380	*/
381	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
382	PRTLOGGER pLogger = RTLogDefaultInstance();
383	if (pLogger)
384	{
385	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
386	for (VMCPUID i = 0; i < pVM->cCpus; i++)
387	{
388	PVMCPU pVCpu = &pVM->aCpus[i];
389	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
390	(void **)&pVCpu->vmm.s.pR0LoggerR3);
391	if (RT_FAILURE(rc))
392	return rc;
393	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
394	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
395	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
396	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
397	}
398	}
399	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
400
401	/*
402	* Release logging.
403	*/
404	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
405	if (pRelLogger)
406	{
407	/*
408	* Ring-0 release logger.
409	*/
410	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
411	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
412	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
413
414	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
415	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
416	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
417
418	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
419
420	for (VMCPUID i = 0; i < pVM->cCpus; i++)
421	{
422	PVMCPU pVCpu = &pVM->aCpus[i];
423	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
424	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
425	if (RT_FAILURE(rc))
426	return rc;
427	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
428	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
429	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
430	pVmmLogger->pVM = pVM->pVMR0;
431	pVmmLogger->cbLogger = (uint32_t)cbLogger;
432	pVmmLogger->fCreated = false;
433	pVmmLogger->fFlushingDisabled = false;
434	pVmmLogger->fRegistered = false;
435	pVmmLogger->idCpu = i;
436
437	char szR0ThreadName[16];
438	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
439	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
440	pfnLoggerWrapper, pfnLoggerFlush,
441	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
442	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
443
444	/* We only update the release log instance here. */
445	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
446	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
447	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
448
449	pVmmLogger->fCreated = true;
450	}
451	}
452
453	return VINF_SUCCESS;
454	}
455
456
457	/**
458	* VMMR3Init worker that register the statistics with STAM.
459	*
460	* @param pVM The cross context VM structure.
461	*/
462	static void vmmR3InitRegisterStats(PVM pVM)
463	{
464	RT_NOREF_PV(pVM);
465
466	/*
467	* Statistics.
468	*/
469	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
522	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
523	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
524	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
525	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
526	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
527	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
528	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
529	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
530	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
531	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
532	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
533
534	#ifdef VBOX_WITH_STATISTICS
535	for (VMCPUID i = 0; i < pVM->cCpus; i++)
536	{
537	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
538	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
539	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
540	}
541	#endif
542	for (VMCPUID i = 0; i < pVM->cCpus; i++)
543	{
544	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
545	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
546	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
547	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
548	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
549	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
550	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
551	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
552	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
553	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
554	}
555	}
556
557
558	/**
559	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
560	*
561	* @returns VBox status code.
562	* @param pVM The cross context VM structure.
563	* @param pVCpu The cross context per CPU structure.
564	* @thread EMT(pVCpu)
565	*/
566	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
567	{
568	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
569	}
570
571
572	/**
573	* Initializes the R0 VMM.
574	*
575	* @returns VBox status code.
576	* @param pVM The cross context VM structure.
577	*/
578	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
579	{
580	int rc;
581	PVMCPU pVCpu = VMMGetCpu(pVM);
582	Assert(pVCpu && pVCpu->idCpu == 0);
583
584	#ifdef LOG_ENABLED
585	/*
586	* Initialize the ring-0 logger if we haven't done so yet.
587	*/
588	if ( pVCpu->vmm.s.pR0LoggerR3
589	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
590	{
591	rc = VMMR3UpdateLoggers(pVM);
592	if (RT_FAILURE(rc))
593	return rc;
594	}
595	#endif
596
597	/*
598	* Call Ring-0 entry with init code.
599	*/
600	for (;;)
601	{
602	#ifdef NO_SUPCALLR0VMM
603	//rc = VERR_GENERAL_FAILURE;
604	rc = VINF_SUCCESS;
605	#else
606	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
607	#endif
608	/*
609	* Flush the logs.
610	*/
611	#ifdef LOG_ENABLED
612	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
613	#endif
614	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
615	if (rc != VINF_VMM_CALL_HOST)
616	break;
617	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
618	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
619	break;
620	/* Resume R0 */
621	}
622
623	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
624	{
625	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
626	if (RT_SUCCESS(rc))
627	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
628	}
629
630	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
631	if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
632	LogRel(("VMM: Enabled thread-context hooks\n"));
633	else
634	LogRel(("VMM: Thread-context hooks unavailable\n"));
635
636	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
637	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
638	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
639	else
640	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
641	if (pVM->vmm.s.fIsPreemptPossible)
642	LogRel(("VMM: Kernel preemption is possible\n"));
643	else
644	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
645
646	/*
647	* Send all EMTs to ring-0 to get their logger initialized.
648	*/
649	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
650	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
651
652	return rc;
653	}
654
655
656	#ifdef VBOX_WITH_RAW_MODE
657	/**
658	* Initializes the RC VMM.
659	*
660	* @returns VBox status code.
661	* @param pVM The cross context VM structure.
662	*/
663	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
664	{
665	PVMCPU pVCpu = VMMGetCpu(pVM);
666	Assert(pVCpu && pVCpu->idCpu == 0);
667
668	/* In VMX mode, there's no need to init RC. */
669	if (!VM_IS_RAW_MODE_ENABLED(pVM))
670	return VINF_SUCCESS;
671
672	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
673
674	/*
675	* Call VMMRCInit():
676	* -# resolve the address.
677	* -# setup stackframe and EIP to use the trampoline.
678	* -# do a generic hypervisor call.
679	*/
680	RTRCPTR RCPtrEP;
681	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
682	if (RT_SUCCESS(rc))
683	{
684	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
685	uint64_t u64TS = RTTimeProgramStartNanoTS();
686	CPUMPushHyper(pVCpu, RT_HI_U32(u64TS)); /* Param 4: The program startup TS - Hi. */
687	CPUMPushHyper(pVCpu, RT_LO_U32(u64TS)); /* Param 4: The program startup TS - Lo. */
688	CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
689	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
690	CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
691	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
692	CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
693	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
694	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
695	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
696
697	for (;;)
698	{
699	#ifdef NO_SUPCALLR0VMM
700	//rc = VERR_GENERAL_FAILURE;
701	rc = VINF_SUCCESS;
702	#else
703	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
704	#endif
705	#ifdef LOG_ENABLED
706	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
707	if ( pLogger
708	&& pLogger->offScratch > 0)
709	RTLogFlushRC(NULL, pLogger);
710	#endif
711	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
712	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
713	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
714	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
715	#endif
716	if (rc != VINF_VMM_CALL_HOST)
717	break;
718	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
719	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
720	break;
721	}
722
723	/* Don't trigger assertions or guru if raw-mode is unavailable. */
724	if (rc != VERR_SUPDRV_NO_RAW_MODE_HYPER_V_ROOT)
725	{
726	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
727	{
728	VMMR3FatalDump(pVM, pVCpu, rc);
729	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
730	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
731	}
732	AssertRC(rc);
733	}
734	}
735	return rc;
736	}
737	#endif /* VBOX_WITH_RAW_MODE */
738
739
740	/**
741	* Called when an init phase completes.
742	*
743	* @returns VBox status code.
744	* @param pVM The cross context VM structure.
745	* @param enmWhat Which init phase.
746	*/
747	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
748	{
749	int rc = VINF_SUCCESS;
750
751	switch (enmWhat)
752	{
753	case VMINITCOMPLETED_RING3:
754	{
755	/*
756	* Create the EMT yield timer.
757	*/
758	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
759	AssertRCReturn(rc, rc);
760
761	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
762	AssertRCReturn(rc, rc);
763	break;
764	}
765
766	case VMINITCOMPLETED_HM:
767	{
768	/*
769	* Disable the periodic preemption timers if we can use the
770	* VMX-preemption timer instead.
771	*/
772	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
773	&& HMR3IsVmxPreemptionTimerUsed(pVM))
774	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
775	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
776
777	/*
778	* Last chance for GIM to update its CPUID leaves if it requires
779	* knowledge/information from HM initialization.
780	*/
781	rc = GIMR3InitCompleted(pVM);
782	AssertRCReturn(rc, rc);
783
784	/*
785	* CPUM's post-initialization (print CPUIDs).
786	*/
787	CPUMR3LogCpuIdAndMsrFeatures(pVM);
788	break;
789	}
790
791	default: /* shuts up gcc */
792	break;
793	}
794
795	return rc;
796	}
797
798
799	/**
800	* Terminate the VMM bits.
801	*
802	* @returns VBox status code.
803	* @param pVM The cross context VM structure.
804	*/
805	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
806	{
807	PVMCPU pVCpu = VMMGetCpu(pVM);
808	Assert(pVCpu && pVCpu->idCpu == 0);
809
810	/*
811	* Call Ring-0 entry with termination code.
812	*/
813	int rc;
814	for (;;)
815	{
816	#ifdef NO_SUPCALLR0VMM
817	//rc = VERR_GENERAL_FAILURE;
818	rc = VINF_SUCCESS;
819	#else
820	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
821	#endif
822	/*
823	* Flush the logs.
824	*/
825	#ifdef LOG_ENABLED
826	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
827	#endif
828	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
829	if (rc != VINF_VMM_CALL_HOST)
830	break;
831	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
832	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
833	break;
834	/* Resume R0 */
835	}
836	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
837	{
838	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
839	if (RT_SUCCESS(rc))
840	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
841	}
842
843	for (VMCPUID i = 0; i < pVM->cCpus; i++)
844	{
845	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
846	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
847	}
848	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
849	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
850	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
851	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
852	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
853	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
854	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
855	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
856	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
857	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
858	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
859	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
860	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
861	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
862	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
863	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
864
865	vmmTermFormatTypes();
866	return rc;
867	}
868
869
870	/**
871	* Applies relocations to data and code managed by this
872	* component. This function will be called at init and
873	* whenever the VMM need to relocate it self inside the GC.
874	*
875	* The VMM will need to apply relocations to the core code.
876	*
877	* @param pVM The cross context VM structure.
878	* @param offDelta The relocation delta.
879	*/
880	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
881	{
882	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
883	RT_NOREF(offDelta);
884
885	/*
886	* Update the logger.
887	*/
888	VMMR3UpdateLoggers(pVM);
889	}
890
891
892	/**
893	* Updates the settings for the RC and R0 loggers.
894	*
895	* @returns VBox status code.
896	* @param pVM The cross context VM structure.
897	*/
898	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
899	{
900	int rc = VINF_SUCCESS;
901
902	#ifdef LOG_ENABLED
903	/*
904	* For the ring-0 EMT logger, we use a per-thread logger instance
905	* in ring-0. Only initialize it once.
906	*/
907	PRTLOGGER const pDefault = RTLogDefaultInstance();
908	for (VMCPUID i = 0; i < pVM->cCpus; i++)
909	{
910	PVMCPU pVCpu = &pVM->aCpus[i];
911	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
912	if (pR0LoggerR3)
913	{
914	if (!pR0LoggerR3->fCreated)
915	{
916	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
917	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
918	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
919
920	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
921	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
922	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
923
924	char szR0ThreadName[16];
925	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
926	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
927	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
928	pfnLoggerWrapper, pfnLoggerFlush,
929	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
930	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
931
932	pR0LoggerR3->idCpu = i;
933	pR0LoggerR3->fCreated = true;
934	pR0LoggerR3->fFlushingDisabled = false;
935	}
936
937	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
938	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
939	AssertRC(rc);
940	}
941	}
942	#else
943	RT_NOREF(pVM);
944	#endif
945
946	return rc;
947	}
948
949
950	/**
951	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
952	*
953	* @returns Pointer to the buffer.
954	* @param pVM The cross context VM structure.
955	*/
956	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
957	{
958	if (!VM_IS_RAW_MODE_ENABLED(pVM))
959	return pVM->vmm.s.szRing0AssertMsg1;
960
961	RTRCPTR RCPtr;
962	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
963	if (RT_SUCCESS(rc))
964	return (const char *)MMHyperRCToR3(pVM, RCPtr);
965
966	return NULL;
967	}
968
969
970	/**
971	* Returns the VMCPU of the specified virtual CPU.
972	*
973	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
974	*
975	* @param pUVM The user mode VM handle.
976	* @param idCpu The ID of the virtual CPU.
977	*/
978	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
979	{
980	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
981	AssertReturn(idCpu < pUVM->cCpus, NULL);
982	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
983	return &pUVM->pVM->aCpus[idCpu];
984	}
985
986
987	/**
988	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
989	*
990	* @returns Pointer to the buffer.
991	* @param pVM The cross context VM structure.
992	*/
993	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
994	{
995	if (!VM_IS_RAW_MODE_ENABLED(pVM))
996	return pVM->vmm.s.szRing0AssertMsg2;
997
998	RTRCPTR RCPtr;
999	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1000	if (RT_SUCCESS(rc))
1001	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1002
1003	return NULL;
1004	}
1005
1006
1007	/**
1008	* Execute state save operation.
1009	*
1010	* @returns VBox status code.
1011	* @param pVM The cross context VM structure.
1012	* @param pSSM SSM operation handle.
1013	*/
1014	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1015	{
1016	LogFlow(("vmmR3Save:\n"));
1017
1018	/*
1019	* Save the started/stopped state of all CPUs except 0 as it will always
1020	* be running. This avoids breaking the saved state version. :-)
1021	*/
1022	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1023	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1024
1025	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1026	}
1027
1028
1029	/**
1030	* Execute state load operation.
1031	*
1032	* @returns VBox status code.
1033	* @param pVM The cross context VM structure.
1034	* @param pSSM SSM operation handle.
1035	* @param uVersion Data layout version.
1036	* @param uPass The data pass.
1037	*/
1038	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1039	{
1040	LogFlow(("vmmR3Load:\n"));
1041	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1042
1043	/*
1044	* Validate version.
1045	*/
1046	if ( uVersion != VMM_SAVED_STATE_VERSION
1047	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1048	{
1049	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1050	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1051	}
1052
1053	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1054	{
1055	/* Ignore the stack bottom, stack pointer and stack bits. */
1056	RTRCPTR RCPtrIgnored;
1057	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1058	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1059	#ifdef RT_OS_DARWIN
1060	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1061	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1062	&& SSMR3HandleRevision(pSSM) >= 48858
1063	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1064	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1065	)
1066	SSMR3Skip(pSSM, 16384);
1067	else
1068	SSMR3Skip(pSSM, 8192);
1069	#else
1070	SSMR3Skip(pSSM, 8192);
1071	#endif
1072	}
1073
1074	/*
1075	* Restore the VMCPU states. VCPU 0 is always started.
1076	*/
1077	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1078	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1079	{
1080	bool fStarted;
1081	int rc = SSMR3GetBool(pSSM, &fStarted);
1082	if (RT_FAILURE(rc))
1083	return rc;
1084	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1085	}
1086
1087	/* terminator */
1088	uint32_t u32;
1089	int rc = SSMR3GetU32(pSSM, &u32);
1090	if (RT_FAILURE(rc))
1091	return rc;
1092	if (u32 != UINT32_MAX)
1093	{
1094	AssertMsgFailed(("u32=%#x\n", u32));
1095	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1096	}
1097	return VINF_SUCCESS;
1098	}
1099
1100
1101	#ifdef VBOX_WITH_RAW_MODE
1102	/**
1103	* Resolve a builtin RC symbol.
1104	*
1105	* Called by PDM when loading or relocating RC modules.
1106	*
1107	* @returns VBox status
1108	* @param pVM The cross context VM structure.
1109	* @param pszSymbol Symbol to resolve.
1110	* @param pRCPtrValue Where to store the symbol value.
1111	*
1112	* @remark This has to work before VMMR3Relocate() is called.
1113	*/
1114	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1115	{
1116	if (!strcmp(pszSymbol, "g_Logger"))
1117	{
1118	if (pVM->vmm.s.pRCLoggerR3)
1119	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1120	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1121	}
1122	else if (!strcmp(pszSymbol, "g_RelLogger"))
1123	{
1124	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1125	if (pVM->vmm.s.pRCRelLoggerR3)
1126	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1127	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1128	# else
1129	*pRCPtrValue = NIL_RTRCPTR;
1130	# endif
1131	}
1132	else
1133	return VERR_SYMBOL_NOT_FOUND;
1134	return VINF_SUCCESS;
1135	}
1136	#endif /* VBOX_WITH_RAW_MODE */
1137
1138
1139	/**
1140	* Suspends the CPU yielder.
1141	*
1142	* @param pVM The cross context VM structure.
1143	*/
1144	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1145	{
1146	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1147	if (!pVM->vmm.s.cYieldResumeMillies)
1148	{
1149	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1150	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1151	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1152	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1153	else
1154	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1155	TMTimerStop(pVM->vmm.s.pYieldTimer);
1156	}
1157	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1158	}
1159
1160
1161	/**
1162	* Stops the CPU yielder.
1163	*
1164	* @param pVM The cross context VM structure.
1165	*/
1166	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1167	{
1168	if (!pVM->vmm.s.cYieldResumeMillies)
1169	TMTimerStop(pVM->vmm.s.pYieldTimer);
1170	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1171	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1172	}
1173
1174
1175	/**
1176	* Resumes the CPU yielder when it has been a suspended or stopped.
1177	*
1178	* @param pVM The cross context VM structure.
1179	*/
1180	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1181	{
1182	if (pVM->vmm.s.cYieldResumeMillies)
1183	{
1184	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1185	pVM->vmm.s.cYieldResumeMillies = 0;
1186	}
1187	}
1188
1189
1190	/**
1191	* Internal timer callback function.
1192	*
1193	* @param pVM The cross context VM structure.
1194	* @param pTimer The timer handle.
1195	* @param pvUser User argument specified upon timer creation.
1196	*/
1197	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1198	{
1199	NOREF(pvUser);
1200
1201	/*
1202	* This really needs some careful tuning. While we shouldn't be too greedy since
1203	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1204	* because that'll cause us to stop up.
1205	*
1206	* The current logic is to use the default interval when there is no lag worth
1207	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1208	*
1209	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1210	* so the lag is up to date.)
1211	*/
1212	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1213	if ( u64Lag < 50000000 /* 50ms */
1214	\|\| ( u64Lag < 1000000000 /* 1s */
1215	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1216	)
1217	{
1218	uint64_t u64Elapsed = RTTimeNanoTS();
1219	pVM->vmm.s.u64LastYield = u64Elapsed;
1220
1221	RTThreadYield();
1222
1223	#ifdef LOG_ENABLED
1224	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1225	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1226	#endif
1227	}
1228	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1229	}
1230
1231
1232	#ifdef VBOX_WITH_RAW_MODE
1233	/**
1234	* Executes guest code in the raw-mode context.
1235	*
1236	* @param pVM The cross context VM structure.
1237	* @param pVCpu The cross context virtual CPU structure.
1238	*/
1239	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1240	{
1241	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1242
1243	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1244
1245	/*
1246	* Set the hypervisor to resume executing a CPUM resume function
1247	* in CPUMRCA.asm.
1248	*/
1249	CPUMSetHyperState(pVCpu,
1250	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1251	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1252	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1253	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1254	0, /* eax */
1255	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1256
1257	/*
1258	* We hide log flushes (outer) and hypervisor interrupts (inner).
1259	*/
1260	for (;;)
1261	{
1262	#ifdef VBOX_STRICT
1263	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1264	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1265	PGMMapCheck(pVM);
1266	# ifdef VBOX_WITH_SAFE_STR
1267	SELMR3CheckShadowTR(pVM);
1268	# endif
1269	#endif
1270	int rc;
1271	do
1272	{
1273	#ifdef NO_SUPCALLR0VMM
1274	rc = VERR_GENERAL_FAILURE;
1275	#else
1276	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1277	if (RT_LIKELY(rc == VINF_SUCCESS))
1278	rc = pVCpu->vmm.s.iLastGZRc;
1279	#endif
1280	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1281
1282	/*
1283	* Flush the logs.
1284	*/
1285	#ifdef LOG_ENABLED
1286	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1287	if ( pLogger
1288	&& pLogger->offScratch > 0)
1289	RTLogFlushRC(NULL, pLogger);
1290	#endif
1291	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1292	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1293	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1294	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1295	#endif
1296	if (rc != VINF_VMM_CALL_HOST)
1297	{
1298	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1299	return rc;
1300	}
1301	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1302	if (RT_FAILURE(rc))
1303	return rc;
1304	/* Resume GC */
1305	}
1306	}
1307	#endif /* VBOX_WITH_RAW_MODE */
1308
1309
1310	/**
1311	* Executes guest code (Intel VT-x and AMD-V).
1312	*
1313	* @param pVM The cross context VM structure.
1314	* @param pVCpu The cross context virtual CPU structure.
1315	*/
1316	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1317	{
1318	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1319
1320	for (;;)
1321	{
1322	int rc;
1323	do
1324	{
1325	#ifdef NO_SUPCALLR0VMM
1326	rc = VERR_GENERAL_FAILURE;
1327	#else
1328	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1329	if (RT_LIKELY(rc == VINF_SUCCESS))
1330	rc = pVCpu->vmm.s.iLastGZRc;
1331	#endif
1332	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1333
1334	#if 0 /** @todo triggers too often */
1335	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1336	#endif
1337
1338	/*
1339	* Flush the logs
1340	*/
1341	#ifdef LOG_ENABLED
1342	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1343	#endif
1344	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1345	if (rc != VINF_VMM_CALL_HOST)
1346	{
1347	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1348	return rc;
1349	}
1350	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1351	if (RT_FAILURE(rc))
1352	return rc;
1353	/* Resume R0 */
1354	}
1355	}
1356
1357
1358	/**
1359	* Perform one of the fast I/O control VMMR0 operation.
1360	*
1361	* @returns VBox strict status code.
1362	* @param pVM The cross context VM structure.
1363	* @param pVCpu The cross context virtual CPU structure.
1364	* @param enmOperation The operation to perform.
1365	*/
1366	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1367	{
1368	for (;;)
1369	{
1370	VBOXSTRICTRC rcStrict;
1371	do
1372	{
1373	#ifdef NO_SUPCALLR0VMM
1374	rcStrict = VERR_GENERAL_FAILURE;
1375	#else
1376	rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1377	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1378	rcStrict = pVCpu->vmm.s.iLastGZRc;
1379	#endif
1380	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1381
1382	/*
1383	* Flush the logs
1384	*/
1385	#ifdef LOG_ENABLED
1386	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1387	#endif
1388	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1389	if (rcStrict != VINF_VMM_CALL_HOST)
1390	return rcStrict;
1391	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1392	if (RT_FAILURE(rc))
1393	return rc;
1394	/* Resume R0 */
1395	}
1396	}
1397
1398
1399	/**
1400	* VCPU worker for VMMR3SendStartupIpi.
1401	*
1402	* @param pVM The cross context VM structure.
1403	* @param idCpu Virtual CPU to perform SIPI on.
1404	* @param uVector The SIPI vector.
1405	*/
1406	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1407	{
1408	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1409	VMCPU_ASSERT_EMT(pVCpu);
1410
1411	/*
1412	* In the INIT state, the target CPU is only responsive to an SIPI.
1413	* This is also true for when when the CPU is in VMX non-root mode.
1414	*
1415	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1416	* See Intel spec. 26.6.2 "Activity State".
1417	*/
1418	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1419	return VINF_SUCCESS;
1420
1421	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1422	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1423	if (CPUMIsGuestInVmxRootMode(pCtx))
1424	{
1425	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1426	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1427	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1428
1429	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1430	return VINF_SUCCESS;
1431	}
1432	#endif
1433
1434	pCtx->cs.Sel = uVector << 8;
1435	pCtx->cs.ValidSel = uVector << 8;
1436	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1437	pCtx->cs.u64Base = uVector << 12;
1438	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1439	pCtx->rip = 0;
1440
1441	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1442
1443	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1444	EMSetState(pVCpu, EMSTATE_HALTED);
1445	return VINF_EM_RESCHEDULE;
1446	# else /* And if we go the VMCPU::enmState way it can stay here. */
1447	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1448	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1449	return VINF_SUCCESS;
1450	# endif
1451	}
1452
1453
1454	/**
1455	* VCPU worker for VMMR3SendInitIpi.
1456	*
1457	* @returns VBox status code.
1458	* @param pVM The cross context VM structure.
1459	* @param idCpu Virtual CPU to perform SIPI on.
1460	*/
1461	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1462	{
1463	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1464	VMCPU_ASSERT_EMT(pVCpu);
1465
1466	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1467
1468	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1469	* wait-for-SIPI state. Verify. */
1470
1471	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1472	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1473	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1474	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1475	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1476	#endif
1477
1478	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1479	* IPI (e.g. SVM_EXIT_INIT). */
1480
1481	PGMR3ResetCpu(pVM, pVCpu);
1482	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1483	APICR3InitIpi(pVCpu);
1484	TRPMR3ResetCpu(pVCpu);
1485	CPUMR3ResetCpu(pVM, pVCpu);
1486	EMR3ResetCpu(pVCpu);
1487	HMR3ResetCpu(pVCpu);
1488	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1489
1490	/* This will trickle up on the target EMT. */
1491	return VINF_EM_WAIT_SIPI;
1492	}
1493
1494
1495	/**
1496	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1497	* vector-dependent state and unhalting processor.
1498	*
1499	* @param pVM The cross context VM structure.
1500	* @param idCpu Virtual CPU to perform SIPI on.
1501	* @param uVector SIPI vector.
1502	*/
1503	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1504	{
1505	AssertReturnVoid(idCpu < pVM->cCpus);
1506
1507	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1508	AssertRC(rc);
1509	}
1510
1511
1512	/**
1513	* Sends init IPI to the virtual CPU.
1514	*
1515	* @param pVM The cross context VM structure.
1516	* @param idCpu Virtual CPU to perform int IPI on.
1517	*/
1518	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1519	{
1520	AssertReturnVoid(idCpu < pVM->cCpus);
1521
1522	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1523	AssertRC(rc);
1524	}
1525
1526
1527	/**
1528	* Registers the guest memory range that can be used for patching.
1529	*
1530	* @returns VBox status code.
1531	* @param pVM The cross context VM structure.
1532	* @param pPatchMem Patch memory range.
1533	* @param cbPatchMem Size of the memory range.
1534	*/
1535	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1536	{
1537	VM_ASSERT_EMT(pVM);
1538	if (HMIsEnabled(pVM))
1539	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1540
1541	return VERR_NOT_SUPPORTED;
1542	}
1543
1544
1545	/**
1546	* Deregisters the guest memory range that can be used for patching.
1547	*
1548	* @returns VBox status code.
1549	* @param pVM The cross context VM structure.
1550	* @param pPatchMem Patch memory range.
1551	* @param cbPatchMem Size of the memory range.
1552	*/
1553	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1554	{
1555	if (HMIsEnabled(pVM))
1556	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1557
1558	return VINF_SUCCESS;
1559	}
1560
1561
1562	/**
1563	* Common recursion handler for the other EMTs.
1564	*
1565	* @returns Strict VBox status code.
1566	* @param pVM The cross context VM structure.
1567	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1568	* @param rcStrict Current status code to be combined with the one
1569	* from this recursion and returned.
1570	*/
1571	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1572	{
1573	int rc2;
1574
1575	/*
1576	* We wait here while the initiator of this recursion reconfigures
1577	* everything. The last EMT to get in signals the initiator.
1578	*/
1579	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1580	{
1581	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1582	AssertLogRelRC(rc2);
1583	}
1584
1585	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1586	AssertLogRelRC(rc2);
1587
1588	/*
1589	* Do the normal rendezvous processing.
1590	*/
1591	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1592	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1593
1594	/*
1595	* Wait for the initiator to restore everything.
1596	*/
1597	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1598	AssertLogRelRC(rc2);
1599
1600	/*
1601	* Last thread out of here signals the initiator.
1602	*/
1603	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1604	{
1605	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1606	AssertLogRelRC(rc2);
1607	}
1608
1609	/*
1610	* Merge status codes and return.
1611	*/
1612	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1613	if ( rcStrict2 != VINF_SUCCESS
1614	&& ( rcStrict == VINF_SUCCESS
1615	\|\| rcStrict > rcStrict2))
1616	rcStrict = rcStrict2;
1617	return rcStrict;
1618	}
1619
1620
1621	/**
1622	* Count returns and have the last non-caller EMT wake up the caller.
1623	*
1624	* @returns VBox strict informational status code for EM scheduling. No failures
1625	* will be returned here, those are for the caller only.
1626	*
1627	* @param pVM The cross context VM structure.
1628	* @param rcStrict The current accumulated recursive status code,
1629	* to be merged with i32RendezvousStatus and
1630	* returned.
1631	*/
1632	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1633	{
1634	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1635
1636	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1637	if (cReturned == pVM->cCpus - 1U)
1638	{
1639	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1640	AssertLogRelRC(rc);
1641	}
1642
1643	/*
1644	* Merge the status codes, ignoring error statuses in this code path.
1645	*/
1646	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1647	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1648	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1649	VERR_IPE_UNEXPECTED_INFO_STATUS);
1650
1651	if (RT_SUCCESS(rcStrict2))
1652	{
1653	if ( rcStrict2 != VINF_SUCCESS
1654	&& ( rcStrict == VINF_SUCCESS
1655	\|\| rcStrict > rcStrict2))
1656	rcStrict = rcStrict2;
1657	}
1658	return rcStrict;
1659	}
1660
1661
1662	/**
1663	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1664	*
1665	* @returns VBox strict informational status code for EM scheduling. No failures
1666	* will be returned here, those are for the caller only. When
1667	* fIsCaller is set, VINF_SUCCESS is always returned.
1668	*
1669	* @param pVM The cross context VM structure.
1670	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1671	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1672	* not.
1673	* @param fFlags The flags.
1674	* @param pfnRendezvous The callback.
1675	* @param pvUser The user argument for the callback.
1676	*/
1677	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1678	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1679	{
1680	int rc;
1681	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1682
1683	/*
1684	* Enter, the last EMT triggers the next callback phase.
1685	*/
1686	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1687	if (cEntered != pVM->cCpus)
1688	{
1689	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1690	{
1691	/* Wait for our turn. */
1692	for (;;)
1693	{
1694	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1695	AssertLogRelRC(rc);
1696	if (!pVM->vmm.s.fRendezvousRecursion)
1697	break;
1698	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1699	}
1700	}
1701	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1702	{
1703	/* Wait for the last EMT to arrive and wake everyone up. */
1704	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1705	AssertLogRelRC(rc);
1706	Assert(!pVM->vmm.s.fRendezvousRecursion);
1707	}
1708	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1709	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1710	{
1711	/* Wait for our turn. */
1712	for (;;)
1713	{
1714	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1715	AssertLogRelRC(rc);
1716	if (!pVM->vmm.s.fRendezvousRecursion)
1717	break;
1718	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1719	}
1720	}
1721	else
1722	{
1723	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1724
1725	/*
1726	* The execute once is handled specially to optimize the code flow.
1727	*
1728	* The last EMT to arrive will perform the callback and the other
1729	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1730	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1731	* returns, that EMT will initiate the normal return sequence.
1732	*/
1733	if (!fIsCaller)
1734	{
1735	for (;;)
1736	{
1737	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1738	AssertLogRelRC(rc);
1739	if (!pVM->vmm.s.fRendezvousRecursion)
1740	break;
1741	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1742	}
1743
1744	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1745	}
1746	return VINF_SUCCESS;
1747	}
1748	}
1749	else
1750	{
1751	/*
1752	* All EMTs are waiting, clear the FF and take action according to the
1753	* execution method.
1754	*/
1755	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1756
1757	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1758	{
1759	/* Wake up everyone. */
1760	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1761	AssertLogRelRC(rc);
1762	}
1763	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1764	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1765	{
1766	/* Figure out who to wake up and wake it up. If it's ourself, then
1767	it's easy otherwise wait for our turn. */
1768	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1769	? 0
1770	: pVM->cCpus - 1U;
1771	if (pVCpu->idCpu != iFirst)
1772	{
1773	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1774	AssertLogRelRC(rc);
1775	for (;;)
1776	{
1777	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1778	AssertLogRelRC(rc);
1779	if (!pVM->vmm.s.fRendezvousRecursion)
1780	break;
1781	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1782	}
1783	}
1784	}
1785	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1786	}
1787
1788
1789	/*
1790	* Do the callback and update the status if necessary.
1791	*/
1792	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1793	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1794	{
1795	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1796	if (rcStrict2 != VINF_SUCCESS)
1797	{
1798	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1799	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1800	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1801	int32_t i32RendezvousStatus;
1802	do
1803	{
1804	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1805	if ( rcStrict2 == i32RendezvousStatus
1806	\|\| RT_FAILURE(i32RendezvousStatus)
1807	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1808	&& rcStrict2 > i32RendezvousStatus))
1809	break;
1810	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1811	}
1812	}
1813
1814	/*
1815	* Increment the done counter and take action depending on whether we're
1816	* the last to finish callback execution.
1817	*/
1818	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1819	if ( cDone != pVM->cCpus
1820	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1821	{
1822	/* Signal the next EMT? */
1823	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1824	{
1825	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1826	AssertLogRelRC(rc);
1827	}
1828	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1829	{
1830	Assert(cDone == pVCpu->idCpu + 1U);
1831	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1832	AssertLogRelRC(rc);
1833	}
1834	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1835	{
1836	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1837	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1838	AssertLogRelRC(rc);
1839	}
1840
1841	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1842	if (!fIsCaller)
1843	{
1844	for (;;)
1845	{
1846	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1847	AssertLogRelRC(rc);
1848	if (!pVM->vmm.s.fRendezvousRecursion)
1849	break;
1850	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1851	}
1852	}
1853	}
1854	else
1855	{
1856	/* Callback execution is all done, tell the rest to return. */
1857	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1858	AssertLogRelRC(rc);
1859	}
1860
1861	if (!fIsCaller)
1862	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1863	return rcStrictRecursion;
1864	}
1865
1866
1867	/**
1868	* Called in response to VM_FF_EMT_RENDEZVOUS.
1869	*
1870	* @returns VBox strict status code - EM scheduling. No errors will be returned
1871	* here, nor will any non-EM scheduling status codes be returned.
1872	*
1873	* @param pVM The cross context VM structure.
1874	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1875	*
1876	* @thread EMT
1877	*/
1878	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1879	{
1880	Assert(!pVCpu->vmm.s.fInRendezvous);
1881	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1882	pVCpu->vmm.s.fInRendezvous = true;
1883	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1884	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1885	pVCpu->vmm.s.fInRendezvous = false;
1886	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1887	return VBOXSTRICTRC_TODO(rcStrict);
1888	}
1889
1890
1891	/**
1892	* Helper for resetting an single wakeup event sempahore.
1893	*
1894	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1895	* @param hEvt The event semaphore to reset.
1896	*/
1897	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1898	{
1899	for (uint32_t cLoops = 0; ; cLoops++)
1900	{
1901	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1902	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1903	return rc;
1904	}
1905	}
1906
1907
1908	/**
1909	* Worker for VMMR3EmtRendezvous that handles recursion.
1910	*
1911	* @returns VBox strict status code. This will be the first error,
1912	* VINF_SUCCESS, or an EM scheduling status code.
1913	*
1914	* @param pVM The cross context VM structure.
1915	* @param pVCpu The cross context virtual CPU structure of the
1916	* calling EMT.
1917	* @param fFlags Flags indicating execution methods. See
1918	* grp_VMMR3EmtRendezvous_fFlags.
1919	* @param pfnRendezvous The callback.
1920	* @param pvUser User argument for the callback.
1921	*
1922	* @thread EMT(pVCpu)
1923	*/
1924	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1925	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1926	{
1927	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1928	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1929	Assert(pVCpu->vmm.s.fInRendezvous);
1930
1931	/*
1932	* Save the current state.
1933	*/
1934	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1935	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1936	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1937	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1938	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1939
1940	/*
1941	* Check preconditions and save the current state.
1942	*/
1943	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1944	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1945	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1946	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1947	VERR_INTERNAL_ERROR);
1948	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1949	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1950
1951	/*
1952	* Reset the recursion prep and pop semaphores.
1953	*/
1954	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1955	AssertLogRelRCReturn(rc, rc);
1956	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1957	AssertLogRelRCReturn(rc, rc);
1958	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1959	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1960	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1961	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1962
1963	/*
1964	* Usher the other thread into the recursion routine.
1965	*/
1966	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1967	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1968
1969	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1970	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1971	while (cLeft-- > 0)
1972	{
1973	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1974	AssertLogRelRC(rc);
1975	}
1976	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1977	{
1978	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1979	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1980	{
1981	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1982	AssertLogRelRC(rc);
1983	}
1984	}
1985	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1986	{
1987	Assert(cLeft == pVCpu->idCpu);
1988	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1989	{
1990	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1991	AssertLogRelRC(rc);
1992	}
1993	}
1994	else
1995	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1996	VERR_INTERNAL_ERROR_4);
1997
1998	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1999	AssertLogRelRC(rc);
2000	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2001	AssertLogRelRC(rc);
2002
2003
2004	/*
2005	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
2006	*/
2007	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2008	{
2009	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2010	AssertLogRelRC(rc);
2011	}
2012
2013	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2014
2015	/*
2016	* Clear the slate and setup the new rendezvous.
2017	*/
2018	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2019	{
2020	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2021	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2022	}
2023	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2024	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2025	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2026	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2027
2028	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2029	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2030	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2031	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2032	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2033	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2034	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2035	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2036
2037	/*
2038	* We're ready to go now, do normal rendezvous processing.
2039	*/
2040	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2041	AssertLogRelRC(rc);
2042
2043	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
2044
2045	/*
2046	* The caller waits for the other EMTs to be done, return and waiting on the
2047	* pop semaphore.
2048	*/
2049	for (;;)
2050	{
2051	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2052	AssertLogRelRC(rc);
2053	if (!pVM->vmm.s.fRendezvousRecursion)
2054	break;
2055	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2056	}
2057
2058	/*
2059	* Get the return code and merge it with the above recursion status.
2060	*/
2061	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2062	if ( rcStrict2 != VINF_SUCCESS
2063	&& ( rcStrict == VINF_SUCCESS
2064	\|\| rcStrict > rcStrict2))
2065	rcStrict = rcStrict2;
2066
2067	/*
2068	* Restore the parent rendezvous state.
2069	*/
2070	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2071	{
2072	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2073	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2074	}
2075	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2076	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2077	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2078	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2079
2080	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2081	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2082	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2083	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2084	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2085	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2086	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2087
2088	/*
2089	* Usher the other EMTs back to their parent recursion routine, waiting
2090	* for them to all get there before we return (makes sure they've been
2091	* scheduled and are past the pop event sem, see below).
2092	*/
2093	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2094	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2095	AssertLogRelRC(rc);
2096
2097	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2098	{
2099	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2100	AssertLogRelRC(rc);
2101	}
2102
2103	/*
2104	* We must reset the pop semaphore on the way out (doing the pop caller too,
2105	* just in case). The parent may be another recursion.
2106	*/
2107	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2108	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2109
2110	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2111
2112	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2113	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2114	return rcStrict;
2115	}
2116
2117
2118	/**
2119	* EMT rendezvous.
2120	*
2121	* Gathers all the EMTs and execute some code on each of them, either in a one
2122	* by one fashion or all at once.
2123	*
2124	* @returns VBox strict status code. This will be the first error,
2125	* VINF_SUCCESS, or an EM scheduling status code.
2126	*
2127	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2128	* doesn't support it or if the recursion is too deep.
2129	*
2130	* @param pVM The cross context VM structure.
2131	* @param fFlags Flags indicating execution methods. See
2132	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2133	* descending and ascending rendezvous types support
2134	* recursion from inside @a pfnRendezvous.
2135	* @param pfnRendezvous The callback.
2136	* @param pvUser User argument for the callback.
2137	*
2138	* @thread Any.
2139	*/
2140	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2141	{
2142	/*
2143	* Validate input.
2144	*/
2145	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2146	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2147	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2148	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2149	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2150	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2151	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2152	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2153
2154	VBOXSTRICTRC rcStrict;
2155	PVMCPU pVCpu = VMMGetCpu(pVM);
2156	if (!pVCpu)
2157	{
2158	/*
2159	* Forward the request to an EMT thread.
2160	*/
2161	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2162	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2163	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2164	else
2165	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2166	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2167	}
2168	else if ( pVM->cCpus == 1
2169	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2170	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2171	{
2172	/*
2173	* Shortcut for the single EMT case.
2174	*
2175	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2176	* during vmR3Destroy after other emulation threads have started terminating.
2177	*/
2178	if (!pVCpu->vmm.s.fInRendezvous)
2179	{
2180	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2181	pVCpu->vmm.s.fInRendezvous = true;
2182	pVM->vmm.s.fRendezvousFlags = fFlags;
2183	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2184	pVCpu->vmm.s.fInRendezvous = false;
2185	}
2186	else
2187	{
2188	/* Recursion. Do the same checks as in the SMP case. */
2189	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2190	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2191	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2192	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2193	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2194	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2195	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2196	, VERR_DEADLOCK);
2197
2198	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2199	pVM->vmm.s.cRendezvousRecursions++;
2200	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2201	pVM->vmm.s.fRendezvousFlags = fFlags;
2202
2203	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2204
2205	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2206	pVM->vmm.s.cRendezvousRecursions--;
2207	}
2208	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2209	}
2210	else
2211	{
2212	/*
2213	* Spin lock. If busy, check for recursion, if not recursing wait for
2214	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2215	*/
2216	int rc;
2217	rcStrict = VINF_SUCCESS;
2218	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2219	{
2220	/* Allow recursion in some cases. */
2221	if ( pVCpu->vmm.s.fInRendezvous
2222	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2223	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2224	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2225	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2226	))
2227	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2228
2229	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2230	VERR_DEADLOCK);
2231
2232	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2233	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2234	{
2235	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2236	{
2237	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2238	if ( rc != VINF_SUCCESS
2239	&& ( rcStrict == VINF_SUCCESS
2240	\|\| rcStrict > rc))
2241	rcStrict = rc;
2242	/** @todo Perhaps deal with termination here? */
2243	}
2244	ASMNopPause();
2245	}
2246	}
2247
2248	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2249	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2250	Assert(!pVCpu->vmm.s.fInRendezvous);
2251	pVCpu->vmm.s.fInRendezvous = true;
2252
2253	/*
2254	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2255	*/
2256	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2257	{
2258	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2259	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2260	}
2261	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2262	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2263	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2264	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2265	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2266	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2267	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2268	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2269	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2270	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2271	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2272
2273	/*
2274	* Set the FF and poke the other EMTs.
2275	*/
2276	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2277	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2278
2279	/*
2280	* Do the same ourselves.
2281	*/
2282	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2283
2284	/*
2285	* The caller waits for the other EMTs to be done and return before doing
2286	* the cleanup. This makes away with wakeup / reset races we would otherwise
2287	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2288	*/
2289	for (;;)
2290	{
2291	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2292	AssertLogRelRC(rc);
2293	if (!pVM->vmm.s.fRendezvousRecursion)
2294	break;
2295	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2296	}
2297
2298	/*
2299	* Get the return code and clean up a little bit.
2300	*/
2301	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2302	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2303
2304	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2305	pVCpu->vmm.s.fInRendezvous = false;
2306
2307	/*
2308	* Merge rcStrict, rcStrict2 and rcStrict3.
2309	*/
2310	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2311	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2312	if ( rcStrict2 != VINF_SUCCESS
2313	&& ( rcStrict == VINF_SUCCESS
2314	\|\| rcStrict > rcStrict2))
2315	rcStrict = rcStrict2;
2316	if ( rcStrict3 != VINF_SUCCESS
2317	&& ( rcStrict == VINF_SUCCESS
2318	\|\| rcStrict > rcStrict3))
2319	rcStrict = rcStrict3;
2320	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2321	}
2322
2323	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2324	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2325	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2326	VERR_IPE_UNEXPECTED_INFO_STATUS);
2327	return VBOXSTRICTRC_VAL(rcStrict);
2328	}
2329
2330
2331	/**
2332	* Interface for vmR3SetHaltMethodU.
2333	*
2334	* @param pVCpu The cross context virtual CPU structure of the
2335	* calling EMT.
2336	* @param fMayHaltInRing0 The new state.
2337	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2338	* @thread EMT(pVCpu)
2339	*
2340	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2341	* component.
2342	*/
2343	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2344	{
2345	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2346	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2347	}
2348
2349
2350	/**
2351	* Read from the ring 0 jump buffer stack.
2352	*
2353	* @returns VBox status code.
2354	*
2355	* @param pVM The cross context VM structure.
2356	* @param idCpu The ID of the source CPU context (for the address).
2357	* @param R0Addr Where to start reading.
2358	* @param pvBuf Where to store the data we've read.
2359	* @param cbRead The number of bytes to read.
2360	*/
2361	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2362	{
2363	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2364	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2365	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2366
2367	int rc;
2368	#ifdef VMM_R0_SWITCH_STACK
2369	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2370	#else
2371	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2372	#endif
2373	if ( off < VMM_STACK_SIZE
2374	&& off + cbRead <= VMM_STACK_SIZE)
2375	{
2376	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2377	rc = VINF_SUCCESS;
2378	}
2379	else
2380	rc = VERR_INVALID_POINTER;
2381
2382	/* Supply the setjmp return RIP/EIP. */
2383	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2384	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2385	{
2386	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2387	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2388	size_t offDst = 0;
2389	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2390	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2391	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2392	{
2393	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2394	Assert(offSrc < cbSrc);
2395	pbSrc -= offSrc;
2396	cbSrc -= offSrc;
2397	}
2398	if (cbSrc > cbRead - offDst)
2399	cbSrc = cbRead - offDst;
2400	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2401
2402	if (cbSrc == cbRead)
2403	rc = VINF_SUCCESS;
2404	}
2405
2406	return rc;
2407	}
2408
2409
2410	/**
2411	* Used by the DBGF stack unwinder to initialize the register state.
2412	*
2413	* @param pUVM The user mode VM handle.
2414	* @param idCpu The ID of the CPU being unwound.
2415	* @param pState The unwind state to initialize.
2416	*/
2417	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2418	{
2419	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2420	AssertReturnVoid(pVCpu);
2421
2422	/*
2423	* Locate the resume point on the stack.
2424	*/
2425	#ifdef VMM_R0_SWITCH_STACK
2426	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2427	AssertReturnVoid(off < VMM_STACK_SIZE);
2428	#else
2429	uintptr_t off = 0;
2430	#endif
2431
2432	#ifdef RT_ARCH_AMD64
2433	/*
2434	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2435	*/
2436	# ifdef VBOX_STRICT
2437	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2438	off += 8; /* RESUME_MAGIC */
2439	# endif
2440	# ifdef RT_OS_WINDOWS
2441	off += 0xa0; /* XMM6 thru XMM15 */
2442	# endif
2443	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2444	off += 8;
2445	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2446	off += 8;
2447	# ifdef RT_OS_WINDOWS
2448	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2449	off += 8;
2450	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2451	off += 8;
2452	# endif
2453	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2454	off += 8;
2455	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2456	off += 8;
2457	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2458	off += 8;
2459	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2460	off += 8;
2461	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2462	off += 8;
2463	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2464	off += 8;
2465
2466	#elif defined(RT_ARCH_X86)
2467	/*
2468	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2469	*/
2470	# ifdef VBOX_STRICT
2471	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2472	off += 4; /* RESUME_MAGIC */
2473	# endif
2474	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2475	off += 4;
2476	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2477	off += 4;
2478	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2479	off += 4;
2480	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2481	off += 4;
2482	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2483	off += 4;
2484	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2485	off += 4;
2486	#else
2487	# error "Port me"
2488	#endif
2489
2490	/*
2491	* This is all we really need here, though the above helps if the assembly
2492	* doesn't contain unwind info (currently only on win/64, so that is useful).
2493	*/
2494	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2495	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2496	}
2497
2498	#ifdef VBOX_WITH_RAW_MODE
2499
2500	/**
2501	* Calls a RC function.
2502	*
2503	* @param pVM The cross context VM structure.
2504	* @param RCPtrEntry The address of the RC function.
2505	* @param cArgs The number of arguments in the ....
2506	* @param ... Arguments to the function.
2507	*/
2508	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2509	{
2510	va_list args;
2511	va_start(args, cArgs);
2512	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2513	va_end(args);
2514	return rc;
2515	}
2516
2517
2518	/**
2519	* Calls a RC function.
2520	*
2521	* @param pVM The cross context VM structure.
2522	* @param RCPtrEntry The address of the RC function.
2523	* @param cArgs The number of arguments in the ....
2524	* @param args Arguments to the function.
2525	*/
2526	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2527	{
2528	/* Raw mode implies 1 VCPU. */
2529	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2530	PVMCPU pVCpu = &pVM->aCpus[0];
2531
2532	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2533
2534	/*
2535	* Setup the call frame using the trampoline.
2536	*/
2537	CPUMSetHyperState(pVCpu,
2538	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2539	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2540	RCPtrEntry, /* eax */
2541	cArgs /* edx */
2542	);
2543
2544	#if 0
2545	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2546	#endif
2547	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2548	int i = cArgs;
2549	while (i-- > 0)
2550	*pFrame++ = va_arg(args, RTGCUINTPTR32);
2551
2552	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2553	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2554
2555	/*
2556	* We hide log flushes (outer) and hypervisor interrupts (inner).
2557	*/
2558	for (;;)
2559	{
2560	int rc;
2561	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2562	do
2563	{
2564	#ifdef NO_SUPCALLR0VMM
2565	rc = VERR_GENERAL_FAILURE;
2566	#else
2567	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2568	if (RT_LIKELY(rc == VINF_SUCCESS))
2569	rc = pVCpu->vmm.s.iLastGZRc;
2570	#endif
2571	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2572
2573	/*
2574	* Flush the loggers.
2575	*/
2576	#ifdef LOG_ENABLED
2577	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2578	if ( pLogger
2579	&& pLogger->offScratch > 0)
2580	RTLogFlushRC(NULL, pLogger);
2581	#endif
2582	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2583	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2584	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2585	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2586	#endif
2587	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2588	VMMR3FatalDump(pVM, pVCpu, rc);
2589	if (rc != VINF_VMM_CALL_HOST)
2590	{
2591	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2592	return rc;
2593	}
2594	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2595	if (RT_FAILURE(rc))
2596	return rc;
2597	}
2598	}
2599
2600	#endif /* VBOX_WITH_RAW_MODE */
2601
2602	/**
2603	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2604	*
2605	* @returns VBox status code.
2606	* @param pVM The cross context VM structure.
2607	* @param uOperation Operation to execute.
2608	* @param u64Arg Constant argument.
2609	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2610	* details.
2611	*/
2612	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2613	{
2614	PVMCPU pVCpu = VMMGetCpu(pVM);
2615	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2616	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2617	}
2618
2619
2620	/**
2621	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2622	*
2623	* @returns VBox status code.
2624	* @param pVM The cross context VM structure.
2625	* @param pVCpu The cross context VM structure.
2626	* @param enmOperation Operation to execute.
2627	* @param u64Arg Constant argument.
2628	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2629	* details.
2630	*/
2631	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2632	{
2633	int rc;
2634	for (;;)
2635	{
2636	#ifdef NO_SUPCALLR0VMM
2637	rc = VERR_GENERAL_FAILURE;
2638	#else
2639	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2640	#endif
2641	/*
2642	* Flush the logs.
2643	*/
2644	#ifdef LOG_ENABLED
2645	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2646	#endif
2647	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2648	if (rc != VINF_VMM_CALL_HOST)
2649	break;
2650	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2651	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2652	break;
2653	/* Resume R0 */
2654	}
2655
2656	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2657	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2658	VERR_IPE_UNEXPECTED_INFO_STATUS);
2659	return rc;
2660	}
2661
2662
2663	#ifdef VBOX_WITH_RAW_MODE
2664	/**
2665	* Resumes executing hypervisor code when interrupted by a queue flush or a
2666	* debug event.
2667	*
2668	* @returns VBox status code.
2669	* @param pVM The cross context VM structure.
2670	* @param pVCpu The cross context virtual CPU structure.
2671	*/
2672	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2673	{
2674	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2675	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2676
2677	/*
2678	* We hide log flushes (outer) and hypervisor interrupts (inner).
2679	*/
2680	for (;;)
2681	{
2682	int rc;
2683	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2684	do
2685	{
2686	# ifdef NO_SUPCALLR0VMM
2687	rc = VERR_GENERAL_FAILURE;
2688	# else
2689	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2690	if (RT_LIKELY(rc == VINF_SUCCESS))
2691	rc = pVCpu->vmm.s.iLastGZRc;
2692	# endif
2693	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2694
2695	/*
2696	* Flush the loggers.
2697	*/
2698	# ifdef LOG_ENABLED
2699	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2700	if ( pLogger
2701	&& pLogger->offScratch > 0)
2702	RTLogFlushRC(NULL, pLogger);
2703	# endif
2704	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2705	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2706	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2707	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2708	# endif
2709	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2710	VMMR3FatalDump(pVM, pVCpu, rc);
2711	if (rc != VINF_VMM_CALL_HOST)
2712	{
2713	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2714	return rc;
2715	}
2716	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2717	if (RT_FAILURE(rc))
2718	return rc;
2719	}
2720	}
2721	#endif /* VBOX_WITH_RAW_MODE */
2722
2723
2724	/**
2725	* Service a call to the ring-3 host code.
2726	*
2727	* @returns VBox status code.
2728	* @param pVM The cross context VM structure.
2729	* @param pVCpu The cross context virtual CPU structure.
2730	* @remarks Careful with critsects.
2731	*/
2732	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2733	{
2734	/*
2735	* We must also check for pending critsect exits or else we can deadlock
2736	* when entering other critsects here.
2737	*/
2738	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2739	PDMCritSectBothFF(pVCpu);
2740
2741	switch (pVCpu->vmm.s.enmCallRing3Operation)
2742	{
2743	/*
2744	* Acquire a critical section.
2745	*/
2746	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2747	{
2748	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2749	true /fCallRing3/);
2750	break;
2751	}
2752
2753	/*
2754	* Enter a r/w critical section exclusively.
2755	*/
2756	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2757	{
2758	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2759	true /fCallRing3/);
2760	break;
2761	}
2762
2763	/*
2764	* Enter a r/w critical section shared.
2765	*/
2766	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2767	{
2768	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2769	true /fCallRing3/);
2770	break;
2771	}
2772
2773	/*
2774	* Acquire the PDM lock.
2775	*/
2776	case VMMCALLRING3_PDM_LOCK:
2777	{
2778	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2779	break;
2780	}
2781
2782	/*
2783	* Grow the PGM pool.
2784	*/
2785	case VMMCALLRING3_PGM_POOL_GROW:
2786	{
2787	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2788	break;
2789	}
2790
2791	/*
2792	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2793	*/
2794	case VMMCALLRING3_PGM_MAP_CHUNK:
2795	{
2796	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2797	break;
2798	}
2799
2800	/*
2801	* Allocates more handy pages.
2802	*/
2803	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2804	{
2805	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2806	break;
2807	}
2808
2809	/*
2810	* Allocates a large page.
2811	*/
2812	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2813	{
2814	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2815	break;
2816	}
2817
2818	/*
2819	* Acquire the PGM lock.
2820	*/
2821	case VMMCALLRING3_PGM_LOCK:
2822	{
2823	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2824	break;
2825	}
2826
2827	/*
2828	* Acquire the MM hypervisor heap lock.
2829	*/
2830	case VMMCALLRING3_MMHYPER_LOCK:
2831	{
2832	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2833	break;
2834	}
2835
2836	#ifdef VBOX_WITH_REM
2837	/*
2838	* Flush REM handler notifications.
2839	*/
2840	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2841	{
2842	REMR3ReplayHandlerNotifications(pVM);
2843	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2844	break;
2845	}
2846	#endif
2847
2848	/*
2849	* This is a noop. We just take this route to avoid unnecessary
2850	* tests in the loops.
2851	*/
2852	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2853	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2854	LogAlways(("FLUSH\n"));
2855	break;
2856
2857	/*
2858	* Set the VM error message.
2859	*/
2860	case VMMCALLRING3_VM_SET_ERROR:
2861	VMR3SetErrorWorker(pVM);
2862	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2863	break;
2864
2865	/*
2866	* Set the VM runtime error message.
2867	*/
2868	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2869	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2870	break;
2871
2872	/*
2873	* Signal a ring 0 hypervisor assertion.
2874	* Cancel the longjmp operation that's in progress.
2875	*/
2876	case VMMCALLRING3_VM_R0_ASSERTION:
2877	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2878	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2879	#ifdef RT_ARCH_X86
2880	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2881	#else
2882	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2883	#endif
2884	#ifdef VMM_R0_SWITCH_STACK
2885	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2886	#endif
2887	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2888	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2889	return VERR_VMM_RING0_ASSERTION;
2890
2891	/*
2892	* A forced switch to ring 0 for preemption purposes.
2893	*/
2894	case VMMCALLRING3_VM_R0_PREEMPT:
2895	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2896	break;
2897
2898	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2899	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2900	break;
2901
2902	default:
2903	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2904	return VERR_VMM_UNKNOWN_RING3_CALL;
2905	}
2906
2907	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2908	return VINF_SUCCESS;
2909	}
2910
2911
2912	/**
2913	* Displays the Force action Flags.
2914	*
2915	* @param pVM The cross context VM structure.
2916	* @param pHlp The output helpers.
2917	* @param pszArgs The additional arguments (ignored).
2918	*/
2919	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2920	{
2921	int c;
2922	uint32_t f;
2923	NOREF(pszArgs);
2924
2925	#define PRINT_FLAG(prf,flag) do { \
2926	if (f & (prf##flag)) \
2927	{ \
2928	static const char *s_psz = #flag; \
2929	if (!(c % 6)) \
2930	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2931	else \
2932	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2933	c++; \
2934	f &= ~(prf##flag); \
2935	} \
2936	} while (0)
2937
2938	#define PRINT_GROUP(prf,grp,sfx) do { \
2939	if (f & (prf##grp##sfx)) \
2940	{ \
2941	static const char *s_psz = #grp; \
2942	if (!(c % 5)) \
2943	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2944	else \
2945	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2946	c++; \
2947	} \
2948	} while (0)
2949
2950	/*
2951	* The global flags.
2952	*/
2953	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2954	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2955
2956	/* show the flag mnemonics */
2957	c = 0;
2958	f = fGlobalForcedActions;
2959	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2960	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2961	PRINT_FLAG(VM_FF_,PDM_DMA);
2962	PRINT_FLAG(VM_FF_,DBGF);
2963	PRINT_FLAG(VM_FF_,REQUEST);
2964	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2965	PRINT_FLAG(VM_FF_,RESET);
2966	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2967	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2968	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2969	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2970	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2971	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2972	if (f)
2973	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2974	else
2975	pHlp->pfnPrintf(pHlp, "\n");
2976
2977	/* the groups */
2978	c = 0;
2979	f = fGlobalForcedActions;
2980	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2981	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2982	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2983	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2984	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2985	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2986	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2987	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2988	if (c)
2989	pHlp->pfnPrintf(pHlp, "\n");
2990
2991	/*
2992	* Per CPU flags.
2993	*/
2994	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2995	{
2996	const uint64_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2997	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2998
2999	/* show the flag mnemonics */
3000	c = 0;
3001	f = fLocalForcedActions;
3002	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
3003	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
3004	PRINT_FLAG(VMCPU_FF_,TIMER);
3005	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
3006	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
3007	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
3008	PRINT_FLAG(VMCPU_FF_,UNHALT);
3009	PRINT_FLAG(VMCPU_FF_,IEM);
3010	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
3011	PRINT_FLAG(VMCPU_FF_,DBGF);
3012	PRINT_FLAG(VMCPU_FF_,REQUEST);
3013	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
3014	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
3015	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
3016	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
3017	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
3018	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
3019	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
3020	PRINT_FLAG(VMCPU_FF_,TO_R3);
3021	PRINT_FLAG(VMCPU_FF_,IOM);
3022	#ifdef VBOX_WITH_RAW_MODE
3023	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
3024	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
3025	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
3026	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
3027	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
3028	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
3029	PRINT_FLAG(VMCPU_FF_,CPUM);
3030	#endif
3031	if (f)
3032	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
3033	else
3034	pHlp->pfnPrintf(pHlp, "\n");
3035
3036	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
3037	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
3038
3039	/* the groups */
3040	c = 0;
3041	f = fLocalForcedActions;
3042	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
3043	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
3044	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
3045	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
3046	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
3047	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
3048	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
3049	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
3050	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
3051	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
3052	if (c)
3053	pHlp->pfnPrintf(pHlp, "\n");
3054	}
3055
3056	#undef PRINT_FLAG
3057	#undef PRINT_GROUP
3058	}
3059

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 80005

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