VMM.cpp@ 81150

Last change on this file since 81150 was 81150, checked in by vboxsync, 5 years ago
VMM,/Makefile.kmk: Kicked out more recompiler related code. bugref:9576
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1	/* $Id: VMM.cpp 81150 2019-10-08 12:53:47Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_pdm
41	* - @subpage pg_pgm
42	* - @subpage pg_rem
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154	do { \
155	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
157	{ /* likely? */ } \
158	else \
159	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160	} while (0)
161
162
163	/*********************************************************************************************************************************
164	* Internal Functions *
165	*********************************************************************************************************************************/
166	static int vmmR3InitStacks(PVM pVM);
167	static int vmmR3InitLoggers(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
172	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
173	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
174	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
175	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
176
177
178	/**
179	* Initializes the VMM.
180	*
181	* @returns VBox status code.
182	* @param pVM The cross context VM structure.
183	*/
184	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
185	{
186	LogFlow(("VMMR3Init\n"));
187
188	/*
189	* Assert alignment, sizes and order.
190	*/
191	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
192	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
193
194	/*
195	* Init basic VM VMM members.
196	*/
197	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
198	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
199	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
200	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
201	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
202	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
203	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
204	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
205	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
206
207	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
208	* The EMT yield interval. The EMT yielding is a hack we employ to play a
209	* bit nicer with the rest of the system (like for instance the GUI).
210	*/
211	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
212	23 /* Value arrived at after experimenting with the grub boot prompt. */);
213	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
214
215
216	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
217	* Controls whether we employ per-cpu preemption timers to limit the time
218	* spent executing guest code. This option is not available on all
219	* platforms and we will silently ignore this setting then. If we are
220	* running in VT-x mode, we will use the VMX-preemption timer instead of
221	* this one when possible.
222	*/
223	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
224	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
225	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
226
227	/*
228	* Initialize the VMM rendezvous semaphores.
229	*/
230	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
231	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
232	return VERR_NO_MEMORY;
233	for (VMCPUID i = 0; i < pVM->cCpus; i++)
234	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
235	for (VMCPUID i = 0; i < pVM->cCpus; i++)
236	{
237	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
238	AssertRCReturn(rc, rc);
239	}
240	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
241	AssertRCReturn(rc, rc);
242	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
243	AssertRCReturn(rc, rc);
244	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
245	AssertRCReturn(rc, rc);
246	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
247	AssertRCReturn(rc, rc);
248	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
249	AssertRCReturn(rc, rc);
250	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
251	AssertRCReturn(rc, rc);
252	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
253	AssertRCReturn(rc, rc);
254	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
255	AssertRCReturn(rc, rc);
256
257	/*
258	* Register the saved state data unit.
259	*/
260	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
261	NULL, NULL, NULL,
262	NULL, vmmR3Save, NULL,
263	NULL, vmmR3Load, NULL);
264	if (RT_FAILURE(rc))
265	return rc;
266
267	/*
268	* Register the Ring-0 VM handle with the session for fast ioctl calls.
269	*/
270	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
271	if (RT_FAILURE(rc))
272	return rc;
273
274	/*
275	* Init various sub-components.
276	*/
277	rc = vmmR3InitStacks(pVM);
278	if (RT_SUCCESS(rc))
279	{
280	rc = vmmR3InitLoggers(pVM);
281
282	#ifdef VBOX_WITH_NMI
283	/*
284	* Allocate mapping for the host APIC.
285	*/
286	if (RT_SUCCESS(rc))
287	{
288	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
289	AssertRC(rc);
290	}
291	#endif
292	if (RT_SUCCESS(rc))
293	{
294	/*
295	* Debug info and statistics.
296	*/
297	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
298	vmmR3InitRegisterStats(pVM);
299	vmmInitFormatTypes();
300
301	return VINF_SUCCESS;
302	}
303	}
304	/** @todo Need failure cleanup? */
305
306	return rc;
307	}
308
309
310	/**
311	* Allocate & setup the VMM RC stack(s) (for EMTs).
312	*
313	* The stacks are also used for long jumps in Ring-0.
314	*
315	* @returns VBox status code.
316	* @param pVM The cross context VM structure.
317	*
318	* @remarks The optional guard page gets it protection setup up during R3 init
319	* completion because of init order issues.
320	*/
321	static int vmmR3InitStacks(PVM pVM)
322	{
323	int rc = VINF_SUCCESS;
324	#ifdef VMM_R0_SWITCH_STACK
325	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
326	#else
327	uint32_t fFlags = 0;
328	#endif
329
330	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
331	{
332	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
333
334	#ifdef VBOX_STRICT_VMM_STACK
335	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
336	#else
337	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
338	#endif
339	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
340	if (RT_SUCCESS(rc))
341	{
342	#ifdef VBOX_STRICT_VMM_STACK
343	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
344	#endif
345	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
346
347	}
348	}
349
350	return rc;
351	}
352
353
354	/**
355	* Initialize the loggers.
356	*
357	* @returns VBox status code.
358	* @param pVM The cross context VM structure.
359	*/
360	static int vmmR3InitLoggers(PVM pVM)
361	{
362	int rc;
363	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
364
365	/*
366	* Allocate R0 Logger instance (finalized in the relocator).
367	*/
368	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
369	PRTLOGGER pLogger = RTLogDefaultInstance();
370	if (pLogger)
371	{
372	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
373	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
374	{
375	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
376	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
377	(void **)&pVCpu->vmm.s.pR0LoggerR3);
378	if (RT_FAILURE(rc))
379	return rc;
380	pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
381	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
382	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
383	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
384	}
385	}
386	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
387
388	/*
389	* Release logging.
390	*/
391	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
392	if (pRelLogger)
393	{
394	/*
395	* Ring-0 release logger.
396	*/
397	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
398	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
399	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
400
401	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
402	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
403	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
404
405	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
406
407	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
408	{
409	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
410	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
411	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
412	if (RT_FAILURE(rc))
413	return rc;
414	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
415	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
416	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
417	pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
418	pVmmLogger->cbLogger = (uint32_t)cbLogger;
419	pVmmLogger->fCreated = false;
420	pVmmLogger->fFlushingDisabled = false;
421	pVmmLogger->fRegistered = false;
422	pVmmLogger->idCpu = idCpu;
423
424	char szR0ThreadName[16];
425	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
426	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
427	pfnLoggerWrapper, pfnLoggerFlush,
428	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
429	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
430
431	/* We only update the release log instance here. */
432	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
433	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
434	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
435
436	pVmmLogger->fCreated = true;
437	}
438	}
439
440	return VINF_SUCCESS;
441	}
442
443
444	/**
445	* VMMR3Init worker that register the statistics with STAM.
446	*
447	* @param pVM The cross context VM structure.
448	*/
449	static void vmmR3InitRegisterStats(PVM pVM)
450	{
451	RT_NOREF_PV(pVM);
452
453	/*
454	* Statistics.
455	*/
456	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
467	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
468	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
469	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
520
521	#ifdef VBOX_WITH_STATISTICS
522	for (VMCPUID i = 0; i < pVM->cCpus; i++)
523	{
524	PVMCPU pVCpu = pVM->apCpusR3[i];
525	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
526	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
527	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
528	}
529	#endif
530	for (VMCPUID i = 0; i < pVM->cCpus; i++)
531	{
532	PVMCPU pVCpu = pVM->apCpusR3[i];
533	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
534	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
535	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
536	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
537	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
538	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
539	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
540	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
541	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
542	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
543	}
544	}
545
546
547	/**
548	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
549	*
550	* @returns VBox status code.
551	* @param pVM The cross context VM structure.
552	* @param pVCpu The cross context per CPU structure.
553	* @thread EMT(pVCpu)
554	*/
555	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
556	{
557	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
558	}
559
560
561	/**
562	* Initializes the R0 VMM.
563	*
564	* @returns VBox status code.
565	* @param pVM The cross context VM structure.
566	*/
567	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
568	{
569	int rc;
570	PVMCPU pVCpu = VMMGetCpu(pVM);
571	Assert(pVCpu && pVCpu->idCpu == 0);
572
573	#ifdef LOG_ENABLED
574	/*
575	* Initialize the ring-0 logger if we haven't done so yet.
576	*/
577	if ( pVCpu->vmm.s.pR0LoggerR3
578	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
579	{
580	rc = VMMR3UpdateLoggers(pVM);
581	if (RT_FAILURE(rc))
582	return rc;
583	}
584	#endif
585
586	/*
587	* Call Ring-0 entry with init code.
588	*/
589	for (;;)
590	{
591	#ifdef NO_SUPCALLR0VMM
592	//rc = VERR_GENERAL_FAILURE;
593	rc = VINF_SUCCESS;
594	#else
595	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
596	#endif
597	/*
598	* Flush the logs.
599	*/
600	#ifdef LOG_ENABLED
601	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
602	#endif
603	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
604	if (rc != VINF_VMM_CALL_HOST)
605	break;
606	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
607	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
608	break;
609	/* Resume R0 */
610	}
611
612	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
613	{
614	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
615	if (RT_SUCCESS(rc))
616	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
617	}
618
619	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
620	if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
621	LogRel(("VMM: Enabled thread-context hooks\n"));
622	else
623	LogRel(("VMM: Thread-context hooks unavailable\n"));
624
625	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
626	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
627	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
628	else
629	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
630	if (pVM->vmm.s.fIsPreemptPossible)
631	LogRel(("VMM: Kernel preemption is possible\n"));
632	else
633	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
634
635	/*
636	* Send all EMTs to ring-0 to get their logger initialized.
637	*/
638	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
639	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
640
641	return rc;
642	}
643
644
645	/**
646	* Called when an init phase completes.
647	*
648	* @returns VBox status code.
649	* @param pVM The cross context VM structure.
650	* @param enmWhat Which init phase.
651	*/
652	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
653	{
654	int rc = VINF_SUCCESS;
655
656	switch (enmWhat)
657	{
658	case VMINITCOMPLETED_RING3:
659	{
660	/*
661	* Create the EMT yield timer.
662	*/
663	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
664	AssertRCReturn(rc, rc);
665
666	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
667	AssertRCReturn(rc, rc);
668	break;
669	}
670
671	case VMINITCOMPLETED_HM:
672	{
673	/*
674	* Disable the periodic preemption timers if we can use the
675	* VMX-preemption timer instead.
676	*/
677	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
678	&& HMR3IsVmxPreemptionTimerUsed(pVM))
679	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
680	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
681
682	/*
683	* Last chance for GIM to update its CPUID leaves if it requires
684	* knowledge/information from HM initialization.
685	*/
686	rc = GIMR3InitCompleted(pVM);
687	AssertRCReturn(rc, rc);
688
689	/*
690	* CPUM's post-initialization (print CPUIDs).
691	*/
692	CPUMR3LogCpuIdAndMsrFeatures(pVM);
693	break;
694	}
695
696	default: /* shuts up gcc */
697	break;
698	}
699
700	return rc;
701	}
702
703
704	/**
705	* Terminate the VMM bits.
706	*
707	* @returns VBox status code.
708	* @param pVM The cross context VM structure.
709	*/
710	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
711	{
712	PVMCPU pVCpu = VMMGetCpu(pVM);
713	Assert(pVCpu && pVCpu->idCpu == 0);
714
715	/*
716	* Call Ring-0 entry with termination code.
717	*/
718	int rc;
719	for (;;)
720	{
721	#ifdef NO_SUPCALLR0VMM
722	//rc = VERR_GENERAL_FAILURE;
723	rc = VINF_SUCCESS;
724	#else
725	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
726	#endif
727	/*
728	* Flush the logs.
729	*/
730	#ifdef LOG_ENABLED
731	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
732	#endif
733	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
734	if (rc != VINF_VMM_CALL_HOST)
735	break;
736	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
737	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
738	break;
739	/* Resume R0 */
740	}
741	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
742	{
743	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
744	if (RT_SUCCESS(rc))
745	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
746	}
747
748	for (VMCPUID i = 0; i < pVM->cCpus; i++)
749	{
750	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
751	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
752	}
753	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
754	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
755	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
756	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
757	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
758	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
759	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
760	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
761	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
762	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
763	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
764	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
765	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
766	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
767	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
768	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
769
770	vmmTermFormatTypes();
771	return rc;
772	}
773
774
775	/**
776	* Applies relocations to data and code managed by this
777	* component. This function will be called at init and
778	* whenever the VMM need to relocate it self inside the GC.
779	*
780	* The VMM will need to apply relocations to the core code.
781	*
782	* @param pVM The cross context VM structure.
783	* @param offDelta The relocation delta.
784	*/
785	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
786	{
787	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
788	RT_NOREF(offDelta);
789
790	/*
791	* Update the logger.
792	*/
793	VMMR3UpdateLoggers(pVM);
794	}
795
796
797	/**
798	* Updates the settings for the RC and R0 loggers.
799	*
800	* @returns VBox status code.
801	* @param pVM The cross context VM structure.
802	*/
803	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
804	{
805	int rc = VINF_SUCCESS;
806
807	#ifdef LOG_ENABLED
808	/*
809	* For the ring-0 EMT logger, we use a per-thread logger instance
810	* in ring-0. Only initialize it once.
811	*/
812	PRTLOGGER const pDefault = RTLogDefaultInstance();
813	for (VMCPUID i = 0; i < pVM->cCpus; i++)
814	{
815	PVMCPU pVCpu = pVM->apCpusR3[i];
816	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
817	if (pR0LoggerR3)
818	{
819	if (!pR0LoggerR3->fCreated)
820	{
821	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
822	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
823	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
824
825	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
826	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
827	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
828
829	char szR0ThreadName[16];
830	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
831	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
832	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
833	pfnLoggerWrapper, pfnLoggerFlush,
834	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
835	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
836
837	pR0LoggerR3->idCpu = i;
838	pR0LoggerR3->fCreated = true;
839	pR0LoggerR3->fFlushingDisabled = false;
840	}
841
842	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
843	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
844	AssertRC(rc);
845	}
846	}
847	#else
848	RT_NOREF(pVM);
849	#endif
850
851	return rc;
852	}
853
854
855	/**
856	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
857	*
858	* @returns Pointer to the buffer.
859	* @param pVM The cross context VM structure.
860	*/
861	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
862	{
863	return pVM->vmm.s.szRing0AssertMsg1;
864	}
865
866
867	/**
868	* Returns the VMCPU of the specified virtual CPU.
869	*
870	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
871	*
872	* @param pUVM The user mode VM handle.
873	* @param idCpu The ID of the virtual CPU.
874	*/
875	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
876	{
877	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
878	AssertReturn(idCpu < pUVM->cCpus, NULL);
879	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
880	return pUVM->pVM->apCpusR3[idCpu];
881	}
882
883
884	/**
885	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
886	*
887	* @returns Pointer to the buffer.
888	* @param pVM The cross context VM structure.
889	*/
890	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
891	{
892	return pVM->vmm.s.szRing0AssertMsg2;
893	}
894
895
896	/**
897	* Execute state save operation.
898	*
899	* @returns VBox status code.
900	* @param pVM The cross context VM structure.
901	* @param pSSM SSM operation handle.
902	*/
903	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
904	{
905	LogFlow(("vmmR3Save:\n"));
906
907	/*
908	* Save the started/stopped state of all CPUs except 0 as it will always
909	* be running. This avoids breaking the saved state version. :-)
910	*/
911	for (VMCPUID i = 1; i < pVM->cCpus; i++)
912	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
913
914	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
915	}
916
917
918	/**
919	* Execute state load operation.
920	*
921	* @returns VBox status code.
922	* @param pVM The cross context VM structure.
923	* @param pSSM SSM operation handle.
924	* @param uVersion Data layout version.
925	* @param uPass The data pass.
926	*/
927	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
928	{
929	LogFlow(("vmmR3Load:\n"));
930	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
931
932	/*
933	* Validate version.
934	*/
935	if ( uVersion != VMM_SAVED_STATE_VERSION
936	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
937	{
938	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
939	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
940	}
941
942	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
943	{
944	/* Ignore the stack bottom, stack pointer and stack bits. */
945	RTRCPTR RCPtrIgnored;
946	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
947	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
948	#ifdef RT_OS_DARWIN
949	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
950	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
951	&& SSMR3HandleRevision(pSSM) >= 48858
952	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
953	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
954	)
955	SSMR3Skip(pSSM, 16384);
956	else
957	SSMR3Skip(pSSM, 8192);
958	#else
959	SSMR3Skip(pSSM, 8192);
960	#endif
961	}
962
963	/*
964	* Restore the VMCPU states. VCPU 0 is always started.
965	*/
966	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
967	for (VMCPUID i = 1; i < pVM->cCpus; i++)
968	{
969	bool fStarted;
970	int rc = SSMR3GetBool(pSSM, &fStarted);
971	if (RT_FAILURE(rc))
972	return rc;
973	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
974	}
975
976	/* terminator */
977	uint32_t u32;
978	int rc = SSMR3GetU32(pSSM, &u32);
979	if (RT_FAILURE(rc))
980	return rc;
981	if (u32 != UINT32_MAX)
982	{
983	AssertMsgFailed(("u32=%#x\n", u32));
984	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
985	}
986	return VINF_SUCCESS;
987	}
988
989
990	/**
991	* Suspends the CPU yielder.
992	*
993	* @param pVM The cross context VM structure.
994	*/
995	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
996	{
997	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
998	if (!pVM->vmm.s.cYieldResumeMillies)
999	{
1000	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1001	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1002	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1003	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1004	else
1005	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1006	TMTimerStop(pVM->vmm.s.pYieldTimer);
1007	}
1008	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1009	}
1010
1011
1012	/**
1013	* Stops the CPU yielder.
1014	*
1015	* @param pVM The cross context VM structure.
1016	*/
1017	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1018	{
1019	if (!pVM->vmm.s.cYieldResumeMillies)
1020	TMTimerStop(pVM->vmm.s.pYieldTimer);
1021	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1022	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1023	}
1024
1025
1026	/**
1027	* Resumes the CPU yielder when it has been a suspended or stopped.
1028	*
1029	* @param pVM The cross context VM structure.
1030	*/
1031	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1032	{
1033	if (pVM->vmm.s.cYieldResumeMillies)
1034	{
1035	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1036	pVM->vmm.s.cYieldResumeMillies = 0;
1037	}
1038	}
1039
1040
1041	/**
1042	* Internal timer callback function.
1043	*
1044	* @param pVM The cross context VM structure.
1045	* @param pTimer The timer handle.
1046	* @param pvUser User argument specified upon timer creation.
1047	*/
1048	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1049	{
1050	NOREF(pvUser);
1051
1052	/*
1053	* This really needs some careful tuning. While we shouldn't be too greedy since
1054	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1055	* because that'll cause us to stop up.
1056	*
1057	* The current logic is to use the default interval when there is no lag worth
1058	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1059	*
1060	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1061	* so the lag is up to date.)
1062	*/
1063	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1064	if ( u64Lag < 50000000 /* 50ms */
1065	\|\| ( u64Lag < 1000000000 /* 1s */
1066	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1067	)
1068	{
1069	uint64_t u64Elapsed = RTTimeNanoTS();
1070	pVM->vmm.s.u64LastYield = u64Elapsed;
1071
1072	RTThreadYield();
1073
1074	#ifdef LOG_ENABLED
1075	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1076	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1077	#endif
1078	}
1079	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1080	}
1081
1082
1083	/**
1084	* Executes guest code (Intel VT-x and AMD-V).
1085	*
1086	* @param pVM The cross context VM structure.
1087	* @param pVCpu The cross context virtual CPU structure.
1088	*/
1089	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1090	{
1091	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1092
1093	for (;;)
1094	{
1095	int rc;
1096	do
1097	{
1098	#ifdef NO_SUPCALLR0VMM
1099	rc = VERR_GENERAL_FAILURE;
1100	#else
1101	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1102	if (RT_LIKELY(rc == VINF_SUCCESS))
1103	rc = pVCpu->vmm.s.iLastGZRc;
1104	#endif
1105	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1106
1107	#if 0 /** @todo triggers too often */
1108	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1109	#endif
1110
1111	/*
1112	* Flush the logs
1113	*/
1114	#ifdef LOG_ENABLED
1115	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1116	#endif
1117	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1118	if (rc != VINF_VMM_CALL_HOST)
1119	{
1120	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1121	return rc;
1122	}
1123	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1124	if (RT_FAILURE(rc))
1125	return rc;
1126	/* Resume R0 */
1127	}
1128	}
1129
1130
1131	/**
1132	* Perform one of the fast I/O control VMMR0 operation.
1133	*
1134	* @returns VBox strict status code.
1135	* @param pVM The cross context VM structure.
1136	* @param pVCpu The cross context virtual CPU structure.
1137	* @param enmOperation The operation to perform.
1138	*/
1139	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1140	{
1141	for (;;)
1142	{
1143	VBOXSTRICTRC rcStrict;
1144	do
1145	{
1146	#ifdef NO_SUPCALLR0VMM
1147	rcStrict = VERR_GENERAL_FAILURE;
1148	#else
1149	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1150	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1151	rcStrict = pVCpu->vmm.s.iLastGZRc;
1152	#endif
1153	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1154
1155	/*
1156	* Flush the logs
1157	*/
1158	#ifdef LOG_ENABLED
1159	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1160	#endif
1161	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1162	if (rcStrict != VINF_VMM_CALL_HOST)
1163	return rcStrict;
1164	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1165	if (RT_FAILURE(rc))
1166	return rc;
1167	/* Resume R0 */
1168	}
1169	}
1170
1171
1172	/**
1173	* VCPU worker for VMMR3SendStartupIpi.
1174	*
1175	* @param pVM The cross context VM structure.
1176	* @param idCpu Virtual CPU to perform SIPI on.
1177	* @param uVector The SIPI vector.
1178	*/
1179	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1180	{
1181	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1182	VMCPU_ASSERT_EMT(pVCpu);
1183
1184	/*
1185	* In the INIT state, the target CPU is only responsive to an SIPI.
1186	* This is also true for when when the CPU is in VMX non-root mode.
1187	*
1188	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1189	* See Intel spec. 26.6.2 "Activity State".
1190	*/
1191	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1192	return VINF_SUCCESS;
1193
1194	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1195	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1196	if (CPUMIsGuestInVmxRootMode(pCtx))
1197	{
1198	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1199	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1200	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1201
1202	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1203	return VINF_SUCCESS;
1204	}
1205	#endif
1206
1207	pCtx->cs.Sel = uVector << 8;
1208	pCtx->cs.ValidSel = uVector << 8;
1209	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1210	pCtx->cs.u64Base = uVector << 12;
1211	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1212	pCtx->rip = 0;
1213
1214	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1215
1216	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1217	EMSetState(pVCpu, EMSTATE_HALTED);
1218	return VINF_EM_RESCHEDULE;
1219	# else /* And if we go the VMCPU::enmState way it can stay here. */
1220	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1221	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1222	return VINF_SUCCESS;
1223	# endif
1224	}
1225
1226
1227	/**
1228	* VCPU worker for VMMR3SendInitIpi.
1229	*
1230	* @returns VBox status code.
1231	* @param pVM The cross context VM structure.
1232	* @param idCpu Virtual CPU to perform SIPI on.
1233	*/
1234	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1235	{
1236	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1237	VMCPU_ASSERT_EMT(pVCpu);
1238
1239	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1240
1241	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1242	* wait-for-SIPI state. Verify. */
1243
1244	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1245	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1246	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1247	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1248	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1249	#endif
1250
1251	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1252	* IPI (e.g. SVM_EXIT_INIT). */
1253
1254	PGMR3ResetCpu(pVM, pVCpu);
1255	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1256	APICR3InitIpi(pVCpu);
1257	TRPMR3ResetCpu(pVCpu);
1258	CPUMR3ResetCpu(pVM, pVCpu);
1259	EMR3ResetCpu(pVCpu);
1260	HMR3ResetCpu(pVCpu);
1261	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1262
1263	/* This will trickle up on the target EMT. */
1264	return VINF_EM_WAIT_SIPI;
1265	}
1266
1267
1268	/**
1269	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1270	* vector-dependent state and unhalting processor.
1271	*
1272	* @param pVM The cross context VM structure.
1273	* @param idCpu Virtual CPU to perform SIPI on.
1274	* @param uVector SIPI vector.
1275	*/
1276	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1277	{
1278	AssertReturnVoid(idCpu < pVM->cCpus);
1279
1280	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1281	AssertRC(rc);
1282	}
1283
1284
1285	/**
1286	* Sends init IPI to the virtual CPU.
1287	*
1288	* @param pVM The cross context VM structure.
1289	* @param idCpu Virtual CPU to perform int IPI on.
1290	*/
1291	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1292	{
1293	AssertReturnVoid(idCpu < pVM->cCpus);
1294
1295	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1296	AssertRC(rc);
1297	}
1298
1299
1300	/**
1301	* Registers the guest memory range that can be used for patching.
1302	*
1303	* @returns VBox status code.
1304	* @param pVM The cross context VM structure.
1305	* @param pPatchMem Patch memory range.
1306	* @param cbPatchMem Size of the memory range.
1307	*/
1308	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1309	{
1310	VM_ASSERT_EMT(pVM);
1311	if (HMIsEnabled(pVM))
1312	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1313
1314	return VERR_NOT_SUPPORTED;
1315	}
1316
1317
1318	/**
1319	* Deregisters the guest memory range that can be used for patching.
1320	*
1321	* @returns VBox status code.
1322	* @param pVM The cross context VM structure.
1323	* @param pPatchMem Patch memory range.
1324	* @param cbPatchMem Size of the memory range.
1325	*/
1326	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1327	{
1328	if (HMIsEnabled(pVM))
1329	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1330
1331	return VINF_SUCCESS;
1332	}
1333
1334
1335	/**
1336	* Common recursion handler for the other EMTs.
1337	*
1338	* @returns Strict VBox status code.
1339	* @param pVM The cross context VM structure.
1340	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1341	* @param rcStrict Current status code to be combined with the one
1342	* from this recursion and returned.
1343	*/
1344	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1345	{
1346	int rc2;
1347
1348	/*
1349	* We wait here while the initiator of this recursion reconfigures
1350	* everything. The last EMT to get in signals the initiator.
1351	*/
1352	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1353	{
1354	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1355	AssertLogRelRC(rc2);
1356	}
1357
1358	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1359	AssertLogRelRC(rc2);
1360
1361	/*
1362	* Do the normal rendezvous processing.
1363	*/
1364	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1365	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1366
1367	/*
1368	* Wait for the initiator to restore everything.
1369	*/
1370	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1371	AssertLogRelRC(rc2);
1372
1373	/*
1374	* Last thread out of here signals the initiator.
1375	*/
1376	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1377	{
1378	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1379	AssertLogRelRC(rc2);
1380	}
1381
1382	/*
1383	* Merge status codes and return.
1384	*/
1385	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1386	if ( rcStrict2 != VINF_SUCCESS
1387	&& ( rcStrict == VINF_SUCCESS
1388	\|\| rcStrict > rcStrict2))
1389	rcStrict = rcStrict2;
1390	return rcStrict;
1391	}
1392
1393
1394	/**
1395	* Count returns and have the last non-caller EMT wake up the caller.
1396	*
1397	* @returns VBox strict informational status code for EM scheduling. No failures
1398	* will be returned here, those are for the caller only.
1399	*
1400	* @param pVM The cross context VM structure.
1401	* @param rcStrict The current accumulated recursive status code,
1402	* to be merged with i32RendezvousStatus and
1403	* returned.
1404	*/
1405	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1406	{
1407	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1408
1409	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1410	if (cReturned == pVM->cCpus - 1U)
1411	{
1412	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1413	AssertLogRelRC(rc);
1414	}
1415
1416	/*
1417	* Merge the status codes, ignoring error statuses in this code path.
1418	*/
1419	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1420	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1421	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1422	VERR_IPE_UNEXPECTED_INFO_STATUS);
1423
1424	if (RT_SUCCESS(rcStrict2))
1425	{
1426	if ( rcStrict2 != VINF_SUCCESS
1427	&& ( rcStrict == VINF_SUCCESS
1428	\|\| rcStrict > rcStrict2))
1429	rcStrict = rcStrict2;
1430	}
1431	return rcStrict;
1432	}
1433
1434
1435	/**
1436	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1437	*
1438	* @returns VBox strict informational status code for EM scheduling. No failures
1439	* will be returned here, those are for the caller only. When
1440	* fIsCaller is set, VINF_SUCCESS is always returned.
1441	*
1442	* @param pVM The cross context VM structure.
1443	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1444	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1445	* not.
1446	* @param fFlags The flags.
1447	* @param pfnRendezvous The callback.
1448	* @param pvUser The user argument for the callback.
1449	*/
1450	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1451	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1452	{
1453	int rc;
1454	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1455
1456	/*
1457	* Enter, the last EMT triggers the next callback phase.
1458	*/
1459	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1460	if (cEntered != pVM->cCpus)
1461	{
1462	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1463	{
1464	/* Wait for our turn. */
1465	for (;;)
1466	{
1467	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1468	AssertLogRelRC(rc);
1469	if (!pVM->vmm.s.fRendezvousRecursion)
1470	break;
1471	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1472	}
1473	}
1474	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1475	{
1476	/* Wait for the last EMT to arrive and wake everyone up. */
1477	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1478	AssertLogRelRC(rc);
1479	Assert(!pVM->vmm.s.fRendezvousRecursion);
1480	}
1481	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1482	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1483	{
1484	/* Wait for our turn. */
1485	for (;;)
1486	{
1487	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1488	AssertLogRelRC(rc);
1489	if (!pVM->vmm.s.fRendezvousRecursion)
1490	break;
1491	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1492	}
1493	}
1494	else
1495	{
1496	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1497
1498	/*
1499	* The execute once is handled specially to optimize the code flow.
1500	*
1501	* The last EMT to arrive will perform the callback and the other
1502	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1503	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1504	* returns, that EMT will initiate the normal return sequence.
1505	*/
1506	if (!fIsCaller)
1507	{
1508	for (;;)
1509	{
1510	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1511	AssertLogRelRC(rc);
1512	if (!pVM->vmm.s.fRendezvousRecursion)
1513	break;
1514	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1515	}
1516
1517	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1518	}
1519	return VINF_SUCCESS;
1520	}
1521	}
1522	else
1523	{
1524	/*
1525	* All EMTs are waiting, clear the FF and take action according to the
1526	* execution method.
1527	*/
1528	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1529
1530	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1531	{
1532	/* Wake up everyone. */
1533	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1534	AssertLogRelRC(rc);
1535	}
1536	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1537	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1538	{
1539	/* Figure out who to wake up and wake it up. If it's ourself, then
1540	it's easy otherwise wait for our turn. */
1541	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1542	? 0
1543	: pVM->cCpus - 1U;
1544	if (pVCpu->idCpu != iFirst)
1545	{
1546	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1547	AssertLogRelRC(rc);
1548	for (;;)
1549	{
1550	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1551	AssertLogRelRC(rc);
1552	if (!pVM->vmm.s.fRendezvousRecursion)
1553	break;
1554	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1555	}
1556	}
1557	}
1558	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1559	}
1560
1561
1562	/*
1563	* Do the callback and update the status if necessary.
1564	*/
1565	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1566	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1567	{
1568	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1569	if (rcStrict2 != VINF_SUCCESS)
1570	{
1571	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1572	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1573	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1574	int32_t i32RendezvousStatus;
1575	do
1576	{
1577	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1578	if ( rcStrict2 == i32RendezvousStatus
1579	\|\| RT_FAILURE(i32RendezvousStatus)
1580	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1581	&& rcStrict2 > i32RendezvousStatus))
1582	break;
1583	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1584	}
1585	}
1586
1587	/*
1588	* Increment the done counter and take action depending on whether we're
1589	* the last to finish callback execution.
1590	*/
1591	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1592	if ( cDone != pVM->cCpus
1593	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1594	{
1595	/* Signal the next EMT? */
1596	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1597	{
1598	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1599	AssertLogRelRC(rc);
1600	}
1601	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1602	{
1603	Assert(cDone == pVCpu->idCpu + 1U);
1604	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1605	AssertLogRelRC(rc);
1606	}
1607	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1608	{
1609	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1610	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1611	AssertLogRelRC(rc);
1612	}
1613
1614	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1615	if (!fIsCaller)
1616	{
1617	for (;;)
1618	{
1619	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1620	AssertLogRelRC(rc);
1621	if (!pVM->vmm.s.fRendezvousRecursion)
1622	break;
1623	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1624	}
1625	}
1626	}
1627	else
1628	{
1629	/* Callback execution is all done, tell the rest to return. */
1630	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1631	AssertLogRelRC(rc);
1632	}
1633
1634	if (!fIsCaller)
1635	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1636	return rcStrictRecursion;
1637	}
1638
1639
1640	/**
1641	* Called in response to VM_FF_EMT_RENDEZVOUS.
1642	*
1643	* @returns VBox strict status code - EM scheduling. No errors will be returned
1644	* here, nor will any non-EM scheduling status codes be returned.
1645	*
1646	* @param pVM The cross context VM structure.
1647	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1648	*
1649	* @thread EMT
1650	*/
1651	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1652	{
1653	Assert(!pVCpu->vmm.s.fInRendezvous);
1654	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1655	pVCpu->vmm.s.fInRendezvous = true;
1656	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1657	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1658	pVCpu->vmm.s.fInRendezvous = false;
1659	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1660	return VBOXSTRICTRC_TODO(rcStrict);
1661	}
1662
1663
1664	/**
1665	* Helper for resetting an single wakeup event sempahore.
1666	*
1667	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1668	* @param hEvt The event semaphore to reset.
1669	*/
1670	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1671	{
1672	for (uint32_t cLoops = 0; ; cLoops++)
1673	{
1674	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1675	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1676	return rc;
1677	}
1678	}
1679
1680
1681	/**
1682	* Worker for VMMR3EmtRendezvous that handles recursion.
1683	*
1684	* @returns VBox strict status code. This will be the first error,
1685	* VINF_SUCCESS, or an EM scheduling status code.
1686	*
1687	* @param pVM The cross context VM structure.
1688	* @param pVCpu The cross context virtual CPU structure of the
1689	* calling EMT.
1690	* @param fFlags Flags indicating execution methods. See
1691	* grp_VMMR3EmtRendezvous_fFlags.
1692	* @param pfnRendezvous The callback.
1693	* @param pvUser User argument for the callback.
1694	*
1695	* @thread EMT(pVCpu)
1696	*/
1697	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1698	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1699	{
1700	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1701	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1702	Assert(pVCpu->vmm.s.fInRendezvous);
1703
1704	/*
1705	* Save the current state.
1706	*/
1707	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1708	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1709	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1710	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1711	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1712
1713	/*
1714	* Check preconditions and save the current state.
1715	*/
1716	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1717	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1718	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1719	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1720	VERR_INTERNAL_ERROR);
1721	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1722	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1723
1724	/*
1725	* Reset the recursion prep and pop semaphores.
1726	*/
1727	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1728	AssertLogRelRCReturn(rc, rc);
1729	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1730	AssertLogRelRCReturn(rc, rc);
1731	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1732	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1733	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1734	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1735
1736	/*
1737	* Usher the other thread into the recursion routine.
1738	*/
1739	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1740	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1741
1742	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1743	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1744	while (cLeft-- > 0)
1745	{
1746	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1747	AssertLogRelRC(rc);
1748	}
1749	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1750	{
1751	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1752	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1753	{
1754	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1755	AssertLogRelRC(rc);
1756	}
1757	}
1758	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1759	{
1760	Assert(cLeft == pVCpu->idCpu);
1761	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1762	{
1763	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1764	AssertLogRelRC(rc);
1765	}
1766	}
1767	else
1768	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1769	VERR_INTERNAL_ERROR_4);
1770
1771	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1772	AssertLogRelRC(rc);
1773	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1774	AssertLogRelRC(rc);
1775
1776
1777	/*
1778	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1779	*/
1780	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1781	{
1782	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1783	AssertLogRelRC(rc);
1784	}
1785
1786	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1787
1788	/*
1789	* Clear the slate and setup the new rendezvous.
1790	*/
1791	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1792	{
1793	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1794	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1795	}
1796	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1797	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1798	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1799	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1800
1801	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1802	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1803	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1804	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1805	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1806	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1807	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1808	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1809
1810	/*
1811	* We're ready to go now, do normal rendezvous processing.
1812	*/
1813	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1814	AssertLogRelRC(rc);
1815
1816	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1817
1818	/*
1819	* The caller waits for the other EMTs to be done, return and waiting on the
1820	* pop semaphore.
1821	*/
1822	for (;;)
1823	{
1824	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1825	AssertLogRelRC(rc);
1826	if (!pVM->vmm.s.fRendezvousRecursion)
1827	break;
1828	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1829	}
1830
1831	/*
1832	* Get the return code and merge it with the above recursion status.
1833	*/
1834	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1835	if ( rcStrict2 != VINF_SUCCESS
1836	&& ( rcStrict == VINF_SUCCESS
1837	\|\| rcStrict > rcStrict2))
1838	rcStrict = rcStrict2;
1839
1840	/*
1841	* Restore the parent rendezvous state.
1842	*/
1843	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1844	{
1845	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1846	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1847	}
1848	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1849	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1850	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1851	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1852
1853	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1854	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1855	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1856	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1857	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1858	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1859	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1860
1861	/*
1862	* Usher the other EMTs back to their parent recursion routine, waiting
1863	* for them to all get there before we return (makes sure they've been
1864	* scheduled and are past the pop event sem, see below).
1865	*/
1866	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1867	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1868	AssertLogRelRC(rc);
1869
1870	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1871	{
1872	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1873	AssertLogRelRC(rc);
1874	}
1875
1876	/*
1877	* We must reset the pop semaphore on the way out (doing the pop caller too,
1878	* just in case). The parent may be another recursion.
1879	*/
1880	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1881	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1882
1883	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1884
1885	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1886	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1887	return rcStrict;
1888	}
1889
1890
1891	/**
1892	* EMT rendezvous.
1893	*
1894	* Gathers all the EMTs and execute some code on each of them, either in a one
1895	* by one fashion or all at once.
1896	*
1897	* @returns VBox strict status code. This will be the first error,
1898	* VINF_SUCCESS, or an EM scheduling status code.
1899	*
1900	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1901	* doesn't support it or if the recursion is too deep.
1902	*
1903	* @param pVM The cross context VM structure.
1904	* @param fFlags Flags indicating execution methods. See
1905	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1906	* descending and ascending rendezvous types support
1907	* recursion from inside @a pfnRendezvous.
1908	* @param pfnRendezvous The callback.
1909	* @param pvUser User argument for the callback.
1910	*
1911	* @thread Any.
1912	*/
1913	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1914	{
1915	/*
1916	* Validate input.
1917	*/
1918	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1919	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1920	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1921	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1922	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1923	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1924	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1925	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1926
1927	VBOXSTRICTRC rcStrict;
1928	PVMCPU pVCpu = VMMGetCpu(pVM);
1929	if (!pVCpu)
1930	{
1931	/*
1932	* Forward the request to an EMT thread.
1933	*/
1934	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1935	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1936	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1937	else
1938	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1939	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1940	}
1941	else if ( pVM->cCpus == 1
1942	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
1943	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1944	{
1945	/*
1946	* Shortcut for the single EMT case.
1947	*
1948	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1949	* during vmR3Destroy after other emulation threads have started terminating.
1950	*/
1951	if (!pVCpu->vmm.s.fInRendezvous)
1952	{
1953	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1954	pVCpu->vmm.s.fInRendezvous = true;
1955	pVM->vmm.s.fRendezvousFlags = fFlags;
1956	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1957	pVCpu->vmm.s.fInRendezvous = false;
1958	}
1959	else
1960	{
1961	/* Recursion. Do the same checks as in the SMP case. */
1962	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1963	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1964	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1965	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1966	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1967	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1968	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1969	, VERR_DEADLOCK);
1970
1971	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1972	pVM->vmm.s.cRendezvousRecursions++;
1973	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1974	pVM->vmm.s.fRendezvousFlags = fFlags;
1975
1976	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1977
1978	pVM->vmm.s.fRendezvousFlags = fParentFlags;
1979	pVM->vmm.s.cRendezvousRecursions--;
1980	}
1981	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1982	}
1983	else
1984	{
1985	/*
1986	* Spin lock. If busy, check for recursion, if not recursing wait for
1987	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1988	*/
1989	int rc;
1990	rcStrict = VINF_SUCCESS;
1991	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1992	{
1993	/* Allow recursion in some cases. */
1994	if ( pVCpu->vmm.s.fInRendezvous
1995	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1996	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1997	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1998	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1999	))
2000	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2001
2002	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2003	VERR_DEADLOCK);
2004
2005	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2006	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2007	{
2008	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2009	{
2010	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2011	if ( rc != VINF_SUCCESS
2012	&& ( rcStrict == VINF_SUCCESS
2013	\|\| rcStrict > rc))
2014	rcStrict = rc;
2015	/** @todo Perhaps deal with termination here? */
2016	}
2017	ASMNopPause();
2018	}
2019	}
2020
2021	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2022	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2023	Assert(!pVCpu->vmm.s.fInRendezvous);
2024	pVCpu->vmm.s.fInRendezvous = true;
2025
2026	/*
2027	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2028	*/
2029	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2030	{
2031	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2032	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2033	}
2034	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2035	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2036	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2037	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2038	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2039	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2040	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2041	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2042	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2043	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2044	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2045
2046	/*
2047	* Set the FF and poke the other EMTs.
2048	*/
2049	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2050	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2051
2052	/*
2053	* Do the same ourselves.
2054	*/
2055	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2056
2057	/*
2058	* The caller waits for the other EMTs to be done and return before doing
2059	* the cleanup. This makes away with wakeup / reset races we would otherwise
2060	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2061	*/
2062	for (;;)
2063	{
2064	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2065	AssertLogRelRC(rc);
2066	if (!pVM->vmm.s.fRendezvousRecursion)
2067	break;
2068	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2069	}
2070
2071	/*
2072	* Get the return code and clean up a little bit.
2073	*/
2074	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2075	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2076
2077	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2078	pVCpu->vmm.s.fInRendezvous = false;
2079
2080	/*
2081	* Merge rcStrict, rcStrict2 and rcStrict3.
2082	*/
2083	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2084	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2085	if ( rcStrict2 != VINF_SUCCESS
2086	&& ( rcStrict == VINF_SUCCESS
2087	\|\| rcStrict > rcStrict2))
2088	rcStrict = rcStrict2;
2089	if ( rcStrict3 != VINF_SUCCESS
2090	&& ( rcStrict == VINF_SUCCESS
2091	\|\| rcStrict > rcStrict3))
2092	rcStrict = rcStrict3;
2093	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2094	}
2095
2096	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2097	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2098	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2099	VERR_IPE_UNEXPECTED_INFO_STATUS);
2100	return VBOXSTRICTRC_VAL(rcStrict);
2101	}
2102
2103
2104	/**
2105	* Interface for vmR3SetHaltMethodU.
2106	*
2107	* @param pVCpu The cross context virtual CPU structure of the
2108	* calling EMT.
2109	* @param fMayHaltInRing0 The new state.
2110	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2111	* @thread EMT(pVCpu)
2112	*
2113	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2114	* component.
2115	*/
2116	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2117	{
2118	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2119	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2120	}
2121
2122
2123	/**
2124	* Read from the ring 0 jump buffer stack.
2125	*
2126	* @returns VBox status code.
2127	*
2128	* @param pVM The cross context VM structure.
2129	* @param idCpu The ID of the source CPU context (for the address).
2130	* @param R0Addr Where to start reading.
2131	* @param pvBuf Where to store the data we've read.
2132	* @param cbRead The number of bytes to read.
2133	*/
2134	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2135	{
2136	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2137	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2138	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2139
2140	int rc;
2141	#ifdef VMM_R0_SWITCH_STACK
2142	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2143	#else
2144	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2145	#endif
2146	if ( off < VMM_STACK_SIZE
2147	&& off + cbRead <= VMM_STACK_SIZE)
2148	{
2149	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2150	rc = VINF_SUCCESS;
2151	}
2152	else
2153	rc = VERR_INVALID_POINTER;
2154
2155	/* Supply the setjmp return RIP/EIP. */
2156	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2157	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2158	{
2159	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2160	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2161	size_t offDst = 0;
2162	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2163	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2164	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2165	{
2166	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2167	Assert(offSrc < cbSrc);
2168	pbSrc -= offSrc;
2169	cbSrc -= offSrc;
2170	}
2171	if (cbSrc > cbRead - offDst)
2172	cbSrc = cbRead - offDst;
2173	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2174
2175	if (cbSrc == cbRead)
2176	rc = VINF_SUCCESS;
2177	}
2178
2179	return rc;
2180	}
2181
2182
2183	/**
2184	* Used by the DBGF stack unwinder to initialize the register state.
2185	*
2186	* @param pUVM The user mode VM handle.
2187	* @param idCpu The ID of the CPU being unwound.
2188	* @param pState The unwind state to initialize.
2189	*/
2190	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2191	{
2192	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2193	AssertReturnVoid(pVCpu);
2194
2195	/*
2196	* Locate the resume point on the stack.
2197	*/
2198	#ifdef VMM_R0_SWITCH_STACK
2199	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2200	AssertReturnVoid(off < VMM_STACK_SIZE);
2201	#else
2202	uintptr_t off = 0;
2203	#endif
2204
2205	#ifdef RT_ARCH_AMD64
2206	/*
2207	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2208	*/
2209	# ifdef VBOX_STRICT
2210	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2211	off += 8; /* RESUME_MAGIC */
2212	# endif
2213	# ifdef RT_OS_WINDOWS
2214	off += 0xa0; /* XMM6 thru XMM15 */
2215	# endif
2216	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2217	off += 8;
2218	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2219	off += 8;
2220	# ifdef RT_OS_WINDOWS
2221	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2222	off += 8;
2223	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2224	off += 8;
2225	# endif
2226	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2227	off += 8;
2228	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2229	off += 8;
2230	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2231	off += 8;
2232	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2233	off += 8;
2234	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2235	off += 8;
2236	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2237	off += 8;
2238
2239	#elif defined(RT_ARCH_X86)
2240	/*
2241	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2242	*/
2243	# ifdef VBOX_STRICT
2244	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2245	off += 4; /* RESUME_MAGIC */
2246	# endif
2247	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2248	off += 4;
2249	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2250	off += 4;
2251	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2252	off += 4;
2253	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2254	off += 4;
2255	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2256	off += 4;
2257	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2258	off += 4;
2259	#else
2260	# error "Port me"
2261	#endif
2262
2263	/*
2264	* This is all we really need here, though the above helps if the assembly
2265	* doesn't contain unwind info (currently only on win/64, so that is useful).
2266	*/
2267	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2268	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2269	}
2270
2271
2272	/**
2273	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2274	*
2275	* @returns VBox status code.
2276	* @param pVM The cross context VM structure.
2277	* @param uOperation Operation to execute.
2278	* @param u64Arg Constant argument.
2279	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2280	* details.
2281	*/
2282	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2283	{
2284	PVMCPU pVCpu = VMMGetCpu(pVM);
2285	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2286	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2287	}
2288
2289
2290	/**
2291	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2292	*
2293	* @returns VBox status code.
2294	* @param pVM The cross context VM structure.
2295	* @param pVCpu The cross context VM structure.
2296	* @param enmOperation Operation to execute.
2297	* @param u64Arg Constant argument.
2298	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2299	* details.
2300	*/
2301	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2302	{
2303	int rc;
2304	for (;;)
2305	{
2306	#ifdef NO_SUPCALLR0VMM
2307	rc = VERR_GENERAL_FAILURE;
2308	#else
2309	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2310	#endif
2311	/*
2312	* Flush the logs.
2313	*/
2314	#ifdef LOG_ENABLED
2315	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2316	#endif
2317	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2318	if (rc != VINF_VMM_CALL_HOST)
2319	break;
2320	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2321	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2322	break;
2323	/* Resume R0 */
2324	}
2325
2326	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2327	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2328	VERR_IPE_UNEXPECTED_INFO_STATUS);
2329	return rc;
2330	}
2331
2332
2333	/**
2334	* Service a call to the ring-3 host code.
2335	*
2336	* @returns VBox status code.
2337	* @param pVM The cross context VM structure.
2338	* @param pVCpu The cross context virtual CPU structure.
2339	* @remarks Careful with critsects.
2340	*/
2341	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2342	{
2343	/*
2344	* We must also check for pending critsect exits or else we can deadlock
2345	* when entering other critsects here.
2346	*/
2347	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2348	PDMCritSectBothFF(pVCpu);
2349
2350	switch (pVCpu->vmm.s.enmCallRing3Operation)
2351	{
2352	/*
2353	* Acquire a critical section.
2354	*/
2355	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2356	{
2357	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2358	true /fCallRing3/);
2359	break;
2360	}
2361
2362	/*
2363	* Enter a r/w critical section exclusively.
2364	*/
2365	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2366	{
2367	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2368	true /fCallRing3/);
2369	break;
2370	}
2371
2372	/*
2373	* Enter a r/w critical section shared.
2374	*/
2375	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2376	{
2377	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2378	true /fCallRing3/);
2379	break;
2380	}
2381
2382	/*
2383	* Acquire the PDM lock.
2384	*/
2385	case VMMCALLRING3_PDM_LOCK:
2386	{
2387	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2388	break;
2389	}
2390
2391	/*
2392	* Grow the PGM pool.
2393	*/
2394	case VMMCALLRING3_PGM_POOL_GROW:
2395	{
2396	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2397	break;
2398	}
2399
2400	/*
2401	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2402	*/
2403	case VMMCALLRING3_PGM_MAP_CHUNK:
2404	{
2405	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2406	break;
2407	}
2408
2409	/*
2410	* Allocates more handy pages.
2411	*/
2412	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2413	{
2414	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2415	break;
2416	}
2417
2418	/*
2419	* Allocates a large page.
2420	*/
2421	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2422	{
2423	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2424	break;
2425	}
2426
2427	/*
2428	* Acquire the PGM lock.
2429	*/
2430	case VMMCALLRING3_PGM_LOCK:
2431	{
2432	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2433	break;
2434	}
2435
2436	/*
2437	* Acquire the MM hypervisor heap lock.
2438	*/
2439	case VMMCALLRING3_MMHYPER_LOCK:
2440	{
2441	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2442	break;
2443	}
2444
2445	#ifdef VBOX_WITH_REM
2446	/*
2447	* Flush REM handler notifications.
2448	*/
2449	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2450	{
2451	REMR3ReplayHandlerNotifications(pVM);
2452	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2453	break;
2454	}
2455	#endif
2456
2457	/*
2458	* This is a noop. We just take this route to avoid unnecessary
2459	* tests in the loops.
2460	*/
2461	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2462	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2463	LogAlways(("FLUSH\n"));
2464	break;
2465
2466	/*
2467	* Set the VM error message.
2468	*/
2469	case VMMCALLRING3_VM_SET_ERROR:
2470	VMR3SetErrorWorker(pVM);
2471	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2472	break;
2473
2474	/*
2475	* Set the VM runtime error message.
2476	*/
2477	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2478	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2479	break;
2480
2481	/*
2482	* Signal a ring 0 hypervisor assertion.
2483	* Cancel the longjmp operation that's in progress.
2484	*/
2485	case VMMCALLRING3_VM_R0_ASSERTION:
2486	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2487	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2488	#ifdef RT_ARCH_X86
2489	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2490	#else
2491	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2492	#endif
2493	#ifdef VMM_R0_SWITCH_STACK
2494	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2495	#endif
2496	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2497	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2498	return VERR_VMM_RING0_ASSERTION;
2499
2500	/*
2501	* A forced switch to ring 0 for preemption purposes.
2502	*/
2503	case VMMCALLRING3_VM_R0_PREEMPT:
2504	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2505	break;
2506
2507	default:
2508	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2509	return VERR_VMM_UNKNOWN_RING3_CALL;
2510	}
2511
2512	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2513	return VINF_SUCCESS;
2514	}
2515
2516
2517	/**
2518	* Displays the Force action Flags.
2519	*
2520	* @param pVM The cross context VM structure.
2521	* @param pHlp The output helpers.
2522	* @param pszArgs The additional arguments (ignored).
2523	*/
2524	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2525	{
2526	int c;
2527	uint32_t f;
2528	NOREF(pszArgs);
2529
2530	#define PRINT_FLAG(prf,flag) do { \
2531	if (f & (prf##flag)) \
2532	{ \
2533	static const char *s_psz = #flag; \
2534	if (!(c % 6)) \
2535	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2536	else \
2537	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2538	c++; \
2539	f &= ~(prf##flag); \
2540	} \
2541	} while (0)
2542
2543	#define PRINT_GROUP(prf,grp,sfx) do { \
2544	if (f & (prf##grp##sfx)) \
2545	{ \
2546	static const char *s_psz = #grp; \
2547	if (!(c % 5)) \
2548	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2549	else \
2550	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2551	c++; \
2552	} \
2553	} while (0)
2554
2555	/*
2556	* The global flags.
2557	*/
2558	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2559	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2560
2561	/* show the flag mnemonics */
2562	c = 0;
2563	f = fGlobalForcedActions;
2564	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2565	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2566	PRINT_FLAG(VM_FF_,PDM_DMA);
2567	PRINT_FLAG(VM_FF_,DBGF);
2568	PRINT_FLAG(VM_FF_,REQUEST);
2569	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2570	PRINT_FLAG(VM_FF_,RESET);
2571	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2572	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2573	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2574	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2575	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2576	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2577	if (f)
2578	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2579	else
2580	pHlp->pfnPrintf(pHlp, "\n");
2581
2582	/* the groups */
2583	c = 0;
2584	f = fGlobalForcedActions;
2585	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2586	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2587	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2588	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2589	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2590	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2591	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2592	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2593	if (c)
2594	pHlp->pfnPrintf(pHlp, "\n");
2595
2596	/*
2597	* Per CPU flags.
2598	*/
2599	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2600	{
2601	PVMCPU pVCpu = pVM->apCpusR3[i];
2602	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2603	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2604
2605	/* show the flag mnemonics */
2606	c = 0;
2607	f = fLocalForcedActions;
2608	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2609	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2610	PRINT_FLAG(VMCPU_FF_,TIMER);
2611	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2612	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2613	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2614	PRINT_FLAG(VMCPU_FF_,UNHALT);
2615	PRINT_FLAG(VMCPU_FF_,IEM);
2616	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2617	PRINT_FLAG(VMCPU_FF_,DBGF);
2618	PRINT_FLAG(VMCPU_FF_,REQUEST);
2619	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2620	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2621	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2622	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2623	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2624	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2625	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2626	PRINT_FLAG(VMCPU_FF_,TO_R3);
2627	PRINT_FLAG(VMCPU_FF_,IOM);
2628	if (f)
2629	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2630	else
2631	pHlp->pfnPrintf(pHlp, "\n");
2632
2633	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2634	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2635
2636	/* the groups */
2637	c = 0;
2638	f = fLocalForcedActions;
2639	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2640	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2641	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2642	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2643	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2644	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2645	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2646	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2647	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2648	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2649	if (c)
2650	pHlp->pfnPrintf(pHlp, "\n");
2651	}
2652
2653	#undef PRINT_FLAG
2654	#undef PRINT_GROUP
2655	}
2656

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 81150

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