VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 87777

Last change on this file since 87777 was 87766, checked in by vboxsync, 4 years ago

VMM/TM,VMM/*: Refactored the TM timer APIs to use 'handles' and take a pVM parameter. Only internal callbacks have been updated with a hTimer parameter, so far. bugref:9943

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1/* $Id: VMM.cpp 87766 2021-02-16 14:27:43Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_dbgf
32 * - @subpage pg_em
33 * - @subpage pg_gim
34 * - @subpage pg_gmm
35 * - @subpage pg_gvmm
36 * - @subpage pg_hm
37 * - @subpage pg_iem
38 * - @subpage pg_iom
39 * - @subpage pg_mm
40 * - @subpage pg_nem
41 * - @subpage pg_pdm
42 * - @subpage pg_pgm
43 * - @subpage pg_selm
44 * - @subpage pg_ssm
45 * - @subpage pg_stam
46 * - @subpage pg_tm
47 * - @subpage pg_trpm
48 * - @subpage pg_vm
49 *
50 *
51 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52 *
53 *
54 * @section sec_vmmstate VMM State
55 *
56 * @image html VM_Statechart_Diagram.gif
57 *
58 * To be written.
59 *
60 *
61 * @subsection subsec_vmm_init VMM Initialization
62 *
63 * To be written.
64 *
65 *
66 * @subsection subsec_vmm_term VMM Termination
67 *
68 * To be written.
69 *
70 *
71 * @section sec_vmm_limits VMM Limits
72 *
73 * There are various resource limits imposed by the VMM and it's
74 * sub-components. We'll list some of them here.
75 *
76 * On 64-bit hosts:
77 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78 * can be increased up to 64K - 1.
79 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81 * - A VM can be assigned all the memory we can use (16TB), however, the
82 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84 *
85 * On 32-bit hosts:
86 * - Max 127 VMs. Imposed by GMM's per page structure.
87 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88 * ROM pages. The limit is imposed by the 28-bit page ID used
89 * internally in GMM. It is also limited by PAE.
90 * - A VM can be assigned all the memory GMM can allocate, however, the
91 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93 *
94 */
95
96
97/*********************************************************************************************************************************
98* Header Files *
99*********************************************************************************************************************************/
100#define LOG_GROUP LOG_GROUP_VMM
101#include <VBox/vmm/vmm.h>
102#include <VBox/vmm/vmapi.h>
103#include <VBox/vmm/pgm.h>
104#include <VBox/vmm/cfgm.h>
105#include <VBox/vmm/pdmqueue.h>
106#include <VBox/vmm/pdmcritsect.h>
107#include <VBox/vmm/pdmcritsectrw.h>
108#include <VBox/vmm/pdmapi.h>
109#include <VBox/vmm/cpum.h>
110#include <VBox/vmm/gim.h>
111#include <VBox/vmm/mm.h>
112#include <VBox/vmm/nem.h>
113#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114# include <VBox/vmm/iem.h>
115#endif
116#include <VBox/vmm/iom.h>
117#include <VBox/vmm/trpm.h>
118#include <VBox/vmm/selm.h>
119#include <VBox/vmm/em.h>
120#include <VBox/sup.h>
121#include <VBox/vmm/dbgf.h>
122#include <VBox/vmm/apic.h>
123#include <VBox/vmm/ssm.h>
124#include <VBox/vmm/tm.h>
125#include "VMMInternal.h"
126#include <VBox/vmm/vmcc.h>
127
128#include <VBox/err.h>
129#include <VBox/param.h>
130#include <VBox/version.h>
131#include <VBox/vmm/hm.h>
132#include <iprt/assert.h>
133#include <iprt/alloc.h>
134#include <iprt/asm.h>
135#include <iprt/time.h>
136#include <iprt/semaphore.h>
137#include <iprt/stream.h>
138#include <iprt/string.h>
139#include <iprt/stdarg.h>
140#include <iprt/ctype.h>
141#include <iprt/x86.h>
142
143
144/*********************************************************************************************************************************
145* Defined Constants And Macros *
146*********************************************************************************************************************************/
147/** The saved state version. */
148#define VMM_SAVED_STATE_VERSION 4
149/** The saved state version used by v3.0 and earlier. (Teleportation) */
150#define VMM_SAVED_STATE_VERSION_3_0 3
151
152/** Macro for flushing the ring-0 logging. */
153#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154 do { \
155 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
157 { /* likely? */ } \
158 else \
159 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160 } while (0)
161
162
163/*********************************************************************************************************************************
164* Internal Functions *
165*********************************************************************************************************************************/
166static int vmmR3InitStacks(PVM pVM);
167static int vmmR3InitLoggers(PVM pVM);
168static void vmmR3InitRegisterStats(PVM pVM);
169static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
172static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
173 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
174static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
175static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
176
177
178/**
179 * Initializes the VMM.
180 *
181 * @returns VBox status code.
182 * @param pVM The cross context VM structure.
183 */
184VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
185{
186 LogFlow(("VMMR3Init\n"));
187
188 /*
189 * Assert alignment, sizes and order.
190 */
191 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
192 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
193
194 /*
195 * Init basic VM VMM members.
196 */
197 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
198 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
199 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
200 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
201 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
202 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
203 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
204 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
205 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
206
207 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
208 * The EMT yield interval. The EMT yielding is a hack we employ to play a
209 * bit nicer with the rest of the system (like for instance the GUI).
210 */
211 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
212 23 /* Value arrived at after experimenting with the grub boot prompt. */);
213 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
214
215
216 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
217 * Controls whether we employ per-cpu preemption timers to limit the time
218 * spent executing guest code. This option is not available on all
219 * platforms and we will silently ignore this setting then. If we are
220 * running in VT-x mode, we will use the VMX-preemption timer instead of
221 * this one when possible.
222 */
223 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
224 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
225 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
226
227 /*
228 * Initialize the VMM rendezvous semaphores.
229 */
230 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
231 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
232 return VERR_NO_MEMORY;
233 for (VMCPUID i = 0; i < pVM->cCpus; i++)
234 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
235 for (VMCPUID i = 0; i < pVM->cCpus; i++)
236 {
237 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
238 AssertRCReturn(rc, rc);
239 }
240 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
241 AssertRCReturn(rc, rc);
242 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
243 AssertRCReturn(rc, rc);
244 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
245 AssertRCReturn(rc, rc);
246 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
247 AssertRCReturn(rc, rc);
248 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
249 AssertRCReturn(rc, rc);
250 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
251 AssertRCReturn(rc, rc);
252 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
253 AssertRCReturn(rc, rc);
254 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
255 AssertRCReturn(rc, rc);
256
257 /*
258 * Register the saved state data unit.
259 */
260 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
261 NULL, NULL, NULL,
262 NULL, vmmR3Save, NULL,
263 NULL, vmmR3Load, NULL);
264 if (RT_FAILURE(rc))
265 return rc;
266
267 /*
268 * Register the Ring-0 VM handle with the session for fast ioctl calls.
269 */
270 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
271 if (RT_FAILURE(rc))
272 return rc;
273
274 /*
275 * Init various sub-components.
276 */
277 rc = vmmR3InitStacks(pVM);
278 if (RT_SUCCESS(rc))
279 {
280 rc = vmmR3InitLoggers(pVM);
281
282#ifdef VBOX_WITH_NMI
283 /*
284 * Allocate mapping for the host APIC.
285 */
286 if (RT_SUCCESS(rc))
287 {
288 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
289 AssertRC(rc);
290 }
291#endif
292 if (RT_SUCCESS(rc))
293 {
294 /*
295 * Debug info and statistics.
296 */
297 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
298 vmmR3InitRegisterStats(pVM);
299 vmmInitFormatTypes();
300
301 return VINF_SUCCESS;
302 }
303 }
304 /** @todo Need failure cleanup? */
305
306 return rc;
307}
308
309
310/**
311 * Allocate & setup the VMM RC stack(s) (for EMTs).
312 *
313 * The stacks are also used for long jumps in Ring-0.
314 *
315 * @returns VBox status code.
316 * @param pVM The cross context VM structure.
317 *
318 * @remarks The optional guard page gets it protection setup up during R3 init
319 * completion because of init order issues.
320 */
321static int vmmR3InitStacks(PVM pVM)
322{
323 int rc = VINF_SUCCESS;
324#ifdef VMM_R0_SWITCH_STACK
325 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
326#else
327 uint32_t fFlags = 0;
328#endif
329
330 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
331 {
332 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
333
334#ifdef VBOX_STRICT_VMM_STACK
335 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
336#else
337 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
338#endif
339 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
340 if (RT_SUCCESS(rc))
341 {
342#ifdef VBOX_STRICT_VMM_STACK
343 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
344#endif
345 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
346
347 }
348 }
349
350 return rc;
351}
352
353
354/**
355 * Initialize the loggers.
356 *
357 * @returns VBox status code.
358 * @param pVM The cross context VM structure.
359 */
360static int vmmR3InitLoggers(PVM pVM)
361{
362 int rc;
363#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
364
365 /*
366 * Allocate R0 Logger instance (finalized in the relocator).
367 */
368#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
369 PRTLOGGER pLogger = RTLogDefaultInstance();
370 if (pLogger)
371 {
372 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
373 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
374 {
375 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
376 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
377 (void **)&pVCpu->vmm.s.pR0LoggerR3);
378 if (RT_FAILURE(rc))
379 return rc;
380 pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
381 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
382 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
383 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
384 }
385 }
386#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
387
388 /*
389 * Release logging.
390 */
391 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
392 if (pRelLogger)
393 {
394 /*
395 * Ring-0 release logger.
396 */
397 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
398 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
399 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
400
401 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
402 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
403 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
404
405 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
406
407 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
408 {
409 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
410 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
411 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
412 if (RT_FAILURE(rc))
413 return rc;
414 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
415 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
416 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
417 pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
418 pVmmLogger->cbLogger = (uint32_t)cbLogger;
419 pVmmLogger->fCreated = false;
420 pVmmLogger->fFlushingDisabled = false;
421 pVmmLogger->fRegistered = false;
422 pVmmLogger->idCpu = idCpu;
423
424 char szR0ThreadName[16];
425 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
426 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
427 pfnLoggerWrapper, pfnLoggerFlush,
428 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
429 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
430
431 /* We only update the release log instance here. */
432 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
433 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
434 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
435
436 pVmmLogger->fCreated = true;
437 }
438 }
439
440 return VINF_SUCCESS;
441}
442
443
444/**
445 * VMMR3Init worker that register the statistics with STAM.
446 *
447 * @param pVM The cross context VM structure.
448 */
449static void vmmR3InitRegisterStats(PVM pVM)
450{
451 RT_NOREF_PV(pVM);
452
453 /*
454 * Statistics.
455 */
456 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
519
520#ifdef VBOX_WITH_STATISTICS
521 for (VMCPUID i = 0; i < pVM->cCpus; i++)
522 {
523 PVMCPU pVCpu = pVM->apCpusR3[i];
524 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
525 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
526 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
527 }
528#endif
529 for (VMCPUID i = 0; i < pVM->cCpus; i++)
530 {
531 PVMCPU pVCpu = pVM->apCpusR3[i];
532 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
533 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
534 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
535 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
536 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
537 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
538 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
539 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
540 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
541 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
542 }
543}
544
545
546/**
547 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
548 *
549 * @returns VBox status code.
550 * @param pVM The cross context VM structure.
551 * @param pVCpu The cross context per CPU structure.
552 * @thread EMT(pVCpu)
553 */
554static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
555{
556 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
557}
558
559
560/**
561 * Initializes the R0 VMM.
562 *
563 * @returns VBox status code.
564 * @param pVM The cross context VM structure.
565 */
566VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
567{
568 int rc;
569 PVMCPU pVCpu = VMMGetCpu(pVM);
570 Assert(pVCpu && pVCpu->idCpu == 0);
571
572#ifdef LOG_ENABLED
573 /*
574 * Initialize the ring-0 logger if we haven't done so yet.
575 */
576 if ( pVCpu->vmm.s.pR0LoggerR3
577 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
578 {
579 rc = VMMR3UpdateLoggers(pVM);
580 if (RT_FAILURE(rc))
581 return rc;
582 }
583#endif
584
585 /*
586 * Call Ring-0 entry with init code.
587 */
588 for (;;)
589 {
590#ifdef NO_SUPCALLR0VMM
591 //rc = VERR_GENERAL_FAILURE;
592 rc = VINF_SUCCESS;
593#else
594 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
595#endif
596 /*
597 * Flush the logs.
598 */
599#ifdef LOG_ENABLED
600 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
601#endif
602 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
603 if (rc != VINF_VMM_CALL_HOST)
604 break;
605 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
606 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
607 break;
608 /* Resume R0 */
609 }
610
611 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
612 {
613 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
614 if (RT_SUCCESS(rc))
615 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
616 }
617
618 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
619 if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
620 LogRel(("VMM: Enabled thread-context hooks\n"));
621 else
622 LogRel(("VMM: Thread-context hooks unavailable\n"));
623
624 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
625 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
626 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
627 else
628 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
629 if (pVM->vmm.s.fIsPreemptPossible)
630 LogRel(("VMM: Kernel preemption is possible\n"));
631 else
632 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
633
634 /*
635 * Send all EMTs to ring-0 to get their logger initialized.
636 */
637 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
638 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
639
640 return rc;
641}
642
643
644/**
645 * Called when an init phase completes.
646 *
647 * @returns VBox status code.
648 * @param pVM The cross context VM structure.
649 * @param enmWhat Which init phase.
650 */
651VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
652{
653 int rc = VINF_SUCCESS;
654
655 switch (enmWhat)
656 {
657 case VMINITCOMPLETED_RING3:
658 {
659 /*
660 * Create the EMT yield timer.
661 */
662 rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
663 "EMT Yielder", &pVM->vmm.s.hYieldTimer);
664 AssertRCReturn(rc, rc);
665
666 rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
667 AssertRCReturn(rc, rc);
668 break;
669 }
670
671 case VMINITCOMPLETED_HM:
672 {
673 /*
674 * Disable the periodic preemption timers if we can use the
675 * VMX-preemption timer instead.
676 */
677 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
678 && HMR3IsVmxPreemptionTimerUsed(pVM))
679 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
680 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
681
682 /*
683 * Last chance for GIM to update its CPUID leaves if it requires
684 * knowledge/information from HM initialization.
685 */
686 rc = GIMR3InitCompleted(pVM);
687 AssertRCReturn(rc, rc);
688
689 /*
690 * CPUM's post-initialization (print CPUIDs).
691 */
692 CPUMR3LogCpuIdAndMsrFeatures(pVM);
693 break;
694 }
695
696 default: /* shuts up gcc */
697 break;
698 }
699
700 return rc;
701}
702
703
704/**
705 * Terminate the VMM bits.
706 *
707 * @returns VBox status code.
708 * @param pVM The cross context VM structure.
709 */
710VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
711{
712 PVMCPU pVCpu = VMMGetCpu(pVM);
713 Assert(pVCpu && pVCpu->idCpu == 0);
714
715 /*
716 * Call Ring-0 entry with termination code.
717 */
718 int rc;
719 for (;;)
720 {
721#ifdef NO_SUPCALLR0VMM
722 //rc = VERR_GENERAL_FAILURE;
723 rc = VINF_SUCCESS;
724#else
725 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
726#endif
727 /*
728 * Flush the logs.
729 */
730#ifdef LOG_ENABLED
731 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
732#endif
733 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
734 if (rc != VINF_VMM_CALL_HOST)
735 break;
736 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
737 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
738 break;
739 /* Resume R0 */
740 }
741 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
742 {
743 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
744 if (RT_SUCCESS(rc))
745 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
746 }
747
748 for (VMCPUID i = 0; i < pVM->cCpus; i++)
749 {
750 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
751 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
752 }
753 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
754 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
755 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
756 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
757 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
758 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
759 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
760 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
761 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
762 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
763 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
764 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
765 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
766 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
767 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
768 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
769
770 vmmTermFormatTypes();
771 return rc;
772}
773
774
775/**
776 * Applies relocations to data and code managed by this
777 * component. This function will be called at init and
778 * whenever the VMM need to relocate it self inside the GC.
779 *
780 * The VMM will need to apply relocations to the core code.
781 *
782 * @param pVM The cross context VM structure.
783 * @param offDelta The relocation delta.
784 */
785VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
786{
787 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
788 RT_NOREF(offDelta);
789
790 /*
791 * Update the logger.
792 */
793 VMMR3UpdateLoggers(pVM);
794}
795
796
797/**
798 * Updates the settings for the RC and R0 loggers.
799 *
800 * @returns VBox status code.
801 * @param pVM The cross context VM structure.
802 */
803VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
804{
805 int rc = VINF_SUCCESS;
806
807#ifdef LOG_ENABLED
808 /*
809 * For the ring-0 EMT logger, we use a per-thread logger instance
810 * in ring-0. Only initialize it once.
811 */
812 PRTLOGGER const pDefault = RTLogDefaultInstance();
813 for (VMCPUID i = 0; i < pVM->cCpus; i++)
814 {
815 PVMCPU pVCpu = pVM->apCpusR3[i];
816 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
817 if (pR0LoggerR3)
818 {
819 if (!pR0LoggerR3->fCreated)
820 {
821 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
822 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
823 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
824
825 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
826 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
827 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
828
829 char szR0ThreadName[16];
830 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
831 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
832 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
833 pfnLoggerWrapper, pfnLoggerFlush,
834 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
835 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
836
837 pR0LoggerR3->idCpu = i;
838 pR0LoggerR3->fCreated = true;
839 pR0LoggerR3->fFlushingDisabled = false;
840 }
841
842 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
843 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
844 AssertRC(rc);
845 }
846 }
847#else
848 RT_NOREF(pVM);
849#endif
850
851 return rc;
852}
853
854
855/**
856 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
857 *
858 * @returns Pointer to the buffer.
859 * @param pVM The cross context VM structure.
860 */
861VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
862{
863 return pVM->vmm.s.szRing0AssertMsg1;
864}
865
866
867/**
868 * Returns the VMCPU of the specified virtual CPU.
869 *
870 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
871 *
872 * @param pUVM The user mode VM handle.
873 * @param idCpu The ID of the virtual CPU.
874 */
875VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
876{
877 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
878 AssertReturn(idCpu < pUVM->cCpus, NULL);
879 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
880 return pUVM->pVM->apCpusR3[idCpu];
881}
882
883
884/**
885 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
886 *
887 * @returns Pointer to the buffer.
888 * @param pVM The cross context VM structure.
889 */
890VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
891{
892 return pVM->vmm.s.szRing0AssertMsg2;
893}
894
895
896/**
897 * Execute state save operation.
898 *
899 * @returns VBox status code.
900 * @param pVM The cross context VM structure.
901 * @param pSSM SSM operation handle.
902 */
903static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
904{
905 LogFlow(("vmmR3Save:\n"));
906
907 /*
908 * Save the started/stopped state of all CPUs except 0 as it will always
909 * be running. This avoids breaking the saved state version. :-)
910 */
911 for (VMCPUID i = 1; i < pVM->cCpus; i++)
912 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
913
914 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
915}
916
917
918/**
919 * Execute state load operation.
920 *
921 * @returns VBox status code.
922 * @param pVM The cross context VM structure.
923 * @param pSSM SSM operation handle.
924 * @param uVersion Data layout version.
925 * @param uPass The data pass.
926 */
927static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
928{
929 LogFlow(("vmmR3Load:\n"));
930 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
931
932 /*
933 * Validate version.
934 */
935 if ( uVersion != VMM_SAVED_STATE_VERSION
936 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
937 {
938 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
939 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
940 }
941
942 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
943 {
944 /* Ignore the stack bottom, stack pointer and stack bits. */
945 RTRCPTR RCPtrIgnored;
946 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
947 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
948#ifdef RT_OS_DARWIN
949 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
950 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
951 && SSMR3HandleRevision(pSSM) >= 48858
952 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
953 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
954 )
955 SSMR3Skip(pSSM, 16384);
956 else
957 SSMR3Skip(pSSM, 8192);
958#else
959 SSMR3Skip(pSSM, 8192);
960#endif
961 }
962
963 /*
964 * Restore the VMCPU states. VCPU 0 is always started.
965 */
966 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
967 for (VMCPUID i = 1; i < pVM->cCpus; i++)
968 {
969 bool fStarted;
970 int rc = SSMR3GetBool(pSSM, &fStarted);
971 if (RT_FAILURE(rc))
972 return rc;
973 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
974 }
975
976 /* terminator */
977 uint32_t u32;
978 int rc = SSMR3GetU32(pSSM, &u32);
979 if (RT_FAILURE(rc))
980 return rc;
981 if (u32 != UINT32_MAX)
982 {
983 AssertMsgFailed(("u32=%#x\n", u32));
984 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
985 }
986 return VINF_SUCCESS;
987}
988
989
990/**
991 * Suspends the CPU yielder.
992 *
993 * @param pVM The cross context VM structure.
994 */
995VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
996{
997 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
998 if (!pVM->vmm.s.cYieldResumeMillies)
999 {
1000 uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1001 uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1002 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1003 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1004 else
1005 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1006 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1007 }
1008 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1009}
1010
1011
1012/**
1013 * Stops the CPU yielder.
1014 *
1015 * @param pVM The cross context VM structure.
1016 */
1017VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1018{
1019 if (!pVM->vmm.s.cYieldResumeMillies)
1020 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1021 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1022 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1023}
1024
1025
1026/**
1027 * Resumes the CPU yielder when it has been a suspended or stopped.
1028 *
1029 * @param pVM The cross context VM structure.
1030 */
1031VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1032{
1033 if (pVM->vmm.s.cYieldResumeMillies)
1034 {
1035 TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1036 pVM->vmm.s.cYieldResumeMillies = 0;
1037 }
1038}
1039
1040
1041/**
1042 * @callback_method_impl{FNTMTIMERINT, EMT yielder}
1043 *
1044 * @todo This is a UNI core/thread thing, really... Should be reconsidered.
1045 */
1046static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1047{
1048 NOREF(pvUser);
1049
1050 /*
1051 * This really needs some careful tuning. While we shouldn't be too greedy since
1052 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1053 * because that'll cause us to stop up.
1054 *
1055 * The current logic is to use the default interval when there is no lag worth
1056 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1057 *
1058 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1059 * so the lag is up to date.)
1060 */
1061 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1062 if ( u64Lag < 50000000 /* 50ms */
1063 || ( u64Lag < 1000000000 /* 1s */
1064 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1065 )
1066 {
1067 uint64_t u64Elapsed = RTTimeNanoTS();
1068 pVM->vmm.s.u64LastYield = u64Elapsed;
1069
1070 RTThreadYield();
1071
1072#ifdef LOG_ENABLED
1073 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1074 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1075#endif
1076 }
1077 TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1078}
1079
1080
1081/**
1082 * Executes guest code (Intel VT-x and AMD-V).
1083 *
1084 * @param pVM The cross context VM structure.
1085 * @param pVCpu The cross context virtual CPU structure.
1086 */
1087VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1088{
1089 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1090
1091 for (;;)
1092 {
1093 int rc;
1094 do
1095 {
1096#ifdef NO_SUPCALLR0VMM
1097 rc = VERR_GENERAL_FAILURE;
1098#else
1099 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1100 if (RT_LIKELY(rc == VINF_SUCCESS))
1101 rc = pVCpu->vmm.s.iLastGZRc;
1102#endif
1103 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1104
1105#if 0 /** @todo triggers too often */
1106 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1107#endif
1108
1109 /*
1110 * Flush the logs
1111 */
1112#ifdef LOG_ENABLED
1113 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1114#endif
1115 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1116 if (rc != VINF_VMM_CALL_HOST)
1117 {
1118 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1119 return rc;
1120 }
1121 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1122 if (RT_FAILURE(rc))
1123 return rc;
1124 /* Resume R0 */
1125 }
1126}
1127
1128
1129/**
1130 * Perform one of the fast I/O control VMMR0 operation.
1131 *
1132 * @returns VBox strict status code.
1133 * @param pVM The cross context VM structure.
1134 * @param pVCpu The cross context virtual CPU structure.
1135 * @param enmOperation The operation to perform.
1136 */
1137VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1138{
1139 for (;;)
1140 {
1141 VBOXSTRICTRC rcStrict;
1142 do
1143 {
1144#ifdef NO_SUPCALLR0VMM
1145 rcStrict = VERR_GENERAL_FAILURE;
1146#else
1147 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1148 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1149 rcStrict = pVCpu->vmm.s.iLastGZRc;
1150#endif
1151 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1152
1153 /*
1154 * Flush the logs
1155 */
1156#ifdef LOG_ENABLED
1157 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1158#endif
1159 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1160 if (rcStrict != VINF_VMM_CALL_HOST)
1161 return rcStrict;
1162 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1163 if (RT_FAILURE(rc))
1164 return rc;
1165 /* Resume R0 */
1166 }
1167}
1168
1169
1170/**
1171 * VCPU worker for VMMR3SendStartupIpi.
1172 *
1173 * @param pVM The cross context VM structure.
1174 * @param idCpu Virtual CPU to perform SIPI on.
1175 * @param uVector The SIPI vector.
1176 */
1177static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1178{
1179 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1180 VMCPU_ASSERT_EMT(pVCpu);
1181
1182 /*
1183 * In the INIT state, the target CPU is only responsive to an SIPI.
1184 * This is also true for when when the CPU is in VMX non-root mode.
1185 *
1186 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1187 * See Intel spec. 26.6.2 "Activity State".
1188 */
1189 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1190 return VINF_SUCCESS;
1191
1192 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1193#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1194 if (CPUMIsGuestInVmxRootMode(pCtx))
1195 {
1196 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1197 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1198 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1199
1200 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1201 return VINF_SUCCESS;
1202 }
1203#endif
1204
1205 pCtx->cs.Sel = uVector << 8;
1206 pCtx->cs.ValidSel = uVector << 8;
1207 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1208 pCtx->cs.u64Base = uVector << 12;
1209 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1210 pCtx->rip = 0;
1211
1212 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1213
1214# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1215 EMSetState(pVCpu, EMSTATE_HALTED);
1216 return VINF_EM_RESCHEDULE;
1217# else /* And if we go the VMCPU::enmState way it can stay here. */
1218 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1219 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1220 return VINF_SUCCESS;
1221# endif
1222}
1223
1224
1225/**
1226 * VCPU worker for VMMR3SendInitIpi.
1227 *
1228 * @returns VBox status code.
1229 * @param pVM The cross context VM structure.
1230 * @param idCpu Virtual CPU to perform SIPI on.
1231 */
1232static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1233{
1234 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1235 VMCPU_ASSERT_EMT(pVCpu);
1236
1237 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1238
1239 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1240 * wait-for-SIPI state. Verify. */
1241
1242 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1243#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1244 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1245 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1246 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1247#endif
1248
1249 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1250 * IPI (e.g. SVM_EXIT_INIT). */
1251
1252 PGMR3ResetCpu(pVM, pVCpu);
1253 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1254 APICR3InitIpi(pVCpu);
1255 TRPMR3ResetCpu(pVCpu);
1256 CPUMR3ResetCpu(pVM, pVCpu);
1257 EMR3ResetCpu(pVCpu);
1258 HMR3ResetCpu(pVCpu);
1259 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1260
1261 /* This will trickle up on the target EMT. */
1262 return VINF_EM_WAIT_SIPI;
1263}
1264
1265
1266/**
1267 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1268 * vector-dependent state and unhalting processor.
1269 *
1270 * @param pVM The cross context VM structure.
1271 * @param idCpu Virtual CPU to perform SIPI on.
1272 * @param uVector SIPI vector.
1273 */
1274VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1275{
1276 AssertReturnVoid(idCpu < pVM->cCpus);
1277
1278 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1279 AssertRC(rc);
1280}
1281
1282
1283/**
1284 * Sends init IPI to the virtual CPU.
1285 *
1286 * @param pVM The cross context VM structure.
1287 * @param idCpu Virtual CPU to perform int IPI on.
1288 */
1289VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1290{
1291 AssertReturnVoid(idCpu < pVM->cCpus);
1292
1293 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1294 AssertRC(rc);
1295}
1296
1297
1298/**
1299 * Registers the guest memory range that can be used for patching.
1300 *
1301 * @returns VBox status code.
1302 * @param pVM The cross context VM structure.
1303 * @param pPatchMem Patch memory range.
1304 * @param cbPatchMem Size of the memory range.
1305 */
1306VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1307{
1308 VM_ASSERT_EMT(pVM);
1309 if (HMIsEnabled(pVM))
1310 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1311
1312 return VERR_NOT_SUPPORTED;
1313}
1314
1315
1316/**
1317 * Deregisters the guest memory range that can be used for patching.
1318 *
1319 * @returns VBox status code.
1320 * @param pVM The cross context VM structure.
1321 * @param pPatchMem Patch memory range.
1322 * @param cbPatchMem Size of the memory range.
1323 */
1324VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1325{
1326 if (HMIsEnabled(pVM))
1327 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1328
1329 return VINF_SUCCESS;
1330}
1331
1332
1333/**
1334 * Common recursion handler for the other EMTs.
1335 *
1336 * @returns Strict VBox status code.
1337 * @param pVM The cross context VM structure.
1338 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1339 * @param rcStrict Current status code to be combined with the one
1340 * from this recursion and returned.
1341 */
1342static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1343{
1344 int rc2;
1345
1346 /*
1347 * We wait here while the initiator of this recursion reconfigures
1348 * everything. The last EMT to get in signals the initiator.
1349 */
1350 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1351 {
1352 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1353 AssertLogRelRC(rc2);
1354 }
1355
1356 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1357 AssertLogRelRC(rc2);
1358
1359 /*
1360 * Do the normal rendezvous processing.
1361 */
1362 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1363 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1364
1365 /*
1366 * Wait for the initiator to restore everything.
1367 */
1368 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1369 AssertLogRelRC(rc2);
1370
1371 /*
1372 * Last thread out of here signals the initiator.
1373 */
1374 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1375 {
1376 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1377 AssertLogRelRC(rc2);
1378 }
1379
1380 /*
1381 * Merge status codes and return.
1382 */
1383 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1384 if ( rcStrict2 != VINF_SUCCESS
1385 && ( rcStrict == VINF_SUCCESS
1386 || rcStrict > rcStrict2))
1387 rcStrict = rcStrict2;
1388 return rcStrict;
1389}
1390
1391
1392/**
1393 * Count returns and have the last non-caller EMT wake up the caller.
1394 *
1395 * @returns VBox strict informational status code for EM scheduling. No failures
1396 * will be returned here, those are for the caller only.
1397 *
1398 * @param pVM The cross context VM structure.
1399 * @param rcStrict The current accumulated recursive status code,
1400 * to be merged with i32RendezvousStatus and
1401 * returned.
1402 */
1403DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1404{
1405 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1406
1407 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1408 if (cReturned == pVM->cCpus - 1U)
1409 {
1410 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1411 AssertLogRelRC(rc);
1412 }
1413
1414 /*
1415 * Merge the status codes, ignoring error statuses in this code path.
1416 */
1417 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1418 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1419 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1420 VERR_IPE_UNEXPECTED_INFO_STATUS);
1421
1422 if (RT_SUCCESS(rcStrict2))
1423 {
1424 if ( rcStrict2 != VINF_SUCCESS
1425 && ( rcStrict == VINF_SUCCESS
1426 || rcStrict > rcStrict2))
1427 rcStrict = rcStrict2;
1428 }
1429 return rcStrict;
1430}
1431
1432
1433/**
1434 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1435 *
1436 * @returns VBox strict informational status code for EM scheduling. No failures
1437 * will be returned here, those are for the caller only. When
1438 * fIsCaller is set, VINF_SUCCESS is always returned.
1439 *
1440 * @param pVM The cross context VM structure.
1441 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1442 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1443 * not.
1444 * @param fFlags The flags.
1445 * @param pfnRendezvous The callback.
1446 * @param pvUser The user argument for the callback.
1447 */
1448static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1449 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1450{
1451 int rc;
1452 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1453
1454 /*
1455 * Enter, the last EMT triggers the next callback phase.
1456 */
1457 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1458 if (cEntered != pVM->cCpus)
1459 {
1460 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1461 {
1462 /* Wait for our turn. */
1463 for (;;)
1464 {
1465 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1466 AssertLogRelRC(rc);
1467 if (!pVM->vmm.s.fRendezvousRecursion)
1468 break;
1469 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1470 }
1471 }
1472 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1473 {
1474 /* Wait for the last EMT to arrive and wake everyone up. */
1475 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1476 AssertLogRelRC(rc);
1477 Assert(!pVM->vmm.s.fRendezvousRecursion);
1478 }
1479 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1480 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1481 {
1482 /* Wait for our turn. */
1483 for (;;)
1484 {
1485 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1486 AssertLogRelRC(rc);
1487 if (!pVM->vmm.s.fRendezvousRecursion)
1488 break;
1489 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1490 }
1491 }
1492 else
1493 {
1494 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1495
1496 /*
1497 * The execute once is handled specially to optimize the code flow.
1498 *
1499 * The last EMT to arrive will perform the callback and the other
1500 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1501 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1502 * returns, that EMT will initiate the normal return sequence.
1503 */
1504 if (!fIsCaller)
1505 {
1506 for (;;)
1507 {
1508 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1509 AssertLogRelRC(rc);
1510 if (!pVM->vmm.s.fRendezvousRecursion)
1511 break;
1512 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1513 }
1514
1515 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1516 }
1517 return VINF_SUCCESS;
1518 }
1519 }
1520 else
1521 {
1522 /*
1523 * All EMTs are waiting, clear the FF and take action according to the
1524 * execution method.
1525 */
1526 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1527
1528 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1529 {
1530 /* Wake up everyone. */
1531 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1532 AssertLogRelRC(rc);
1533 }
1534 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1535 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1536 {
1537 /* Figure out who to wake up and wake it up. If it's ourself, then
1538 it's easy otherwise wait for our turn. */
1539 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1540 ? 0
1541 : pVM->cCpus - 1U;
1542 if (pVCpu->idCpu != iFirst)
1543 {
1544 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1545 AssertLogRelRC(rc);
1546 for (;;)
1547 {
1548 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1549 AssertLogRelRC(rc);
1550 if (!pVM->vmm.s.fRendezvousRecursion)
1551 break;
1552 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1553 }
1554 }
1555 }
1556 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1557 }
1558
1559
1560 /*
1561 * Do the callback and update the status if necessary.
1562 */
1563 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1564 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1565 {
1566 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1567 if (rcStrict2 != VINF_SUCCESS)
1568 {
1569 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1570 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1571 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1572 int32_t i32RendezvousStatus;
1573 do
1574 {
1575 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1576 if ( rcStrict2 == i32RendezvousStatus
1577 || RT_FAILURE(i32RendezvousStatus)
1578 || ( i32RendezvousStatus != VINF_SUCCESS
1579 && rcStrict2 > i32RendezvousStatus))
1580 break;
1581 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1582 }
1583 }
1584
1585 /*
1586 * Increment the done counter and take action depending on whether we're
1587 * the last to finish callback execution.
1588 */
1589 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1590 if ( cDone != pVM->cCpus
1591 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1592 {
1593 /* Signal the next EMT? */
1594 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1595 {
1596 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1597 AssertLogRelRC(rc);
1598 }
1599 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1600 {
1601 Assert(cDone == pVCpu->idCpu + 1U);
1602 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1603 AssertLogRelRC(rc);
1604 }
1605 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1606 {
1607 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1608 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1609 AssertLogRelRC(rc);
1610 }
1611
1612 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1613 if (!fIsCaller)
1614 {
1615 for (;;)
1616 {
1617 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1618 AssertLogRelRC(rc);
1619 if (!pVM->vmm.s.fRendezvousRecursion)
1620 break;
1621 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1622 }
1623 }
1624 }
1625 else
1626 {
1627 /* Callback execution is all done, tell the rest to return. */
1628 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1629 AssertLogRelRC(rc);
1630 }
1631
1632 if (!fIsCaller)
1633 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1634 return rcStrictRecursion;
1635}
1636
1637
1638/**
1639 * Called in response to VM_FF_EMT_RENDEZVOUS.
1640 *
1641 * @returns VBox strict status code - EM scheduling. No errors will be returned
1642 * here, nor will any non-EM scheduling status codes be returned.
1643 *
1644 * @param pVM The cross context VM structure.
1645 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1646 *
1647 * @thread EMT
1648 */
1649VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1650{
1651 Assert(!pVCpu->vmm.s.fInRendezvous);
1652 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1653 pVCpu->vmm.s.fInRendezvous = true;
1654 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1655 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1656 pVCpu->vmm.s.fInRendezvous = false;
1657 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1658 return VBOXSTRICTRC_TODO(rcStrict);
1659}
1660
1661
1662/**
1663 * Helper for resetting an single wakeup event sempahore.
1664 *
1665 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1666 * @param hEvt The event semaphore to reset.
1667 */
1668static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1669{
1670 for (uint32_t cLoops = 0; ; cLoops++)
1671 {
1672 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1673 if (rc != VINF_SUCCESS || cLoops > _4K)
1674 return rc;
1675 }
1676}
1677
1678
1679/**
1680 * Worker for VMMR3EmtRendezvous that handles recursion.
1681 *
1682 * @returns VBox strict status code. This will be the first error,
1683 * VINF_SUCCESS, or an EM scheduling status code.
1684 *
1685 * @param pVM The cross context VM structure.
1686 * @param pVCpu The cross context virtual CPU structure of the
1687 * calling EMT.
1688 * @param fFlags Flags indicating execution methods. See
1689 * grp_VMMR3EmtRendezvous_fFlags.
1690 * @param pfnRendezvous The callback.
1691 * @param pvUser User argument for the callback.
1692 *
1693 * @thread EMT(pVCpu)
1694 */
1695static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1696 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1697{
1698 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1699 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1700 Assert(pVCpu->vmm.s.fInRendezvous);
1701
1702 /*
1703 * Save the current state.
1704 */
1705 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1706 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1707 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1708 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1709 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1710
1711 /*
1712 * Check preconditions and save the current state.
1713 */
1714 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1715 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1716 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1717 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1718 VERR_INTERNAL_ERROR);
1719 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1720 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1721
1722 /*
1723 * Reset the recursion prep and pop semaphores.
1724 */
1725 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1726 AssertLogRelRCReturn(rc, rc);
1727 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1728 AssertLogRelRCReturn(rc, rc);
1729 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1730 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1731 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1732 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1733
1734 /*
1735 * Usher the other thread into the recursion routine.
1736 */
1737 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1738 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1739
1740 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1741 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1742 while (cLeft-- > 0)
1743 {
1744 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1745 AssertLogRelRC(rc);
1746 }
1747 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1748 {
1749 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1750 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1751 {
1752 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1753 AssertLogRelRC(rc);
1754 }
1755 }
1756 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1757 {
1758 Assert(cLeft == pVCpu->idCpu);
1759 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1760 {
1761 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1762 AssertLogRelRC(rc);
1763 }
1764 }
1765 else
1766 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1767 VERR_INTERNAL_ERROR_4);
1768
1769 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1770 AssertLogRelRC(rc);
1771 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1772 AssertLogRelRC(rc);
1773
1774
1775 /*
1776 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1777 */
1778 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1779 {
1780 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1781 AssertLogRelRC(rc);
1782 }
1783
1784 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1785
1786 /*
1787 * Clear the slate and setup the new rendezvous.
1788 */
1789 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1790 {
1791 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1792 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1793 }
1794 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1795 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1796 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1797 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1798
1799 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1800 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1801 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1802 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1803 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1804 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1805 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1806 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1807
1808 /*
1809 * We're ready to go now, do normal rendezvous processing.
1810 */
1811 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1812 AssertLogRelRC(rc);
1813
1814 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1815
1816 /*
1817 * The caller waits for the other EMTs to be done, return and waiting on the
1818 * pop semaphore.
1819 */
1820 for (;;)
1821 {
1822 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1823 AssertLogRelRC(rc);
1824 if (!pVM->vmm.s.fRendezvousRecursion)
1825 break;
1826 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1827 }
1828
1829 /*
1830 * Get the return code and merge it with the above recursion status.
1831 */
1832 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1833 if ( rcStrict2 != VINF_SUCCESS
1834 && ( rcStrict == VINF_SUCCESS
1835 || rcStrict > rcStrict2))
1836 rcStrict = rcStrict2;
1837
1838 /*
1839 * Restore the parent rendezvous state.
1840 */
1841 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1842 {
1843 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1844 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1845 }
1846 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1847 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1848 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1849 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1850
1851 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1852 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1853 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1854 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1855 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1856 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1857 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1858
1859 /*
1860 * Usher the other EMTs back to their parent recursion routine, waiting
1861 * for them to all get there before we return (makes sure they've been
1862 * scheduled and are past the pop event sem, see below).
1863 */
1864 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1865 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1866 AssertLogRelRC(rc);
1867
1868 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1869 {
1870 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1871 AssertLogRelRC(rc);
1872 }
1873
1874 /*
1875 * We must reset the pop semaphore on the way out (doing the pop caller too,
1876 * just in case). The parent may be another recursion.
1877 */
1878 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1879 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1880
1881 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1882
1883 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1884 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1885 return rcStrict;
1886}
1887
1888
1889/**
1890 * EMT rendezvous.
1891 *
1892 * Gathers all the EMTs and execute some code on each of them, either in a one
1893 * by one fashion or all at once.
1894 *
1895 * @returns VBox strict status code. This will be the first error,
1896 * VINF_SUCCESS, or an EM scheduling status code.
1897 *
1898 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1899 * doesn't support it or if the recursion is too deep.
1900 *
1901 * @param pVM The cross context VM structure.
1902 * @param fFlags Flags indicating execution methods. See
1903 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1904 * descending and ascending rendezvous types support
1905 * recursion from inside @a pfnRendezvous.
1906 * @param pfnRendezvous The callback.
1907 * @param pvUser User argument for the callback.
1908 *
1909 * @thread Any.
1910 */
1911VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1912{
1913 /*
1914 * Validate input.
1915 */
1916 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1917 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1918 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1919 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1920 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1921 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1922 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1923 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1924
1925 VBOXSTRICTRC rcStrict;
1926 PVMCPU pVCpu = VMMGetCpu(pVM);
1927 if (!pVCpu)
1928 {
1929 /*
1930 * Forward the request to an EMT thread.
1931 */
1932 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1933 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1934 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1935 else
1936 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1937 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1938 }
1939 else if ( pVM->cCpus == 1
1940 || ( pVM->enmVMState == VMSTATE_DESTROYING
1941 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1942 {
1943 /*
1944 * Shortcut for the single EMT case.
1945 *
1946 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1947 * during vmR3Destroy after other emulation threads have started terminating.
1948 */
1949 if (!pVCpu->vmm.s.fInRendezvous)
1950 {
1951 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1952 pVCpu->vmm.s.fInRendezvous = true;
1953 pVM->vmm.s.fRendezvousFlags = fFlags;
1954 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1955 pVCpu->vmm.s.fInRendezvous = false;
1956 }
1957 else
1958 {
1959 /* Recursion. Do the same checks as in the SMP case. */
1960 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1961 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1962 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1963 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1964 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1965 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1966 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1967 , VERR_DEADLOCK);
1968
1969 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1970 pVM->vmm.s.cRendezvousRecursions++;
1971 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1972 pVM->vmm.s.fRendezvousFlags = fFlags;
1973
1974 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1975
1976 pVM->vmm.s.fRendezvousFlags = fParentFlags;
1977 pVM->vmm.s.cRendezvousRecursions--;
1978 }
1979 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1980 }
1981 else
1982 {
1983 /*
1984 * Spin lock. If busy, check for recursion, if not recursing wait for
1985 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1986 */
1987 int rc;
1988 rcStrict = VINF_SUCCESS;
1989 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1990 {
1991 /* Allow recursion in some cases. */
1992 if ( pVCpu->vmm.s.fInRendezvous
1993 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1994 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1995 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1996 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1997 ))
1998 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
1999
2000 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2001 VERR_DEADLOCK);
2002
2003 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2004 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2005 {
2006 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2007 {
2008 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2009 if ( rc != VINF_SUCCESS
2010 && ( rcStrict == VINF_SUCCESS
2011 || rcStrict > rc))
2012 rcStrict = rc;
2013 /** @todo Perhaps deal with termination here? */
2014 }
2015 ASMNopPause();
2016 }
2017 }
2018
2019 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2020 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2021 Assert(!pVCpu->vmm.s.fInRendezvous);
2022 pVCpu->vmm.s.fInRendezvous = true;
2023
2024 /*
2025 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2026 */
2027 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2028 {
2029 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2030 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2031 }
2032 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2033 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2034 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2035 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2036 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2037 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2038 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2039 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2040 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2041 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2042 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2043
2044 /*
2045 * Set the FF and poke the other EMTs.
2046 */
2047 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2048 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2049
2050 /*
2051 * Do the same ourselves.
2052 */
2053 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2054
2055 /*
2056 * The caller waits for the other EMTs to be done and return before doing
2057 * the cleanup. This makes away with wakeup / reset races we would otherwise
2058 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2059 */
2060 for (;;)
2061 {
2062 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2063 AssertLogRelRC(rc);
2064 if (!pVM->vmm.s.fRendezvousRecursion)
2065 break;
2066 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2067 }
2068
2069 /*
2070 * Get the return code and clean up a little bit.
2071 */
2072 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2073 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2074
2075 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2076 pVCpu->vmm.s.fInRendezvous = false;
2077
2078 /*
2079 * Merge rcStrict, rcStrict2 and rcStrict3.
2080 */
2081 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2082 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2083 if ( rcStrict2 != VINF_SUCCESS
2084 && ( rcStrict == VINF_SUCCESS
2085 || rcStrict > rcStrict2))
2086 rcStrict = rcStrict2;
2087 if ( rcStrict3 != VINF_SUCCESS
2088 && ( rcStrict == VINF_SUCCESS
2089 || rcStrict > rcStrict3))
2090 rcStrict = rcStrict3;
2091 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2092 }
2093
2094 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2095 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2096 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2097 VERR_IPE_UNEXPECTED_INFO_STATUS);
2098 return VBOXSTRICTRC_VAL(rcStrict);
2099}
2100
2101
2102/**
2103 * Interface for vmR3SetHaltMethodU.
2104 *
2105 * @param pVCpu The cross context virtual CPU structure of the
2106 * calling EMT.
2107 * @param fMayHaltInRing0 The new state.
2108 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2109 * @thread EMT(pVCpu)
2110 *
2111 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2112 * component.
2113 */
2114VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2115{
2116 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2117 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2118}
2119
2120
2121/**
2122 * Read from the ring 0 jump buffer stack.
2123 *
2124 * @returns VBox status code.
2125 *
2126 * @param pVM The cross context VM structure.
2127 * @param idCpu The ID of the source CPU context (for the address).
2128 * @param R0Addr Where to start reading.
2129 * @param pvBuf Where to store the data we've read.
2130 * @param cbRead The number of bytes to read.
2131 */
2132VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2133{
2134 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2135 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2136 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2137
2138 int rc;
2139#ifdef VMM_R0_SWITCH_STACK
2140 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2141#else
2142 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2143#endif
2144 if ( off < VMM_STACK_SIZE
2145 && off + cbRead <= VMM_STACK_SIZE)
2146 {
2147 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2148 rc = VINF_SUCCESS;
2149 }
2150 else
2151 rc = VERR_INVALID_POINTER;
2152
2153 /* Supply the setjmp return RIP/EIP. */
2154 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2155 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2156 {
2157 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2158 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2159 size_t offDst = 0;
2160 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2161 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2162 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2163 {
2164 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2165 Assert(offSrc < cbSrc);
2166 pbSrc -= offSrc;
2167 cbSrc -= offSrc;
2168 }
2169 if (cbSrc > cbRead - offDst)
2170 cbSrc = cbRead - offDst;
2171 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2172
2173 if (cbSrc == cbRead)
2174 rc = VINF_SUCCESS;
2175 }
2176
2177 return rc;
2178}
2179
2180
2181/**
2182 * Used by the DBGF stack unwinder to initialize the register state.
2183 *
2184 * @param pUVM The user mode VM handle.
2185 * @param idCpu The ID of the CPU being unwound.
2186 * @param pState The unwind state to initialize.
2187 */
2188VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2189{
2190 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2191 AssertReturnVoid(pVCpu);
2192
2193 /*
2194 * Locate the resume point on the stack.
2195 */
2196#ifdef VMM_R0_SWITCH_STACK
2197 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2198 AssertReturnVoid(off < VMM_STACK_SIZE);
2199#else
2200 uintptr_t off = 0;
2201#endif
2202
2203#ifdef RT_ARCH_AMD64
2204 /*
2205 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2206 */
2207# ifdef VBOX_STRICT
2208 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2209 off += 8; /* RESUME_MAGIC */
2210# endif
2211# ifdef RT_OS_WINDOWS
2212 off += 0xa0; /* XMM6 thru XMM15 */
2213# endif
2214 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2215 off += 8;
2216 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2217 off += 8;
2218# ifdef RT_OS_WINDOWS
2219 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2220 off += 8;
2221 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2222 off += 8;
2223# endif
2224 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2225 off += 8;
2226 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2227 off += 8;
2228 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2229 off += 8;
2230 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2231 off += 8;
2232 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2233 off += 8;
2234 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2235 off += 8;
2236
2237#elif defined(RT_ARCH_X86)
2238 /*
2239 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2240 */
2241# ifdef VBOX_STRICT
2242 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2243 off += 4; /* RESUME_MAGIC */
2244# endif
2245 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2246 off += 4;
2247 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2248 off += 4;
2249 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2250 off += 4;
2251 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2252 off += 4;
2253 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2254 off += 4;
2255 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2256 off += 4;
2257#else
2258# error "Port me"
2259#endif
2260
2261 /*
2262 * This is all we really need here, though the above helps if the assembly
2263 * doesn't contain unwind info (currently only on win/64, so that is useful).
2264 */
2265 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2266 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2267}
2268
2269
2270/**
2271 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2272 *
2273 * @returns VBox status code.
2274 * @param pVM The cross context VM structure.
2275 * @param uOperation Operation to execute.
2276 * @param u64Arg Constant argument.
2277 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2278 * details.
2279 */
2280VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2281{
2282 PVMCPU pVCpu = VMMGetCpu(pVM);
2283 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2284 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2285}
2286
2287
2288/**
2289 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2290 *
2291 * @returns VBox status code.
2292 * @param pVM The cross context VM structure.
2293 * @param pVCpu The cross context VM structure.
2294 * @param enmOperation Operation to execute.
2295 * @param u64Arg Constant argument.
2296 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2297 * details.
2298 */
2299VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2300{
2301 int rc;
2302 for (;;)
2303 {
2304#ifdef NO_SUPCALLR0VMM
2305 rc = VERR_GENERAL_FAILURE;
2306#else
2307 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2308#endif
2309 /*
2310 * Flush the logs.
2311 */
2312#ifdef LOG_ENABLED
2313 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2314#endif
2315 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2316 if (rc != VINF_VMM_CALL_HOST)
2317 break;
2318 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2319 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2320 break;
2321 /* Resume R0 */
2322 }
2323
2324 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2325 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2326 VERR_IPE_UNEXPECTED_INFO_STATUS);
2327 return rc;
2328}
2329
2330
2331/**
2332 * Service a call to the ring-3 host code.
2333 *
2334 * @returns VBox status code.
2335 * @param pVM The cross context VM structure.
2336 * @param pVCpu The cross context virtual CPU structure.
2337 * @remarks Careful with critsects.
2338 */
2339static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2340{
2341 /*
2342 * We must also check for pending critsect exits or else we can deadlock
2343 * when entering other critsects here.
2344 */
2345 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2346 PDMCritSectBothFF(pVCpu);
2347
2348 switch (pVCpu->vmm.s.enmCallRing3Operation)
2349 {
2350 /*
2351 * Acquire a critical section.
2352 */
2353 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2354 {
2355 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2356 true /*fCallRing3*/);
2357 break;
2358 }
2359
2360 /*
2361 * Enter a r/w critical section exclusively.
2362 */
2363 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2364 {
2365 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2366 true /*fCallRing3*/);
2367 break;
2368 }
2369
2370 /*
2371 * Enter a r/w critical section shared.
2372 */
2373 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2374 {
2375 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2376 true /*fCallRing3*/);
2377 break;
2378 }
2379
2380 /*
2381 * Acquire the PDM lock.
2382 */
2383 case VMMCALLRING3_PDM_LOCK:
2384 {
2385 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2386 break;
2387 }
2388
2389 /*
2390 * Grow the PGM pool.
2391 */
2392 case VMMCALLRING3_PGM_POOL_GROW:
2393 {
2394 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2395 break;
2396 }
2397
2398 /*
2399 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2400 */
2401 case VMMCALLRING3_PGM_MAP_CHUNK:
2402 {
2403 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2404 break;
2405 }
2406
2407 /*
2408 * Allocates more handy pages.
2409 */
2410 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2411 {
2412 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2413 break;
2414 }
2415
2416 /*
2417 * Allocates a large page.
2418 */
2419 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2420 {
2421 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2422 break;
2423 }
2424
2425 /*
2426 * Acquire the PGM lock.
2427 */
2428 case VMMCALLRING3_PGM_LOCK:
2429 {
2430 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2431 break;
2432 }
2433
2434 /*
2435 * Acquire the MM hypervisor heap lock.
2436 */
2437 case VMMCALLRING3_MMHYPER_LOCK:
2438 {
2439 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2440 break;
2441 }
2442
2443 /*
2444 * This is a noop. We just take this route to avoid unnecessary
2445 * tests in the loops.
2446 */
2447 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2448 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2449 LogAlways(("*FLUSH*\n"));
2450 break;
2451
2452 /*
2453 * Set the VM error message.
2454 */
2455 case VMMCALLRING3_VM_SET_ERROR:
2456 VMR3SetErrorWorker(pVM);
2457 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2458 break;
2459
2460 /*
2461 * Set the VM runtime error message.
2462 */
2463 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2464 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2465 break;
2466
2467 /*
2468 * Signal a ring 0 hypervisor assertion.
2469 * Cancel the longjmp operation that's in progress.
2470 */
2471 case VMMCALLRING3_VM_R0_ASSERTION:
2472 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2473 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2474#ifdef RT_ARCH_X86
2475 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2476#else
2477 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2478#endif
2479#ifdef VMM_R0_SWITCH_STACK
2480 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2481#endif
2482 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2483 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2484 return VERR_VMM_RING0_ASSERTION;
2485
2486 /*
2487 * A forced switch to ring 0 for preemption purposes.
2488 */
2489 case VMMCALLRING3_VM_R0_PREEMPT:
2490 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2491 break;
2492
2493 default:
2494 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2495 return VERR_VMM_UNKNOWN_RING3_CALL;
2496 }
2497
2498 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2499 return VINF_SUCCESS;
2500}
2501
2502
2503/**
2504 * Displays the Force action Flags.
2505 *
2506 * @param pVM The cross context VM structure.
2507 * @param pHlp The output helpers.
2508 * @param pszArgs The additional arguments (ignored).
2509 */
2510static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2511{
2512 int c;
2513 uint32_t f;
2514 NOREF(pszArgs);
2515
2516#define PRINT_FLAG(prf,flag) do { \
2517 if (f & (prf##flag)) \
2518 { \
2519 static const char *s_psz = #flag; \
2520 if (!(c % 6)) \
2521 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2522 else \
2523 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2524 c++; \
2525 f &= ~(prf##flag); \
2526 } \
2527 } while (0)
2528
2529#define PRINT_GROUP(prf,grp,sfx) do { \
2530 if (f & (prf##grp##sfx)) \
2531 { \
2532 static const char *s_psz = #grp; \
2533 if (!(c % 5)) \
2534 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2535 else \
2536 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2537 c++; \
2538 } \
2539 } while (0)
2540
2541 /*
2542 * The global flags.
2543 */
2544 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2545 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2546
2547 /* show the flag mnemonics */
2548 c = 0;
2549 f = fGlobalForcedActions;
2550 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2551 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2552 PRINT_FLAG(VM_FF_,PDM_DMA);
2553 PRINT_FLAG(VM_FF_,DBGF);
2554 PRINT_FLAG(VM_FF_,REQUEST);
2555 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2556 PRINT_FLAG(VM_FF_,RESET);
2557 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2558 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2559 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2560 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2561 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2562 if (f)
2563 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2564 else
2565 pHlp->pfnPrintf(pHlp, "\n");
2566
2567 /* the groups */
2568 c = 0;
2569 f = fGlobalForcedActions;
2570 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2571 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2572 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2573 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2574 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2575 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2576 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2577 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2578 if (c)
2579 pHlp->pfnPrintf(pHlp, "\n");
2580
2581 /*
2582 * Per CPU flags.
2583 */
2584 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2585 {
2586 PVMCPU pVCpu = pVM->apCpusR3[i];
2587 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2588 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2589
2590 /* show the flag mnemonics */
2591 c = 0;
2592 f = fLocalForcedActions;
2593 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2594 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2595 PRINT_FLAG(VMCPU_FF_,TIMER);
2596 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2597 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2598 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2599 PRINT_FLAG(VMCPU_FF_,UNHALT);
2600 PRINT_FLAG(VMCPU_FF_,IEM);
2601 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2602 PRINT_FLAG(VMCPU_FF_,DBGF);
2603 PRINT_FLAG(VMCPU_FF_,REQUEST);
2604 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2605 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2606 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2607 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2608 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2609 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2610 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2611 PRINT_FLAG(VMCPU_FF_,TO_R3);
2612 PRINT_FLAG(VMCPU_FF_,IOM);
2613 if (f)
2614 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2615 else
2616 pHlp->pfnPrintf(pHlp, "\n");
2617
2618 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2619 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2620
2621 /* the groups */
2622 c = 0;
2623 f = fLocalForcedActions;
2624 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2625 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2626 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2627 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2628 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2629 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2630 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2631 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2632 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2633 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2634 if (c)
2635 pHlp->pfnPrintf(pHlp, "\n");
2636 }
2637
2638#undef PRINT_FLAG
2639#undef PRINT_GROUP
2640}
2641
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