VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 87821

Last change on this file since 87821 was 87821, checked in by vboxsync, 4 years ago

VMM: Disabled the EMT yield timer as it is out dated (multi core CPUs) and will be pointless when timers move off the EMTs. [build fix] bugref:9943

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 105.6 KB
Line 
1/* $Id: VMM.cpp 87821 2021-02-20 10:26:21Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_dbgf
32 * - @subpage pg_em
33 * - @subpage pg_gim
34 * - @subpage pg_gmm
35 * - @subpage pg_gvmm
36 * - @subpage pg_hm
37 * - @subpage pg_iem
38 * - @subpage pg_iom
39 * - @subpage pg_mm
40 * - @subpage pg_nem
41 * - @subpage pg_pdm
42 * - @subpage pg_pgm
43 * - @subpage pg_selm
44 * - @subpage pg_ssm
45 * - @subpage pg_stam
46 * - @subpage pg_tm
47 * - @subpage pg_trpm
48 * - @subpage pg_vm
49 *
50 *
51 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52 *
53 *
54 * @section sec_vmmstate VMM State
55 *
56 * @image html VM_Statechart_Diagram.gif
57 *
58 * To be written.
59 *
60 *
61 * @subsection subsec_vmm_init VMM Initialization
62 *
63 * To be written.
64 *
65 *
66 * @subsection subsec_vmm_term VMM Termination
67 *
68 * To be written.
69 *
70 *
71 * @section sec_vmm_limits VMM Limits
72 *
73 * There are various resource limits imposed by the VMM and it's
74 * sub-components. We'll list some of them here.
75 *
76 * On 64-bit hosts:
77 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78 * can be increased up to 64K - 1.
79 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81 * - A VM can be assigned all the memory we can use (16TB), however, the
82 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84 *
85 * On 32-bit hosts:
86 * - Max 127 VMs. Imposed by GMM's per page structure.
87 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88 * ROM pages. The limit is imposed by the 28-bit page ID used
89 * internally in GMM. It is also limited by PAE.
90 * - A VM can be assigned all the memory GMM can allocate, however, the
91 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93 *
94 */
95
96
97/*********************************************************************************************************************************
98* Header Files *
99*********************************************************************************************************************************/
100#define LOG_GROUP LOG_GROUP_VMM
101#include <VBox/vmm/vmm.h>
102#include <VBox/vmm/vmapi.h>
103#include <VBox/vmm/pgm.h>
104#include <VBox/vmm/cfgm.h>
105#include <VBox/vmm/pdmqueue.h>
106#include <VBox/vmm/pdmcritsect.h>
107#include <VBox/vmm/pdmcritsectrw.h>
108#include <VBox/vmm/pdmapi.h>
109#include <VBox/vmm/cpum.h>
110#include <VBox/vmm/gim.h>
111#include <VBox/vmm/mm.h>
112#include <VBox/vmm/nem.h>
113#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114# include <VBox/vmm/iem.h>
115#endif
116#include <VBox/vmm/iom.h>
117#include <VBox/vmm/trpm.h>
118#include <VBox/vmm/selm.h>
119#include <VBox/vmm/em.h>
120#include <VBox/sup.h>
121#include <VBox/vmm/dbgf.h>
122#include <VBox/vmm/apic.h>
123#include <VBox/vmm/ssm.h>
124#include <VBox/vmm/tm.h>
125#include "VMMInternal.h"
126#include <VBox/vmm/vmcc.h>
127
128#include <VBox/err.h>
129#include <VBox/param.h>
130#include <VBox/version.h>
131#include <VBox/vmm/hm.h>
132#include <iprt/assert.h>
133#include <iprt/alloc.h>
134#include <iprt/asm.h>
135#include <iprt/time.h>
136#include <iprt/semaphore.h>
137#include <iprt/stream.h>
138#include <iprt/string.h>
139#include <iprt/stdarg.h>
140#include <iprt/ctype.h>
141#include <iprt/x86.h>
142
143
144/*********************************************************************************************************************************
145* Defined Constants And Macros *
146*********************************************************************************************************************************/
147/** The saved state version. */
148#define VMM_SAVED_STATE_VERSION 4
149/** The saved state version used by v3.0 and earlier. (Teleportation) */
150#define VMM_SAVED_STATE_VERSION_3_0 3
151
152/** Macro for flushing the ring-0 logging. */
153#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154 do { \
155 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
157 { /* likely? */ } \
158 else \
159 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160 } while (0)
161
162
163/*********************************************************************************************************************************
164* Internal Functions *
165*********************************************************************************************************************************/
166static int vmmR3InitStacks(PVM pVM);
167static int vmmR3InitLoggers(PVM pVM);
168static void vmmR3InitRegisterStats(PVM pVM);
169static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171#if 0 /* pointless when timers doesn't run on EMT */
172static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173#endif
174static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
178
179
180/**
181 * Initializes the VMM.
182 *
183 * @returns VBox status code.
184 * @param pVM The cross context VM structure.
185 */
186VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
187{
188 LogFlow(("VMMR3Init\n"));
189
190 /*
191 * Assert alignment, sizes and order.
192 */
193 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
194 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
195
196 /*
197 * Init basic VM VMM members.
198 */
199 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
200 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
201 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
202 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
203 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
204 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
205 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
206 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
207 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
208
209#if 0 /* pointless when timers doesn't run on EMT */
210 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
211 * The EMT yield interval. The EMT yielding is a hack we employ to play a
212 * bit nicer with the rest of the system (like for instance the GUI).
213 */
214 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
215 23 /* Value arrived at after experimenting with the grub boot prompt. */);
216 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
217#endif
218
219 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
220 * Controls whether we employ per-cpu preemption timers to limit the time
221 * spent executing guest code. This option is not available on all
222 * platforms and we will silently ignore this setting then. If we are
223 * running in VT-x mode, we will use the VMX-preemption timer instead of
224 * this one when possible.
225 */
226 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
227 int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
228 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
229
230 /*
231 * Initialize the VMM rendezvous semaphores.
232 */
233 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
234 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
235 return VERR_NO_MEMORY;
236 for (VMCPUID i = 0; i < pVM->cCpus; i++)
237 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
238 for (VMCPUID i = 0; i < pVM->cCpus; i++)
239 {
240 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
241 AssertRCReturn(rc, rc);
242 }
243 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
244 AssertRCReturn(rc, rc);
245 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
246 AssertRCReturn(rc, rc);
247 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
248 AssertRCReturn(rc, rc);
249 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
250 AssertRCReturn(rc, rc);
251 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
252 AssertRCReturn(rc, rc);
253 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
254 AssertRCReturn(rc, rc);
255 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
256 AssertRCReturn(rc, rc);
257 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
258 AssertRCReturn(rc, rc);
259
260 /*
261 * Register the saved state data unit.
262 */
263 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
264 NULL, NULL, NULL,
265 NULL, vmmR3Save, NULL,
266 NULL, vmmR3Load, NULL);
267 if (RT_FAILURE(rc))
268 return rc;
269
270 /*
271 * Register the Ring-0 VM handle with the session for fast ioctl calls.
272 */
273 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
274 if (RT_FAILURE(rc))
275 return rc;
276
277 /*
278 * Init various sub-components.
279 */
280 rc = vmmR3InitStacks(pVM);
281 if (RT_SUCCESS(rc))
282 {
283 rc = vmmR3InitLoggers(pVM);
284
285#ifdef VBOX_WITH_NMI
286 /*
287 * Allocate mapping for the host APIC.
288 */
289 if (RT_SUCCESS(rc))
290 {
291 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
292 AssertRC(rc);
293 }
294#endif
295 if (RT_SUCCESS(rc))
296 {
297 /*
298 * Debug info and statistics.
299 */
300 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
301 vmmR3InitRegisterStats(pVM);
302 vmmInitFormatTypes();
303
304 return VINF_SUCCESS;
305 }
306 }
307 /** @todo Need failure cleanup? */
308
309 return rc;
310}
311
312
313/**
314 * Allocate & setup the VMM RC stack(s) (for EMTs).
315 *
316 * The stacks are also used for long jumps in Ring-0.
317 *
318 * @returns VBox status code.
319 * @param pVM The cross context VM structure.
320 *
321 * @remarks The optional guard page gets it protection setup up during R3 init
322 * completion because of init order issues.
323 */
324static int vmmR3InitStacks(PVM pVM)
325{
326 int rc = VINF_SUCCESS;
327#ifdef VMM_R0_SWITCH_STACK
328 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
329#else
330 uint32_t fFlags = 0;
331#endif
332
333 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
334 {
335 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
336
337#ifdef VBOX_STRICT_VMM_STACK
338 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
339#else
340 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
341#endif
342 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
343 if (RT_SUCCESS(rc))
344 {
345#ifdef VBOX_STRICT_VMM_STACK
346 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
347#endif
348 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
349
350 }
351 }
352
353 return rc;
354}
355
356
357/**
358 * Initialize the loggers.
359 *
360 * @returns VBox status code.
361 * @param pVM The cross context VM structure.
362 */
363static int vmmR3InitLoggers(PVM pVM)
364{
365 int rc;
366#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
367
368 /*
369 * Allocate R0 Logger instance (finalized in the relocator).
370 */
371#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
372 PRTLOGGER pLogger = RTLogDefaultInstance();
373 if (pLogger)
374 {
375 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
376 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
377 {
378 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
379 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
380 (void **)&pVCpu->vmm.s.pR0LoggerR3);
381 if (RT_FAILURE(rc))
382 return rc;
383 pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
384 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
385 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
386 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
387 }
388 }
389#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
390
391 /*
392 * Release logging.
393 */
394 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
395 if (pRelLogger)
396 {
397 /*
398 * Ring-0 release logger.
399 */
400 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
401 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
402 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
403
404 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
405 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
406 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
407
408 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
409
410 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
411 {
412 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
413 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
414 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
415 if (RT_FAILURE(rc))
416 return rc;
417 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
418 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
419 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
420 pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
421 pVmmLogger->cbLogger = (uint32_t)cbLogger;
422 pVmmLogger->fCreated = false;
423 pVmmLogger->fFlushingDisabled = false;
424 pVmmLogger->fRegistered = false;
425 pVmmLogger->idCpu = idCpu;
426
427 char szR0ThreadName[16];
428 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
429 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
430 pfnLoggerWrapper, pfnLoggerFlush,
431 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
432 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
433
434 /* We only update the release log instance here. */
435 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
436 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
437 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
438
439 pVmmLogger->fCreated = true;
440 }
441 }
442
443 return VINF_SUCCESS;
444}
445
446
447/**
448 * VMMR3Init worker that register the statistics with STAM.
449 *
450 * @param pVM The cross context VM structure.
451 */
452static void vmmR3InitRegisterStats(PVM pVM)
453{
454 RT_NOREF_PV(pVM);
455
456 /*
457 * Statistics.
458 */
459 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
519 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
520 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
521 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
522
523#ifdef VBOX_WITH_STATISTICS
524 for (VMCPUID i = 0; i < pVM->cCpus; i++)
525 {
526 PVMCPU pVCpu = pVM->apCpusR3[i];
527 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
528 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
529 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
530 }
531#endif
532 for (VMCPUID i = 0; i < pVM->cCpus; i++)
533 {
534 PVMCPU pVCpu = pVM->apCpusR3[i];
535 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
536 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
537 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
538 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
539 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
540 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
541 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
542 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
543 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
544 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
545 }
546}
547
548
549/**
550 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
551 *
552 * @returns VBox status code.
553 * @param pVM The cross context VM structure.
554 * @param pVCpu The cross context per CPU structure.
555 * @thread EMT(pVCpu)
556 */
557static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
558{
559 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
560}
561
562
563/**
564 * Initializes the R0 VMM.
565 *
566 * @returns VBox status code.
567 * @param pVM The cross context VM structure.
568 */
569VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
570{
571 int rc;
572 PVMCPU pVCpu = VMMGetCpu(pVM);
573 Assert(pVCpu && pVCpu->idCpu == 0);
574
575#ifdef LOG_ENABLED
576 /*
577 * Initialize the ring-0 logger if we haven't done so yet.
578 */
579 if ( pVCpu->vmm.s.pR0LoggerR3
580 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
581 {
582 rc = VMMR3UpdateLoggers(pVM);
583 if (RT_FAILURE(rc))
584 return rc;
585 }
586#endif
587
588 /*
589 * Call Ring-0 entry with init code.
590 */
591 for (;;)
592 {
593#ifdef NO_SUPCALLR0VMM
594 //rc = VERR_GENERAL_FAILURE;
595 rc = VINF_SUCCESS;
596#else
597 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
598#endif
599 /*
600 * Flush the logs.
601 */
602#ifdef LOG_ENABLED
603 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
604#endif
605 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
606 if (rc != VINF_VMM_CALL_HOST)
607 break;
608 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
609 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
610 break;
611 /* Resume R0 */
612 }
613
614 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
615 {
616 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
617 if (RT_SUCCESS(rc))
618 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
619 }
620
621 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
622 if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
623 LogRel(("VMM: Enabled thread-context hooks\n"));
624 else
625 LogRel(("VMM: Thread-context hooks unavailable\n"));
626
627 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
628 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
629 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
630 else
631 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
632 if (pVM->vmm.s.fIsPreemptPossible)
633 LogRel(("VMM: Kernel preemption is possible\n"));
634 else
635 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
636
637 /*
638 * Send all EMTs to ring-0 to get their logger initialized.
639 */
640 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
641 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
642
643 return rc;
644}
645
646
647/**
648 * Called when an init phase completes.
649 *
650 * @returns VBox status code.
651 * @param pVM The cross context VM structure.
652 * @param enmWhat Which init phase.
653 */
654VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
655{
656 int rc = VINF_SUCCESS;
657
658 switch (enmWhat)
659 {
660 case VMINITCOMPLETED_RING3:
661 {
662#if 0 /* pointless when timers doesn't run on EMT */
663 /*
664 * Create the EMT yield timer.
665 */
666 rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
667 "EMT Yielder", &pVM->vmm.s.hYieldTimer);
668 AssertRCReturn(rc, rc);
669
670 rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
671 AssertRCReturn(rc, rc);
672#endif
673 break;
674 }
675
676 case VMINITCOMPLETED_HM:
677 {
678 /*
679 * Disable the periodic preemption timers if we can use the
680 * VMX-preemption timer instead.
681 */
682 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
683 && HMR3IsVmxPreemptionTimerUsed(pVM))
684 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
685 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
686
687 /*
688 * Last chance for GIM to update its CPUID leaves if it requires
689 * knowledge/information from HM initialization.
690 */
691 rc = GIMR3InitCompleted(pVM);
692 AssertRCReturn(rc, rc);
693
694 /*
695 * CPUM's post-initialization (print CPUIDs).
696 */
697 CPUMR3LogCpuIdAndMsrFeatures(pVM);
698 break;
699 }
700
701 default: /* shuts up gcc */
702 break;
703 }
704
705 return rc;
706}
707
708
709/**
710 * Terminate the VMM bits.
711 *
712 * @returns VBox status code.
713 * @param pVM The cross context VM structure.
714 */
715VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
716{
717 PVMCPU pVCpu = VMMGetCpu(pVM);
718 Assert(pVCpu && pVCpu->idCpu == 0);
719
720 /*
721 * Call Ring-0 entry with termination code.
722 */
723 int rc;
724 for (;;)
725 {
726#ifdef NO_SUPCALLR0VMM
727 //rc = VERR_GENERAL_FAILURE;
728 rc = VINF_SUCCESS;
729#else
730 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
731#endif
732 /*
733 * Flush the logs.
734 */
735#ifdef LOG_ENABLED
736 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
737#endif
738 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
739 if (rc != VINF_VMM_CALL_HOST)
740 break;
741 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
742 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
743 break;
744 /* Resume R0 */
745 }
746 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
747 {
748 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
749 if (RT_SUCCESS(rc))
750 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
751 }
752
753 for (VMCPUID i = 0; i < pVM->cCpus; i++)
754 {
755 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
756 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
757 }
758 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
759 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
760 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
761 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
762 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
763 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
764 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
765 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
766 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
767 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
768 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
769 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
770 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
771 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
772 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
773 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
774
775 vmmTermFormatTypes();
776 return rc;
777}
778
779
780/**
781 * Applies relocations to data and code managed by this
782 * component. This function will be called at init and
783 * whenever the VMM need to relocate it self inside the GC.
784 *
785 * The VMM will need to apply relocations to the core code.
786 *
787 * @param pVM The cross context VM structure.
788 * @param offDelta The relocation delta.
789 */
790VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
791{
792 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
793 RT_NOREF(offDelta);
794
795 /*
796 * Update the logger.
797 */
798 VMMR3UpdateLoggers(pVM);
799}
800
801
802/**
803 * Updates the settings for the RC and R0 loggers.
804 *
805 * @returns VBox status code.
806 * @param pVM The cross context VM structure.
807 */
808VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
809{
810 int rc = VINF_SUCCESS;
811
812#ifdef LOG_ENABLED
813 /*
814 * For the ring-0 EMT logger, we use a per-thread logger instance
815 * in ring-0. Only initialize it once.
816 */
817 PRTLOGGER const pDefault = RTLogDefaultInstance();
818 for (VMCPUID i = 0; i < pVM->cCpus; i++)
819 {
820 PVMCPU pVCpu = pVM->apCpusR3[i];
821 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
822 if (pR0LoggerR3)
823 {
824 if (!pR0LoggerR3->fCreated)
825 {
826 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
827 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
828 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
829
830 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
831 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
832 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
833
834 char szR0ThreadName[16];
835 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
836 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
837 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
838 pfnLoggerWrapper, pfnLoggerFlush,
839 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
840 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
841
842 pR0LoggerR3->idCpu = i;
843 pR0LoggerR3->fCreated = true;
844 pR0LoggerR3->fFlushingDisabled = false;
845 }
846
847 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
848 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
849 AssertRC(rc);
850 }
851 }
852#else
853 RT_NOREF(pVM);
854#endif
855
856 return rc;
857}
858
859
860/**
861 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
862 *
863 * @returns Pointer to the buffer.
864 * @param pVM The cross context VM structure.
865 */
866VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
867{
868 return pVM->vmm.s.szRing0AssertMsg1;
869}
870
871
872/**
873 * Returns the VMCPU of the specified virtual CPU.
874 *
875 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
876 *
877 * @param pUVM The user mode VM handle.
878 * @param idCpu The ID of the virtual CPU.
879 */
880VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
881{
882 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
883 AssertReturn(idCpu < pUVM->cCpus, NULL);
884 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
885 return pUVM->pVM->apCpusR3[idCpu];
886}
887
888
889/**
890 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
891 *
892 * @returns Pointer to the buffer.
893 * @param pVM The cross context VM structure.
894 */
895VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
896{
897 return pVM->vmm.s.szRing0AssertMsg2;
898}
899
900
901/**
902 * Execute state save operation.
903 *
904 * @returns VBox status code.
905 * @param pVM The cross context VM structure.
906 * @param pSSM SSM operation handle.
907 */
908static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
909{
910 LogFlow(("vmmR3Save:\n"));
911
912 /*
913 * Save the started/stopped state of all CPUs except 0 as it will always
914 * be running. This avoids breaking the saved state version. :-)
915 */
916 for (VMCPUID i = 1; i < pVM->cCpus; i++)
917 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
918
919 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
920}
921
922
923/**
924 * Execute state load operation.
925 *
926 * @returns VBox status code.
927 * @param pVM The cross context VM structure.
928 * @param pSSM SSM operation handle.
929 * @param uVersion Data layout version.
930 * @param uPass The data pass.
931 */
932static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
933{
934 LogFlow(("vmmR3Load:\n"));
935 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
936
937 /*
938 * Validate version.
939 */
940 if ( uVersion != VMM_SAVED_STATE_VERSION
941 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
942 {
943 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
944 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
945 }
946
947 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
948 {
949 /* Ignore the stack bottom, stack pointer and stack bits. */
950 RTRCPTR RCPtrIgnored;
951 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
952 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
953#ifdef RT_OS_DARWIN
954 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
955 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
956 && SSMR3HandleRevision(pSSM) >= 48858
957 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
958 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
959 )
960 SSMR3Skip(pSSM, 16384);
961 else
962 SSMR3Skip(pSSM, 8192);
963#else
964 SSMR3Skip(pSSM, 8192);
965#endif
966 }
967
968 /*
969 * Restore the VMCPU states. VCPU 0 is always started.
970 */
971 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
972 for (VMCPUID i = 1; i < pVM->cCpus; i++)
973 {
974 bool fStarted;
975 int rc = SSMR3GetBool(pSSM, &fStarted);
976 if (RT_FAILURE(rc))
977 return rc;
978 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
979 }
980
981 /* terminator */
982 uint32_t u32;
983 int rc = SSMR3GetU32(pSSM, &u32);
984 if (RT_FAILURE(rc))
985 return rc;
986 if (u32 != UINT32_MAX)
987 {
988 AssertMsgFailed(("u32=%#x\n", u32));
989 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
990 }
991 return VINF_SUCCESS;
992}
993
994
995/**
996 * Suspends the CPU yielder.
997 *
998 * @param pVM The cross context VM structure.
999 */
1000VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1001{
1002#if 0 /* pointless when timers doesn't run on EMT */
1003 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1004 if (!pVM->vmm.s.cYieldResumeMillies)
1005 {
1006 uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1007 uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1008 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1009 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1010 else
1011 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1012 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1013 }
1014 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1015#else
1016 RT_NOREF(pVM);
1017#endif
1018}
1019
1020
1021/**
1022 * Stops the CPU yielder.
1023 *
1024 * @param pVM The cross context VM structure.
1025 */
1026VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1027{
1028#if 0 /* pointless when timers doesn't run on EMT */
1029 if (!pVM->vmm.s.cYieldResumeMillies)
1030 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1031 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1032 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1033#else
1034 RT_NOREF(pVM);
1035#endif
1036}
1037
1038
1039/**
1040 * Resumes the CPU yielder when it has been a suspended or stopped.
1041 *
1042 * @param pVM The cross context VM structure.
1043 */
1044VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1045{
1046#if 0 /* pointless when timers doesn't run on EMT */
1047 if (pVM->vmm.s.cYieldResumeMillies)
1048 {
1049 TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1050 pVM->vmm.s.cYieldResumeMillies = 0;
1051 }
1052#else
1053 RT_NOREF(pVM);
1054#endif
1055}
1056
1057
1058#if 0 /* pointless when timers doesn't run on EMT */
1059/**
1060 * @callback_method_impl{FNTMTIMERINT, EMT yielder}
1061 *
1062 * @todo This is a UNI core/thread thing, really... Should be reconsidered.
1063 */
1064static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1065{
1066 NOREF(pvUser);
1067
1068 /*
1069 * This really needs some careful tuning. While we shouldn't be too greedy since
1070 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1071 * because that'll cause us to stop up.
1072 *
1073 * The current logic is to use the default interval when there is no lag worth
1074 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1075 *
1076 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1077 * so the lag is up to date.)
1078 */
1079 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1080 if ( u64Lag < 50000000 /* 50ms */
1081 || ( u64Lag < 1000000000 /* 1s */
1082 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1083 )
1084 {
1085 uint64_t u64Elapsed = RTTimeNanoTS();
1086 pVM->vmm.s.u64LastYield = u64Elapsed;
1087
1088 RTThreadYield();
1089
1090#ifdef LOG_ENABLED
1091 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1092 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1093#endif
1094 }
1095 TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1096}
1097#endif
1098
1099
1100/**
1101 * Executes guest code (Intel VT-x and AMD-V).
1102 *
1103 * @param pVM The cross context VM structure.
1104 * @param pVCpu The cross context virtual CPU structure.
1105 */
1106VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1107{
1108 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1109
1110 for (;;)
1111 {
1112 int rc;
1113 do
1114 {
1115#ifdef NO_SUPCALLR0VMM
1116 rc = VERR_GENERAL_FAILURE;
1117#else
1118 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1119 if (RT_LIKELY(rc == VINF_SUCCESS))
1120 rc = pVCpu->vmm.s.iLastGZRc;
1121#endif
1122 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1123
1124#if 0 /** @todo triggers too often */
1125 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1126#endif
1127
1128 /*
1129 * Flush the logs
1130 */
1131#ifdef LOG_ENABLED
1132 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1133#endif
1134 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1135 if (rc != VINF_VMM_CALL_HOST)
1136 {
1137 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1138 return rc;
1139 }
1140 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1141 if (RT_FAILURE(rc))
1142 return rc;
1143 /* Resume R0 */
1144 }
1145}
1146
1147
1148/**
1149 * Perform one of the fast I/O control VMMR0 operation.
1150 *
1151 * @returns VBox strict status code.
1152 * @param pVM The cross context VM structure.
1153 * @param pVCpu The cross context virtual CPU structure.
1154 * @param enmOperation The operation to perform.
1155 */
1156VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1157{
1158 for (;;)
1159 {
1160 VBOXSTRICTRC rcStrict;
1161 do
1162 {
1163#ifdef NO_SUPCALLR0VMM
1164 rcStrict = VERR_GENERAL_FAILURE;
1165#else
1166 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1167 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1168 rcStrict = pVCpu->vmm.s.iLastGZRc;
1169#endif
1170 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1171
1172 /*
1173 * Flush the logs
1174 */
1175#ifdef LOG_ENABLED
1176 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1177#endif
1178 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1179 if (rcStrict != VINF_VMM_CALL_HOST)
1180 return rcStrict;
1181 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1182 if (RT_FAILURE(rc))
1183 return rc;
1184 /* Resume R0 */
1185 }
1186}
1187
1188
1189/**
1190 * VCPU worker for VMMR3SendStartupIpi.
1191 *
1192 * @param pVM The cross context VM structure.
1193 * @param idCpu Virtual CPU to perform SIPI on.
1194 * @param uVector The SIPI vector.
1195 */
1196static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1197{
1198 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1199 VMCPU_ASSERT_EMT(pVCpu);
1200
1201 /*
1202 * In the INIT state, the target CPU is only responsive to an SIPI.
1203 * This is also true for when when the CPU is in VMX non-root mode.
1204 *
1205 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1206 * See Intel spec. 26.6.2 "Activity State".
1207 */
1208 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1209 return VINF_SUCCESS;
1210
1211 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1212#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1213 if (CPUMIsGuestInVmxRootMode(pCtx))
1214 {
1215 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1216 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1217 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1218
1219 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1220 return VINF_SUCCESS;
1221 }
1222#endif
1223
1224 pCtx->cs.Sel = uVector << 8;
1225 pCtx->cs.ValidSel = uVector << 8;
1226 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1227 pCtx->cs.u64Base = uVector << 12;
1228 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1229 pCtx->rip = 0;
1230
1231 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1232
1233# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1234 EMSetState(pVCpu, EMSTATE_HALTED);
1235 return VINF_EM_RESCHEDULE;
1236# else /* And if we go the VMCPU::enmState way it can stay here. */
1237 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1238 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1239 return VINF_SUCCESS;
1240# endif
1241}
1242
1243
1244/**
1245 * VCPU worker for VMMR3SendInitIpi.
1246 *
1247 * @returns VBox status code.
1248 * @param pVM The cross context VM structure.
1249 * @param idCpu Virtual CPU to perform SIPI on.
1250 */
1251static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1252{
1253 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1254 VMCPU_ASSERT_EMT(pVCpu);
1255
1256 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1257
1258 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1259 * wait-for-SIPI state. Verify. */
1260
1261 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1262#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1263 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1264 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1265 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1266#endif
1267
1268 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1269 * IPI (e.g. SVM_EXIT_INIT). */
1270
1271 PGMR3ResetCpu(pVM, pVCpu);
1272 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1273 APICR3InitIpi(pVCpu);
1274 TRPMR3ResetCpu(pVCpu);
1275 CPUMR3ResetCpu(pVM, pVCpu);
1276 EMR3ResetCpu(pVCpu);
1277 HMR3ResetCpu(pVCpu);
1278 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1279
1280 /* This will trickle up on the target EMT. */
1281 return VINF_EM_WAIT_SIPI;
1282}
1283
1284
1285/**
1286 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1287 * vector-dependent state and unhalting processor.
1288 *
1289 * @param pVM The cross context VM structure.
1290 * @param idCpu Virtual CPU to perform SIPI on.
1291 * @param uVector SIPI vector.
1292 */
1293VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1294{
1295 AssertReturnVoid(idCpu < pVM->cCpus);
1296
1297 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1298 AssertRC(rc);
1299}
1300
1301
1302/**
1303 * Sends init IPI to the virtual CPU.
1304 *
1305 * @param pVM The cross context VM structure.
1306 * @param idCpu Virtual CPU to perform int IPI on.
1307 */
1308VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1309{
1310 AssertReturnVoid(idCpu < pVM->cCpus);
1311
1312 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1313 AssertRC(rc);
1314}
1315
1316
1317/**
1318 * Registers the guest memory range that can be used for patching.
1319 *
1320 * @returns VBox status code.
1321 * @param pVM The cross context VM structure.
1322 * @param pPatchMem Patch memory range.
1323 * @param cbPatchMem Size of the memory range.
1324 */
1325VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1326{
1327 VM_ASSERT_EMT(pVM);
1328 if (HMIsEnabled(pVM))
1329 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1330
1331 return VERR_NOT_SUPPORTED;
1332}
1333
1334
1335/**
1336 * Deregisters the guest memory range that can be used for patching.
1337 *
1338 * @returns VBox status code.
1339 * @param pVM The cross context VM structure.
1340 * @param pPatchMem Patch memory range.
1341 * @param cbPatchMem Size of the memory range.
1342 */
1343VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1344{
1345 if (HMIsEnabled(pVM))
1346 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1347
1348 return VINF_SUCCESS;
1349}
1350
1351
1352/**
1353 * Common recursion handler for the other EMTs.
1354 *
1355 * @returns Strict VBox status code.
1356 * @param pVM The cross context VM structure.
1357 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1358 * @param rcStrict Current status code to be combined with the one
1359 * from this recursion and returned.
1360 */
1361static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1362{
1363 int rc2;
1364
1365 /*
1366 * We wait here while the initiator of this recursion reconfigures
1367 * everything. The last EMT to get in signals the initiator.
1368 */
1369 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1370 {
1371 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1372 AssertLogRelRC(rc2);
1373 }
1374
1375 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1376 AssertLogRelRC(rc2);
1377
1378 /*
1379 * Do the normal rendezvous processing.
1380 */
1381 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1382 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1383
1384 /*
1385 * Wait for the initiator to restore everything.
1386 */
1387 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1388 AssertLogRelRC(rc2);
1389
1390 /*
1391 * Last thread out of here signals the initiator.
1392 */
1393 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1394 {
1395 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1396 AssertLogRelRC(rc2);
1397 }
1398
1399 /*
1400 * Merge status codes and return.
1401 */
1402 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1403 if ( rcStrict2 != VINF_SUCCESS
1404 && ( rcStrict == VINF_SUCCESS
1405 || rcStrict > rcStrict2))
1406 rcStrict = rcStrict2;
1407 return rcStrict;
1408}
1409
1410
1411/**
1412 * Count returns and have the last non-caller EMT wake up the caller.
1413 *
1414 * @returns VBox strict informational status code for EM scheduling. No failures
1415 * will be returned here, those are for the caller only.
1416 *
1417 * @param pVM The cross context VM structure.
1418 * @param rcStrict The current accumulated recursive status code,
1419 * to be merged with i32RendezvousStatus and
1420 * returned.
1421 */
1422DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1423{
1424 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1425
1426 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1427 if (cReturned == pVM->cCpus - 1U)
1428 {
1429 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1430 AssertLogRelRC(rc);
1431 }
1432
1433 /*
1434 * Merge the status codes, ignoring error statuses in this code path.
1435 */
1436 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1437 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1438 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1439 VERR_IPE_UNEXPECTED_INFO_STATUS);
1440
1441 if (RT_SUCCESS(rcStrict2))
1442 {
1443 if ( rcStrict2 != VINF_SUCCESS
1444 && ( rcStrict == VINF_SUCCESS
1445 || rcStrict > rcStrict2))
1446 rcStrict = rcStrict2;
1447 }
1448 return rcStrict;
1449}
1450
1451
1452/**
1453 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1454 *
1455 * @returns VBox strict informational status code for EM scheduling. No failures
1456 * will be returned here, those are for the caller only. When
1457 * fIsCaller is set, VINF_SUCCESS is always returned.
1458 *
1459 * @param pVM The cross context VM structure.
1460 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1461 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1462 * not.
1463 * @param fFlags The flags.
1464 * @param pfnRendezvous The callback.
1465 * @param pvUser The user argument for the callback.
1466 */
1467static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1468 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1469{
1470 int rc;
1471 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1472
1473 /*
1474 * Enter, the last EMT triggers the next callback phase.
1475 */
1476 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1477 if (cEntered != pVM->cCpus)
1478 {
1479 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1480 {
1481 /* Wait for our turn. */
1482 for (;;)
1483 {
1484 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1485 AssertLogRelRC(rc);
1486 if (!pVM->vmm.s.fRendezvousRecursion)
1487 break;
1488 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1489 }
1490 }
1491 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1492 {
1493 /* Wait for the last EMT to arrive and wake everyone up. */
1494 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1495 AssertLogRelRC(rc);
1496 Assert(!pVM->vmm.s.fRendezvousRecursion);
1497 }
1498 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1499 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1500 {
1501 /* Wait for our turn. */
1502 for (;;)
1503 {
1504 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1505 AssertLogRelRC(rc);
1506 if (!pVM->vmm.s.fRendezvousRecursion)
1507 break;
1508 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1509 }
1510 }
1511 else
1512 {
1513 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1514
1515 /*
1516 * The execute once is handled specially to optimize the code flow.
1517 *
1518 * The last EMT to arrive will perform the callback and the other
1519 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1520 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1521 * returns, that EMT will initiate the normal return sequence.
1522 */
1523 if (!fIsCaller)
1524 {
1525 for (;;)
1526 {
1527 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1528 AssertLogRelRC(rc);
1529 if (!pVM->vmm.s.fRendezvousRecursion)
1530 break;
1531 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1532 }
1533
1534 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1535 }
1536 return VINF_SUCCESS;
1537 }
1538 }
1539 else
1540 {
1541 /*
1542 * All EMTs are waiting, clear the FF and take action according to the
1543 * execution method.
1544 */
1545 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1546
1547 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1548 {
1549 /* Wake up everyone. */
1550 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1551 AssertLogRelRC(rc);
1552 }
1553 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1554 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1555 {
1556 /* Figure out who to wake up and wake it up. If it's ourself, then
1557 it's easy otherwise wait for our turn. */
1558 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1559 ? 0
1560 : pVM->cCpus - 1U;
1561 if (pVCpu->idCpu != iFirst)
1562 {
1563 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1564 AssertLogRelRC(rc);
1565 for (;;)
1566 {
1567 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1568 AssertLogRelRC(rc);
1569 if (!pVM->vmm.s.fRendezvousRecursion)
1570 break;
1571 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1572 }
1573 }
1574 }
1575 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1576 }
1577
1578
1579 /*
1580 * Do the callback and update the status if necessary.
1581 */
1582 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1583 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1584 {
1585 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1586 if (rcStrict2 != VINF_SUCCESS)
1587 {
1588 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1589 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1590 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1591 int32_t i32RendezvousStatus;
1592 do
1593 {
1594 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1595 if ( rcStrict2 == i32RendezvousStatus
1596 || RT_FAILURE(i32RendezvousStatus)
1597 || ( i32RendezvousStatus != VINF_SUCCESS
1598 && rcStrict2 > i32RendezvousStatus))
1599 break;
1600 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1601 }
1602 }
1603
1604 /*
1605 * Increment the done counter and take action depending on whether we're
1606 * the last to finish callback execution.
1607 */
1608 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1609 if ( cDone != pVM->cCpus
1610 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1611 {
1612 /* Signal the next EMT? */
1613 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1614 {
1615 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1616 AssertLogRelRC(rc);
1617 }
1618 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1619 {
1620 Assert(cDone == pVCpu->idCpu + 1U);
1621 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1622 AssertLogRelRC(rc);
1623 }
1624 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1625 {
1626 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1627 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1628 AssertLogRelRC(rc);
1629 }
1630
1631 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1632 if (!fIsCaller)
1633 {
1634 for (;;)
1635 {
1636 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1637 AssertLogRelRC(rc);
1638 if (!pVM->vmm.s.fRendezvousRecursion)
1639 break;
1640 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1641 }
1642 }
1643 }
1644 else
1645 {
1646 /* Callback execution is all done, tell the rest to return. */
1647 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1648 AssertLogRelRC(rc);
1649 }
1650
1651 if (!fIsCaller)
1652 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1653 return rcStrictRecursion;
1654}
1655
1656
1657/**
1658 * Called in response to VM_FF_EMT_RENDEZVOUS.
1659 *
1660 * @returns VBox strict status code - EM scheduling. No errors will be returned
1661 * here, nor will any non-EM scheduling status codes be returned.
1662 *
1663 * @param pVM The cross context VM structure.
1664 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1665 *
1666 * @thread EMT
1667 */
1668VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1669{
1670 Assert(!pVCpu->vmm.s.fInRendezvous);
1671 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1672 pVCpu->vmm.s.fInRendezvous = true;
1673 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1674 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1675 pVCpu->vmm.s.fInRendezvous = false;
1676 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1677 return VBOXSTRICTRC_TODO(rcStrict);
1678}
1679
1680
1681/**
1682 * Helper for resetting an single wakeup event sempahore.
1683 *
1684 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1685 * @param hEvt The event semaphore to reset.
1686 */
1687static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1688{
1689 for (uint32_t cLoops = 0; ; cLoops++)
1690 {
1691 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1692 if (rc != VINF_SUCCESS || cLoops > _4K)
1693 return rc;
1694 }
1695}
1696
1697
1698/**
1699 * Worker for VMMR3EmtRendezvous that handles recursion.
1700 *
1701 * @returns VBox strict status code. This will be the first error,
1702 * VINF_SUCCESS, or an EM scheduling status code.
1703 *
1704 * @param pVM The cross context VM structure.
1705 * @param pVCpu The cross context virtual CPU structure of the
1706 * calling EMT.
1707 * @param fFlags Flags indicating execution methods. See
1708 * grp_VMMR3EmtRendezvous_fFlags.
1709 * @param pfnRendezvous The callback.
1710 * @param pvUser User argument for the callback.
1711 *
1712 * @thread EMT(pVCpu)
1713 */
1714static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1715 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1716{
1717 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1718 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1719 Assert(pVCpu->vmm.s.fInRendezvous);
1720
1721 /*
1722 * Save the current state.
1723 */
1724 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1725 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1726 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1727 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1728 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1729
1730 /*
1731 * Check preconditions and save the current state.
1732 */
1733 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1734 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1735 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1736 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1737 VERR_INTERNAL_ERROR);
1738 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1739 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1740
1741 /*
1742 * Reset the recursion prep and pop semaphores.
1743 */
1744 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1745 AssertLogRelRCReturn(rc, rc);
1746 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1747 AssertLogRelRCReturn(rc, rc);
1748 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1749 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1750 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1751 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1752
1753 /*
1754 * Usher the other thread into the recursion routine.
1755 */
1756 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1757 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1758
1759 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1760 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1761 while (cLeft-- > 0)
1762 {
1763 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1764 AssertLogRelRC(rc);
1765 }
1766 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1767 {
1768 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1769 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1770 {
1771 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1772 AssertLogRelRC(rc);
1773 }
1774 }
1775 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1776 {
1777 Assert(cLeft == pVCpu->idCpu);
1778 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1779 {
1780 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1781 AssertLogRelRC(rc);
1782 }
1783 }
1784 else
1785 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1786 VERR_INTERNAL_ERROR_4);
1787
1788 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1789 AssertLogRelRC(rc);
1790 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1791 AssertLogRelRC(rc);
1792
1793
1794 /*
1795 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1796 */
1797 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1798 {
1799 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1800 AssertLogRelRC(rc);
1801 }
1802
1803 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1804
1805 /*
1806 * Clear the slate and setup the new rendezvous.
1807 */
1808 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1809 {
1810 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1811 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1812 }
1813 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1814 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1815 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1816 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1817
1818 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1819 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1820 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1821 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1822 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1823 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1824 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1825 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1826
1827 /*
1828 * We're ready to go now, do normal rendezvous processing.
1829 */
1830 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1831 AssertLogRelRC(rc);
1832
1833 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1834
1835 /*
1836 * The caller waits for the other EMTs to be done, return and waiting on the
1837 * pop semaphore.
1838 */
1839 for (;;)
1840 {
1841 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1842 AssertLogRelRC(rc);
1843 if (!pVM->vmm.s.fRendezvousRecursion)
1844 break;
1845 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1846 }
1847
1848 /*
1849 * Get the return code and merge it with the above recursion status.
1850 */
1851 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1852 if ( rcStrict2 != VINF_SUCCESS
1853 && ( rcStrict == VINF_SUCCESS
1854 || rcStrict > rcStrict2))
1855 rcStrict = rcStrict2;
1856
1857 /*
1858 * Restore the parent rendezvous state.
1859 */
1860 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1861 {
1862 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1863 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1864 }
1865 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1866 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1867 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1868 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1869
1870 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1871 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1872 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1873 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1874 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1875 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1876 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1877
1878 /*
1879 * Usher the other EMTs back to their parent recursion routine, waiting
1880 * for them to all get there before we return (makes sure they've been
1881 * scheduled and are past the pop event sem, see below).
1882 */
1883 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1884 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1885 AssertLogRelRC(rc);
1886
1887 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1888 {
1889 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1890 AssertLogRelRC(rc);
1891 }
1892
1893 /*
1894 * We must reset the pop semaphore on the way out (doing the pop caller too,
1895 * just in case). The parent may be another recursion.
1896 */
1897 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1898 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1899
1900 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1901
1902 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1903 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1904 return rcStrict;
1905}
1906
1907
1908/**
1909 * EMT rendezvous.
1910 *
1911 * Gathers all the EMTs and execute some code on each of them, either in a one
1912 * by one fashion or all at once.
1913 *
1914 * @returns VBox strict status code. This will be the first error,
1915 * VINF_SUCCESS, or an EM scheduling status code.
1916 *
1917 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1918 * doesn't support it or if the recursion is too deep.
1919 *
1920 * @param pVM The cross context VM structure.
1921 * @param fFlags Flags indicating execution methods. See
1922 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1923 * descending and ascending rendezvous types support
1924 * recursion from inside @a pfnRendezvous.
1925 * @param pfnRendezvous The callback.
1926 * @param pvUser User argument for the callback.
1927 *
1928 * @thread Any.
1929 */
1930VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1931{
1932 /*
1933 * Validate input.
1934 */
1935 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1936 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1937 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1938 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1939 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1940 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1941 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1942 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1943
1944 VBOXSTRICTRC rcStrict;
1945 PVMCPU pVCpu = VMMGetCpu(pVM);
1946 if (!pVCpu)
1947 {
1948 /*
1949 * Forward the request to an EMT thread.
1950 */
1951 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1952 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1953 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1954 else
1955 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1956 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1957 }
1958 else if ( pVM->cCpus == 1
1959 || ( pVM->enmVMState == VMSTATE_DESTROYING
1960 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1961 {
1962 /*
1963 * Shortcut for the single EMT case.
1964 *
1965 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1966 * during vmR3Destroy after other emulation threads have started terminating.
1967 */
1968 if (!pVCpu->vmm.s.fInRendezvous)
1969 {
1970 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1971 pVCpu->vmm.s.fInRendezvous = true;
1972 pVM->vmm.s.fRendezvousFlags = fFlags;
1973 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1974 pVCpu->vmm.s.fInRendezvous = false;
1975 }
1976 else
1977 {
1978 /* Recursion. Do the same checks as in the SMP case. */
1979 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1980 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1981 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1982 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1983 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1984 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1985 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1986 , VERR_DEADLOCK);
1987
1988 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1989 pVM->vmm.s.cRendezvousRecursions++;
1990 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1991 pVM->vmm.s.fRendezvousFlags = fFlags;
1992
1993 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1994
1995 pVM->vmm.s.fRendezvousFlags = fParentFlags;
1996 pVM->vmm.s.cRendezvousRecursions--;
1997 }
1998 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1999 }
2000 else
2001 {
2002 /*
2003 * Spin lock. If busy, check for recursion, if not recursing wait for
2004 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2005 */
2006 int rc;
2007 rcStrict = VINF_SUCCESS;
2008 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2009 {
2010 /* Allow recursion in some cases. */
2011 if ( pVCpu->vmm.s.fInRendezvous
2012 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2013 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2014 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2015 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2016 ))
2017 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2018
2019 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2020 VERR_DEADLOCK);
2021
2022 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2023 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2024 {
2025 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2026 {
2027 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2028 if ( rc != VINF_SUCCESS
2029 && ( rcStrict == VINF_SUCCESS
2030 || rcStrict > rc))
2031 rcStrict = rc;
2032 /** @todo Perhaps deal with termination here? */
2033 }
2034 ASMNopPause();
2035 }
2036 }
2037
2038 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2039 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2040 Assert(!pVCpu->vmm.s.fInRendezvous);
2041 pVCpu->vmm.s.fInRendezvous = true;
2042
2043 /*
2044 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2045 */
2046 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2047 {
2048 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2049 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2050 }
2051 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2052 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2053 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2054 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2055 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2056 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2057 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2058 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2059 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2060 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2061 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2062
2063 /*
2064 * Set the FF and poke the other EMTs.
2065 */
2066 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2067 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2068
2069 /*
2070 * Do the same ourselves.
2071 */
2072 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2073
2074 /*
2075 * The caller waits for the other EMTs to be done and return before doing
2076 * the cleanup. This makes away with wakeup / reset races we would otherwise
2077 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2078 */
2079 for (;;)
2080 {
2081 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2082 AssertLogRelRC(rc);
2083 if (!pVM->vmm.s.fRendezvousRecursion)
2084 break;
2085 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2086 }
2087
2088 /*
2089 * Get the return code and clean up a little bit.
2090 */
2091 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2092 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2093
2094 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2095 pVCpu->vmm.s.fInRendezvous = false;
2096
2097 /*
2098 * Merge rcStrict, rcStrict2 and rcStrict3.
2099 */
2100 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2101 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2102 if ( rcStrict2 != VINF_SUCCESS
2103 && ( rcStrict == VINF_SUCCESS
2104 || rcStrict > rcStrict2))
2105 rcStrict = rcStrict2;
2106 if ( rcStrict3 != VINF_SUCCESS
2107 && ( rcStrict == VINF_SUCCESS
2108 || rcStrict > rcStrict3))
2109 rcStrict = rcStrict3;
2110 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2111 }
2112
2113 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2114 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2115 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2116 VERR_IPE_UNEXPECTED_INFO_STATUS);
2117 return VBOXSTRICTRC_VAL(rcStrict);
2118}
2119
2120
2121/**
2122 * Interface for vmR3SetHaltMethodU.
2123 *
2124 * @param pVCpu The cross context virtual CPU structure of the
2125 * calling EMT.
2126 * @param fMayHaltInRing0 The new state.
2127 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2128 * @thread EMT(pVCpu)
2129 *
2130 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2131 * component.
2132 */
2133VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2134{
2135 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2136 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2137}
2138
2139
2140/**
2141 * Read from the ring 0 jump buffer stack.
2142 *
2143 * @returns VBox status code.
2144 *
2145 * @param pVM The cross context VM structure.
2146 * @param idCpu The ID of the source CPU context (for the address).
2147 * @param R0Addr Where to start reading.
2148 * @param pvBuf Where to store the data we've read.
2149 * @param cbRead The number of bytes to read.
2150 */
2151VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2152{
2153 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2154 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2155 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2156
2157 int rc;
2158#ifdef VMM_R0_SWITCH_STACK
2159 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2160#else
2161 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2162#endif
2163 if ( off < VMM_STACK_SIZE
2164 && off + cbRead <= VMM_STACK_SIZE)
2165 {
2166 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2167 rc = VINF_SUCCESS;
2168 }
2169 else
2170 rc = VERR_INVALID_POINTER;
2171
2172 /* Supply the setjmp return RIP/EIP. */
2173 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2174 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2175 {
2176 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2177 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2178 size_t offDst = 0;
2179 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2180 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2181 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2182 {
2183 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2184 Assert(offSrc < cbSrc);
2185 pbSrc -= offSrc;
2186 cbSrc -= offSrc;
2187 }
2188 if (cbSrc > cbRead - offDst)
2189 cbSrc = cbRead - offDst;
2190 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2191
2192 if (cbSrc == cbRead)
2193 rc = VINF_SUCCESS;
2194 }
2195
2196 return rc;
2197}
2198
2199
2200/**
2201 * Used by the DBGF stack unwinder to initialize the register state.
2202 *
2203 * @param pUVM The user mode VM handle.
2204 * @param idCpu The ID of the CPU being unwound.
2205 * @param pState The unwind state to initialize.
2206 */
2207VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2208{
2209 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2210 AssertReturnVoid(pVCpu);
2211
2212 /*
2213 * Locate the resume point on the stack.
2214 */
2215#ifdef VMM_R0_SWITCH_STACK
2216 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2217 AssertReturnVoid(off < VMM_STACK_SIZE);
2218#else
2219 uintptr_t off = 0;
2220#endif
2221
2222#ifdef RT_ARCH_AMD64
2223 /*
2224 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2225 */
2226# ifdef VBOX_STRICT
2227 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2228 off += 8; /* RESUME_MAGIC */
2229# endif
2230# ifdef RT_OS_WINDOWS
2231 off += 0xa0; /* XMM6 thru XMM15 */
2232# endif
2233 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2234 off += 8;
2235 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2236 off += 8;
2237# ifdef RT_OS_WINDOWS
2238 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2239 off += 8;
2240 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2241 off += 8;
2242# endif
2243 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2244 off += 8;
2245 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2246 off += 8;
2247 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2248 off += 8;
2249 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2250 off += 8;
2251 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2252 off += 8;
2253 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2254 off += 8;
2255
2256#elif defined(RT_ARCH_X86)
2257 /*
2258 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2259 */
2260# ifdef VBOX_STRICT
2261 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2262 off += 4; /* RESUME_MAGIC */
2263# endif
2264 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2265 off += 4;
2266 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2267 off += 4;
2268 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2269 off += 4;
2270 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2271 off += 4;
2272 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2273 off += 4;
2274 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2275 off += 4;
2276#else
2277# error "Port me"
2278#endif
2279
2280 /*
2281 * This is all we really need here, though the above helps if the assembly
2282 * doesn't contain unwind info (currently only on win/64, so that is useful).
2283 */
2284 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2285 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2286}
2287
2288
2289/**
2290 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2291 *
2292 * @returns VBox status code.
2293 * @param pVM The cross context VM structure.
2294 * @param uOperation Operation to execute.
2295 * @param u64Arg Constant argument.
2296 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2297 * details.
2298 */
2299VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2300{
2301 PVMCPU pVCpu = VMMGetCpu(pVM);
2302 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2303 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2304}
2305
2306
2307/**
2308 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2309 *
2310 * @returns VBox status code.
2311 * @param pVM The cross context VM structure.
2312 * @param pVCpu The cross context VM structure.
2313 * @param enmOperation Operation to execute.
2314 * @param u64Arg Constant argument.
2315 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2316 * details.
2317 */
2318VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2319{
2320 int rc;
2321 for (;;)
2322 {
2323#ifdef NO_SUPCALLR0VMM
2324 rc = VERR_GENERAL_FAILURE;
2325#else
2326 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2327#endif
2328 /*
2329 * Flush the logs.
2330 */
2331#ifdef LOG_ENABLED
2332 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2333#endif
2334 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2335 if (rc != VINF_VMM_CALL_HOST)
2336 break;
2337 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2338 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2339 break;
2340 /* Resume R0 */
2341 }
2342
2343 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2344 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2345 VERR_IPE_UNEXPECTED_INFO_STATUS);
2346 return rc;
2347}
2348
2349
2350/**
2351 * Service a call to the ring-3 host code.
2352 *
2353 * @returns VBox status code.
2354 * @param pVM The cross context VM structure.
2355 * @param pVCpu The cross context virtual CPU structure.
2356 * @remarks Careful with critsects.
2357 */
2358static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2359{
2360 /*
2361 * We must also check for pending critsect exits or else we can deadlock
2362 * when entering other critsects here.
2363 */
2364 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2365 PDMCritSectBothFF(pVCpu);
2366
2367 switch (pVCpu->vmm.s.enmCallRing3Operation)
2368 {
2369 /*
2370 * Acquire a critical section.
2371 */
2372 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2373 {
2374 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2375 true /*fCallRing3*/);
2376 break;
2377 }
2378
2379 /*
2380 * Enter a r/w critical section exclusively.
2381 */
2382 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2383 {
2384 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2385 true /*fCallRing3*/);
2386 break;
2387 }
2388
2389 /*
2390 * Enter a r/w critical section shared.
2391 */
2392 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2393 {
2394 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2395 true /*fCallRing3*/);
2396 break;
2397 }
2398
2399 /*
2400 * Acquire the PDM lock.
2401 */
2402 case VMMCALLRING3_PDM_LOCK:
2403 {
2404 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2405 break;
2406 }
2407
2408 /*
2409 * Grow the PGM pool.
2410 */
2411 case VMMCALLRING3_PGM_POOL_GROW:
2412 {
2413 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2414 break;
2415 }
2416
2417 /*
2418 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2419 */
2420 case VMMCALLRING3_PGM_MAP_CHUNK:
2421 {
2422 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2423 break;
2424 }
2425
2426 /*
2427 * Allocates more handy pages.
2428 */
2429 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2430 {
2431 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2432 break;
2433 }
2434
2435 /*
2436 * Allocates a large page.
2437 */
2438 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2439 {
2440 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2441 break;
2442 }
2443
2444 /*
2445 * Acquire the PGM lock.
2446 */
2447 case VMMCALLRING3_PGM_LOCK:
2448 {
2449 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2450 break;
2451 }
2452
2453 /*
2454 * Acquire the MM hypervisor heap lock.
2455 */
2456 case VMMCALLRING3_MMHYPER_LOCK:
2457 {
2458 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2459 break;
2460 }
2461
2462 /*
2463 * This is a noop. We just take this route to avoid unnecessary
2464 * tests in the loops.
2465 */
2466 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2467 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2468 LogAlways(("*FLUSH*\n"));
2469 break;
2470
2471 /*
2472 * Set the VM error message.
2473 */
2474 case VMMCALLRING3_VM_SET_ERROR:
2475 VMR3SetErrorWorker(pVM);
2476 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2477 break;
2478
2479 /*
2480 * Set the VM runtime error message.
2481 */
2482 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2483 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2484 break;
2485
2486 /*
2487 * Signal a ring 0 hypervisor assertion.
2488 * Cancel the longjmp operation that's in progress.
2489 */
2490 case VMMCALLRING3_VM_R0_ASSERTION:
2491 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2492 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2493#ifdef RT_ARCH_X86
2494 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2495#else
2496 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2497#endif
2498#ifdef VMM_R0_SWITCH_STACK
2499 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2500#endif
2501 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2502 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2503 return VERR_VMM_RING0_ASSERTION;
2504
2505 /*
2506 * A forced switch to ring 0 for preemption purposes.
2507 */
2508 case VMMCALLRING3_VM_R0_PREEMPT:
2509 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2510 break;
2511
2512 default:
2513 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2514 return VERR_VMM_UNKNOWN_RING3_CALL;
2515 }
2516
2517 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2518 return VINF_SUCCESS;
2519}
2520
2521
2522/**
2523 * Displays the Force action Flags.
2524 *
2525 * @param pVM The cross context VM structure.
2526 * @param pHlp The output helpers.
2527 * @param pszArgs The additional arguments (ignored).
2528 */
2529static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2530{
2531 int c;
2532 uint32_t f;
2533 NOREF(pszArgs);
2534
2535#define PRINT_FLAG(prf,flag) do { \
2536 if (f & (prf##flag)) \
2537 { \
2538 static const char *s_psz = #flag; \
2539 if (!(c % 6)) \
2540 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2541 else \
2542 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2543 c++; \
2544 f &= ~(prf##flag); \
2545 } \
2546 } while (0)
2547
2548#define PRINT_GROUP(prf,grp,sfx) do { \
2549 if (f & (prf##grp##sfx)) \
2550 { \
2551 static const char *s_psz = #grp; \
2552 if (!(c % 5)) \
2553 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2554 else \
2555 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2556 c++; \
2557 } \
2558 } while (0)
2559
2560 /*
2561 * The global flags.
2562 */
2563 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2564 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2565
2566 /* show the flag mnemonics */
2567 c = 0;
2568 f = fGlobalForcedActions;
2569 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2570 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2571 PRINT_FLAG(VM_FF_,PDM_DMA);
2572 PRINT_FLAG(VM_FF_,DBGF);
2573 PRINT_FLAG(VM_FF_,REQUEST);
2574 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2575 PRINT_FLAG(VM_FF_,RESET);
2576 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2577 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2578 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2579 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2580 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2581 if (f)
2582 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2583 else
2584 pHlp->pfnPrintf(pHlp, "\n");
2585
2586 /* the groups */
2587 c = 0;
2588 f = fGlobalForcedActions;
2589 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2590 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2591 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2592 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2593 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2594 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2595 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2596 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2597 if (c)
2598 pHlp->pfnPrintf(pHlp, "\n");
2599
2600 /*
2601 * Per CPU flags.
2602 */
2603 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2604 {
2605 PVMCPU pVCpu = pVM->apCpusR3[i];
2606 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2607 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2608
2609 /* show the flag mnemonics */
2610 c = 0;
2611 f = fLocalForcedActions;
2612 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2613 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2614 PRINT_FLAG(VMCPU_FF_,TIMER);
2615 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2616 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2617 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2618 PRINT_FLAG(VMCPU_FF_,UNHALT);
2619 PRINT_FLAG(VMCPU_FF_,IEM);
2620 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2621 PRINT_FLAG(VMCPU_FF_,DBGF);
2622 PRINT_FLAG(VMCPU_FF_,REQUEST);
2623 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2624 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2625 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2626 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2627 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2628 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2629 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2630 PRINT_FLAG(VMCPU_FF_,TO_R3);
2631 PRINT_FLAG(VMCPU_FF_,IOM);
2632 if (f)
2633 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2634 else
2635 pHlp->pfnPrintf(pHlp, "\n");
2636
2637 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2638 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2639
2640 /* the groups */
2641 c = 0;
2642 f = fLocalForcedActions;
2643 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2644 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2645 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2646 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2647 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2648 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2649 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2650 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2651 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2652 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2653 if (c)
2654 pHlp->pfnPrintf(pHlp, "\n");
2655 }
2656
2657#undef PRINT_FLAG
2658#undef PRINT_GROUP
2659}
2660
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette