VMM.cpp@ 90806

Last change on this file since 90806 was 90597, checked in by vboxsync, 4 years ago
VMM: Speed up VMMGetCpu in ring-0 by using hash table (via new GVMMR0GetGVCpuByGVMandEMT call). bugref:6695
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1	/* $Id: VMM.cpp 90597 2021-08-10 13:08:35Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154	do { \
155	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
157	{ /* likely? */ } \
158	else \
159	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160	} while (0)
161
162
163	/*********************************************************************************************************************************
164	* Internal Functions *
165	*********************************************************************************************************************************/
166	static int vmmR3InitStacks(PVM pVM);
167	static int vmmR3InitLoggers(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	#if 0 /* pointless when timers doesn't run on EMT */
172	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173	#endif
174	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
178
179
180	/**
181	* Initializes the VMM.
182	*
183	* @returns VBox status code.
184	* @param pVM The cross context VM structure.
185	*/
186	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
187	{
188	LogFlow(("VMMR3Init\n"));
189
190	/*
191	* Assert alignment, sizes and order.
192	*/
193	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
194	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
195
196	/*
197	* Init basic VM VMM members.
198	*/
199	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
200	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
201	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
202	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
203	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
204	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
205	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
207	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
208
209	#if 0 /* pointless when timers doesn't run on EMT */
210	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
211	* The EMT yield interval. The EMT yielding is a hack we employ to play a
212	* bit nicer with the rest of the system (like for instance the GUI).
213	*/
214	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
215	23 /* Value arrived at after experimenting with the grub boot prompt. */);
216	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
217	#endif
218
219	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
220	* Controls whether we employ per-cpu preemption timers to limit the time
221	* spent executing guest code. This option is not available on all
222	* platforms and we will silently ignore this setting then. If we are
223	* running in VT-x mode, we will use the VMX-preemption timer instead of
224	* this one when possible.
225	*/
226	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
227	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
228	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
229
230	/*
231	* Initialize the VMM rendezvous semaphores.
232	*/
233	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
234	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
235	return VERR_NO_MEMORY;
236	for (VMCPUID i = 0; i < pVM->cCpus; i++)
237	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
238	for (VMCPUID i = 0; i < pVM->cCpus; i++)
239	{
240	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
241	AssertRCReturn(rc, rc);
242	}
243	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
244	AssertRCReturn(rc, rc);
245	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
246	AssertRCReturn(rc, rc);
247	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
258	AssertRCReturn(rc, rc);
259
260	/*
261	* Register the saved state data unit.
262	*/
263	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
264	NULL, NULL, NULL,
265	NULL, vmmR3Save, NULL,
266	NULL, vmmR3Load, NULL);
267	if (RT_FAILURE(rc))
268	return rc;
269
270	/*
271	* Register the Ring-0 VM handle with the session for fast ioctl calls.
272	*/
273	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
274	if (RT_FAILURE(rc))
275	return rc;
276
277	/*
278	* Init various sub-components.
279	*/
280	rc = vmmR3InitStacks(pVM);
281	if (RT_SUCCESS(rc))
282	{
283	rc = vmmR3InitLoggers(pVM);
284
285	#ifdef VBOX_WITH_NMI
286	/*
287	* Allocate mapping for the host APIC.
288	*/
289	if (RT_SUCCESS(rc))
290	{
291	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
292	AssertRC(rc);
293	}
294	#endif
295	if (RT_SUCCESS(rc))
296	{
297	/*
298	* Debug info and statistics.
299	*/
300	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
301	vmmR3InitRegisterStats(pVM);
302	vmmInitFormatTypes();
303
304	return VINF_SUCCESS;
305	}
306	}
307	/** @todo Need failure cleanup? */
308
309	return rc;
310	}
311
312
313	/**
314	* Allocate & setup the VMM RC stack(s) (for EMTs).
315	*
316	* The stacks are also used for long jumps in Ring-0.
317	*
318	* @returns VBox status code.
319	* @param pVM The cross context VM structure.
320	*
321	* @remarks The optional guard page gets it protection setup up during R3 init
322	* completion because of init order issues.
323	*/
324	static int vmmR3InitStacks(PVM pVM)
325	{
326	int rc = VINF_SUCCESS;
327	#ifdef VMM_R0_SWITCH_STACK
328	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
329	#else
330	uint32_t fFlags = 0;
331	#endif
332
333	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
334	{
335	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
336
337	#ifdef VBOX_STRICT_VMM_STACK
338	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
339	#else
340	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
341	#endif
342	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
343	if (RT_SUCCESS(rc))
344	{
345	#ifdef VBOX_STRICT_VMM_STACK
346	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
347	#endif
348	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
349
350	}
351	}
352
353	return rc;
354	}
355
356
357	/**
358	* Initialize the loggers.
359	*
360	* @returns VBox status code.
361	* @param pVM The cross context VM structure.
362	*/
363	static int vmmR3InitLoggers(PVM pVM)
364	{
365	int rc;
366	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
367
368	/*
369	* Allocate R0 Logger instance (finalized in the relocator).
370	*/
371	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
372	PRTLOGGER pLogger = RTLogDefaultInstance();
373	if (pLogger)
374	{
375	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
376	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
377	{
378	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
379	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
380	(void **)&pVCpu->vmm.s.pR0LoggerR3);
381	if (RT_FAILURE(rc))
382	return rc;
383	pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
384	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
385	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
386	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
387	}
388	}
389	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
390
391	/*
392	* Release logging.
393	*/
394	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
395	if (pRelLogger)
396	{
397	/*
398	* Ring-0 release logger.
399	*/
400	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
401	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
402	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
403
404	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
405	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
406	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
407
408	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
409
410	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
411	{
412	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
413	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
414	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
415	if (RT_FAILURE(rc))
416	return rc;
417	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
418	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
419	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
420	pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
421	pVmmLogger->cbLogger = (uint32_t)cbLogger;
422	pVmmLogger->fCreated = false;
423	pVmmLogger->fFlushingDisabled = false;
424	pVmmLogger->fRegistered = false;
425	pVmmLogger->idCpu = idCpu;
426
427	char szR0ThreadName[16];
428	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
429	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
430	pfnLoggerWrapper, pfnLoggerFlush,
431	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
432	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
433
434	/* We only update the release log instance here. */
435	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
436	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
437	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
438
439	pVmmLogger->fCreated = true;
440	}
441	}
442
443	return VINF_SUCCESS;
444	}
445
446
447	/**
448	* VMMR3Init worker that register the statistics with STAM.
449	*
450	* @param pVM The cross context VM structure.
451	*/
452	static void vmmR3InitRegisterStats(PVM pVM)
453	{
454	RT_NOREF_PV(pVM);
455
456	/*
457	* Statistics.
458	*/
459	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
467	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
468	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
469	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
522
523	#ifdef VBOX_WITH_STATISTICS
524	for (VMCPUID i = 0; i < pVM->cCpus; i++)
525	{
526	PVMCPU pVCpu = pVM->apCpusR3[i];
527	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
528	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
529	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
530	}
531	#endif
532	for (VMCPUID i = 0; i < pVM->cCpus; i++)
533	{
534	PVMCPU pVCpu = pVM->apCpusR3[i];
535	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
536	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
537	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
538	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
539	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
540	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
541	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
542	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
543	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
544	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
545	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
546	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
547	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
548	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
549	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
550	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
551	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
552
553	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
554	}
555	}
556
557
558	/**
559	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
560	*
561	* @returns VBox status code.
562	* @param pVM The cross context VM structure.
563	* @param pVCpu The cross context per CPU structure.
564	* @thread EMT(pVCpu)
565	*/
566	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
567	{
568	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
569	}
570
571
572	/**
573	* Initializes the R0 VMM.
574	*
575	* @returns VBox status code.
576	* @param pVM The cross context VM structure.
577	*/
578	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
579	{
580	int rc;
581	PVMCPU pVCpu = VMMGetCpu(pVM);
582	Assert(pVCpu && pVCpu->idCpu == 0);
583
584	#ifdef LOG_ENABLED
585	/*
586	* Initialize the ring-0 logger if we haven't done so yet.
587	*/
588	if ( pVCpu->vmm.s.pR0LoggerR3
589	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
590	{
591	rc = VMMR3UpdateLoggers(pVM);
592	if (RT_FAILURE(rc))
593	return rc;
594	}
595	#endif
596
597	/*
598	* Call Ring-0 entry with init code.
599	*/
600	for (;;)
601	{
602	#ifdef NO_SUPCALLR0VMM
603	//rc = VERR_GENERAL_FAILURE;
604	rc = VINF_SUCCESS;
605	#else
606	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
607	#endif
608	/*
609	* Flush the logs.
610	*/
611	#ifdef LOG_ENABLED
612	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
613	#endif
614	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
615	if (rc != VINF_VMM_CALL_HOST)
616	break;
617	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
618	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
619	break;
620	/* Resume R0 */
621	}
622
623	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
624	{
625	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
626	if (RT_SUCCESS(rc))
627	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
628	}
629
630	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
631	if (pVM->vmm.s.fIsUsingContextHooks)
632	LogRel(("VMM: Enabled thread-context hooks\n"));
633	else
634	LogRel(("VMM: Thread-context hooks unavailable\n"));
635
636	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
637	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
638	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
639	else
640	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
641	if (pVM->vmm.s.fIsPreemptPossible)
642	LogRel(("VMM: Kernel preemption is possible\n"));
643	else
644	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
645
646	/*
647	* Send all EMTs to ring-0 to get their logger initialized.
648	*/
649	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
650	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
651
652	return rc;
653	}
654
655
656	/**
657	* Called when an init phase completes.
658	*
659	* @returns VBox status code.
660	* @param pVM The cross context VM structure.
661	* @param enmWhat Which init phase.
662	*/
663	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
664	{
665	int rc = VINF_SUCCESS;
666
667	switch (enmWhat)
668	{
669	case VMINITCOMPLETED_RING3:
670	{
671	#if 0 /* pointless when timers doesn't run on EMT */
672	/*
673	* Create the EMT yield timer.
674	*/
675	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
676	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
677	AssertRCReturn(rc, rc);
678
679	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
680	AssertRCReturn(rc, rc);
681	#endif
682	break;
683	}
684
685	case VMINITCOMPLETED_HM:
686	{
687	/*
688	* Disable the periodic preemption timers if we can use the
689	* VMX-preemption timer instead.
690	*/
691	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
692	&& HMR3IsVmxPreemptionTimerUsed(pVM))
693	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
694	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
695
696	/*
697	* Last chance for GIM to update its CPUID leaves if it requires
698	* knowledge/information from HM initialization.
699	*/
700	rc = GIMR3InitCompleted(pVM);
701	AssertRCReturn(rc, rc);
702
703	/*
704	* CPUM's post-initialization (print CPUIDs).
705	*/
706	CPUMR3LogCpuIdAndMsrFeatures(pVM);
707	break;
708	}
709
710	default: /* shuts up gcc */
711	break;
712	}
713
714	return rc;
715	}
716
717
718	/**
719	* Terminate the VMM bits.
720	*
721	* @returns VBox status code.
722	* @param pVM The cross context VM structure.
723	*/
724	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
725	{
726	PVMCPU pVCpu = VMMGetCpu(pVM);
727	Assert(pVCpu && pVCpu->idCpu == 0);
728
729	/*
730	* Call Ring-0 entry with termination code.
731	*/
732	int rc;
733	for (;;)
734	{
735	#ifdef NO_SUPCALLR0VMM
736	//rc = VERR_GENERAL_FAILURE;
737	rc = VINF_SUCCESS;
738	#else
739	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
740	#endif
741	/*
742	* Flush the logs.
743	*/
744	#ifdef LOG_ENABLED
745	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
746	#endif
747	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
748	if (rc != VINF_VMM_CALL_HOST)
749	break;
750	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
751	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
752	break;
753	/* Resume R0 */
754	}
755	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
756	{
757	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
758	if (RT_SUCCESS(rc))
759	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
760	}
761
762	for (VMCPUID i = 0; i < pVM->cCpus; i++)
763	{
764	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
765	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
766	}
767	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
768	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
769	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
770	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
771	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
772	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
773	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
774	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
775	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
776	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
777	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
778	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
779	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
780	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
781	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
782	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
783
784	vmmTermFormatTypes();
785	return rc;
786	}
787
788
789	/**
790	* Applies relocations to data and code managed by this
791	* component. This function will be called at init and
792	* whenever the VMM need to relocate it self inside the GC.
793	*
794	* The VMM will need to apply relocations to the core code.
795	*
796	* @param pVM The cross context VM structure.
797	* @param offDelta The relocation delta.
798	*/
799	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
800	{
801	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
802	RT_NOREF(offDelta);
803
804	/*
805	* Update the logger.
806	*/
807	VMMR3UpdateLoggers(pVM);
808	}
809
810
811	/**
812	* Updates the settings for the RC and R0 loggers.
813	*
814	* @returns VBox status code.
815	* @param pVM The cross context VM structure.
816	*/
817	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
818	{
819	int rc = VINF_SUCCESS;
820
821	#ifdef LOG_ENABLED
822	/*
823	* For the ring-0 EMT logger, we use a per-thread logger instance
824	* in ring-0. Only initialize it once.
825	*/
826	PRTLOGGER const pDefault = RTLogDefaultInstance();
827	for (VMCPUID i = 0; i < pVM->cCpus; i++)
828	{
829	PVMCPU pVCpu = pVM->apCpusR3[i];
830	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
831	if (pR0LoggerR3)
832	{
833	if (!pR0LoggerR3->fCreated)
834	{
835	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
836	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
837	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
838
839	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
840	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
841	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
842
843	char szR0ThreadName[16];
844	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
845	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
846	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
847	pfnLoggerWrapper, pfnLoggerFlush,
848	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
849	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
850
851	pR0LoggerR3->idCpu = i;
852	pR0LoggerR3->fCreated = true;
853	pR0LoggerR3->fFlushingDisabled = false;
854	}
855
856	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
857	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
858	AssertRC(rc);
859	}
860	}
861	#else
862	RT_NOREF(pVM);
863	#endif
864
865	return rc;
866	}
867
868
869	/**
870	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
871	*
872	* @returns Pointer to the buffer.
873	* @param pVM The cross context VM structure.
874	*/
875	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
876	{
877	return pVM->vmm.s.szRing0AssertMsg1;
878	}
879
880
881	/**
882	* Returns the VMCPU of the specified virtual CPU.
883	*
884	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
885	*
886	* @param pUVM The user mode VM handle.
887	* @param idCpu The ID of the virtual CPU.
888	*/
889	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
890	{
891	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
892	AssertReturn(idCpu < pUVM->cCpus, NULL);
893	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
894	return pUVM->pVM->apCpusR3[idCpu];
895	}
896
897
898	/**
899	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
900	*
901	* @returns Pointer to the buffer.
902	* @param pVM The cross context VM structure.
903	*/
904	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
905	{
906	return pVM->vmm.s.szRing0AssertMsg2;
907	}
908
909
910	/**
911	* Execute state save operation.
912	*
913	* @returns VBox status code.
914	* @param pVM The cross context VM structure.
915	* @param pSSM SSM operation handle.
916	*/
917	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
918	{
919	LogFlow(("vmmR3Save:\n"));
920
921	/*
922	* Save the started/stopped state of all CPUs except 0 as it will always
923	* be running. This avoids breaking the saved state version. :-)
924	*/
925	for (VMCPUID i = 1; i < pVM->cCpus; i++)
926	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
927
928	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
929	}
930
931
932	/**
933	* Execute state load operation.
934	*
935	* @returns VBox status code.
936	* @param pVM The cross context VM structure.
937	* @param pSSM SSM operation handle.
938	* @param uVersion Data layout version.
939	* @param uPass The data pass.
940	*/
941	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
942	{
943	LogFlow(("vmmR3Load:\n"));
944	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
945
946	/*
947	* Validate version.
948	*/
949	if ( uVersion != VMM_SAVED_STATE_VERSION
950	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
951	{
952	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
953	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
954	}
955
956	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
957	{
958	/* Ignore the stack bottom, stack pointer and stack bits. */
959	RTRCPTR RCPtrIgnored;
960	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
961	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
962	#ifdef RT_OS_DARWIN
963	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
964	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
965	&& SSMR3HandleRevision(pSSM) >= 48858
966	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
967	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
968	)
969	SSMR3Skip(pSSM, 16384);
970	else
971	SSMR3Skip(pSSM, 8192);
972	#else
973	SSMR3Skip(pSSM, 8192);
974	#endif
975	}
976
977	/*
978	* Restore the VMCPU states. VCPU 0 is always started.
979	*/
980	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
981	for (VMCPUID i = 1; i < pVM->cCpus; i++)
982	{
983	bool fStarted;
984	int rc = SSMR3GetBool(pSSM, &fStarted);
985	if (RT_FAILURE(rc))
986	return rc;
987	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
988	}
989
990	/* terminator */
991	uint32_t u32;
992	int rc = SSMR3GetU32(pSSM, &u32);
993	if (RT_FAILURE(rc))
994	return rc;
995	if (u32 != UINT32_MAX)
996	{
997	AssertMsgFailed(("u32=%#x\n", u32));
998	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
999	}
1000	return VINF_SUCCESS;
1001	}
1002
1003
1004	/**
1005	* Suspends the CPU yielder.
1006	*
1007	* @param pVM The cross context VM structure.
1008	*/
1009	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1010	{
1011	#if 0 /* pointless when timers doesn't run on EMT */
1012	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1013	if (!pVM->vmm.s.cYieldResumeMillies)
1014	{
1015	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1016	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1017	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1018	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1019	else
1020	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1021	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1022	}
1023	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1024	#else
1025	RT_NOREF(pVM);
1026	#endif
1027	}
1028
1029
1030	/**
1031	* Stops the CPU yielder.
1032	*
1033	* @param pVM The cross context VM structure.
1034	*/
1035	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1036	{
1037	#if 0 /* pointless when timers doesn't run on EMT */
1038	if (!pVM->vmm.s.cYieldResumeMillies)
1039	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1040	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1041	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1042	#else
1043	RT_NOREF(pVM);
1044	#endif
1045	}
1046
1047
1048	/**
1049	* Resumes the CPU yielder when it has been a suspended or stopped.
1050	*
1051	* @param pVM The cross context VM structure.
1052	*/
1053	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1054	{
1055	#if 0 /* pointless when timers doesn't run on EMT */
1056	if (pVM->vmm.s.cYieldResumeMillies)
1057	{
1058	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1059	pVM->vmm.s.cYieldResumeMillies = 0;
1060	}
1061	#else
1062	RT_NOREF(pVM);
1063	#endif
1064	}
1065
1066
1067	#if 0 /* pointless when timers doesn't run on EMT */
1068	/**
1069	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1070	*
1071	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1072	*/
1073	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1074	{
1075	NOREF(pvUser);
1076
1077	/*
1078	* This really needs some careful tuning. While we shouldn't be too greedy since
1079	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1080	* because that'll cause us to stop up.
1081	*
1082	* The current logic is to use the default interval when there is no lag worth
1083	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1084	*
1085	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1086	* so the lag is up to date.)
1087	*/
1088	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1089	if ( u64Lag < 50000000 /* 50ms */
1090	\|\| ( u64Lag < 1000000000 /* 1s */
1091	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1092	)
1093	{
1094	uint64_t u64Elapsed = RTTimeNanoTS();
1095	pVM->vmm.s.u64LastYield = u64Elapsed;
1096
1097	RTThreadYield();
1098
1099	#ifdef LOG_ENABLED
1100	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1101	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1102	#endif
1103	}
1104	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1105	}
1106	#endif
1107
1108
1109	/**
1110	* Executes guest code (Intel VT-x and AMD-V).
1111	*
1112	* @param pVM The cross context VM structure.
1113	* @param pVCpu The cross context virtual CPU structure.
1114	*/
1115	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1116	{
1117	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1118
1119	for (;;)
1120	{
1121	int rc;
1122	do
1123	{
1124	#ifdef NO_SUPCALLR0VMM
1125	rc = VERR_GENERAL_FAILURE;
1126	#else
1127	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1128	if (RT_LIKELY(rc == VINF_SUCCESS))
1129	rc = pVCpu->vmm.s.iLastGZRc;
1130	#endif
1131	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1132
1133	#if 0 /** @todo triggers too often */
1134	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1135	#endif
1136
1137	/*
1138	* Flush the logs
1139	*/
1140	#ifdef LOG_ENABLED
1141	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1142	#endif
1143	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1144	if (rc != VINF_VMM_CALL_HOST)
1145	{
1146	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1147	return rc;
1148	}
1149	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1150	if (RT_FAILURE(rc))
1151	return rc;
1152	/* Resume R0 */
1153	}
1154	}
1155
1156
1157	/**
1158	* Perform one of the fast I/O control VMMR0 operation.
1159	*
1160	* @returns VBox strict status code.
1161	* @param pVM The cross context VM structure.
1162	* @param pVCpu The cross context virtual CPU structure.
1163	* @param enmOperation The operation to perform.
1164	*/
1165	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1166	{
1167	for (;;)
1168	{
1169	VBOXSTRICTRC rcStrict;
1170	do
1171	{
1172	#ifdef NO_SUPCALLR0VMM
1173	rcStrict = VERR_GENERAL_FAILURE;
1174	#else
1175	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1176	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1177	rcStrict = pVCpu->vmm.s.iLastGZRc;
1178	#endif
1179	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1180
1181	/*
1182	* Flush the logs
1183	*/
1184	#ifdef LOG_ENABLED
1185	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1186	#endif
1187	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1188	if (rcStrict != VINF_VMM_CALL_HOST)
1189	return rcStrict;
1190	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1191	if (RT_FAILURE(rc))
1192	return rc;
1193	/* Resume R0 */
1194	}
1195	}
1196
1197
1198	/**
1199	* VCPU worker for VMMR3SendStartupIpi.
1200	*
1201	* @param pVM The cross context VM structure.
1202	* @param idCpu Virtual CPU to perform SIPI on.
1203	* @param uVector The SIPI vector.
1204	*/
1205	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1206	{
1207	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1208	VMCPU_ASSERT_EMT(pVCpu);
1209
1210	/*
1211	* In the INIT state, the target CPU is only responsive to an SIPI.
1212	* This is also true for when when the CPU is in VMX non-root mode.
1213	*
1214	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1215	* See Intel spec. 26.6.2 "Activity State".
1216	*/
1217	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1218	return VINF_SUCCESS;
1219
1220	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1221	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1222	if (CPUMIsGuestInVmxRootMode(pCtx))
1223	{
1224	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1225	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1226	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1227
1228	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1229	return VINF_SUCCESS;
1230	}
1231	#endif
1232
1233	pCtx->cs.Sel = uVector << 8;
1234	pCtx->cs.ValidSel = uVector << 8;
1235	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1236	pCtx->cs.u64Base = uVector << 12;
1237	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1238	pCtx->rip = 0;
1239
1240	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1241
1242	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1243	EMSetState(pVCpu, EMSTATE_HALTED);
1244	return VINF_EM_RESCHEDULE;
1245	# else /* And if we go the VMCPU::enmState way it can stay here. */
1246	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1247	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1248	return VINF_SUCCESS;
1249	# endif
1250	}
1251
1252
1253	/**
1254	* VCPU worker for VMMR3SendInitIpi.
1255	*
1256	* @returns VBox status code.
1257	* @param pVM The cross context VM structure.
1258	* @param idCpu Virtual CPU to perform SIPI on.
1259	*/
1260	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1261	{
1262	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1263	VMCPU_ASSERT_EMT(pVCpu);
1264
1265	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1266
1267	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1268	* wait-for-SIPI state. Verify. */
1269
1270	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1271	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1272	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1273	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1274	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1275	#endif
1276
1277	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1278	* IPI (e.g. SVM_EXIT_INIT). */
1279
1280	PGMR3ResetCpu(pVM, pVCpu);
1281	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1282	APICR3InitIpi(pVCpu);
1283	TRPMR3ResetCpu(pVCpu);
1284	CPUMR3ResetCpu(pVM, pVCpu);
1285	EMR3ResetCpu(pVCpu);
1286	HMR3ResetCpu(pVCpu);
1287	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1288
1289	/* This will trickle up on the target EMT. */
1290	return VINF_EM_WAIT_SIPI;
1291	}
1292
1293
1294	/**
1295	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1296	* vector-dependent state and unhalting processor.
1297	*
1298	* @param pVM The cross context VM structure.
1299	* @param idCpu Virtual CPU to perform SIPI on.
1300	* @param uVector SIPI vector.
1301	*/
1302	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1303	{
1304	AssertReturnVoid(idCpu < pVM->cCpus);
1305
1306	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1307	AssertRC(rc);
1308	}
1309
1310
1311	/**
1312	* Sends init IPI to the virtual CPU.
1313	*
1314	* @param pVM The cross context VM structure.
1315	* @param idCpu Virtual CPU to perform int IPI on.
1316	*/
1317	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1318	{
1319	AssertReturnVoid(idCpu < pVM->cCpus);
1320
1321	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1322	AssertRC(rc);
1323	}
1324
1325
1326	/**
1327	* Registers the guest memory range that can be used for patching.
1328	*
1329	* @returns VBox status code.
1330	* @param pVM The cross context VM structure.
1331	* @param pPatchMem Patch memory range.
1332	* @param cbPatchMem Size of the memory range.
1333	*/
1334	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1335	{
1336	VM_ASSERT_EMT(pVM);
1337	if (HMIsEnabled(pVM))
1338	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1339
1340	return VERR_NOT_SUPPORTED;
1341	}
1342
1343
1344	/**
1345	* Deregisters the guest memory range that can be used for patching.
1346	*
1347	* @returns VBox status code.
1348	* @param pVM The cross context VM structure.
1349	* @param pPatchMem Patch memory range.
1350	* @param cbPatchMem Size of the memory range.
1351	*/
1352	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1353	{
1354	if (HMIsEnabled(pVM))
1355	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1356
1357	return VINF_SUCCESS;
1358	}
1359
1360
1361	/**
1362	* Common recursion handler for the other EMTs.
1363	*
1364	* @returns Strict VBox status code.
1365	* @param pVM The cross context VM structure.
1366	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1367	* @param rcStrict Current status code to be combined with the one
1368	* from this recursion and returned.
1369	*/
1370	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1371	{
1372	int rc2;
1373
1374	/*
1375	* We wait here while the initiator of this recursion reconfigures
1376	* everything. The last EMT to get in signals the initiator.
1377	*/
1378	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1379	{
1380	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1381	AssertLogRelRC(rc2);
1382	}
1383
1384	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1385	AssertLogRelRC(rc2);
1386
1387	/*
1388	* Do the normal rendezvous processing.
1389	*/
1390	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1391	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1392
1393	/*
1394	* Wait for the initiator to restore everything.
1395	*/
1396	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1397	AssertLogRelRC(rc2);
1398
1399	/*
1400	* Last thread out of here signals the initiator.
1401	*/
1402	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1403	{
1404	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1405	AssertLogRelRC(rc2);
1406	}
1407
1408	/*
1409	* Merge status codes and return.
1410	*/
1411	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1412	if ( rcStrict2 != VINF_SUCCESS
1413	&& ( rcStrict == VINF_SUCCESS
1414	\|\| rcStrict > rcStrict2))
1415	rcStrict = rcStrict2;
1416	return rcStrict;
1417	}
1418
1419
1420	/**
1421	* Count returns and have the last non-caller EMT wake up the caller.
1422	*
1423	* @returns VBox strict informational status code for EM scheduling. No failures
1424	* will be returned here, those are for the caller only.
1425	*
1426	* @param pVM The cross context VM structure.
1427	* @param rcStrict The current accumulated recursive status code,
1428	* to be merged with i32RendezvousStatus and
1429	* returned.
1430	*/
1431	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1432	{
1433	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1434
1435	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1436	if (cReturned == pVM->cCpus - 1U)
1437	{
1438	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1439	AssertLogRelRC(rc);
1440	}
1441
1442	/*
1443	* Merge the status codes, ignoring error statuses in this code path.
1444	*/
1445	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1446	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1447	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1448	VERR_IPE_UNEXPECTED_INFO_STATUS);
1449
1450	if (RT_SUCCESS(rcStrict2))
1451	{
1452	if ( rcStrict2 != VINF_SUCCESS
1453	&& ( rcStrict == VINF_SUCCESS
1454	\|\| rcStrict > rcStrict2))
1455	rcStrict = rcStrict2;
1456	}
1457	return rcStrict;
1458	}
1459
1460
1461	/**
1462	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1463	*
1464	* @returns VBox strict informational status code for EM scheduling. No failures
1465	* will be returned here, those are for the caller only. When
1466	* fIsCaller is set, VINF_SUCCESS is always returned.
1467	*
1468	* @param pVM The cross context VM structure.
1469	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1470	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1471	* not.
1472	* @param fFlags The flags.
1473	* @param pfnRendezvous The callback.
1474	* @param pvUser The user argument for the callback.
1475	*/
1476	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1477	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1478	{
1479	int rc;
1480	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1481
1482	/*
1483	* Enter, the last EMT triggers the next callback phase.
1484	*/
1485	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1486	if (cEntered != pVM->cCpus)
1487	{
1488	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1489	{
1490	/* Wait for our turn. */
1491	for (;;)
1492	{
1493	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1494	AssertLogRelRC(rc);
1495	if (!pVM->vmm.s.fRendezvousRecursion)
1496	break;
1497	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1498	}
1499	}
1500	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1501	{
1502	/* Wait for the last EMT to arrive and wake everyone up. */
1503	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1504	AssertLogRelRC(rc);
1505	Assert(!pVM->vmm.s.fRendezvousRecursion);
1506	}
1507	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1508	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1509	{
1510	/* Wait for our turn. */
1511	for (;;)
1512	{
1513	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1514	AssertLogRelRC(rc);
1515	if (!pVM->vmm.s.fRendezvousRecursion)
1516	break;
1517	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1518	}
1519	}
1520	else
1521	{
1522	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1523
1524	/*
1525	* The execute once is handled specially to optimize the code flow.
1526	*
1527	* The last EMT to arrive will perform the callback and the other
1528	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1529	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1530	* returns, that EMT will initiate the normal return sequence.
1531	*/
1532	if (!fIsCaller)
1533	{
1534	for (;;)
1535	{
1536	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1537	AssertLogRelRC(rc);
1538	if (!pVM->vmm.s.fRendezvousRecursion)
1539	break;
1540	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1541	}
1542
1543	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1544	}
1545	return VINF_SUCCESS;
1546	}
1547	}
1548	else
1549	{
1550	/*
1551	* All EMTs are waiting, clear the FF and take action according to the
1552	* execution method.
1553	*/
1554	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1555
1556	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1557	{
1558	/* Wake up everyone. */
1559	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1560	AssertLogRelRC(rc);
1561	}
1562	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1563	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1564	{
1565	/* Figure out who to wake up and wake it up. If it's ourself, then
1566	it's easy otherwise wait for our turn. */
1567	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1568	? 0
1569	: pVM->cCpus - 1U;
1570	if (pVCpu->idCpu != iFirst)
1571	{
1572	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1573	AssertLogRelRC(rc);
1574	for (;;)
1575	{
1576	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1577	AssertLogRelRC(rc);
1578	if (!pVM->vmm.s.fRendezvousRecursion)
1579	break;
1580	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1581	}
1582	}
1583	}
1584	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1585	}
1586
1587
1588	/*
1589	* Do the callback and update the status if necessary.
1590	*/
1591	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1592	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1593	{
1594	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1595	if (rcStrict2 != VINF_SUCCESS)
1596	{
1597	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1598	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1599	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1600	int32_t i32RendezvousStatus;
1601	do
1602	{
1603	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1604	if ( rcStrict2 == i32RendezvousStatus
1605	\|\| RT_FAILURE(i32RendezvousStatus)
1606	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1607	&& rcStrict2 > i32RendezvousStatus))
1608	break;
1609	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1610	}
1611	}
1612
1613	/*
1614	* Increment the done counter and take action depending on whether we're
1615	* the last to finish callback execution.
1616	*/
1617	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1618	if ( cDone != pVM->cCpus
1619	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1620	{
1621	/* Signal the next EMT? */
1622	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1623	{
1624	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1625	AssertLogRelRC(rc);
1626	}
1627	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1628	{
1629	Assert(cDone == pVCpu->idCpu + 1U);
1630	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1631	AssertLogRelRC(rc);
1632	}
1633	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1634	{
1635	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1636	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1637	AssertLogRelRC(rc);
1638	}
1639
1640	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1641	if (!fIsCaller)
1642	{
1643	for (;;)
1644	{
1645	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1646	AssertLogRelRC(rc);
1647	if (!pVM->vmm.s.fRendezvousRecursion)
1648	break;
1649	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1650	}
1651	}
1652	}
1653	else
1654	{
1655	/* Callback execution is all done, tell the rest to return. */
1656	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1657	AssertLogRelRC(rc);
1658	}
1659
1660	if (!fIsCaller)
1661	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1662	return rcStrictRecursion;
1663	}
1664
1665
1666	/**
1667	* Called in response to VM_FF_EMT_RENDEZVOUS.
1668	*
1669	* @returns VBox strict status code - EM scheduling. No errors will be returned
1670	* here, nor will any non-EM scheduling status codes be returned.
1671	*
1672	* @param pVM The cross context VM structure.
1673	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1674	*
1675	* @thread EMT
1676	*/
1677	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1678	{
1679	Assert(!pVCpu->vmm.s.fInRendezvous);
1680	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1681	pVCpu->vmm.s.fInRendezvous = true;
1682	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1683	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1684	pVCpu->vmm.s.fInRendezvous = false;
1685	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1686	return VBOXSTRICTRC_TODO(rcStrict);
1687	}
1688
1689
1690	/**
1691	* Helper for resetting an single wakeup event sempahore.
1692	*
1693	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1694	* @param hEvt The event semaphore to reset.
1695	*/
1696	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1697	{
1698	for (uint32_t cLoops = 0; ; cLoops++)
1699	{
1700	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1701	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1702	return rc;
1703	}
1704	}
1705
1706
1707	/**
1708	* Worker for VMMR3EmtRendezvous that handles recursion.
1709	*
1710	* @returns VBox strict status code. This will be the first error,
1711	* VINF_SUCCESS, or an EM scheduling status code.
1712	*
1713	* @param pVM The cross context VM structure.
1714	* @param pVCpu The cross context virtual CPU structure of the
1715	* calling EMT.
1716	* @param fFlags Flags indicating execution methods. See
1717	* grp_VMMR3EmtRendezvous_fFlags.
1718	* @param pfnRendezvous The callback.
1719	* @param pvUser User argument for the callback.
1720	*
1721	* @thread EMT(pVCpu)
1722	*/
1723	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1724	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1725	{
1726	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1727	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1728	Assert(pVCpu->vmm.s.fInRendezvous);
1729
1730	/*
1731	* Save the current state.
1732	*/
1733	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1734	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1735	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1736	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1737	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1738
1739	/*
1740	* Check preconditions and save the current state.
1741	*/
1742	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1743	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1744	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1745	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1746	VERR_INTERNAL_ERROR);
1747	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1748	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1749
1750	/*
1751	* Reset the recursion prep and pop semaphores.
1752	*/
1753	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1754	AssertLogRelRCReturn(rc, rc);
1755	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1756	AssertLogRelRCReturn(rc, rc);
1757	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1758	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1759	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1760	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1761
1762	/*
1763	* Usher the other thread into the recursion routine.
1764	*/
1765	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1766	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1767
1768	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1769	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1770	while (cLeft-- > 0)
1771	{
1772	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1773	AssertLogRelRC(rc);
1774	}
1775	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1776	{
1777	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1778	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1779	{
1780	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1781	AssertLogRelRC(rc);
1782	}
1783	}
1784	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1785	{
1786	Assert(cLeft == pVCpu->idCpu);
1787	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1788	{
1789	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1790	AssertLogRelRC(rc);
1791	}
1792	}
1793	else
1794	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1795	VERR_INTERNAL_ERROR_4);
1796
1797	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1798	AssertLogRelRC(rc);
1799	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1800	AssertLogRelRC(rc);
1801
1802
1803	/*
1804	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1805	*/
1806	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1807	{
1808	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1809	AssertLogRelRC(rc);
1810	}
1811
1812	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1813
1814	/*
1815	* Clear the slate and setup the new rendezvous.
1816	*/
1817	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1818	{
1819	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1820	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1821	}
1822	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1823	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1824	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1825	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1826
1827	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1828	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1829	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1830	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1831	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1832	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1833	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1834	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1835
1836	/*
1837	* We're ready to go now, do normal rendezvous processing.
1838	*/
1839	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1840	AssertLogRelRC(rc);
1841
1842	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1843
1844	/*
1845	* The caller waits for the other EMTs to be done, return and waiting on the
1846	* pop semaphore.
1847	*/
1848	for (;;)
1849	{
1850	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1851	AssertLogRelRC(rc);
1852	if (!pVM->vmm.s.fRendezvousRecursion)
1853	break;
1854	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1855	}
1856
1857	/*
1858	* Get the return code and merge it with the above recursion status.
1859	*/
1860	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1861	if ( rcStrict2 != VINF_SUCCESS
1862	&& ( rcStrict == VINF_SUCCESS
1863	\|\| rcStrict > rcStrict2))
1864	rcStrict = rcStrict2;
1865
1866	/*
1867	* Restore the parent rendezvous state.
1868	*/
1869	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1870	{
1871	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1872	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1873	}
1874	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1875	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1876	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1877	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1878
1879	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1880	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1881	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1882	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1883	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1884	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1885	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1886
1887	/*
1888	* Usher the other EMTs back to their parent recursion routine, waiting
1889	* for them to all get there before we return (makes sure they've been
1890	* scheduled and are past the pop event sem, see below).
1891	*/
1892	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1893	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1894	AssertLogRelRC(rc);
1895
1896	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1897	{
1898	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1899	AssertLogRelRC(rc);
1900	}
1901
1902	/*
1903	* We must reset the pop semaphore on the way out (doing the pop caller too,
1904	* just in case). The parent may be another recursion.
1905	*/
1906	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1907	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1908
1909	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1910
1911	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1912	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1913	return rcStrict;
1914	}
1915
1916
1917	/**
1918	* EMT rendezvous.
1919	*
1920	* Gathers all the EMTs and execute some code on each of them, either in a one
1921	* by one fashion or all at once.
1922	*
1923	* @returns VBox strict status code. This will be the first error,
1924	* VINF_SUCCESS, or an EM scheduling status code.
1925	*
1926	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1927	* doesn't support it or if the recursion is too deep.
1928	*
1929	* @param pVM The cross context VM structure.
1930	* @param fFlags Flags indicating execution methods. See
1931	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1932	* descending and ascending rendezvous types support
1933	* recursion from inside @a pfnRendezvous.
1934	* @param pfnRendezvous The callback.
1935	* @param pvUser User argument for the callback.
1936	*
1937	* @thread Any.
1938	*/
1939	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1940	{
1941	/*
1942	* Validate input.
1943	*/
1944	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1945	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1946	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1947	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1948	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1949	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1950	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1951	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1952
1953	VBOXSTRICTRC rcStrict;
1954	PVMCPU pVCpu = VMMGetCpu(pVM);
1955	if (!pVCpu)
1956	{
1957	/*
1958	* Forward the request to an EMT thread.
1959	*/
1960	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1961	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1962	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1963	else
1964	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1965	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1966	}
1967	else if ( pVM->cCpus == 1
1968	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
1969	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1970	{
1971	/*
1972	* Shortcut for the single EMT case.
1973	*
1974	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1975	* during vmR3Destroy after other emulation threads have started terminating.
1976	*/
1977	if (!pVCpu->vmm.s.fInRendezvous)
1978	{
1979	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1980	pVCpu->vmm.s.fInRendezvous = true;
1981	pVM->vmm.s.fRendezvousFlags = fFlags;
1982	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1983	pVCpu->vmm.s.fInRendezvous = false;
1984	}
1985	else
1986	{
1987	/* Recursion. Do the same checks as in the SMP case. */
1988	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1989	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1990	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1991	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1992	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1993	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1994	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1995	, VERR_DEADLOCK);
1996
1997	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1998	pVM->vmm.s.cRendezvousRecursions++;
1999	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2000	pVM->vmm.s.fRendezvousFlags = fFlags;
2001
2002	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2003
2004	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2005	pVM->vmm.s.cRendezvousRecursions--;
2006	}
2007	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2008	}
2009	else
2010	{
2011	/*
2012	* Spin lock. If busy, check for recursion, if not recursing wait for
2013	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2014	*/
2015	int rc;
2016	rcStrict = VINF_SUCCESS;
2017	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2018	{
2019	/* Allow recursion in some cases. */
2020	if ( pVCpu->vmm.s.fInRendezvous
2021	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2022	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2023	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2024	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2025	))
2026	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2027
2028	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2029	VERR_DEADLOCK);
2030
2031	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2032	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2033	{
2034	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2035	{
2036	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2037	if ( rc != VINF_SUCCESS
2038	&& ( rcStrict == VINF_SUCCESS
2039	\|\| rcStrict > rc))
2040	rcStrict = rc;
2041	/** @todo Perhaps deal with termination here? */
2042	}
2043	ASMNopPause();
2044	}
2045	}
2046
2047	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2048	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2049	Assert(!pVCpu->vmm.s.fInRendezvous);
2050	pVCpu->vmm.s.fInRendezvous = true;
2051
2052	/*
2053	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2054	*/
2055	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2056	{
2057	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2058	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2059	}
2060	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2061	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2062	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2063	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2064	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2065	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2066	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2067	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2068	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2069	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2070	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2071
2072	/*
2073	* Set the FF and poke the other EMTs.
2074	*/
2075	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2076	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2077
2078	/*
2079	* Do the same ourselves.
2080	*/
2081	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2082
2083	/*
2084	* The caller waits for the other EMTs to be done and return before doing
2085	* the cleanup. This makes away with wakeup / reset races we would otherwise
2086	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2087	*/
2088	for (;;)
2089	{
2090	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2091	AssertLogRelRC(rc);
2092	if (!pVM->vmm.s.fRendezvousRecursion)
2093	break;
2094	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2095	}
2096
2097	/*
2098	* Get the return code and clean up a little bit.
2099	*/
2100	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2101	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2102
2103	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2104	pVCpu->vmm.s.fInRendezvous = false;
2105
2106	/*
2107	* Merge rcStrict, rcStrict2 and rcStrict3.
2108	*/
2109	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2110	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2111	if ( rcStrict2 != VINF_SUCCESS
2112	&& ( rcStrict == VINF_SUCCESS
2113	\|\| rcStrict > rcStrict2))
2114	rcStrict = rcStrict2;
2115	if ( rcStrict3 != VINF_SUCCESS
2116	&& ( rcStrict == VINF_SUCCESS
2117	\|\| rcStrict > rcStrict3))
2118	rcStrict = rcStrict3;
2119	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2120	}
2121
2122	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2123	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2124	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2125	VERR_IPE_UNEXPECTED_INFO_STATUS);
2126	return VBOXSTRICTRC_VAL(rcStrict);
2127	}
2128
2129
2130	/**
2131	* Interface for vmR3SetHaltMethodU.
2132	*
2133	* @param pVCpu The cross context virtual CPU structure of the
2134	* calling EMT.
2135	* @param fMayHaltInRing0 The new state.
2136	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2137	* @thread EMT(pVCpu)
2138	*
2139	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2140	* component.
2141	*/
2142	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2143	{
2144	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2145	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2146	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2147	}
2148
2149
2150	/**
2151	* Read from the ring 0 jump buffer stack.
2152	*
2153	* @returns VBox status code.
2154	*
2155	* @param pVM The cross context VM structure.
2156	* @param idCpu The ID of the source CPU context (for the address).
2157	* @param R0Addr Where to start reading.
2158	* @param pvBuf Where to store the data we've read.
2159	* @param cbRead The number of bytes to read.
2160	*/
2161	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2162	{
2163	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2164	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2165	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2166
2167	int rc;
2168	#ifdef VMM_R0_SWITCH_STACK
2169	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2170	#else
2171	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2172	#endif
2173	if ( off < VMM_STACK_SIZE
2174	&& off + cbRead <= VMM_STACK_SIZE)
2175	{
2176	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2177	rc = VINF_SUCCESS;
2178	}
2179	else
2180	rc = VERR_INVALID_POINTER;
2181
2182	/* Supply the setjmp return RIP/EIP. */
2183	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2184	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2185	{
2186	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2187	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2188	size_t offDst = 0;
2189	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2190	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2191	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2192	{
2193	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2194	Assert(offSrc < cbSrc);
2195	pbSrc -= offSrc;
2196	cbSrc -= offSrc;
2197	}
2198	if (cbSrc > cbRead - offDst)
2199	cbSrc = cbRead - offDst;
2200	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2201
2202	if (cbSrc == cbRead)
2203	rc = VINF_SUCCESS;
2204	}
2205
2206	return rc;
2207	}
2208
2209
2210	/**
2211	* Used by the DBGF stack unwinder to initialize the register state.
2212	*
2213	* @param pUVM The user mode VM handle.
2214	* @param idCpu The ID of the CPU being unwound.
2215	* @param pState The unwind state to initialize.
2216	*/
2217	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2218	{
2219	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2220	AssertReturnVoid(pVCpu);
2221
2222	/*
2223	* Locate the resume point on the stack.
2224	*/
2225	#ifdef VMM_R0_SWITCH_STACK
2226	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2227	AssertReturnVoid(off < VMM_STACK_SIZE);
2228	#else
2229	uintptr_t off = 0;
2230	#endif
2231
2232	#ifdef RT_ARCH_AMD64
2233	/*
2234	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2235	*/
2236	# ifdef VBOX_STRICT
2237	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2238	off += 8; /* RESUME_MAGIC */
2239	# endif
2240	# ifdef RT_OS_WINDOWS
2241	off += 0xa0; /* XMM6 thru XMM15 */
2242	# endif
2243	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2244	off += 8;
2245	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2246	off += 8;
2247	# ifdef RT_OS_WINDOWS
2248	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2249	off += 8;
2250	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2251	off += 8;
2252	# endif
2253	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2254	off += 8;
2255	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2256	off += 8;
2257	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2258	off += 8;
2259	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2260	off += 8;
2261	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2262	off += 8;
2263	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2264	off += 8;
2265
2266	#elif defined(RT_ARCH_X86)
2267	/*
2268	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2269	*/
2270	# ifdef VBOX_STRICT
2271	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2272	off += 4; /* RESUME_MAGIC */
2273	# endif
2274	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2275	off += 4;
2276	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2277	off += 4;
2278	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2279	off += 4;
2280	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2281	off += 4;
2282	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2283	off += 4;
2284	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2285	off += 4;
2286	#else
2287	# error "Port me"
2288	#endif
2289
2290	/*
2291	* This is all we really need here, though the above helps if the assembly
2292	* doesn't contain unwind info (currently only on win/64, so that is useful).
2293	*/
2294	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2295	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2296	}
2297
2298
2299	/**
2300	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2301	*
2302	* @returns VBox status code.
2303	* @param pVM The cross context VM structure.
2304	* @param uOperation Operation to execute.
2305	* @param u64Arg Constant argument.
2306	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2307	* details.
2308	*/
2309	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2310	{
2311	PVMCPU pVCpu = VMMGetCpu(pVM);
2312	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2313	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2314	}
2315
2316
2317	/**
2318	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2319	*
2320	* @returns VBox status code.
2321	* @param pVM The cross context VM structure.
2322	* @param pVCpu The cross context VM structure.
2323	* @param enmOperation Operation to execute.
2324	* @param u64Arg Constant argument.
2325	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2326	* details.
2327	*/
2328	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2329	{
2330	int rc;
2331	for (;;)
2332	{
2333	#ifdef NO_SUPCALLR0VMM
2334	rc = VERR_GENERAL_FAILURE;
2335	#else
2336	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2337	#endif
2338	/*
2339	* Flush the logs.
2340	*/
2341	#ifdef LOG_ENABLED
2342	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2343	#endif
2344	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2345	if (rc != VINF_VMM_CALL_HOST)
2346	break;
2347	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2348	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2349	break;
2350	/* Resume R0 */
2351	}
2352
2353	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2354	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2355	VERR_IPE_UNEXPECTED_INFO_STATUS);
2356	return rc;
2357	}
2358
2359
2360	/**
2361	* Service a call to the ring-3 host code.
2362	*
2363	* @returns VBox status code.
2364	* @param pVM The cross context VM structure.
2365	* @param pVCpu The cross context virtual CPU structure.
2366	* @remarks Careful with critsects.
2367	*/
2368	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2369	{
2370	/*
2371	* We must also check for pending critsect exits or else we can deadlock
2372	* when entering other critsects here.
2373	*/
2374	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2375	PDMCritSectBothFF(pVM, pVCpu);
2376
2377	switch (pVCpu->vmm.s.enmCallRing3Operation)
2378	{
2379	/*
2380	* Acquire a critical section.
2381	*/
2382	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2383	{
2384	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx(pVM, (PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2385	true /fCallRing3/);
2386	break;
2387	}
2388
2389	/*
2390	* Enter a r/w critical section exclusively.
2391	*/
2392	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2393	{
2394	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx(pVM, (PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2395	true /fCallRing3/);
2396	break;
2397	}
2398
2399	/*
2400	* Enter a r/w critical section shared.
2401	*/
2402	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2403	{
2404	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx(pVM, (PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2405	true /fCallRing3/);
2406	break;
2407	}
2408
2409	/*
2410	* Acquire the PDM lock.
2411	*/
2412	case VMMCALLRING3_PDM_LOCK:
2413	{
2414	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2415	break;
2416	}
2417
2418	/*
2419	* Grow the PGM pool.
2420	*/
2421	case VMMCALLRING3_PGM_POOL_GROW:
2422	{
2423	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2424	break;
2425	}
2426
2427	/*
2428	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2429	*/
2430	case VMMCALLRING3_PGM_MAP_CHUNK:
2431	{
2432	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2433	break;
2434	}
2435
2436	/*
2437	* Allocates more handy pages.
2438	*/
2439	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2440	{
2441	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2442	break;
2443	}
2444
2445	/*
2446	* Allocates a large page.
2447	*/
2448	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2449	{
2450	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2451	break;
2452	}
2453
2454	/*
2455	* Acquire the PGM lock.
2456	*/
2457	case VMMCALLRING3_PGM_LOCK:
2458	{
2459	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2460	break;
2461	}
2462
2463	/*
2464	* Acquire the MM hypervisor heap lock.
2465	*/
2466	case VMMCALLRING3_MMHYPER_LOCK:
2467	{
2468	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2469	break;
2470	}
2471
2472	/*
2473	* This is a noop. We just take this route to avoid unnecessary
2474	* tests in the loops.
2475	*/
2476	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2477	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2478	LogAlways(("FLUSH\n"));
2479	break;
2480
2481	/*
2482	* Set the VM error message.
2483	*/
2484	case VMMCALLRING3_VM_SET_ERROR:
2485	VMR3SetErrorWorker(pVM);
2486	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2487	break;
2488
2489	/*
2490	* Set the VM runtime error message.
2491	*/
2492	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2493	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2494	break;
2495
2496	/*
2497	* Signal a ring 0 hypervisor assertion.
2498	* Cancel the longjmp operation that's in progress.
2499	*/
2500	case VMMCALLRING3_VM_R0_ASSERTION:
2501	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2502	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2503	#ifdef RT_ARCH_X86
2504	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2505	#else
2506	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2507	#endif
2508	#ifdef VMM_R0_SWITCH_STACK
2509	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2510	#endif
2511	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2512	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2513	return VERR_VMM_RING0_ASSERTION;
2514
2515	/*
2516	* A forced switch to ring 0 for preemption purposes.
2517	*/
2518	case VMMCALLRING3_VM_R0_PREEMPT:
2519	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2520	break;
2521
2522	default:
2523	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2524	return VERR_VMM_UNKNOWN_RING3_CALL;
2525	}
2526
2527	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2528	return VINF_SUCCESS;
2529	}
2530
2531
2532	/**
2533	* Displays the Force action Flags.
2534	*
2535	* @param pVM The cross context VM structure.
2536	* @param pHlp The output helpers.
2537	* @param pszArgs The additional arguments (ignored).
2538	*/
2539	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2540	{
2541	int c;
2542	uint32_t f;
2543	NOREF(pszArgs);
2544
2545	#define PRINT_FLAG(prf,flag) do { \
2546	if (f & (prf##flag)) \
2547	{ \
2548	static const char *s_psz = #flag; \
2549	if (!(c % 6)) \
2550	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2551	else \
2552	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2553	c++; \
2554	f &= ~(prf##flag); \
2555	} \
2556	} while (0)
2557
2558	#define PRINT_GROUP(prf,grp,sfx) do { \
2559	if (f & (prf##grp##sfx)) \
2560	{ \
2561	static const char *s_psz = #grp; \
2562	if (!(c % 5)) \
2563	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2564	else \
2565	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2566	c++; \
2567	} \
2568	} while (0)
2569
2570	/*
2571	* The global flags.
2572	*/
2573	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2574	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2575
2576	/* show the flag mnemonics */
2577	c = 0;
2578	f = fGlobalForcedActions;
2579	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2580	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2581	PRINT_FLAG(VM_FF_,PDM_DMA);
2582	PRINT_FLAG(VM_FF_,DBGF);
2583	PRINT_FLAG(VM_FF_,REQUEST);
2584	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2585	PRINT_FLAG(VM_FF_,RESET);
2586	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2587	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2588	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2589	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2590	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2591	if (f)
2592	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2593	else
2594	pHlp->pfnPrintf(pHlp, "\n");
2595
2596	/* the groups */
2597	c = 0;
2598	f = fGlobalForcedActions;
2599	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2600	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2601	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2602	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2603	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2604	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2605	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2606	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2607	if (c)
2608	pHlp->pfnPrintf(pHlp, "\n");
2609
2610	/*
2611	* Per CPU flags.
2612	*/
2613	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2614	{
2615	PVMCPU pVCpu = pVM->apCpusR3[i];
2616	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2617	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2618
2619	/* show the flag mnemonics */
2620	c = 0;
2621	f = fLocalForcedActions;
2622	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2623	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2624	PRINT_FLAG(VMCPU_FF_,TIMER);
2625	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2626	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2627	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2628	PRINT_FLAG(VMCPU_FF_,UNHALT);
2629	PRINT_FLAG(VMCPU_FF_,IEM);
2630	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2631	PRINT_FLAG(VMCPU_FF_,DBGF);
2632	PRINT_FLAG(VMCPU_FF_,REQUEST);
2633	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2634	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2635	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2636	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2637	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2638	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2639	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2640	PRINT_FLAG(VMCPU_FF_,TO_R3);
2641	PRINT_FLAG(VMCPU_FF_,IOM);
2642	if (f)
2643	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2644	else
2645	pHlp->pfnPrintf(pHlp, "\n");
2646
2647	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2648	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2649
2650	/* the groups */
2651	c = 0;
2652	f = fLocalForcedActions;
2653	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2654	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2655	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2656	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2657	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2658	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2659	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2660	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2661	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2662	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2663	if (c)
2664	pHlp->pfnPrintf(pHlp, "\n");
2665	}
2666
2667	#undef PRINT_FLAG
2668	#undef PRINT_GROUP
2669	}
2670

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 90806

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