VMM.cpp@ 90870

Last change on this file since 90870 was 90862, checked in by vboxsync, 3 years ago
IPRT,SUPDrv,VMM,++: Bumped major support driver version. Added RTLogSetR0ProgramStart and make the VMM use it when configuring the ring-0 loggers. Removed pfnFlush from the parameter list of RTLogCreateEx[V]. bugref:10086
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 102.9 KB

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1	/* $Id: VMM.cpp 90862 2021-08-25 00:37:59Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pLogger, a_pR3Logger) \
154	do { \
155	if ((a_pLogger)->AuxDesc.offBuf == 0 \|\| (a_pLogger)->AuxDesc.fFlushedIndicator) \
156	{ /* likely? */ } \
157	else \
158	{ \
159	RTLogBulkWrite(a_pR3Logger, (a_pLogger)->pchBufR3, (a_pLogger)->AuxDesc.offBuf); \
160	(a_pLogger)->AuxDesc.fFlushedIndicator = true; \
161	} \
162	} while (0)
163
164
165	/*********************************************************************************************************************************
166	* Internal Functions *
167	*********************************************************************************************************************************/
168	static int vmmR3InitStacks(PVM pVM);
169	static void vmmR3InitRegisterStats(PVM pVM);
170	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
171	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
172	#if 0 /* pointless when timers doesn't run on EMT */
173	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
174	#endif
175	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
176	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
177	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
178	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
179
180
181	/**
182	* Initializes the VMM.
183	*
184	* @returns VBox status code.
185	* @param pVM The cross context VM structure.
186	*/
187	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
188	{
189	LogFlow(("VMMR3Init\n"));
190
191	/*
192	* Assert alignment, sizes and order.
193	*/
194	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
195	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
196
197	/*
198	* Init basic VM VMM members.
199	*/
200	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
201	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
202	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
203	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
204	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
205	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
209	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
210
211	#if 0 /* pointless when timers doesn't run on EMT */
212	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
213	* The EMT yield interval. The EMT yielding is a hack we employ to play a
214	* bit nicer with the rest of the system (like for instance the GUI).
215	*/
216	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
217	23 /* Value arrived at after experimenting with the grub boot prompt. */);
218	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
219	#endif
220
221	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
222	* Controls whether we employ per-cpu preemption timers to limit the time
223	* spent executing guest code. This option is not available on all
224	* platforms and we will silently ignore this setting then. If we are
225	* running in VT-x mode, we will use the VMX-preemption timer instead of
226	* this one when possible.
227	*/
228	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
229	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
230	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
231
232	/*
233	* Initialize the VMM rendezvous semaphores.
234	*/
235	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
236	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
237	return VERR_NO_MEMORY;
238	for (VMCPUID i = 0; i < pVM->cCpus; i++)
239	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
240	for (VMCPUID i = 0; i < pVM->cCpus; i++)
241	{
242	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
243	AssertRCReturn(rc, rc);
244	}
245	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
246	AssertRCReturn(rc, rc);
247	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
260	AssertRCReturn(rc, rc);
261
262	/*
263	* Register the saved state data unit.
264	*/
265	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
266	NULL, NULL, NULL,
267	NULL, vmmR3Save, NULL,
268	NULL, vmmR3Load, NULL);
269	if (RT_FAILURE(rc))
270	return rc;
271
272	/*
273	* Register the Ring-0 VM handle with the session for fast ioctl calls.
274	*/
275	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
276	if (RT_FAILURE(rc))
277	return rc;
278
279	/*
280	* Init various sub-components.
281	*/
282	rc = vmmR3InitStacks(pVM);
283	if (RT_SUCCESS(rc))
284	{
285	#ifdef VBOX_WITH_NMI
286	/*
287	* Allocate mapping for the host APIC.
288	*/
289	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
290	AssertRC(rc);
291	#endif
292	if (RT_SUCCESS(rc))
293	{
294	/*
295	* Debug info and statistics.
296	*/
297	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
298	vmmR3InitRegisterStats(pVM);
299	vmmInitFormatTypes();
300
301	return VINF_SUCCESS;
302	}
303	}
304	/** @todo Need failure cleanup? */
305
306	return rc;
307	}
308
309
310	/**
311	* Allocate & setup the VMM RC stack(s) (for EMTs).
312	*
313	* The stacks are also used for long jumps in Ring-0.
314	*
315	* @returns VBox status code.
316	* @param pVM The cross context VM structure.
317	*
318	* @remarks The optional guard page gets it protection setup up during R3 init
319	* completion because of init order issues.
320	*/
321	static int vmmR3InitStacks(PVM pVM)
322	{
323	int rc = VINF_SUCCESS;
324	#ifdef VMM_R0_SWITCH_STACK
325	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
326	#else
327	uint32_t fFlags = 0;
328	#endif
329
330	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
331	{
332	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
333
334	#ifdef VBOX_STRICT_VMM_STACK
335	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
336	#else
337	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
338	#endif
339	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
340	if (RT_SUCCESS(rc))
341	{
342	#ifdef VBOX_STRICT_VMM_STACK
343	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
344	#endif
345	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
346
347	}
348	}
349
350	return rc;
351	}
352
353
354	/**
355	* VMMR3Init worker that register the statistics with STAM.
356	*
357	* @param pVM The cross context VM structure.
358	*/
359	static void vmmR3InitRegisterStats(PVM pVM)
360	{
361	RT_NOREF_PV(pVM);
362
363	/*
364	* Statistics.
365	*/
366	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
429
430	#ifdef VBOX_WITH_STATISTICS
431	for (VMCPUID i = 0; i < pVM->cCpus; i++)
432	{
433	PVMCPU pVCpu = pVM->apCpusR3[i];
434	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
435	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
436	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
437	}
438	#endif
439	for (VMCPUID i = 0; i < pVM->cCpus; i++)
440	{
441	PVMCPU pVCpu = pVM->apCpusR3[i];
442	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
443	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
444	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
445	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
446	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
447	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
448	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
449	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
450	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
451	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
452	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
453	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
454	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
455	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
456	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
457	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
458	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
459
460	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
461	}
462	}
463
464
465	/**
466	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
467	*
468	* @returns VBox status code.
469	* @param pVM The cross context VM structure.
470	* @param pVCpu The cross context per CPU structure.
471	* @thread EMT(pVCpu)
472	*/
473	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
474	{
475	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
476	}
477
478
479	/**
480	* Initializes the R0 VMM.
481	*
482	* @returns VBox status code.
483	* @param pVM The cross context VM structure.
484	*/
485	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
486	{
487	int rc;
488	PVMCPU pVCpu = VMMGetCpu(pVM);
489	Assert(pVCpu && pVCpu->idCpu == 0);
490
491	/*
492	* Make sure the ring-0 loggers are up to date.
493	*/
494	rc = VMMR3UpdateLoggers(pVM);
495	if (RT_FAILURE(rc))
496	return rc;
497
498	/*
499	* Call Ring-0 entry with init code.
500	*/
501	for (;;)
502	{
503	#ifdef NO_SUPCALLR0VMM
504	//rc = VERR_GENERAL_FAILURE;
505	rc = VINF_SUCCESS;
506	#else
507	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
508	#endif
509	/*
510	* Flush the logs.
511	*/
512	#ifdef LOG_ENABLED
513	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.Logger, NULL);
514	#endif
515	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.RelLogger, RTLogRelGetDefaultInstance());
516	if (rc != VINF_VMM_CALL_HOST)
517	break;
518	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
519	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
520	break;
521	/* Resume R0 */
522	}
523
524	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
525	{
526	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
527	if (RT_SUCCESS(rc))
528	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
529	}
530
531	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
532	if (pVM->vmm.s.fIsUsingContextHooks)
533	LogRel(("VMM: Enabled thread-context hooks\n"));
534	else
535	LogRel(("VMM: Thread-context hooks unavailable\n"));
536
537	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
538	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
539	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
540	else
541	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
542	if (pVM->vmm.s.fIsPreemptPossible)
543	LogRel(("VMM: Kernel preemption is possible\n"));
544	else
545	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
546
547	/*
548	* Send all EMTs to ring-0 to get their logger initialized.
549	*/
550	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
551	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
552
553	return rc;
554	}
555
556
557	/**
558	* Called when an init phase completes.
559	*
560	* @returns VBox status code.
561	* @param pVM The cross context VM structure.
562	* @param enmWhat Which init phase.
563	*/
564	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
565	{
566	int rc = VINF_SUCCESS;
567
568	switch (enmWhat)
569	{
570	case VMINITCOMPLETED_RING3:
571	{
572	#if 0 /* pointless when timers doesn't run on EMT */
573	/*
574	* Create the EMT yield timer.
575	*/
576	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
577	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
578	AssertRCReturn(rc, rc);
579
580	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
581	AssertRCReturn(rc, rc);
582	#endif
583	break;
584	}
585
586	case VMINITCOMPLETED_HM:
587	{
588	/*
589	* Disable the periodic preemption timers if we can use the
590	* VMX-preemption timer instead.
591	*/
592	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
593	&& HMR3IsVmxPreemptionTimerUsed(pVM))
594	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
595	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
596
597	/*
598	* Last chance for GIM to update its CPUID leaves if it requires
599	* knowledge/information from HM initialization.
600	*/
601	rc = GIMR3InitCompleted(pVM);
602	AssertRCReturn(rc, rc);
603
604	/*
605	* CPUM's post-initialization (print CPUIDs).
606	*/
607	CPUMR3LogCpuIdAndMsrFeatures(pVM);
608	break;
609	}
610
611	default: /* shuts up gcc */
612	break;
613	}
614
615	return rc;
616	}
617
618
619	/**
620	* Terminate the VMM bits.
621	*
622	* @returns VBox status code.
623	* @param pVM The cross context VM structure.
624	*/
625	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
626	{
627	PVMCPU pVCpu = VMMGetCpu(pVM);
628	Assert(pVCpu && pVCpu->idCpu == 0);
629
630	/*
631	* Call Ring-0 entry with termination code.
632	*/
633	int rc;
634	for (;;)
635	{
636	#ifdef NO_SUPCALLR0VMM
637	//rc = VERR_GENERAL_FAILURE;
638	rc = VINF_SUCCESS;
639	#else
640	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
641	#endif
642	/*
643	* Flush the logs.
644	*/
645	#ifdef LOG_ENABLED
646	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.Logger, NULL);
647	#endif
648	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.RelLogger, RTLogRelGetDefaultInstance());
649	if (rc != VINF_VMM_CALL_HOST)
650	break;
651	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
652	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
653	break;
654	/* Resume R0 */
655	}
656	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
657	{
658	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
659	if (RT_SUCCESS(rc))
660	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
661	}
662
663	for (VMCPUID i = 0; i < pVM->cCpus; i++)
664	{
665	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
666	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
667	}
668	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
669	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
670	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
671	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
672	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
673	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
674	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
675	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
676	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
677	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
678	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
679	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
680	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
681	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
682	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
683	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
684
685	vmmTermFormatTypes();
686	return rc;
687	}
688
689
690	/**
691	* Applies relocations to data and code managed by this
692	* component. This function will be called at init and
693	* whenever the VMM need to relocate it self inside the GC.
694	*
695	* The VMM will need to apply relocations to the core code.
696	*
697	* @param pVM The cross context VM structure.
698	* @param offDelta The relocation delta.
699	*/
700	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
701	{
702	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
703	RT_NOREF(offDelta);
704
705	/*
706	* Update the logger.
707	*/
708	VMMR3UpdateLoggers(pVM);
709	}
710
711
712	/**
713	* Worker for VMMR3UpdateLoggers.
714	*/
715	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
716	{
717	/*
718	* Get the group count.
719	*/
720	uint32_t uGroupsCrc32 = 0;
721	uint32_t cGroups = 0;
722	uint64_t fFlags = 0;
723	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
724	Assert(rc == VERR_BUFFER_OVERFLOW);
725
726	/*
727	* Allocate the request of the right size.
728	*/
729	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
730	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
731	if (pReq)
732	{
733	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
734	pReq->Hdr.cbReq = cbReq;
735	pReq->cGroups = cGroups;
736	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
737	AssertRC(rc);
738	if (RT_SUCCESS(rc))
739	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
740
741	RTMemFree(pReq);
742	}
743	else
744	rc = VERR_NO_MEMORY;
745	return rc;
746	}
747
748
749	/**
750	* Updates the settings for the RC and R0 loggers.
751	*
752	* @returns VBox status code.
753	* @param pVM The cross context VM structure.
754	* @thread EMT
755	*/
756	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
757	{
758	VM_ASSERT_EMT(pVM);
759	PVMCPU pVCpu = VMMGetCpu(pVM);
760	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
761
762	/*
763	* Each EMT has each own logger instance.
764	*/
765	/* Debug logging.*/
766	int rcDebug = VINF_SUCCESS;
767	#ifdef LOG_ENABLED
768	PRTLOGGER const pDefault = RTLogDefaultInstance();
769	if (pDefault)
770	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
771	#else
772	RT_NOREF(pVM);
773	#endif
774
775	/* Release logging. */
776	int rcRelease = VINF_SUCCESS;
777	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
778	if (pRelease)
779	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
780
781	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
782	}
783
784
785	/**
786	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
787	*
788	* @returns Pointer to the buffer.
789	* @param pVM The cross context VM structure.
790	*/
791	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
792	{
793	return pVM->vmm.s.szRing0AssertMsg1;
794	}
795
796
797	/**
798	* Returns the VMCPU of the specified virtual CPU.
799	*
800	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
801	*
802	* @param pUVM The user mode VM handle.
803	* @param idCpu The ID of the virtual CPU.
804	*/
805	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
806	{
807	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
808	AssertReturn(idCpu < pUVM->cCpus, NULL);
809	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
810	return pUVM->pVM->apCpusR3[idCpu];
811	}
812
813
814	/**
815	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
816	*
817	* @returns Pointer to the buffer.
818	* @param pVM The cross context VM structure.
819	*/
820	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
821	{
822	return pVM->vmm.s.szRing0AssertMsg2;
823	}
824
825
826	/**
827	* Execute state save operation.
828	*
829	* @returns VBox status code.
830	* @param pVM The cross context VM structure.
831	* @param pSSM SSM operation handle.
832	*/
833	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
834	{
835	LogFlow(("vmmR3Save:\n"));
836
837	/*
838	* Save the started/stopped state of all CPUs except 0 as it will always
839	* be running. This avoids breaking the saved state version. :-)
840	*/
841	for (VMCPUID i = 1; i < pVM->cCpus; i++)
842	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
843
844	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
845	}
846
847
848	/**
849	* Execute state load operation.
850	*
851	* @returns VBox status code.
852	* @param pVM The cross context VM structure.
853	* @param pSSM SSM operation handle.
854	* @param uVersion Data layout version.
855	* @param uPass The data pass.
856	*/
857	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
858	{
859	LogFlow(("vmmR3Load:\n"));
860	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
861
862	/*
863	* Validate version.
864	*/
865	if ( uVersion != VMM_SAVED_STATE_VERSION
866	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
867	{
868	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
869	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
870	}
871
872	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
873	{
874	/* Ignore the stack bottom, stack pointer and stack bits. */
875	RTRCPTR RCPtrIgnored;
876	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
877	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
878	#ifdef RT_OS_DARWIN
879	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
880	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
881	&& SSMR3HandleRevision(pSSM) >= 48858
882	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
883	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
884	)
885	SSMR3Skip(pSSM, 16384);
886	else
887	SSMR3Skip(pSSM, 8192);
888	#else
889	SSMR3Skip(pSSM, 8192);
890	#endif
891	}
892
893	/*
894	* Restore the VMCPU states. VCPU 0 is always started.
895	*/
896	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
897	for (VMCPUID i = 1; i < pVM->cCpus; i++)
898	{
899	bool fStarted;
900	int rc = SSMR3GetBool(pSSM, &fStarted);
901	if (RT_FAILURE(rc))
902	return rc;
903	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
904	}
905
906	/* terminator */
907	uint32_t u32;
908	int rc = SSMR3GetU32(pSSM, &u32);
909	if (RT_FAILURE(rc))
910	return rc;
911	if (u32 != UINT32_MAX)
912	{
913	AssertMsgFailed(("u32=%#x\n", u32));
914	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
915	}
916	return VINF_SUCCESS;
917	}
918
919
920	/**
921	* Suspends the CPU yielder.
922	*
923	* @param pVM The cross context VM structure.
924	*/
925	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
926	{
927	#if 0 /* pointless when timers doesn't run on EMT */
928	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
929	if (!pVM->vmm.s.cYieldResumeMillies)
930	{
931	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
932	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
933	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
934	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
935	else
936	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
937	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
938	}
939	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
940	#else
941	RT_NOREF(pVM);
942	#endif
943	}
944
945
946	/**
947	* Stops the CPU yielder.
948	*
949	* @param pVM The cross context VM structure.
950	*/
951	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
952	{
953	#if 0 /* pointless when timers doesn't run on EMT */
954	if (!pVM->vmm.s.cYieldResumeMillies)
955	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
956	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
957	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
958	#else
959	RT_NOREF(pVM);
960	#endif
961	}
962
963
964	/**
965	* Resumes the CPU yielder when it has been a suspended or stopped.
966	*
967	* @param pVM The cross context VM structure.
968	*/
969	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
970	{
971	#if 0 /* pointless when timers doesn't run on EMT */
972	if (pVM->vmm.s.cYieldResumeMillies)
973	{
974	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
975	pVM->vmm.s.cYieldResumeMillies = 0;
976	}
977	#else
978	RT_NOREF(pVM);
979	#endif
980	}
981
982
983	#if 0 /* pointless when timers doesn't run on EMT */
984	/**
985	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
986	*
987	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
988	*/
989	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
990	{
991	NOREF(pvUser);
992
993	/*
994	* This really needs some careful tuning. While we shouldn't be too greedy since
995	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
996	* because that'll cause us to stop up.
997	*
998	* The current logic is to use the default interval when there is no lag worth
999	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1000	*
1001	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1002	* so the lag is up to date.)
1003	*/
1004	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1005	if ( u64Lag < 50000000 /* 50ms */
1006	\|\| ( u64Lag < 1000000000 /* 1s */
1007	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1008	)
1009	{
1010	uint64_t u64Elapsed = RTTimeNanoTS();
1011	pVM->vmm.s.u64LastYield = u64Elapsed;
1012
1013	RTThreadYield();
1014
1015	#ifdef LOG_ENABLED
1016	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1017	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1018	#endif
1019	}
1020	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1021	}
1022	#endif
1023
1024
1025	/**
1026	* Executes guest code (Intel VT-x and AMD-V).
1027	*
1028	* @param pVM The cross context VM structure.
1029	* @param pVCpu The cross context virtual CPU structure.
1030	*/
1031	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1032	{
1033	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1034
1035	for (;;)
1036	{
1037	int rc;
1038	do
1039	{
1040	#ifdef NO_SUPCALLR0VMM
1041	rc = VERR_GENERAL_FAILURE;
1042	#else
1043	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1044	if (RT_LIKELY(rc == VINF_SUCCESS))
1045	rc = pVCpu->vmm.s.iLastGZRc;
1046	#endif
1047	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1048
1049	#if 0 /** @todo triggers too often */
1050	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1051	#endif
1052
1053	/*
1054	* Flush the logs
1055	*/
1056	#ifdef LOG_ENABLED
1057	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.Logger, NULL);
1058	#endif
1059	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.RelLogger, RTLogRelGetDefaultInstance());
1060	if (rc != VINF_VMM_CALL_HOST)
1061	{
1062	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1063	return rc;
1064	}
1065	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1066	if (RT_FAILURE(rc))
1067	return rc;
1068	/* Resume R0 */
1069	}
1070	}
1071
1072
1073	/**
1074	* Perform one of the fast I/O control VMMR0 operation.
1075	*
1076	* @returns VBox strict status code.
1077	* @param pVM The cross context VM structure.
1078	* @param pVCpu The cross context virtual CPU structure.
1079	* @param enmOperation The operation to perform.
1080	*/
1081	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1082	{
1083	for (;;)
1084	{
1085	VBOXSTRICTRC rcStrict;
1086	do
1087	{
1088	#ifdef NO_SUPCALLR0VMM
1089	rcStrict = VERR_GENERAL_FAILURE;
1090	#else
1091	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1092	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1093	rcStrict = pVCpu->vmm.s.iLastGZRc;
1094	#endif
1095	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1096
1097	/*
1098	* Flush the logs
1099	*/
1100	#ifdef LOG_ENABLED
1101	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.Logger, NULL);
1102	#endif
1103	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.RelLogger, RTLogRelGetDefaultInstance());
1104	if (rcStrict != VINF_VMM_CALL_HOST)
1105	return rcStrict;
1106	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1107	if (RT_FAILURE(rc))
1108	return rc;
1109	/* Resume R0 */
1110	}
1111	}
1112
1113
1114	/**
1115	* VCPU worker for VMMR3SendStartupIpi.
1116	*
1117	* @param pVM The cross context VM structure.
1118	* @param idCpu Virtual CPU to perform SIPI on.
1119	* @param uVector The SIPI vector.
1120	*/
1121	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1122	{
1123	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1124	VMCPU_ASSERT_EMT(pVCpu);
1125
1126	/*
1127	* In the INIT state, the target CPU is only responsive to an SIPI.
1128	* This is also true for when when the CPU is in VMX non-root mode.
1129	*
1130	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1131	* See Intel spec. 26.6.2 "Activity State".
1132	*/
1133	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1134	return VINF_SUCCESS;
1135
1136	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1137	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1138	if (CPUMIsGuestInVmxRootMode(pCtx))
1139	{
1140	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1141	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1142	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1143
1144	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1145	return VINF_SUCCESS;
1146	}
1147	#endif
1148
1149	pCtx->cs.Sel = uVector << 8;
1150	pCtx->cs.ValidSel = uVector << 8;
1151	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1152	pCtx->cs.u64Base = uVector << 12;
1153	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1154	pCtx->rip = 0;
1155
1156	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1157
1158	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1159	EMSetState(pVCpu, EMSTATE_HALTED);
1160	return VINF_EM_RESCHEDULE;
1161	# else /* And if we go the VMCPU::enmState way it can stay here. */
1162	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1163	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1164	return VINF_SUCCESS;
1165	# endif
1166	}
1167
1168
1169	/**
1170	* VCPU worker for VMMR3SendInitIpi.
1171	*
1172	* @returns VBox status code.
1173	* @param pVM The cross context VM structure.
1174	* @param idCpu Virtual CPU to perform SIPI on.
1175	*/
1176	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1177	{
1178	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1179	VMCPU_ASSERT_EMT(pVCpu);
1180
1181	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1182
1183	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1184	* wait-for-SIPI state. Verify. */
1185
1186	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1187	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1188	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1189	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1190	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1191	#endif
1192
1193	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1194	* IPI (e.g. SVM_EXIT_INIT). */
1195
1196	PGMR3ResetCpu(pVM, pVCpu);
1197	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1198	APICR3InitIpi(pVCpu);
1199	TRPMR3ResetCpu(pVCpu);
1200	CPUMR3ResetCpu(pVM, pVCpu);
1201	EMR3ResetCpu(pVCpu);
1202	HMR3ResetCpu(pVCpu);
1203	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1204
1205	/* This will trickle up on the target EMT. */
1206	return VINF_EM_WAIT_SIPI;
1207	}
1208
1209
1210	/**
1211	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1212	* vector-dependent state and unhalting processor.
1213	*
1214	* @param pVM The cross context VM structure.
1215	* @param idCpu Virtual CPU to perform SIPI on.
1216	* @param uVector SIPI vector.
1217	*/
1218	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1219	{
1220	AssertReturnVoid(idCpu < pVM->cCpus);
1221
1222	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1223	AssertRC(rc);
1224	}
1225
1226
1227	/**
1228	* Sends init IPI to the virtual CPU.
1229	*
1230	* @param pVM The cross context VM structure.
1231	* @param idCpu Virtual CPU to perform int IPI on.
1232	*/
1233	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1234	{
1235	AssertReturnVoid(idCpu < pVM->cCpus);
1236
1237	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1238	AssertRC(rc);
1239	}
1240
1241
1242	/**
1243	* Registers the guest memory range that can be used for patching.
1244	*
1245	* @returns VBox status code.
1246	* @param pVM The cross context VM structure.
1247	* @param pPatchMem Patch memory range.
1248	* @param cbPatchMem Size of the memory range.
1249	*/
1250	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1251	{
1252	VM_ASSERT_EMT(pVM);
1253	if (HMIsEnabled(pVM))
1254	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1255
1256	return VERR_NOT_SUPPORTED;
1257	}
1258
1259
1260	/**
1261	* Deregisters the guest memory range that can be used for patching.
1262	*
1263	* @returns VBox status code.
1264	* @param pVM The cross context VM structure.
1265	* @param pPatchMem Patch memory range.
1266	* @param cbPatchMem Size of the memory range.
1267	*/
1268	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1269	{
1270	if (HMIsEnabled(pVM))
1271	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1272
1273	return VINF_SUCCESS;
1274	}
1275
1276
1277	/**
1278	* Common recursion handler for the other EMTs.
1279	*
1280	* @returns Strict VBox status code.
1281	* @param pVM The cross context VM structure.
1282	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1283	* @param rcStrict Current status code to be combined with the one
1284	* from this recursion and returned.
1285	*/
1286	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1287	{
1288	int rc2;
1289
1290	/*
1291	* We wait here while the initiator of this recursion reconfigures
1292	* everything. The last EMT to get in signals the initiator.
1293	*/
1294	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1295	{
1296	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1297	AssertLogRelRC(rc2);
1298	}
1299
1300	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1301	AssertLogRelRC(rc2);
1302
1303	/*
1304	* Do the normal rendezvous processing.
1305	*/
1306	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1307	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1308
1309	/*
1310	* Wait for the initiator to restore everything.
1311	*/
1312	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1313	AssertLogRelRC(rc2);
1314
1315	/*
1316	* Last thread out of here signals the initiator.
1317	*/
1318	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1319	{
1320	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1321	AssertLogRelRC(rc2);
1322	}
1323
1324	/*
1325	* Merge status codes and return.
1326	*/
1327	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1328	if ( rcStrict2 != VINF_SUCCESS
1329	&& ( rcStrict == VINF_SUCCESS
1330	\|\| rcStrict > rcStrict2))
1331	rcStrict = rcStrict2;
1332	return rcStrict;
1333	}
1334
1335
1336	/**
1337	* Count returns and have the last non-caller EMT wake up the caller.
1338	*
1339	* @returns VBox strict informational status code for EM scheduling. No failures
1340	* will be returned here, those are for the caller only.
1341	*
1342	* @param pVM The cross context VM structure.
1343	* @param rcStrict The current accumulated recursive status code,
1344	* to be merged with i32RendezvousStatus and
1345	* returned.
1346	*/
1347	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1348	{
1349	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1350
1351	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1352	if (cReturned == pVM->cCpus - 1U)
1353	{
1354	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1355	AssertLogRelRC(rc);
1356	}
1357
1358	/*
1359	* Merge the status codes, ignoring error statuses in this code path.
1360	*/
1361	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1362	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1363	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1364	VERR_IPE_UNEXPECTED_INFO_STATUS);
1365
1366	if (RT_SUCCESS(rcStrict2))
1367	{
1368	if ( rcStrict2 != VINF_SUCCESS
1369	&& ( rcStrict == VINF_SUCCESS
1370	\|\| rcStrict > rcStrict2))
1371	rcStrict = rcStrict2;
1372	}
1373	return rcStrict;
1374	}
1375
1376
1377	/**
1378	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1379	*
1380	* @returns VBox strict informational status code for EM scheduling. No failures
1381	* will be returned here, those are for the caller only. When
1382	* fIsCaller is set, VINF_SUCCESS is always returned.
1383	*
1384	* @param pVM The cross context VM structure.
1385	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1386	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1387	* not.
1388	* @param fFlags The flags.
1389	* @param pfnRendezvous The callback.
1390	* @param pvUser The user argument for the callback.
1391	*/
1392	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1393	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1394	{
1395	int rc;
1396	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1397
1398	/*
1399	* Enter, the last EMT triggers the next callback phase.
1400	*/
1401	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1402	if (cEntered != pVM->cCpus)
1403	{
1404	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1405	{
1406	/* Wait for our turn. */
1407	for (;;)
1408	{
1409	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1410	AssertLogRelRC(rc);
1411	if (!pVM->vmm.s.fRendezvousRecursion)
1412	break;
1413	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1414	}
1415	}
1416	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1417	{
1418	/* Wait for the last EMT to arrive and wake everyone up. */
1419	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1420	AssertLogRelRC(rc);
1421	Assert(!pVM->vmm.s.fRendezvousRecursion);
1422	}
1423	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1424	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1425	{
1426	/* Wait for our turn. */
1427	for (;;)
1428	{
1429	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1430	AssertLogRelRC(rc);
1431	if (!pVM->vmm.s.fRendezvousRecursion)
1432	break;
1433	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1434	}
1435	}
1436	else
1437	{
1438	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1439
1440	/*
1441	* The execute once is handled specially to optimize the code flow.
1442	*
1443	* The last EMT to arrive will perform the callback and the other
1444	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1445	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1446	* returns, that EMT will initiate the normal return sequence.
1447	*/
1448	if (!fIsCaller)
1449	{
1450	for (;;)
1451	{
1452	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1453	AssertLogRelRC(rc);
1454	if (!pVM->vmm.s.fRendezvousRecursion)
1455	break;
1456	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1457	}
1458
1459	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1460	}
1461	return VINF_SUCCESS;
1462	}
1463	}
1464	else
1465	{
1466	/*
1467	* All EMTs are waiting, clear the FF and take action according to the
1468	* execution method.
1469	*/
1470	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1471
1472	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1473	{
1474	/* Wake up everyone. */
1475	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1476	AssertLogRelRC(rc);
1477	}
1478	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1479	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1480	{
1481	/* Figure out who to wake up and wake it up. If it's ourself, then
1482	it's easy otherwise wait for our turn. */
1483	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1484	? 0
1485	: pVM->cCpus - 1U;
1486	if (pVCpu->idCpu != iFirst)
1487	{
1488	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1489	AssertLogRelRC(rc);
1490	for (;;)
1491	{
1492	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1493	AssertLogRelRC(rc);
1494	if (!pVM->vmm.s.fRendezvousRecursion)
1495	break;
1496	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1497	}
1498	}
1499	}
1500	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1501	}
1502
1503
1504	/*
1505	* Do the callback and update the status if necessary.
1506	*/
1507	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1508	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1509	{
1510	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1511	if (rcStrict2 != VINF_SUCCESS)
1512	{
1513	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1514	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1515	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1516	int32_t i32RendezvousStatus;
1517	do
1518	{
1519	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1520	if ( rcStrict2 == i32RendezvousStatus
1521	\|\| RT_FAILURE(i32RendezvousStatus)
1522	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1523	&& rcStrict2 > i32RendezvousStatus))
1524	break;
1525	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1526	}
1527	}
1528
1529	/*
1530	* Increment the done counter and take action depending on whether we're
1531	* the last to finish callback execution.
1532	*/
1533	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1534	if ( cDone != pVM->cCpus
1535	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1536	{
1537	/* Signal the next EMT? */
1538	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1539	{
1540	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1541	AssertLogRelRC(rc);
1542	}
1543	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1544	{
1545	Assert(cDone == pVCpu->idCpu + 1U);
1546	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1547	AssertLogRelRC(rc);
1548	}
1549	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1550	{
1551	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1552	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1553	AssertLogRelRC(rc);
1554	}
1555
1556	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1557	if (!fIsCaller)
1558	{
1559	for (;;)
1560	{
1561	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1562	AssertLogRelRC(rc);
1563	if (!pVM->vmm.s.fRendezvousRecursion)
1564	break;
1565	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1566	}
1567	}
1568	}
1569	else
1570	{
1571	/* Callback execution is all done, tell the rest to return. */
1572	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1573	AssertLogRelRC(rc);
1574	}
1575
1576	if (!fIsCaller)
1577	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1578	return rcStrictRecursion;
1579	}
1580
1581
1582	/**
1583	* Called in response to VM_FF_EMT_RENDEZVOUS.
1584	*
1585	* @returns VBox strict status code - EM scheduling. No errors will be returned
1586	* here, nor will any non-EM scheduling status codes be returned.
1587	*
1588	* @param pVM The cross context VM structure.
1589	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1590	*
1591	* @thread EMT
1592	*/
1593	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1594	{
1595	Assert(!pVCpu->vmm.s.fInRendezvous);
1596	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1597	pVCpu->vmm.s.fInRendezvous = true;
1598	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1599	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1600	pVCpu->vmm.s.fInRendezvous = false;
1601	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1602	return VBOXSTRICTRC_TODO(rcStrict);
1603	}
1604
1605
1606	/**
1607	* Helper for resetting an single wakeup event sempahore.
1608	*
1609	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1610	* @param hEvt The event semaphore to reset.
1611	*/
1612	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1613	{
1614	for (uint32_t cLoops = 0; ; cLoops++)
1615	{
1616	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1617	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1618	return rc;
1619	}
1620	}
1621
1622
1623	/**
1624	* Worker for VMMR3EmtRendezvous that handles recursion.
1625	*
1626	* @returns VBox strict status code. This will be the first error,
1627	* VINF_SUCCESS, or an EM scheduling status code.
1628	*
1629	* @param pVM The cross context VM structure.
1630	* @param pVCpu The cross context virtual CPU structure of the
1631	* calling EMT.
1632	* @param fFlags Flags indicating execution methods. See
1633	* grp_VMMR3EmtRendezvous_fFlags.
1634	* @param pfnRendezvous The callback.
1635	* @param pvUser User argument for the callback.
1636	*
1637	* @thread EMT(pVCpu)
1638	*/
1639	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1640	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1641	{
1642	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1643	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1644	Assert(pVCpu->vmm.s.fInRendezvous);
1645
1646	/*
1647	* Save the current state.
1648	*/
1649	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1650	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1651	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1652	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1653	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1654
1655	/*
1656	* Check preconditions and save the current state.
1657	*/
1658	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1659	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1660	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1661	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1662	VERR_INTERNAL_ERROR);
1663	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1664	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1665
1666	/*
1667	* Reset the recursion prep and pop semaphores.
1668	*/
1669	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1670	AssertLogRelRCReturn(rc, rc);
1671	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1672	AssertLogRelRCReturn(rc, rc);
1673	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1674	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1675	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1676	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1677
1678	/*
1679	* Usher the other thread into the recursion routine.
1680	*/
1681	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1682	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1683
1684	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1685	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1686	while (cLeft-- > 0)
1687	{
1688	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1689	AssertLogRelRC(rc);
1690	}
1691	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1692	{
1693	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1694	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1695	{
1696	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1697	AssertLogRelRC(rc);
1698	}
1699	}
1700	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1701	{
1702	Assert(cLeft == pVCpu->idCpu);
1703	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1704	{
1705	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1706	AssertLogRelRC(rc);
1707	}
1708	}
1709	else
1710	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1711	VERR_INTERNAL_ERROR_4);
1712
1713	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1714	AssertLogRelRC(rc);
1715	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1716	AssertLogRelRC(rc);
1717
1718
1719	/*
1720	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1721	*/
1722	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1723	{
1724	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1725	AssertLogRelRC(rc);
1726	}
1727
1728	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1729
1730	/*
1731	* Clear the slate and setup the new rendezvous.
1732	*/
1733	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1734	{
1735	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1736	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1737	}
1738	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1739	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1740	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1741	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1742
1743	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1744	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1745	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1746	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1747	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1748	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1749	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1750	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1751
1752	/*
1753	* We're ready to go now, do normal rendezvous processing.
1754	*/
1755	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1756	AssertLogRelRC(rc);
1757
1758	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1759
1760	/*
1761	* The caller waits for the other EMTs to be done, return and waiting on the
1762	* pop semaphore.
1763	*/
1764	for (;;)
1765	{
1766	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1767	AssertLogRelRC(rc);
1768	if (!pVM->vmm.s.fRendezvousRecursion)
1769	break;
1770	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1771	}
1772
1773	/*
1774	* Get the return code and merge it with the above recursion status.
1775	*/
1776	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1777	if ( rcStrict2 != VINF_SUCCESS
1778	&& ( rcStrict == VINF_SUCCESS
1779	\|\| rcStrict > rcStrict2))
1780	rcStrict = rcStrict2;
1781
1782	/*
1783	* Restore the parent rendezvous state.
1784	*/
1785	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1786	{
1787	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1788	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1789	}
1790	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1791	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1792	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1793	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1794
1795	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1796	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1797	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1798	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1799	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1800	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1801	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1802
1803	/*
1804	* Usher the other EMTs back to their parent recursion routine, waiting
1805	* for them to all get there before we return (makes sure they've been
1806	* scheduled and are past the pop event sem, see below).
1807	*/
1808	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1809	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1810	AssertLogRelRC(rc);
1811
1812	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1813	{
1814	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1815	AssertLogRelRC(rc);
1816	}
1817
1818	/*
1819	* We must reset the pop semaphore on the way out (doing the pop caller too,
1820	* just in case). The parent may be another recursion.
1821	*/
1822	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1823	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1824
1825	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1826
1827	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1828	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1829	return rcStrict;
1830	}
1831
1832
1833	/**
1834	* EMT rendezvous.
1835	*
1836	* Gathers all the EMTs and execute some code on each of them, either in a one
1837	* by one fashion or all at once.
1838	*
1839	* @returns VBox strict status code. This will be the first error,
1840	* VINF_SUCCESS, or an EM scheduling status code.
1841	*
1842	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1843	* doesn't support it or if the recursion is too deep.
1844	*
1845	* @param pVM The cross context VM structure.
1846	* @param fFlags Flags indicating execution methods. See
1847	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1848	* descending and ascending rendezvous types support
1849	* recursion from inside @a pfnRendezvous.
1850	* @param pfnRendezvous The callback.
1851	* @param pvUser User argument for the callback.
1852	*
1853	* @thread Any.
1854	*/
1855	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1856	{
1857	/*
1858	* Validate input.
1859	*/
1860	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1861	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1862	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1863	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1864	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1865	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1866	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1867	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1868
1869	VBOXSTRICTRC rcStrict;
1870	PVMCPU pVCpu = VMMGetCpu(pVM);
1871	if (!pVCpu)
1872	{
1873	/*
1874	* Forward the request to an EMT thread.
1875	*/
1876	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1877	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1878	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1879	else
1880	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1881	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1882	}
1883	else if ( pVM->cCpus == 1
1884	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
1885	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1886	{
1887	/*
1888	* Shortcut for the single EMT case.
1889	*
1890	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1891	* during vmR3Destroy after other emulation threads have started terminating.
1892	*/
1893	if (!pVCpu->vmm.s.fInRendezvous)
1894	{
1895	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1896	pVCpu->vmm.s.fInRendezvous = true;
1897	pVM->vmm.s.fRendezvousFlags = fFlags;
1898	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1899	pVCpu->vmm.s.fInRendezvous = false;
1900	}
1901	else
1902	{
1903	/* Recursion. Do the same checks as in the SMP case. */
1904	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1905	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1906	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1907	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1908	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1909	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1910	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1911	, VERR_DEADLOCK);
1912
1913	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1914	pVM->vmm.s.cRendezvousRecursions++;
1915	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1916	pVM->vmm.s.fRendezvousFlags = fFlags;
1917
1918	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1919
1920	pVM->vmm.s.fRendezvousFlags = fParentFlags;
1921	pVM->vmm.s.cRendezvousRecursions--;
1922	}
1923	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1924	}
1925	else
1926	{
1927	/*
1928	* Spin lock. If busy, check for recursion, if not recursing wait for
1929	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1930	*/
1931	int rc;
1932	rcStrict = VINF_SUCCESS;
1933	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1934	{
1935	/* Allow recursion in some cases. */
1936	if ( pVCpu->vmm.s.fInRendezvous
1937	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1938	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1939	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1940	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1941	))
1942	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
1943
1944	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
1945	VERR_DEADLOCK);
1946
1947	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
1948	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1949	{
1950	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
1951	{
1952	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1953	if ( rc != VINF_SUCCESS
1954	&& ( rcStrict == VINF_SUCCESS
1955	\|\| rcStrict > rc))
1956	rcStrict = rc;
1957	/** @todo Perhaps deal with termination here? */
1958	}
1959	ASMNopPause();
1960	}
1961	}
1962
1963	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
1964	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
1965	Assert(!pVCpu->vmm.s.fInRendezvous);
1966	pVCpu->vmm.s.fInRendezvous = true;
1967
1968	/*
1969	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
1970	*/
1971	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1972	{
1973	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1974	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1975	}
1976	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1977	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1978	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1979	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1980	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1981	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1982	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1983	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1984	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1985	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1986	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1987
1988	/*
1989	* Set the FF and poke the other EMTs.
1990	*/
1991	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1992	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1993
1994	/*
1995	* Do the same ourselves.
1996	*/
1997	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1998
1999	/*
2000	* The caller waits for the other EMTs to be done and return before doing
2001	* the cleanup. This makes away with wakeup / reset races we would otherwise
2002	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2003	*/
2004	for (;;)
2005	{
2006	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2007	AssertLogRelRC(rc);
2008	if (!pVM->vmm.s.fRendezvousRecursion)
2009	break;
2010	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2011	}
2012
2013	/*
2014	* Get the return code and clean up a little bit.
2015	*/
2016	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2017	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2018
2019	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2020	pVCpu->vmm.s.fInRendezvous = false;
2021
2022	/*
2023	* Merge rcStrict, rcStrict2 and rcStrict3.
2024	*/
2025	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2026	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2027	if ( rcStrict2 != VINF_SUCCESS
2028	&& ( rcStrict == VINF_SUCCESS
2029	\|\| rcStrict > rcStrict2))
2030	rcStrict = rcStrict2;
2031	if ( rcStrict3 != VINF_SUCCESS
2032	&& ( rcStrict == VINF_SUCCESS
2033	\|\| rcStrict > rcStrict3))
2034	rcStrict = rcStrict3;
2035	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2036	}
2037
2038	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2039	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2040	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2041	VERR_IPE_UNEXPECTED_INFO_STATUS);
2042	return VBOXSTRICTRC_VAL(rcStrict);
2043	}
2044
2045
2046	/**
2047	* Interface for vmR3SetHaltMethodU.
2048	*
2049	* @param pVCpu The cross context virtual CPU structure of the
2050	* calling EMT.
2051	* @param fMayHaltInRing0 The new state.
2052	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2053	* @thread EMT(pVCpu)
2054	*
2055	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2056	* component.
2057	*/
2058	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2059	{
2060	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2061	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2062	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2063	}
2064
2065
2066	/**
2067	* Read from the ring 0 jump buffer stack.
2068	*
2069	* @returns VBox status code.
2070	*
2071	* @param pVM The cross context VM structure.
2072	* @param idCpu The ID of the source CPU context (for the address).
2073	* @param R0Addr Where to start reading.
2074	* @param pvBuf Where to store the data we've read.
2075	* @param cbRead The number of bytes to read.
2076	*/
2077	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2078	{
2079	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2080	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2081	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2082
2083	int rc;
2084	#ifdef VMM_R0_SWITCH_STACK
2085	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2086	#else
2087	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2088	#endif
2089	if ( off < VMM_STACK_SIZE
2090	&& off + cbRead <= VMM_STACK_SIZE)
2091	{
2092	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2093	rc = VINF_SUCCESS;
2094	}
2095	else
2096	rc = VERR_INVALID_POINTER;
2097
2098	/* Supply the setjmp return RIP/EIP. */
2099	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2100	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2101	{
2102	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2103	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2104	size_t offDst = 0;
2105	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2106	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2107	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2108	{
2109	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2110	Assert(offSrc < cbSrc);
2111	pbSrc -= offSrc;
2112	cbSrc -= offSrc;
2113	}
2114	if (cbSrc > cbRead - offDst)
2115	cbSrc = cbRead - offDst;
2116	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2117
2118	if (cbSrc == cbRead)
2119	rc = VINF_SUCCESS;
2120	}
2121
2122	return rc;
2123	}
2124
2125
2126	/**
2127	* Used by the DBGF stack unwinder to initialize the register state.
2128	*
2129	* @param pUVM The user mode VM handle.
2130	* @param idCpu The ID of the CPU being unwound.
2131	* @param pState The unwind state to initialize.
2132	*/
2133	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2134	{
2135	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2136	AssertReturnVoid(pVCpu);
2137
2138	/*
2139	* Locate the resume point on the stack.
2140	*/
2141	#ifdef VMM_R0_SWITCH_STACK
2142	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2143	AssertReturnVoid(off < VMM_STACK_SIZE);
2144	#else
2145	uintptr_t off = 0;
2146	#endif
2147
2148	#ifdef RT_ARCH_AMD64
2149	/*
2150	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2151	*/
2152	# ifdef VBOX_STRICT
2153	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2154	off += 8; /* RESUME_MAGIC */
2155	# endif
2156	# ifdef RT_OS_WINDOWS
2157	off += 0xa0; /* XMM6 thru XMM15 */
2158	# endif
2159	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2160	off += 8;
2161	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2162	off += 8;
2163	# ifdef RT_OS_WINDOWS
2164	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2165	off += 8;
2166	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2167	off += 8;
2168	# endif
2169	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2170	off += 8;
2171	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2172	off += 8;
2173	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2174	off += 8;
2175	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2176	off += 8;
2177	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2178	off += 8;
2179	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2180	off += 8;
2181
2182	#elif defined(RT_ARCH_X86)
2183	/*
2184	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2185	*/
2186	# ifdef VBOX_STRICT
2187	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2188	off += 4; /* RESUME_MAGIC */
2189	# endif
2190	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2191	off += 4;
2192	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2193	off += 4;
2194	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2195	off += 4;
2196	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2197	off += 4;
2198	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2199	off += 4;
2200	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2201	off += 4;
2202	#else
2203	# error "Port me"
2204	#endif
2205
2206	/*
2207	* This is all we really need here, though the above helps if the assembly
2208	* doesn't contain unwind info (currently only on win/64, so that is useful).
2209	*/
2210	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2211	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2212	}
2213
2214
2215	/**
2216	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2217	*
2218	* @returns VBox status code.
2219	* @param pVM The cross context VM structure.
2220	* @param uOperation Operation to execute.
2221	* @param u64Arg Constant argument.
2222	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2223	* details.
2224	*/
2225	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2226	{
2227	PVMCPU pVCpu = VMMGetCpu(pVM);
2228	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2229	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2230	}
2231
2232
2233	/**
2234	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2235	*
2236	* @returns VBox status code.
2237	* @param pVM The cross context VM structure.
2238	* @param pVCpu The cross context VM structure.
2239	* @param enmOperation Operation to execute.
2240	* @param u64Arg Constant argument.
2241	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2242	* details.
2243	*/
2244	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2245	{
2246	int rc;
2247	for (;;)
2248	{
2249	#ifdef NO_SUPCALLR0VMM
2250	rc = VERR_GENERAL_FAILURE;
2251	#else
2252	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2253	#endif
2254	/*
2255	* Flush the logs.
2256	*/
2257	#ifdef LOG_ENABLED
2258	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.Logger, NULL);
2259	#endif
2260	VMM_FLUSH_R0_LOG(&pVCpu->vmm.s.RelLogger, RTLogRelGetDefaultInstance());
2261	if (rc != VINF_VMM_CALL_HOST)
2262	break;
2263	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2264	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2265	break;
2266	/* Resume R0 */
2267	}
2268
2269	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2270	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2271	VERR_IPE_UNEXPECTED_INFO_STATUS);
2272	return rc;
2273	}
2274
2275
2276	/**
2277	* Service a call to the ring-3 host code.
2278	*
2279	* @returns VBox status code.
2280	* @param pVM The cross context VM structure.
2281	* @param pVCpu The cross context virtual CPU structure.
2282	* @remarks Careful with critsects.
2283	*/
2284	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2285	{
2286	/*
2287	* We must also check for pending critsect exits or else we can deadlock
2288	* when entering other critsects here.
2289	*/
2290	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2291	PDMCritSectBothFF(pVM, pVCpu);
2292
2293	switch (pVCpu->vmm.s.enmCallRing3Operation)
2294	{
2295	/*
2296	* Acquire a critical section.
2297	*/
2298	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2299	{
2300	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx(pVM, (PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2301	true /fCallRing3/);
2302	break;
2303	}
2304
2305	/*
2306	* Enter a r/w critical section exclusively.
2307	*/
2308	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2309	{
2310	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx(pVM, (PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2311	true /fCallRing3/);
2312	break;
2313	}
2314
2315	/*
2316	* Enter a r/w critical section shared.
2317	*/
2318	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2319	{
2320	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx(pVM, (PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2321	true /fCallRing3/);
2322	break;
2323	}
2324
2325	/*
2326	* Acquire the PDM lock.
2327	*/
2328	case VMMCALLRING3_PDM_LOCK:
2329	{
2330	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2331	break;
2332	}
2333
2334	/*
2335	* Grow the PGM pool.
2336	*/
2337	case VMMCALLRING3_PGM_POOL_GROW:
2338	{
2339	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2340	break;
2341	}
2342
2343	/*
2344	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2345	*/
2346	case VMMCALLRING3_PGM_MAP_CHUNK:
2347	{
2348	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2349	break;
2350	}
2351
2352	/*
2353	* Allocates more handy pages.
2354	*/
2355	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2356	{
2357	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2358	break;
2359	}
2360
2361	/*
2362	* Allocates a large page.
2363	*/
2364	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2365	{
2366	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2367	break;
2368	}
2369
2370	/*
2371	* Acquire the PGM lock.
2372	*/
2373	case VMMCALLRING3_PGM_LOCK:
2374	{
2375	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2376	break;
2377	}
2378
2379	/*
2380	* Acquire the MM hypervisor heap lock.
2381	*/
2382	case VMMCALLRING3_MMHYPER_LOCK:
2383	{
2384	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2385	break;
2386	}
2387
2388	/*
2389	* This is a noop. We just take this route to avoid unnecessary
2390	* tests in the loops.
2391	*/
2392	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2393	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2394	LogAlways(("FLUSH\n"));
2395	break;
2396
2397	/*
2398	* Set the VM error message.
2399	*/
2400	case VMMCALLRING3_VM_SET_ERROR:
2401	VMR3SetErrorWorker(pVM);
2402	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2403	break;
2404
2405	/*
2406	* Set the VM runtime error message.
2407	*/
2408	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2409	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2410	break;
2411
2412	/*
2413	* Signal a ring 0 hypervisor assertion.
2414	* Cancel the longjmp operation that's in progress.
2415	*/
2416	case VMMCALLRING3_VM_R0_ASSERTION:
2417	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2418	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2419	#ifdef RT_ARCH_X86
2420	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2421	#else
2422	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2423	#endif
2424	#ifdef VMM_R0_SWITCH_STACK
2425	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2426	#endif
2427	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2428	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2429	return VERR_VMM_RING0_ASSERTION;
2430
2431	/*
2432	* A forced switch to ring 0 for preemption purposes.
2433	*/
2434	case VMMCALLRING3_VM_R0_PREEMPT:
2435	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2436	break;
2437
2438	default:
2439	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2440	return VERR_VMM_UNKNOWN_RING3_CALL;
2441	}
2442
2443	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2444	return VINF_SUCCESS;
2445	}
2446
2447
2448	/**
2449	* Displays the Force action Flags.
2450	*
2451	* @param pVM The cross context VM structure.
2452	* @param pHlp The output helpers.
2453	* @param pszArgs The additional arguments (ignored).
2454	*/
2455	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2456	{
2457	int c;
2458	uint32_t f;
2459	NOREF(pszArgs);
2460
2461	#define PRINT_FLAG(prf,flag) do { \
2462	if (f & (prf##flag)) \
2463	{ \
2464	static const char *s_psz = #flag; \
2465	if (!(c % 6)) \
2466	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2467	else \
2468	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2469	c++; \
2470	f &= ~(prf##flag); \
2471	} \
2472	} while (0)
2473
2474	#define PRINT_GROUP(prf,grp,sfx) do { \
2475	if (f & (prf##grp##sfx)) \
2476	{ \
2477	static const char *s_psz = #grp; \
2478	if (!(c % 5)) \
2479	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2480	else \
2481	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2482	c++; \
2483	} \
2484	} while (0)
2485
2486	/*
2487	* The global flags.
2488	*/
2489	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2490	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2491
2492	/* show the flag mnemonics */
2493	c = 0;
2494	f = fGlobalForcedActions;
2495	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2496	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2497	PRINT_FLAG(VM_FF_,PDM_DMA);
2498	PRINT_FLAG(VM_FF_,DBGF);
2499	PRINT_FLAG(VM_FF_,REQUEST);
2500	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2501	PRINT_FLAG(VM_FF_,RESET);
2502	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2503	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2504	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2505	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2506	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2507	if (f)
2508	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2509	else
2510	pHlp->pfnPrintf(pHlp, "\n");
2511
2512	/* the groups */
2513	c = 0;
2514	f = fGlobalForcedActions;
2515	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2516	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2517	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2518	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2519	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2520	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2521	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2522	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2523	if (c)
2524	pHlp->pfnPrintf(pHlp, "\n");
2525
2526	/*
2527	* Per CPU flags.
2528	*/
2529	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2530	{
2531	PVMCPU pVCpu = pVM->apCpusR3[i];
2532	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2533	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2534
2535	/* show the flag mnemonics */
2536	c = 0;
2537	f = fLocalForcedActions;
2538	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2539	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2540	PRINT_FLAG(VMCPU_FF_,TIMER);
2541	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2542	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2543	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2544	PRINT_FLAG(VMCPU_FF_,UNHALT);
2545	PRINT_FLAG(VMCPU_FF_,IEM);
2546	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2547	PRINT_FLAG(VMCPU_FF_,DBGF);
2548	PRINT_FLAG(VMCPU_FF_,REQUEST);
2549	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2550	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2551	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2552	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2553	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2554	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2555	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2556	PRINT_FLAG(VMCPU_FF_,TO_R3);
2557	PRINT_FLAG(VMCPU_FF_,IOM);
2558	if (f)
2559	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2560	else
2561	pHlp->pfnPrintf(pHlp, "\n");
2562
2563	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2564	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2565
2566	/* the groups */
2567	c = 0;
2568	f = fLocalForcedActions;
2569	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2570	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2571	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2572	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2573	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2574	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2575	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2576	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2577	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2578	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2579	if (c)
2580	pHlp->pfnPrintf(pHlp, "\n");
2581	}
2582
2583	#undef PRINT_FLAG
2584	#undef PRINT_GROUP
2585	}
2586

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 90870

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