VMM.cpp@ 91120

Last change on this file since 91120 was 90999, checked in by vboxsync, 4 years ago
VMM: Removed VMMCALLRING3_PGM_LOCK (now unused). bugref:6695
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1	/* $Id: VMM.cpp 90999 2021-08-30 14:08:43Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
154	do { \
155	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
156	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
157	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
158	{ /* likely? */ } \
159	else \
160	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
161	} while (0)
162
163
164	/*********************************************************************************************************************************
165	* Internal Functions *
166	*********************************************************************************************************************************/
167	static int vmmR3InitStacks(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	#if 0 /* pointless when timers doesn't run on EMT */
172	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173	#endif
174	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177	static FNRTTHREAD vmmR3LogFlusher;
178	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
179	PRTLOGGER pDstLogger);
180	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
181
182
183
184	/**
185	* Initializes the VMM.
186	*
187	* @returns VBox status code.
188	* @param pVM The cross context VM structure.
189	*/
190	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
191	{
192	LogFlow(("VMMR3Init\n"));
193
194	/*
195	* Assert alignment, sizes and order.
196	*/
197	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
198	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
199
200	/*
201	* Init basic VM VMM members.
202	*/
203	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
204	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
205	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
207	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
212	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
213
214	#if 0 /* pointless when timers doesn't run on EMT */
215	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
216	* The EMT yield interval. The EMT yielding is a hack we employ to play a
217	* bit nicer with the rest of the system (like for instance the GUI).
218	*/
219	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
220	23 /* Value arrived at after experimenting with the grub boot prompt. */);
221	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
222	#endif
223
224	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
225	* Controls whether we employ per-cpu preemption timers to limit the time
226	* spent executing guest code. This option is not available on all
227	* platforms and we will silently ignore this setting then. If we are
228	* running in VT-x mode, we will use the VMX-preemption timer instead of
229	* this one when possible.
230	*/
231	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
232	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
233	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
234
235	/*
236	* Initialize the VMM rendezvous semaphores.
237	*/
238	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
239	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
240	return VERR_NO_MEMORY;
241	for (VMCPUID i = 0; i < pVM->cCpus; i++)
242	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
243	for (VMCPUID i = 0; i < pVM->cCpus; i++)
244	{
245	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
246	AssertRCReturn(rc, rc);
247	}
248	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
249	AssertRCReturn(rc, rc);
250	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
251	AssertRCReturn(rc, rc);
252	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
253	AssertRCReturn(rc, rc);
254	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
255	AssertRCReturn(rc, rc);
256	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
257	AssertRCReturn(rc, rc);
258	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
259	AssertRCReturn(rc, rc);
260	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
261	AssertRCReturn(rc, rc);
262	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
263	AssertRCReturn(rc, rc);
264
265	/*
266	* Register the saved state data unit.
267	*/
268	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
269	NULL, NULL, NULL,
270	NULL, vmmR3Save, NULL,
271	NULL, vmmR3Load, NULL);
272	if (RT_FAILURE(rc))
273	return rc;
274
275	/*
276	* Register the Ring-0 VM handle with the session for fast ioctl calls.
277	*/
278	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
279	if (RT_FAILURE(rc))
280	return rc;
281
282	/*
283	* Init various sub-components.
284	*/
285	rc = vmmR3InitStacks(pVM);
286	if (RT_SUCCESS(rc))
287	{
288	#ifdef VBOX_WITH_NMI
289	/*
290	* Allocate mapping for the host APIC.
291	*/
292	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
293	AssertRC(rc);
294	#endif
295	if (RT_SUCCESS(rc))
296	{
297	/*
298	* Start the log flusher thread.
299	*/
300	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
301	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
302	if (RT_SUCCESS(rc))
303	{
304
305	/*
306	* Debug info and statistics.
307	*/
308	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
309	vmmR3InitRegisterStats(pVM);
310	vmmInitFormatTypes();
311
312	return VINF_SUCCESS;
313	}
314	}
315	}
316	/** @todo Need failure cleanup? */
317
318	return rc;
319	}
320
321
322	/**
323	* Allocate & setup the VMM RC stack(s) (for EMTs).
324	*
325	* The stacks are also used for long jumps in Ring-0.
326	*
327	* @returns VBox status code.
328	* @param pVM The cross context VM structure.
329	*
330	* @remarks The optional guard page gets it protection setup up during R3 init
331	* completion because of init order issues.
332	*/
333	static int vmmR3InitStacks(PVM pVM)
334	{
335	int rc = VINF_SUCCESS;
336	#ifdef VMM_R0_SWITCH_STACK
337	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
338	#else
339	uint32_t fFlags = 0;
340	#endif
341
342	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
343	{
344	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
345
346	#ifdef VBOX_STRICT_VMM_STACK
347	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
348	#else
349	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
350	#endif
351	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
352	if (RT_SUCCESS(rc))
353	{
354	#ifdef VBOX_STRICT_VMM_STACK
355	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
356	#endif
357	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
358
359	}
360	}
361
362	return rc;
363	}
364
365
366	/**
367	* VMMR3Init worker that register the statistics with STAM.
368	*
369	* @param pVM The cross context VM structure.
370	*/
371	static void vmmR3InitRegisterStats(PVM pVM)
372	{
373	RT_NOREF_PV(pVM);
374
375	/*
376	* Statistics.
377	*/
378	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
435
436	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
437	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
438
439	#ifdef VBOX_WITH_STATISTICS
440	for (VMCPUID i = 0; i < pVM->cCpus; i++)
441	{
442	PVMCPU pVCpu = pVM->apCpusR3[i];
443	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
444	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
445	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
446	}
447	#endif
448	for (VMCPUID i = 0; i < pVM->cCpus; i++)
449	{
450	PVMCPU pVCpu = pVM->apCpusR3[i];
451	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
452	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
453	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
454	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
455	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
456	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
457	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
458	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
459	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
460	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
461	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
462	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
463	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
464	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
465	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
466	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
467	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
468
469	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
470
471	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
472	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
473	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
474	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
475	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
476	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
477	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
478	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
479	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
480
481	pShared = &pVCpu->vmm.s.u.s.RelLogger;
482	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
483	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
484	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
485	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
486	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
487	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
488	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
489	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
490	}
491	}
492
493
494	/**
495	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
496	*
497	* @returns VBox status code.
498	* @param pVM The cross context VM structure.
499	* @param pVCpu The cross context per CPU structure.
500	* @thread EMT(pVCpu)
501	*/
502	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
503	{
504	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
505	}
506
507
508	/**
509	* Initializes the R0 VMM.
510	*
511	* @returns VBox status code.
512	* @param pVM The cross context VM structure.
513	*/
514	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
515	{
516	int rc;
517	PVMCPU pVCpu = VMMGetCpu(pVM);
518	Assert(pVCpu && pVCpu->idCpu == 0);
519
520	/*
521	* Make sure the ring-0 loggers are up to date.
522	*/
523	rc = VMMR3UpdateLoggers(pVM);
524	if (RT_FAILURE(rc))
525	return rc;
526
527	/*
528	* Call Ring-0 entry with init code.
529	*/
530	for (;;)
531	{
532	#ifdef NO_SUPCALLR0VMM
533	//rc = VERR_GENERAL_FAILURE;
534	rc = VINF_SUCCESS;
535	#else
536	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
537	#endif
538	/*
539	* Flush the logs.
540	*/
541	#ifdef LOG_ENABLED
542	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
543	#endif
544	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
545	if (rc != VINF_VMM_CALL_HOST)
546	break;
547	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
548	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
549	break;
550	/* Resume R0 */
551	}
552
553	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
554	{
555	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
556	if (RT_SUCCESS(rc))
557	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
558	}
559
560	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
561	if (pVM->vmm.s.fIsUsingContextHooks)
562	LogRel(("VMM: Enabled thread-context hooks\n"));
563	else
564	LogRel(("VMM: Thread-context hooks unavailable\n"));
565
566	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
567	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
568	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
569	else
570	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
571	if (pVM->vmm.s.fIsPreemptPossible)
572	LogRel(("VMM: Kernel preemption is possible\n"));
573	else
574	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
575
576	/*
577	* Send all EMTs to ring-0 to get their logger initialized.
578	*/
579	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
580	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
581
582	return rc;
583	}
584
585
586	/**
587	* Called when an init phase completes.
588	*
589	* @returns VBox status code.
590	* @param pVM The cross context VM structure.
591	* @param enmWhat Which init phase.
592	*/
593	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
594	{
595	int rc = VINF_SUCCESS;
596
597	switch (enmWhat)
598	{
599	case VMINITCOMPLETED_RING3:
600	{
601	#if 0 /* pointless when timers doesn't run on EMT */
602	/*
603	* Create the EMT yield timer.
604	*/
605	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
606	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
607	AssertRCReturn(rc, rc);
608
609	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
610	AssertRCReturn(rc, rc);
611	#endif
612	break;
613	}
614
615	case VMINITCOMPLETED_HM:
616	{
617	/*
618	* Disable the periodic preemption timers if we can use the
619	* VMX-preemption timer instead.
620	*/
621	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
622	&& HMR3IsVmxPreemptionTimerUsed(pVM))
623	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
624	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
625
626	/*
627	* Last chance for GIM to update its CPUID leaves if it requires
628	* knowledge/information from HM initialization.
629	*/
630	rc = GIMR3InitCompleted(pVM);
631	AssertRCReturn(rc, rc);
632
633	/*
634	* CPUM's post-initialization (print CPUIDs).
635	*/
636	CPUMR3LogCpuIdAndMsrFeatures(pVM);
637	break;
638	}
639
640	default: /* shuts up gcc */
641	break;
642	}
643
644	return rc;
645	}
646
647
648	/**
649	* Terminate the VMM bits.
650	*
651	* @returns VBox status code.
652	* @param pVM The cross context VM structure.
653	*/
654	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
655	{
656	PVMCPU pVCpu = VMMGetCpu(pVM);
657	Assert(pVCpu && pVCpu->idCpu == 0);
658
659	/*
660	* Call Ring-0 entry with termination code.
661	*/
662	int rc;
663	for (;;)
664	{
665	#ifdef NO_SUPCALLR0VMM
666	//rc = VERR_GENERAL_FAILURE;
667	rc = VINF_SUCCESS;
668	#else
669	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
670	#endif
671	/*
672	* Flush the logs.
673	*/
674	#ifdef LOG_ENABLED
675	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
676	#endif
677	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
678	if (rc != VINF_VMM_CALL_HOST)
679	break;
680	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
681	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
682	break;
683	/* Resume R0 */
684	}
685	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
686	{
687	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
688	if (RT_SUCCESS(rc))
689	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
690	}
691
692	for (VMCPUID i = 0; i < pVM->cCpus; i++)
693	{
694	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
695	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
696	}
697	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
698	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
699	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
700	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
701	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
702	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
703	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
704	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
705	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
706	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
707	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
708	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
709	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
710	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
711	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
712	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
713
714	vmmTermFormatTypes();
715
716	/*
717	* Wait for the log flusher thread to complete.
718	*/
719	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
720	{
721	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
722	AssertLogRelRC(rc2);
723	if (RT_SUCCESS(rc2))
724	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
725	}
726
727	return rc;
728	}
729
730
731	/**
732	* Applies relocations to data and code managed by this
733	* component. This function will be called at init and
734	* whenever the VMM need to relocate it self inside the GC.
735	*
736	* The VMM will need to apply relocations to the core code.
737	*
738	* @param pVM The cross context VM structure.
739	* @param offDelta The relocation delta.
740	*/
741	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
742	{
743	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
744	RT_NOREF(offDelta);
745
746	/*
747	* Update the logger.
748	*/
749	VMMR3UpdateLoggers(pVM);
750	}
751
752
753	/**
754	* Worker for VMMR3UpdateLoggers.
755	*/
756	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
757	{
758	/*
759	* Get the group count.
760	*/
761	uint32_t uGroupsCrc32 = 0;
762	uint32_t cGroups = 0;
763	uint64_t fFlags = 0;
764	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
765	Assert(rc == VERR_BUFFER_OVERFLOW);
766
767	/*
768	* Allocate the request of the right size.
769	*/
770	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
771	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
772	if (pReq)
773	{
774	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
775	pReq->Hdr.cbReq = cbReq;
776	pReq->cGroups = cGroups;
777	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
778	AssertRC(rc);
779	if (RT_SUCCESS(rc))
780	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
781
782	RTMemFree(pReq);
783	}
784	else
785	rc = VERR_NO_MEMORY;
786	return rc;
787	}
788
789
790	/**
791	* Updates the settings for the RC and R0 loggers.
792	*
793	* @returns VBox status code.
794	* @param pVM The cross context VM structure.
795	* @thread EMT
796	*/
797	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
798	{
799	VM_ASSERT_EMT(pVM);
800	PVMCPU pVCpu = VMMGetCpu(pVM);
801	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
802
803	/*
804	* Each EMT has each own logger instance.
805	*/
806	/* Debug logging.*/
807	int rcDebug = VINF_SUCCESS;
808	#ifdef LOG_ENABLED
809	PRTLOGGER const pDefault = RTLogDefaultInstance();
810	if (pDefault)
811	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
812	#else
813	RT_NOREF(pVM);
814	#endif
815
816	/* Release logging. */
817	int rcRelease = VINF_SUCCESS;
818	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
819	if (pRelease)
820	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
821
822	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
823	}
824
825
826	/**
827	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
828	*/
829	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
830	{
831	PVM const pVM = (PVM)pvUser;
832	RT_NOREF(hThreadSelf);
833
834	/* Reset the flusher state before we start: */
835	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
836
837	/*
838	* The work loop.
839	*/
840	for (;;)
841	{
842	/*
843	* Wait for work.
844	*/
845	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
846	if (RT_SUCCESS(rc))
847	{
848	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
849	VMMLOGFLUSHERENTRY Item;
850	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
851	if ( Item.s.idCpu < pVM->cCpus
852	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
853	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
854	{
855	/*
856	* Verify the request.
857	*/
858	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
859	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
860	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
861	if (cbToFlush > 0)
862	{
863	if (cbToFlush <= pShared->cbBuf)
864	{
865	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
866	if (pchBufR3)
867	{
868	/*
869	* Do the flushing.
870	*/
871	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
872	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
873	if (pLogger)
874	{
875	char szBefore[128];
876	RTStrPrintf(szBefore, sizeof(szBefore),
877	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
878	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
879	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
880	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
881	}
882	}
883	else
884	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
885	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
886	}
887	else
888	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
889	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
890	}
891	else
892	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
893	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
894
895	/*
896	* Mark the descriptor as flushed and set the request flag for same.
897	*/
898	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
899	}
900	else
901	{
902	Assert(Item.s.idCpu == UINT16_MAX);
903	Assert(Item.s.idxLogger == UINT8_MAX);
904	Assert(Item.s.idxBuffer == UINT8_MAX);
905	}
906	}
907	/*
908	* Interrupted can happen, just ignore it.
909	*/
910	else if (rc == VERR_INTERRUPTED)
911	{ /* ignore*/ }
912	/*
913	* The ring-0 termination code will set the shutdown flag and wake us
914	* up, and we should return with object destroyed. In case there is
915	* some kind of race, we might also get sempahore destroyed.
916	*/
917	else if ( rc == VERR_OBJECT_DESTROYED
918	\|\| rc == VERR_SEM_DESTROYED
919	\|\| rc == VERR_INVALID_HANDLE)
920	{
921	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
922	return VINF_SUCCESS;
923	}
924	/*
925	* There shouldn't be any other errors...
926	*/
927	else
928	{
929	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
930	AssertRC(rc);
931	RTThreadSleep(1);
932	}
933	}
934	}
935
936
937	/**
938	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
939	*
940	* @param pVM The cross context VM structure.
941	* @param pVCpu The cross context virtual CPU structure of the calling
942	* EMT.
943	* @param pShared The shared logger data.
944	* @param idxBuf The buffer to flush.
945	* @param pDstLogger The destination IPRT logger.
946	*/
947	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
948	{
949	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
950	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
951	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
952
953	#if VMMLOGGER_BUFFER_COUNT > 1
954	/*
955	* When we have more than one log buffer, the flusher thread may still be
956	* working on the previous buffer when we get here.
957	*/
958	char szBefore[64];
959	if (pShared->cFlushing > 0)
960	{
961	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
962	uint64_t const nsStart = RTTimeNanoTS();
963
964	/* A no-op, but it takes the lock and the hope is that we end up waiting
965	on the flusher to finish up. */
966	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
967	if (pShared->cFlushing != 0)
968	{
969	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
970
971	/* If no luck, go to ring-0 and to proper waiting. */
972	if (pShared->cFlushing != 0)
973	{
974	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
975	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
976	}
977	}
978
979	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
980	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
981	pszBefore = szBefore;
982	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
983	}
984	#else
985	RT_NOREF(pVM, pVCpu);
986	#endif
987
988	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
989	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
990	}
991
992
993	/**
994	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
995	*
996	* @returns Pointer to the buffer.
997	* @param pVM The cross context VM structure.
998	*/
999	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1000	{
1001	return pVM->vmm.s.szRing0AssertMsg1;
1002	}
1003
1004
1005	/**
1006	* Returns the VMCPU of the specified virtual CPU.
1007	*
1008	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1009	*
1010	* @param pUVM The user mode VM handle.
1011	* @param idCpu The ID of the virtual CPU.
1012	*/
1013	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1014	{
1015	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1016	AssertReturn(idCpu < pUVM->cCpus, NULL);
1017	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1018	return pUVM->pVM->apCpusR3[idCpu];
1019	}
1020
1021
1022	/**
1023	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1024	*
1025	* @returns Pointer to the buffer.
1026	* @param pVM The cross context VM structure.
1027	*/
1028	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1029	{
1030	return pVM->vmm.s.szRing0AssertMsg2;
1031	}
1032
1033
1034	/**
1035	* Execute state save operation.
1036	*
1037	* @returns VBox status code.
1038	* @param pVM The cross context VM structure.
1039	* @param pSSM SSM operation handle.
1040	*/
1041	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1042	{
1043	LogFlow(("vmmR3Save:\n"));
1044
1045	/*
1046	* Save the started/stopped state of all CPUs except 0 as it will always
1047	* be running. This avoids breaking the saved state version. :-)
1048	*/
1049	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1050	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1051
1052	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1053	}
1054
1055
1056	/**
1057	* Execute state load operation.
1058	*
1059	* @returns VBox status code.
1060	* @param pVM The cross context VM structure.
1061	* @param pSSM SSM operation handle.
1062	* @param uVersion Data layout version.
1063	* @param uPass The data pass.
1064	*/
1065	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1066	{
1067	LogFlow(("vmmR3Load:\n"));
1068	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1069
1070	/*
1071	* Validate version.
1072	*/
1073	if ( uVersion != VMM_SAVED_STATE_VERSION
1074	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1075	{
1076	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1077	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1078	}
1079
1080	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1081	{
1082	/* Ignore the stack bottom, stack pointer and stack bits. */
1083	RTRCPTR RCPtrIgnored;
1084	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1085	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1086	#ifdef RT_OS_DARWIN
1087	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1088	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1089	&& SSMR3HandleRevision(pSSM) >= 48858
1090	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1091	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1092	)
1093	SSMR3Skip(pSSM, 16384);
1094	else
1095	SSMR3Skip(pSSM, 8192);
1096	#else
1097	SSMR3Skip(pSSM, 8192);
1098	#endif
1099	}
1100
1101	/*
1102	* Restore the VMCPU states. VCPU 0 is always started.
1103	*/
1104	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1105	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1106	{
1107	bool fStarted;
1108	int rc = SSMR3GetBool(pSSM, &fStarted);
1109	if (RT_FAILURE(rc))
1110	return rc;
1111	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1112	}
1113
1114	/* terminator */
1115	uint32_t u32;
1116	int rc = SSMR3GetU32(pSSM, &u32);
1117	if (RT_FAILURE(rc))
1118	return rc;
1119	if (u32 != UINT32_MAX)
1120	{
1121	AssertMsgFailed(("u32=%#x\n", u32));
1122	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1123	}
1124	return VINF_SUCCESS;
1125	}
1126
1127
1128	/**
1129	* Suspends the CPU yielder.
1130	*
1131	* @param pVM The cross context VM structure.
1132	*/
1133	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1134	{
1135	#if 0 /* pointless when timers doesn't run on EMT */
1136	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1137	if (!pVM->vmm.s.cYieldResumeMillies)
1138	{
1139	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1140	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1141	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1142	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1143	else
1144	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1145	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1146	}
1147	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1148	#else
1149	RT_NOREF(pVM);
1150	#endif
1151	}
1152
1153
1154	/**
1155	* Stops the CPU yielder.
1156	*
1157	* @param pVM The cross context VM structure.
1158	*/
1159	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1160	{
1161	#if 0 /* pointless when timers doesn't run on EMT */
1162	if (!pVM->vmm.s.cYieldResumeMillies)
1163	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1164	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1165	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1166	#else
1167	RT_NOREF(pVM);
1168	#endif
1169	}
1170
1171
1172	/**
1173	* Resumes the CPU yielder when it has been a suspended or stopped.
1174	*
1175	* @param pVM The cross context VM structure.
1176	*/
1177	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1178	{
1179	#if 0 /* pointless when timers doesn't run on EMT */
1180	if (pVM->vmm.s.cYieldResumeMillies)
1181	{
1182	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1183	pVM->vmm.s.cYieldResumeMillies = 0;
1184	}
1185	#else
1186	RT_NOREF(pVM);
1187	#endif
1188	}
1189
1190
1191	#if 0 /* pointless when timers doesn't run on EMT */
1192	/**
1193	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1194	*
1195	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1196	*/
1197	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1198	{
1199	NOREF(pvUser);
1200
1201	/*
1202	* This really needs some careful tuning. While we shouldn't be too greedy since
1203	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1204	* because that'll cause us to stop up.
1205	*
1206	* The current logic is to use the default interval when there is no lag worth
1207	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1208	*
1209	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1210	* so the lag is up to date.)
1211	*/
1212	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1213	if ( u64Lag < 50000000 /* 50ms */
1214	\|\| ( u64Lag < 1000000000 /* 1s */
1215	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1216	)
1217	{
1218	uint64_t u64Elapsed = RTTimeNanoTS();
1219	pVM->vmm.s.u64LastYield = u64Elapsed;
1220
1221	RTThreadYield();
1222
1223	#ifdef LOG_ENABLED
1224	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1225	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1226	#endif
1227	}
1228	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1229	}
1230	#endif
1231
1232
1233	/**
1234	* Executes guest code (Intel VT-x and AMD-V).
1235	*
1236	* @param pVM The cross context VM structure.
1237	* @param pVCpu The cross context virtual CPU structure.
1238	*/
1239	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1240	{
1241	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1242
1243	for (;;)
1244	{
1245	int rc;
1246	do
1247	{
1248	#ifdef NO_SUPCALLR0VMM
1249	rc = VERR_GENERAL_FAILURE;
1250	#else
1251	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1252	if (RT_LIKELY(rc == VINF_SUCCESS))
1253	rc = pVCpu->vmm.s.iLastGZRc;
1254	#endif
1255	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1256
1257	#if 0 /** @todo triggers too often */
1258	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1259	#endif
1260
1261	/*
1262	* Flush the logs
1263	*/
1264	#ifdef LOG_ENABLED
1265	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1266	#endif
1267	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1268	if (rc != VINF_VMM_CALL_HOST)
1269	{
1270	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1271	return rc;
1272	}
1273	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1274	if (RT_FAILURE(rc))
1275	return rc;
1276	/* Resume R0 */
1277	}
1278	}
1279
1280
1281	/**
1282	* Perform one of the fast I/O control VMMR0 operation.
1283	*
1284	* @returns VBox strict status code.
1285	* @param pVM The cross context VM structure.
1286	* @param pVCpu The cross context virtual CPU structure.
1287	* @param enmOperation The operation to perform.
1288	*/
1289	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1290	{
1291	for (;;)
1292	{
1293	VBOXSTRICTRC rcStrict;
1294	do
1295	{
1296	#ifdef NO_SUPCALLR0VMM
1297	rcStrict = VERR_GENERAL_FAILURE;
1298	#else
1299	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1300	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1301	rcStrict = pVCpu->vmm.s.iLastGZRc;
1302	#endif
1303	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1304
1305	/*
1306	* Flush the logs
1307	*/
1308	#ifdef LOG_ENABLED
1309	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1310	#endif
1311	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1312	if (rcStrict != VINF_VMM_CALL_HOST)
1313	return rcStrict;
1314	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1315	if (RT_FAILURE(rc))
1316	return rc;
1317	/* Resume R0 */
1318	}
1319	}
1320
1321
1322	/**
1323	* VCPU worker for VMMR3SendStartupIpi.
1324	*
1325	* @param pVM The cross context VM structure.
1326	* @param idCpu Virtual CPU to perform SIPI on.
1327	* @param uVector The SIPI vector.
1328	*/
1329	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1330	{
1331	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1332	VMCPU_ASSERT_EMT(pVCpu);
1333
1334	/*
1335	* In the INIT state, the target CPU is only responsive to an SIPI.
1336	* This is also true for when when the CPU is in VMX non-root mode.
1337	*
1338	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1339	* See Intel spec. 26.6.2 "Activity State".
1340	*/
1341	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1342	return VINF_SUCCESS;
1343
1344	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1345	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1346	if (CPUMIsGuestInVmxRootMode(pCtx))
1347	{
1348	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1349	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1350	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1351
1352	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1353	return VINF_SUCCESS;
1354	}
1355	#endif
1356
1357	pCtx->cs.Sel = uVector << 8;
1358	pCtx->cs.ValidSel = uVector << 8;
1359	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1360	pCtx->cs.u64Base = uVector << 12;
1361	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1362	pCtx->rip = 0;
1363
1364	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1365
1366	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1367	EMSetState(pVCpu, EMSTATE_HALTED);
1368	return VINF_EM_RESCHEDULE;
1369	# else /* And if we go the VMCPU::enmState way it can stay here. */
1370	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1371	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1372	return VINF_SUCCESS;
1373	# endif
1374	}
1375
1376
1377	/**
1378	* VCPU worker for VMMR3SendInitIpi.
1379	*
1380	* @returns VBox status code.
1381	* @param pVM The cross context VM structure.
1382	* @param idCpu Virtual CPU to perform SIPI on.
1383	*/
1384	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1385	{
1386	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1387	VMCPU_ASSERT_EMT(pVCpu);
1388
1389	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1390
1391	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1392	* wait-for-SIPI state. Verify. */
1393
1394	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1395	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1396	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1397	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1398	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1399	#endif
1400
1401	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1402	* IPI (e.g. SVM_EXIT_INIT). */
1403
1404	PGMR3ResetCpu(pVM, pVCpu);
1405	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1406	APICR3InitIpi(pVCpu);
1407	TRPMR3ResetCpu(pVCpu);
1408	CPUMR3ResetCpu(pVM, pVCpu);
1409	EMR3ResetCpu(pVCpu);
1410	HMR3ResetCpu(pVCpu);
1411	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1412
1413	/* This will trickle up on the target EMT. */
1414	return VINF_EM_WAIT_SIPI;
1415	}
1416
1417
1418	/**
1419	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1420	* vector-dependent state and unhalting processor.
1421	*
1422	* @param pVM The cross context VM structure.
1423	* @param idCpu Virtual CPU to perform SIPI on.
1424	* @param uVector SIPI vector.
1425	*/
1426	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1427	{
1428	AssertReturnVoid(idCpu < pVM->cCpus);
1429
1430	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1431	AssertRC(rc);
1432	}
1433
1434
1435	/**
1436	* Sends init IPI to the virtual CPU.
1437	*
1438	* @param pVM The cross context VM structure.
1439	* @param idCpu Virtual CPU to perform int IPI on.
1440	*/
1441	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1442	{
1443	AssertReturnVoid(idCpu < pVM->cCpus);
1444
1445	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1446	AssertRC(rc);
1447	}
1448
1449
1450	/**
1451	* Registers the guest memory range that can be used for patching.
1452	*
1453	* @returns VBox status code.
1454	* @param pVM The cross context VM structure.
1455	* @param pPatchMem Patch memory range.
1456	* @param cbPatchMem Size of the memory range.
1457	*/
1458	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1459	{
1460	VM_ASSERT_EMT(pVM);
1461	if (HMIsEnabled(pVM))
1462	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1463
1464	return VERR_NOT_SUPPORTED;
1465	}
1466
1467
1468	/**
1469	* Deregisters the guest memory range that can be used for patching.
1470	*
1471	* @returns VBox status code.
1472	* @param pVM The cross context VM structure.
1473	* @param pPatchMem Patch memory range.
1474	* @param cbPatchMem Size of the memory range.
1475	*/
1476	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1477	{
1478	if (HMIsEnabled(pVM))
1479	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1480
1481	return VINF_SUCCESS;
1482	}
1483
1484
1485	/**
1486	* Common recursion handler for the other EMTs.
1487	*
1488	* @returns Strict VBox status code.
1489	* @param pVM The cross context VM structure.
1490	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1491	* @param rcStrict Current status code to be combined with the one
1492	* from this recursion and returned.
1493	*/
1494	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1495	{
1496	int rc2;
1497
1498	/*
1499	* We wait here while the initiator of this recursion reconfigures
1500	* everything. The last EMT to get in signals the initiator.
1501	*/
1502	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1503	{
1504	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1505	AssertLogRelRC(rc2);
1506	}
1507
1508	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1509	AssertLogRelRC(rc2);
1510
1511	/*
1512	* Do the normal rendezvous processing.
1513	*/
1514	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1515	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1516
1517	/*
1518	* Wait for the initiator to restore everything.
1519	*/
1520	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1521	AssertLogRelRC(rc2);
1522
1523	/*
1524	* Last thread out of here signals the initiator.
1525	*/
1526	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1527	{
1528	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1529	AssertLogRelRC(rc2);
1530	}
1531
1532	/*
1533	* Merge status codes and return.
1534	*/
1535	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1536	if ( rcStrict2 != VINF_SUCCESS
1537	&& ( rcStrict == VINF_SUCCESS
1538	\|\| rcStrict > rcStrict2))
1539	rcStrict = rcStrict2;
1540	return rcStrict;
1541	}
1542
1543
1544	/**
1545	* Count returns and have the last non-caller EMT wake up the caller.
1546	*
1547	* @returns VBox strict informational status code for EM scheduling. No failures
1548	* will be returned here, those are for the caller only.
1549	*
1550	* @param pVM The cross context VM structure.
1551	* @param rcStrict The current accumulated recursive status code,
1552	* to be merged with i32RendezvousStatus and
1553	* returned.
1554	*/
1555	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1556	{
1557	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1558
1559	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1560	if (cReturned == pVM->cCpus - 1U)
1561	{
1562	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1563	AssertLogRelRC(rc);
1564	}
1565
1566	/*
1567	* Merge the status codes, ignoring error statuses in this code path.
1568	*/
1569	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1570	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1571	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1572	VERR_IPE_UNEXPECTED_INFO_STATUS);
1573
1574	if (RT_SUCCESS(rcStrict2))
1575	{
1576	if ( rcStrict2 != VINF_SUCCESS
1577	&& ( rcStrict == VINF_SUCCESS
1578	\|\| rcStrict > rcStrict2))
1579	rcStrict = rcStrict2;
1580	}
1581	return rcStrict;
1582	}
1583
1584
1585	/**
1586	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1587	*
1588	* @returns VBox strict informational status code for EM scheduling. No failures
1589	* will be returned here, those are for the caller only. When
1590	* fIsCaller is set, VINF_SUCCESS is always returned.
1591	*
1592	* @param pVM The cross context VM structure.
1593	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1594	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1595	* not.
1596	* @param fFlags The flags.
1597	* @param pfnRendezvous The callback.
1598	* @param pvUser The user argument for the callback.
1599	*/
1600	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1601	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1602	{
1603	int rc;
1604	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1605
1606	/*
1607	* Enter, the last EMT triggers the next callback phase.
1608	*/
1609	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1610	if (cEntered != pVM->cCpus)
1611	{
1612	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1613	{
1614	/* Wait for our turn. */
1615	for (;;)
1616	{
1617	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1618	AssertLogRelRC(rc);
1619	if (!pVM->vmm.s.fRendezvousRecursion)
1620	break;
1621	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1622	}
1623	}
1624	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1625	{
1626	/* Wait for the last EMT to arrive and wake everyone up. */
1627	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1628	AssertLogRelRC(rc);
1629	Assert(!pVM->vmm.s.fRendezvousRecursion);
1630	}
1631	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1632	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1633	{
1634	/* Wait for our turn. */
1635	for (;;)
1636	{
1637	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1638	AssertLogRelRC(rc);
1639	if (!pVM->vmm.s.fRendezvousRecursion)
1640	break;
1641	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1642	}
1643	}
1644	else
1645	{
1646	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1647
1648	/*
1649	* The execute once is handled specially to optimize the code flow.
1650	*
1651	* The last EMT to arrive will perform the callback and the other
1652	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1653	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1654	* returns, that EMT will initiate the normal return sequence.
1655	*/
1656	if (!fIsCaller)
1657	{
1658	for (;;)
1659	{
1660	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1661	AssertLogRelRC(rc);
1662	if (!pVM->vmm.s.fRendezvousRecursion)
1663	break;
1664	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1665	}
1666
1667	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1668	}
1669	return VINF_SUCCESS;
1670	}
1671	}
1672	else
1673	{
1674	/*
1675	* All EMTs are waiting, clear the FF and take action according to the
1676	* execution method.
1677	*/
1678	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1679
1680	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1681	{
1682	/* Wake up everyone. */
1683	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1684	AssertLogRelRC(rc);
1685	}
1686	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1687	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1688	{
1689	/* Figure out who to wake up and wake it up. If it's ourself, then
1690	it's easy otherwise wait for our turn. */
1691	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1692	? 0
1693	: pVM->cCpus - 1U;
1694	if (pVCpu->idCpu != iFirst)
1695	{
1696	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1697	AssertLogRelRC(rc);
1698	for (;;)
1699	{
1700	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1701	AssertLogRelRC(rc);
1702	if (!pVM->vmm.s.fRendezvousRecursion)
1703	break;
1704	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1705	}
1706	}
1707	}
1708	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1709	}
1710
1711
1712	/*
1713	* Do the callback and update the status if necessary.
1714	*/
1715	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1716	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1717	{
1718	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1719	if (rcStrict2 != VINF_SUCCESS)
1720	{
1721	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1722	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1723	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1724	int32_t i32RendezvousStatus;
1725	do
1726	{
1727	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1728	if ( rcStrict2 == i32RendezvousStatus
1729	\|\| RT_FAILURE(i32RendezvousStatus)
1730	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1731	&& rcStrict2 > i32RendezvousStatus))
1732	break;
1733	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1734	}
1735	}
1736
1737	/*
1738	* Increment the done counter and take action depending on whether we're
1739	* the last to finish callback execution.
1740	*/
1741	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1742	if ( cDone != pVM->cCpus
1743	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1744	{
1745	/* Signal the next EMT? */
1746	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1747	{
1748	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1749	AssertLogRelRC(rc);
1750	}
1751	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1752	{
1753	Assert(cDone == pVCpu->idCpu + 1U);
1754	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1755	AssertLogRelRC(rc);
1756	}
1757	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1758	{
1759	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1760	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1761	AssertLogRelRC(rc);
1762	}
1763
1764	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1765	if (!fIsCaller)
1766	{
1767	for (;;)
1768	{
1769	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1770	AssertLogRelRC(rc);
1771	if (!pVM->vmm.s.fRendezvousRecursion)
1772	break;
1773	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1774	}
1775	}
1776	}
1777	else
1778	{
1779	/* Callback execution is all done, tell the rest to return. */
1780	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1781	AssertLogRelRC(rc);
1782	}
1783
1784	if (!fIsCaller)
1785	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1786	return rcStrictRecursion;
1787	}
1788
1789
1790	/**
1791	* Called in response to VM_FF_EMT_RENDEZVOUS.
1792	*
1793	* @returns VBox strict status code - EM scheduling. No errors will be returned
1794	* here, nor will any non-EM scheduling status codes be returned.
1795	*
1796	* @param pVM The cross context VM structure.
1797	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1798	*
1799	* @thread EMT
1800	*/
1801	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1802	{
1803	Assert(!pVCpu->vmm.s.fInRendezvous);
1804	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1805	pVCpu->vmm.s.fInRendezvous = true;
1806	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1807	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1808	pVCpu->vmm.s.fInRendezvous = false;
1809	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1810	return VBOXSTRICTRC_TODO(rcStrict);
1811	}
1812
1813
1814	/**
1815	* Helper for resetting an single wakeup event sempahore.
1816	*
1817	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1818	* @param hEvt The event semaphore to reset.
1819	*/
1820	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1821	{
1822	for (uint32_t cLoops = 0; ; cLoops++)
1823	{
1824	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1825	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1826	return rc;
1827	}
1828	}
1829
1830
1831	/**
1832	* Worker for VMMR3EmtRendezvous that handles recursion.
1833	*
1834	* @returns VBox strict status code. This will be the first error,
1835	* VINF_SUCCESS, or an EM scheduling status code.
1836	*
1837	* @param pVM The cross context VM structure.
1838	* @param pVCpu The cross context virtual CPU structure of the
1839	* calling EMT.
1840	* @param fFlags Flags indicating execution methods. See
1841	* grp_VMMR3EmtRendezvous_fFlags.
1842	* @param pfnRendezvous The callback.
1843	* @param pvUser User argument for the callback.
1844	*
1845	* @thread EMT(pVCpu)
1846	*/
1847	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1848	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1849	{
1850	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1851	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1852	Assert(pVCpu->vmm.s.fInRendezvous);
1853
1854	/*
1855	* Save the current state.
1856	*/
1857	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1858	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1859	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1860	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1861	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1862
1863	/*
1864	* Check preconditions and save the current state.
1865	*/
1866	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1867	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1868	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1869	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1870	VERR_INTERNAL_ERROR);
1871	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1872	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1873
1874	/*
1875	* Reset the recursion prep and pop semaphores.
1876	*/
1877	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1878	AssertLogRelRCReturn(rc, rc);
1879	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1880	AssertLogRelRCReturn(rc, rc);
1881	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1882	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1883	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1884	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1885
1886	/*
1887	* Usher the other thread into the recursion routine.
1888	*/
1889	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1890	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1891
1892	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1893	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1894	while (cLeft-- > 0)
1895	{
1896	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1897	AssertLogRelRC(rc);
1898	}
1899	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1900	{
1901	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1902	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1903	{
1904	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1905	AssertLogRelRC(rc);
1906	}
1907	}
1908	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1909	{
1910	Assert(cLeft == pVCpu->idCpu);
1911	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1912	{
1913	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1914	AssertLogRelRC(rc);
1915	}
1916	}
1917	else
1918	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1919	VERR_INTERNAL_ERROR_4);
1920
1921	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1922	AssertLogRelRC(rc);
1923	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1924	AssertLogRelRC(rc);
1925
1926
1927	/*
1928	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1929	*/
1930	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1931	{
1932	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1933	AssertLogRelRC(rc);
1934	}
1935
1936	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1937
1938	/*
1939	* Clear the slate and setup the new rendezvous.
1940	*/
1941	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1942	{
1943	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1944	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1945	}
1946	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1947	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1948	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1949	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1950
1951	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1952	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1953	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1954	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1955	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1956	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1957	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1958	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1959
1960	/*
1961	* We're ready to go now, do normal rendezvous processing.
1962	*/
1963	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1964	AssertLogRelRC(rc);
1965
1966	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1967
1968	/*
1969	* The caller waits for the other EMTs to be done, return and waiting on the
1970	* pop semaphore.
1971	*/
1972	for (;;)
1973	{
1974	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1975	AssertLogRelRC(rc);
1976	if (!pVM->vmm.s.fRendezvousRecursion)
1977	break;
1978	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1979	}
1980
1981	/*
1982	* Get the return code and merge it with the above recursion status.
1983	*/
1984	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1985	if ( rcStrict2 != VINF_SUCCESS
1986	&& ( rcStrict == VINF_SUCCESS
1987	\|\| rcStrict > rcStrict2))
1988	rcStrict = rcStrict2;
1989
1990	/*
1991	* Restore the parent rendezvous state.
1992	*/
1993	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1994	{
1995	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1996	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1997	}
1998	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1999	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2000	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2001	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2002
2003	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2004	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2005	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2006	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2007	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2008	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2009	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2010
2011	/*
2012	* Usher the other EMTs back to their parent recursion routine, waiting
2013	* for them to all get there before we return (makes sure they've been
2014	* scheduled and are past the pop event sem, see below).
2015	*/
2016	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2017	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2018	AssertLogRelRC(rc);
2019
2020	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2021	{
2022	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2023	AssertLogRelRC(rc);
2024	}
2025
2026	/*
2027	* We must reset the pop semaphore on the way out (doing the pop caller too,
2028	* just in case). The parent may be another recursion.
2029	*/
2030	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2031	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2032
2033	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2034
2035	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2036	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2037	return rcStrict;
2038	}
2039
2040
2041	/**
2042	* EMT rendezvous.
2043	*
2044	* Gathers all the EMTs and execute some code on each of them, either in a one
2045	* by one fashion or all at once.
2046	*
2047	* @returns VBox strict status code. This will be the first error,
2048	* VINF_SUCCESS, or an EM scheduling status code.
2049	*
2050	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2051	* doesn't support it or if the recursion is too deep.
2052	*
2053	* @param pVM The cross context VM structure.
2054	* @param fFlags Flags indicating execution methods. See
2055	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2056	* descending and ascending rendezvous types support
2057	* recursion from inside @a pfnRendezvous.
2058	* @param pfnRendezvous The callback.
2059	* @param pvUser User argument for the callback.
2060	*
2061	* @thread Any.
2062	*/
2063	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2064	{
2065	/*
2066	* Validate input.
2067	*/
2068	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2069	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2070	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2071	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2072	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2073	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2074	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2075	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2076
2077	VBOXSTRICTRC rcStrict;
2078	PVMCPU pVCpu = VMMGetCpu(pVM);
2079	if (!pVCpu)
2080	{
2081	/*
2082	* Forward the request to an EMT thread.
2083	*/
2084	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2085	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2086	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2087	else
2088	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2089	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2090	}
2091	else if ( pVM->cCpus == 1
2092	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2093	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2094	{
2095	/*
2096	* Shortcut for the single EMT case.
2097	*
2098	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2099	* during vmR3Destroy after other emulation threads have started terminating.
2100	*/
2101	if (!pVCpu->vmm.s.fInRendezvous)
2102	{
2103	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2104	pVCpu->vmm.s.fInRendezvous = true;
2105	pVM->vmm.s.fRendezvousFlags = fFlags;
2106	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2107	pVCpu->vmm.s.fInRendezvous = false;
2108	}
2109	else
2110	{
2111	/* Recursion. Do the same checks as in the SMP case. */
2112	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2113	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2114	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2115	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2116	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2117	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2118	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2119	, VERR_DEADLOCK);
2120
2121	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2122	pVM->vmm.s.cRendezvousRecursions++;
2123	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2124	pVM->vmm.s.fRendezvousFlags = fFlags;
2125
2126	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2127
2128	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2129	pVM->vmm.s.cRendezvousRecursions--;
2130	}
2131	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2132	}
2133	else
2134	{
2135	/*
2136	* Spin lock. If busy, check for recursion, if not recursing wait for
2137	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2138	*/
2139	int rc;
2140	rcStrict = VINF_SUCCESS;
2141	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2142	{
2143	/* Allow recursion in some cases. */
2144	if ( pVCpu->vmm.s.fInRendezvous
2145	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2146	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2147	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2148	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2149	))
2150	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2151
2152	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2153	VERR_DEADLOCK);
2154
2155	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2156	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2157	{
2158	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2159	{
2160	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2161	if ( rc != VINF_SUCCESS
2162	&& ( rcStrict == VINF_SUCCESS
2163	\|\| rcStrict > rc))
2164	rcStrict = rc;
2165	/** @todo Perhaps deal with termination here? */
2166	}
2167	ASMNopPause();
2168	}
2169	}
2170
2171	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2172	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2173	Assert(!pVCpu->vmm.s.fInRendezvous);
2174	pVCpu->vmm.s.fInRendezvous = true;
2175
2176	/*
2177	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2178	*/
2179	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2180	{
2181	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2182	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2183	}
2184	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2185	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2186	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2187	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2188	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2189	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2190	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2191	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2192	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2193	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2194	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2195
2196	/*
2197	* Set the FF and poke the other EMTs.
2198	*/
2199	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2200	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2201
2202	/*
2203	* Do the same ourselves.
2204	*/
2205	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2206
2207	/*
2208	* The caller waits for the other EMTs to be done and return before doing
2209	* the cleanup. This makes away with wakeup / reset races we would otherwise
2210	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2211	*/
2212	for (;;)
2213	{
2214	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2215	AssertLogRelRC(rc);
2216	if (!pVM->vmm.s.fRendezvousRecursion)
2217	break;
2218	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2219	}
2220
2221	/*
2222	* Get the return code and clean up a little bit.
2223	*/
2224	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2225	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2226
2227	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2228	pVCpu->vmm.s.fInRendezvous = false;
2229
2230	/*
2231	* Merge rcStrict, rcStrict2 and rcStrict3.
2232	*/
2233	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2234	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2235	if ( rcStrict2 != VINF_SUCCESS
2236	&& ( rcStrict == VINF_SUCCESS
2237	\|\| rcStrict > rcStrict2))
2238	rcStrict = rcStrict2;
2239	if ( rcStrict3 != VINF_SUCCESS
2240	&& ( rcStrict == VINF_SUCCESS
2241	\|\| rcStrict > rcStrict3))
2242	rcStrict = rcStrict3;
2243	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2244	}
2245
2246	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2247	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2248	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2249	VERR_IPE_UNEXPECTED_INFO_STATUS);
2250	return VBOXSTRICTRC_VAL(rcStrict);
2251	}
2252
2253
2254	/**
2255	* Interface for vmR3SetHaltMethodU.
2256	*
2257	* @param pVCpu The cross context virtual CPU structure of the
2258	* calling EMT.
2259	* @param fMayHaltInRing0 The new state.
2260	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2261	* @thread EMT(pVCpu)
2262	*
2263	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2264	* component.
2265	*/
2266	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2267	{
2268	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2269	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2270	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2271	}
2272
2273
2274	/**
2275	* Read from the ring 0 jump buffer stack.
2276	*
2277	* @returns VBox status code.
2278	*
2279	* @param pVM The cross context VM structure.
2280	* @param idCpu The ID of the source CPU context (for the address).
2281	* @param R0Addr Where to start reading.
2282	* @param pvBuf Where to store the data we've read.
2283	* @param cbRead The number of bytes to read.
2284	*/
2285	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2286	{
2287	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2288	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2289	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2290
2291	int rc;
2292	#ifdef VMM_R0_SWITCH_STACK
2293	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2294	#else
2295	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2296	#endif
2297	if ( off < VMM_STACK_SIZE
2298	&& off + cbRead <= VMM_STACK_SIZE)
2299	{
2300	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2301	rc = VINF_SUCCESS;
2302	}
2303	else
2304	rc = VERR_INVALID_POINTER;
2305
2306	/* Supply the setjmp return RIP/EIP. */
2307	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2308	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2309	{
2310	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2311	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2312	size_t offDst = 0;
2313	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2314	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2315	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2316	{
2317	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2318	Assert(offSrc < cbSrc);
2319	pbSrc -= offSrc;
2320	cbSrc -= offSrc;
2321	}
2322	if (cbSrc > cbRead - offDst)
2323	cbSrc = cbRead - offDst;
2324	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2325
2326	if (cbSrc == cbRead)
2327	rc = VINF_SUCCESS;
2328	}
2329
2330	return rc;
2331	}
2332
2333
2334	/**
2335	* Used by the DBGF stack unwinder to initialize the register state.
2336	*
2337	* @param pUVM The user mode VM handle.
2338	* @param idCpu The ID of the CPU being unwound.
2339	* @param pState The unwind state to initialize.
2340	*/
2341	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2342	{
2343	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2344	AssertReturnVoid(pVCpu);
2345
2346	/*
2347	* Locate the resume point on the stack.
2348	*/
2349	#ifdef VMM_R0_SWITCH_STACK
2350	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2351	AssertReturnVoid(off < VMM_STACK_SIZE);
2352	#else
2353	uintptr_t off = 0;
2354	#endif
2355
2356	#ifdef RT_ARCH_AMD64
2357	/*
2358	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2359	*/
2360	# ifdef VBOX_STRICT
2361	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2362	off += 8; /* RESUME_MAGIC */
2363	# endif
2364	# ifdef RT_OS_WINDOWS
2365	off += 0xa0; /* XMM6 thru XMM15 */
2366	# endif
2367	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2368	off += 8;
2369	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2370	off += 8;
2371	# ifdef RT_OS_WINDOWS
2372	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2373	off += 8;
2374	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2375	off += 8;
2376	# endif
2377	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2378	off += 8;
2379	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2380	off += 8;
2381	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2382	off += 8;
2383	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2384	off += 8;
2385	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2386	off += 8;
2387	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2388	off += 8;
2389
2390	#elif defined(RT_ARCH_X86)
2391	/*
2392	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2393	*/
2394	# ifdef VBOX_STRICT
2395	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2396	off += 4; /* RESUME_MAGIC */
2397	# endif
2398	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2399	off += 4;
2400	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2401	off += 4;
2402	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2403	off += 4;
2404	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2405	off += 4;
2406	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2407	off += 4;
2408	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2409	off += 4;
2410	#else
2411	# error "Port me"
2412	#endif
2413
2414	/*
2415	* This is all we really need here, though the above helps if the assembly
2416	* doesn't contain unwind info (currently only on win/64, so that is useful).
2417	*/
2418	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2419	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2420	}
2421
2422
2423	/**
2424	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2425	*
2426	* @returns VBox status code.
2427	* @param pVM The cross context VM structure.
2428	* @param uOperation Operation to execute.
2429	* @param u64Arg Constant argument.
2430	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2431	* details.
2432	*/
2433	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2434	{
2435	PVMCPU pVCpu = VMMGetCpu(pVM);
2436	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2437	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2438	}
2439
2440
2441	/**
2442	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2443	*
2444	* @returns VBox status code.
2445	* @param pVM The cross context VM structure.
2446	* @param pVCpu The cross context VM structure.
2447	* @param enmOperation Operation to execute.
2448	* @param u64Arg Constant argument.
2449	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2450	* details.
2451	*/
2452	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2453	{
2454	int rc;
2455	for (;;)
2456	{
2457	#ifdef NO_SUPCALLR0VMM
2458	rc = VERR_GENERAL_FAILURE;
2459	#else
2460	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2461	#endif
2462	/*
2463	* Flush the logs.
2464	*/
2465	#ifdef LOG_ENABLED
2466	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2467	#endif
2468	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2469	if (rc != VINF_VMM_CALL_HOST)
2470	break;
2471	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2472	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2473	break;
2474	/* Resume R0 */
2475	}
2476
2477	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2478	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2479	VERR_IPE_UNEXPECTED_INFO_STATUS);
2480	return rc;
2481	}
2482
2483
2484	/**
2485	* Service a call to the ring-3 host code.
2486	*
2487	* @returns VBox status code.
2488	* @param pVM The cross context VM structure.
2489	* @param pVCpu The cross context virtual CPU structure.
2490	* @remarks Careful with critsects.
2491	*/
2492	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2493	{
2494	/*
2495	* We must also check for pending critsect exits or else we can deadlock
2496	* when entering other critsects here.
2497	*/
2498	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2499	PDMCritSectBothFF(pVM, pVCpu);
2500
2501	switch (pVCpu->vmm.s.enmCallRing3Operation)
2502	{
2503	/*
2504	* Grow the PGM pool.
2505	*/
2506	case VMMCALLRING3_PGM_POOL_GROW:
2507	{
2508	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2509	break;
2510	}
2511
2512	/*
2513	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2514	*/
2515	case VMMCALLRING3_PGM_MAP_CHUNK:
2516	{
2517	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2518	break;
2519	}
2520
2521	/*
2522	* Allocates more handy pages.
2523	*/
2524	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2525	{
2526	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2527	break;
2528	}
2529
2530	/*
2531	* Allocates a large page.
2532	*/
2533	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2534	{
2535	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2536	break;
2537	}
2538
2539	/*
2540	* Signal a ring 0 hypervisor assertion.
2541	* Cancel the longjmp operation that's in progress.
2542	*/
2543	case VMMCALLRING3_VM_R0_ASSERTION:
2544	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2545	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2546	#ifdef RT_ARCH_X86
2547	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2548	#else
2549	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2550	#endif
2551	#ifdef VMM_R0_SWITCH_STACK
2552	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2553	#endif
2554	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2555	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2556	return VERR_VMM_RING0_ASSERTION;
2557
2558	default:
2559	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2560	return VERR_VMM_UNKNOWN_RING3_CALL;
2561	}
2562
2563	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2564	return VINF_SUCCESS;
2565	}
2566
2567
2568	/**
2569	* Displays the Force action Flags.
2570	*
2571	* @param pVM The cross context VM structure.
2572	* @param pHlp The output helpers.
2573	* @param pszArgs The additional arguments (ignored).
2574	*/
2575	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2576	{
2577	int c;
2578	uint32_t f;
2579	NOREF(pszArgs);
2580
2581	#define PRINT_FLAG(prf,flag) do { \
2582	if (f & (prf##flag)) \
2583	{ \
2584	static const char *s_psz = #flag; \
2585	if (!(c % 6)) \
2586	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2587	else \
2588	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2589	c++; \
2590	f &= ~(prf##flag); \
2591	} \
2592	} while (0)
2593
2594	#define PRINT_GROUP(prf,grp,sfx) do { \
2595	if (f & (prf##grp##sfx)) \
2596	{ \
2597	static const char *s_psz = #grp; \
2598	if (!(c % 5)) \
2599	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2600	else \
2601	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2602	c++; \
2603	} \
2604	} while (0)
2605
2606	/*
2607	* The global flags.
2608	*/
2609	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2610	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2611
2612	/* show the flag mnemonics */
2613	c = 0;
2614	f = fGlobalForcedActions;
2615	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2616	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2617	PRINT_FLAG(VM_FF_,PDM_DMA);
2618	PRINT_FLAG(VM_FF_,DBGF);
2619	PRINT_FLAG(VM_FF_,REQUEST);
2620	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2621	PRINT_FLAG(VM_FF_,RESET);
2622	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2623	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2624	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2625	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2626	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2627	if (f)
2628	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2629	else
2630	pHlp->pfnPrintf(pHlp, "\n");
2631
2632	/* the groups */
2633	c = 0;
2634	f = fGlobalForcedActions;
2635	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2636	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2637	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2638	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2639	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2640	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2641	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2642	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2643	if (c)
2644	pHlp->pfnPrintf(pHlp, "\n");
2645
2646	/*
2647	* Per CPU flags.
2648	*/
2649	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2650	{
2651	PVMCPU pVCpu = pVM->apCpusR3[i];
2652	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2653	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2654
2655	/* show the flag mnemonics */
2656	c = 0;
2657	f = fLocalForcedActions;
2658	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2659	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2660	PRINT_FLAG(VMCPU_FF_,TIMER);
2661	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2662	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2663	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2664	PRINT_FLAG(VMCPU_FF_,UNHALT);
2665	PRINT_FLAG(VMCPU_FF_,IEM);
2666	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2667	PRINT_FLAG(VMCPU_FF_,DBGF);
2668	PRINT_FLAG(VMCPU_FF_,REQUEST);
2669	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2670	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2671	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2672	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2673	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2674	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2675	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2676	PRINT_FLAG(VMCPU_FF_,TO_R3);
2677	PRINT_FLAG(VMCPU_FF_,IOM);
2678	if (f)
2679	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2680	else
2681	pHlp->pfnPrintf(pHlp, "\n");
2682
2683	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2684	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2685
2686	/* the groups */
2687	c = 0;
2688	f = fLocalForcedActions;
2689	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2690	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2691	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2692	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2693	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2694	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2695	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2696	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2697	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2698	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2699	if (c)
2700	pHlp->pfnPrintf(pHlp, "\n");
2701	}
2702
2703	#undef PRINT_FLAG
2704	#undef PRINT_GROUP
2705	}
2706

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 91120

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