VMM.cpp@ 92424

Last change on this file since 92424 was 92408, checked in by vboxsync, 3 years ago
VMM: Reworked most of the call-ring-3 stuff into setjmp-longjmp-on-assert and removed the stack switching/copying/resume code. bugref:10093 bugref:10124
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 104.4 KB

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1	/* $Id: VMM.cpp 92408 2021-11-12 21:49:06Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
154	do { \
155	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
156	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
157	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
158	{ /* likely? */ } \
159	else \
160	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
161	} while (0)
162
163
164	/*********************************************************************************************************************************
165	* Internal Functions *
166	*********************************************************************************************************************************/
167	static void vmmR3InitRegisterStats(PVM pVM);
168	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
169	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
170	#if 0 /* pointless when timers doesn't run on EMT */
171	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
172	#endif
173	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
174	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
175	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
176	static FNRTTHREAD vmmR3LogFlusher;
177	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
178	PRTLOGGER pDstLogger);
179	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
180
181
182
183	/**
184	* Initializes the VMM.
185	*
186	* @returns VBox status code.
187	* @param pVM The cross context VM structure.
188	*/
189	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
190	{
191	LogFlow(("VMMR3Init\n"));
192
193	/*
194	* Assert alignment, sizes and order.
195	*/
196	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
197	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
198
199	/*
200	* Init basic VM VMM members.
201	*/
202	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
203	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
204	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
205	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
207	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
208	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
210	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
212
213	#if 0 /* pointless when timers doesn't run on EMT */
214	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
215	* The EMT yield interval. The EMT yielding is a hack we employ to play a
216	* bit nicer with the rest of the system (like for instance the GUI).
217	*/
218	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
219	23 /* Value arrived at after experimenting with the grub boot prompt. */);
220	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
221	#endif
222
223	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
224	* Controls whether we employ per-cpu preemption timers to limit the time
225	* spent executing guest code. This option is not available on all
226	* platforms and we will silently ignore this setting then. If we are
227	* running in VT-x mode, we will use the VMX-preemption timer instead of
228	* this one when possible.
229	*/
230	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
231	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
232	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
233
234	/*
235	* Initialize the VMM rendezvous semaphores.
236	*/
237	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
238	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
239	return VERR_NO_MEMORY;
240	for (VMCPUID i = 0; i < pVM->cCpus; i++)
241	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
242	for (VMCPUID i = 0; i < pVM->cCpus; i++)
243	{
244	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
245	AssertRCReturn(rc, rc);
246	}
247	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
262	AssertRCReturn(rc, rc);
263
264	/*
265	* Register the saved state data unit.
266	*/
267	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
268	NULL, NULL, NULL,
269	NULL, vmmR3Save, NULL,
270	NULL, vmmR3Load, NULL);
271	if (RT_FAILURE(rc))
272	return rc;
273
274	/*
275	* Register the Ring-0 VM handle with the session for fast ioctl calls.
276	*/
277	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
278	if (RT_FAILURE(rc))
279	return rc;
280
281	#ifdef VBOX_WITH_NMI
282	/*
283	* Allocate mapping for the host APIC.
284	*/
285	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
286	AssertRC(rc);
287	#endif
288	if (RT_SUCCESS(rc))
289	{
290	/*
291	* Start the log flusher thread.
292	*/
293	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
294	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
295	if (RT_SUCCESS(rc))
296	{
297
298	/*
299	* Debug info and statistics.
300	*/
301	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
302	vmmR3InitRegisterStats(pVM);
303	vmmInitFormatTypes();
304
305	return VINF_SUCCESS;
306	}
307	}
308	/** @todo Need failure cleanup? */
309
310	return rc;
311	}
312
313
314	/**
315	* VMMR3Init worker that register the statistics with STAM.
316	*
317	* @param pVM The cross context VM structure.
318	*/
319	static void vmmR3InitRegisterStats(PVM pVM)
320	{
321	RT_NOREF_PV(pVM);
322
323	/*
324	* Statistics.
325	*/
326	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
327	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
328	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
329	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
330	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
331	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
332	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
333	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
334	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
335	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
336	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
337	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
338	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
339	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
340	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
341	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
342	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
343	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
344	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
345	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
346	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
347	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
348	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
349	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
350	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
351	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
352	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
353	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
354	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
379
380	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
381	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
382
383	for (VMCPUID i = 0; i < pVM->cCpus; i++)
384	{
385	PVMCPU pVCpu = pVM->apCpusR3[i];
386	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
387	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
388	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
389	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
390	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
391	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
392	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
393	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
394	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
395	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
396	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
397	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
398	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
399	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
400	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
401	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
402	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
403
404	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
405
406	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
407	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
408	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
409	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
410	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
411	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
412	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
413	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
414	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
415
416	pShared = &pVCpu->vmm.s.u.s.RelLogger;
417	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
418	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
419	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
420	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
421	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
422	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
423	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
424	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
425	}
426	}
427
428
429	/**
430	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
431	*
432	* @returns VBox status code.
433	* @param pVM The cross context VM structure.
434	* @param pVCpu The cross context per CPU structure.
435	* @thread EMT(pVCpu)
436	*/
437	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
438	{
439	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
440	}
441
442
443	/**
444	* Initializes the R0 VMM.
445	*
446	* @returns VBox status code.
447	* @param pVM The cross context VM structure.
448	*/
449	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
450	{
451	int rc;
452	PVMCPU pVCpu = VMMGetCpu(pVM);
453	Assert(pVCpu && pVCpu->idCpu == 0);
454
455	/*
456	* Make sure the ring-0 loggers are up to date.
457	*/
458	rc = VMMR3UpdateLoggers(pVM);
459	if (RT_FAILURE(rc))
460	return rc;
461
462	/*
463	* Call Ring-0 entry with init code.
464	*/
465	#ifdef NO_SUPCALLR0VMM
466	//rc = VERR_GENERAL_FAILURE;
467	rc = VINF_SUCCESS;
468	#else
469	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
470	#endif
471
472	/*
473	* Flush the logs & deal with assertions.
474	*/
475	#ifdef LOG_ENABLED
476	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
477	#endif
478	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
479	if (rc == VERR_VMM_RING0_ASSERTION)
480	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
481	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
482	{
483	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
484	if (RT_SUCCESS(rc))
485	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
486	}
487
488	/*
489	* Log stuff we learned in ring-0.
490	*/
491	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
492	if (pVM->vmm.s.fIsUsingContextHooks)
493	LogRel(("VMM: Enabled thread-context hooks\n"));
494	else
495	LogRel(("VMM: Thread-context hooks unavailable\n"));
496
497	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
498	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
499	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
500	else
501	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
502	if (pVM->vmm.s.fIsPreemptPossible)
503	LogRel(("VMM: Kernel preemption is possible\n"));
504	else
505	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
506
507	/*
508	* Send all EMTs to ring-0 to get their logger initialized.
509	*/
510	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
511	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
512
513	return rc;
514	}
515
516
517	/**
518	* Called when an init phase completes.
519	*
520	* @returns VBox status code.
521	* @param pVM The cross context VM structure.
522	* @param enmWhat Which init phase.
523	*/
524	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
525	{
526	int rc = VINF_SUCCESS;
527
528	switch (enmWhat)
529	{
530	case VMINITCOMPLETED_RING3:
531	{
532	#if 0 /* pointless when timers doesn't run on EMT */
533	/*
534	* Create the EMT yield timer.
535	*/
536	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
537	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
538	AssertRCReturn(rc, rc);
539
540	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
541	AssertRCReturn(rc, rc);
542	#endif
543	break;
544	}
545
546	case VMINITCOMPLETED_HM:
547	{
548	/*
549	* Disable the periodic preemption timers if we can use the
550	* VMX-preemption timer instead.
551	*/
552	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
553	&& HMR3IsVmxPreemptionTimerUsed(pVM))
554	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
555	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
556
557	/*
558	* Last chance for GIM to update its CPUID leaves if it requires
559	* knowledge/information from HM initialization.
560	*/
561	rc = GIMR3InitCompleted(pVM);
562	AssertRCReturn(rc, rc);
563
564	/*
565	* CPUM's post-initialization (print CPUIDs).
566	*/
567	CPUMR3LogCpuIdAndMsrFeatures(pVM);
568	break;
569	}
570
571	default: /* shuts up gcc */
572	break;
573	}
574
575	return rc;
576	}
577
578
579	/**
580	* Terminate the VMM bits.
581	*
582	* @returns VBox status code.
583	* @param pVM The cross context VM structure.
584	*/
585	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
586	{
587	PVMCPU pVCpu = VMMGetCpu(pVM);
588	Assert(pVCpu && pVCpu->idCpu == 0);
589
590	/*
591	* Call Ring-0 entry with termination code.
592	*/
593	#ifdef NO_SUPCALLR0VMM
594	//rc = VERR_GENERAL_FAILURE;
595	int rc = VINF_SUCCESS;
596	#else
597	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
598	#endif
599
600	/*
601	* Flush the logs & deal with assertions.
602	*/
603	#ifdef LOG_ENABLED
604	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
605	#endif
606	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
607	if (rc == VERR_VMM_RING0_ASSERTION)
608	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
609	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
610	{
611	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
612	if (RT_SUCCESS(rc))
613	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
614	}
615
616	/*
617	* Do clean ups.
618	*/
619	for (VMCPUID i = 0; i < pVM->cCpus; i++)
620	{
621	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
622	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
623	}
624	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
625	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
626	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
627	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
628	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
629	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
630	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
631	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
632	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
633	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
634	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
635	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
636	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
637	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
638	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
639	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
640
641	vmmTermFormatTypes();
642
643	/*
644	* Wait for the log flusher thread to complete.
645	*/
646	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
647	{
648	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
649	AssertLogRelRC(rc2);
650	if (RT_SUCCESS(rc2))
651	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
652	}
653
654	return rc;
655	}
656
657
658	/**
659	* Applies relocations to data and code managed by this
660	* component. This function will be called at init and
661	* whenever the VMM need to relocate it self inside the GC.
662	*
663	* The VMM will need to apply relocations to the core code.
664	*
665	* @param pVM The cross context VM structure.
666	* @param offDelta The relocation delta.
667	*/
668	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
669	{
670	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
671	RT_NOREF(offDelta);
672
673	/*
674	* Update the logger.
675	*/
676	VMMR3UpdateLoggers(pVM);
677	}
678
679
680	/**
681	* Worker for VMMR3UpdateLoggers.
682	*/
683	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
684	{
685	/*
686	* Get the group count.
687	*/
688	uint32_t uGroupsCrc32 = 0;
689	uint32_t cGroups = 0;
690	uint64_t fFlags = 0;
691	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
692	Assert(rc == VERR_BUFFER_OVERFLOW);
693
694	/*
695	* Allocate the request of the right size.
696	*/
697	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
698	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
699	if (pReq)
700	{
701	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
702	pReq->Hdr.cbReq = cbReq;
703	pReq->cGroups = cGroups;
704	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
705	AssertRC(rc);
706	if (RT_SUCCESS(rc))
707	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
708
709	RTMemFree(pReq);
710	}
711	else
712	rc = VERR_NO_MEMORY;
713	return rc;
714	}
715
716
717	/**
718	* Updates the settings for the RC and R0 loggers.
719	*
720	* @returns VBox status code.
721	* @param pVM The cross context VM structure.
722	* @thread EMT
723	*/
724	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
725	{
726	VM_ASSERT_EMT(pVM);
727	PVMCPU pVCpu = VMMGetCpu(pVM);
728	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
729
730	/*
731	* Each EMT has each own logger instance.
732	*/
733	/* Debug logging.*/
734	int rcDebug = VINF_SUCCESS;
735	#ifdef LOG_ENABLED
736	PRTLOGGER const pDefault = RTLogDefaultInstance();
737	if (pDefault)
738	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
739	#else
740	RT_NOREF(pVM);
741	#endif
742
743	/* Release logging. */
744	int rcRelease = VINF_SUCCESS;
745	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
746	if (pRelease)
747	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
748
749	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
750	}
751
752
753	/**
754	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
755	*/
756	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
757	{
758	PVM const pVM = (PVM)pvUser;
759	RT_NOREF(hThreadSelf);
760
761	/* Reset the flusher state before we start: */
762	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
763
764	/*
765	* The work loop.
766	*/
767	for (;;)
768	{
769	/*
770	* Wait for work.
771	*/
772	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
773	if (RT_SUCCESS(rc))
774	{
775	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
776	VMMLOGFLUSHERENTRY Item;
777	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
778	if ( Item.s.idCpu < pVM->cCpus
779	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
780	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
781	{
782	/*
783	* Verify the request.
784	*/
785	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
786	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
787	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
788	if (cbToFlush > 0)
789	{
790	if (cbToFlush <= pShared->cbBuf)
791	{
792	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
793	if (pchBufR3)
794	{
795	/*
796	* Do the flushing.
797	*/
798	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
799	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
800	if (pLogger)
801	{
802	char szBefore[128];
803	RTStrPrintf(szBefore, sizeof(szBefore),
804	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
805	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
806	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
807	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
808	}
809	}
810	else
811	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
812	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
813	}
814	else
815	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
816	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
817	}
818	else
819	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
820	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
821
822	/*
823	* Mark the descriptor as flushed and set the request flag for same.
824	*/
825	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
826	}
827	else
828	{
829	Assert(Item.s.idCpu == UINT16_MAX);
830	Assert(Item.s.idxLogger == UINT8_MAX);
831	Assert(Item.s.idxBuffer == UINT8_MAX);
832	}
833	}
834	/*
835	* Interrupted can happen, just ignore it.
836	*/
837	else if (rc == VERR_INTERRUPTED)
838	{ /* ignore*/ }
839	/*
840	* The ring-0 termination code will set the shutdown flag and wake us
841	* up, and we should return with object destroyed. In case there is
842	* some kind of race, we might also get sempahore destroyed.
843	*/
844	else if ( rc == VERR_OBJECT_DESTROYED
845	\|\| rc == VERR_SEM_DESTROYED
846	\|\| rc == VERR_INVALID_HANDLE)
847	{
848	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
849	return VINF_SUCCESS;
850	}
851	/*
852	* There shouldn't be any other errors...
853	*/
854	else
855	{
856	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
857	AssertRC(rc);
858	RTThreadSleep(1);
859	}
860	}
861	}
862
863
864	/**
865	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
866	*
867	* @param pVM The cross context VM structure.
868	* @param pVCpu The cross context virtual CPU structure of the calling
869	* EMT.
870	* @param pShared The shared logger data.
871	* @param idxBuf The buffer to flush.
872	* @param pDstLogger The destination IPRT logger.
873	*/
874	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
875	{
876	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
877	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
878	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
879
880	#if VMMLOGGER_BUFFER_COUNT > 1
881	/*
882	* When we have more than one log buffer, the flusher thread may still be
883	* working on the previous buffer when we get here.
884	*/
885	char szBefore[64];
886	if (pShared->cFlushing > 0)
887	{
888	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
889	uint64_t const nsStart = RTTimeNanoTS();
890
891	/* A no-op, but it takes the lock and the hope is that we end up waiting
892	on the flusher to finish up. */
893	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
894	if (pShared->cFlushing != 0)
895	{
896	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
897
898	/* If no luck, go to ring-0 and to proper waiting. */
899	if (pShared->cFlushing != 0)
900	{
901	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
902	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
903	}
904	}
905
906	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
907	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
908	pszBefore = szBefore;
909	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
910	}
911	#else
912	RT_NOREF(pVM, pVCpu);
913	#endif
914
915	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
916	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
917	}
918
919
920	/**
921	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
922	*
923	* @returns Pointer to the buffer.
924	* @param pVM The cross context VM structure.
925	*/
926	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
927	{
928	return pVM->vmm.s.szRing0AssertMsg1;
929	}
930
931
932	/**
933	* Returns the VMCPU of the specified virtual CPU.
934	*
935	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
936	*
937	* @param pUVM The user mode VM handle.
938	* @param idCpu The ID of the virtual CPU.
939	*/
940	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
941	{
942	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
943	AssertReturn(idCpu < pUVM->cCpus, NULL);
944	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
945	return pUVM->pVM->apCpusR3[idCpu];
946	}
947
948
949	/**
950	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
951	*
952	* @returns Pointer to the buffer.
953	* @param pVM The cross context VM structure.
954	*/
955	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
956	{
957	return pVM->vmm.s.szRing0AssertMsg2;
958	}
959
960
961	/**
962	* Execute state save operation.
963	*
964	* @returns VBox status code.
965	* @param pVM The cross context VM structure.
966	* @param pSSM SSM operation handle.
967	*/
968	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
969	{
970	LogFlow(("vmmR3Save:\n"));
971
972	/*
973	* Save the started/stopped state of all CPUs except 0 as it will always
974	* be running. This avoids breaking the saved state version. :-)
975	*/
976	for (VMCPUID i = 1; i < pVM->cCpus; i++)
977	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
978
979	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
980	}
981
982
983	/**
984	* Execute state load operation.
985	*
986	* @returns VBox status code.
987	* @param pVM The cross context VM structure.
988	* @param pSSM SSM operation handle.
989	* @param uVersion Data layout version.
990	* @param uPass The data pass.
991	*/
992	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
993	{
994	LogFlow(("vmmR3Load:\n"));
995	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
996
997	/*
998	* Validate version.
999	*/
1000	if ( uVersion != VMM_SAVED_STATE_VERSION
1001	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1002	{
1003	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1004	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1005	}
1006
1007	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1008	{
1009	/* Ignore the stack bottom, stack pointer and stack bits. */
1010	RTRCPTR RCPtrIgnored;
1011	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1012	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1013	#ifdef RT_OS_DARWIN
1014	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1015	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1016	&& SSMR3HandleRevision(pSSM) >= 48858
1017	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1018	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1019	)
1020	SSMR3Skip(pSSM, 16384);
1021	else
1022	SSMR3Skip(pSSM, 8192);
1023	#else
1024	SSMR3Skip(pSSM, 8192);
1025	#endif
1026	}
1027
1028	/*
1029	* Restore the VMCPU states. VCPU 0 is always started.
1030	*/
1031	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1032	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1033	{
1034	bool fStarted;
1035	int rc = SSMR3GetBool(pSSM, &fStarted);
1036	if (RT_FAILURE(rc))
1037	return rc;
1038	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1039	}
1040
1041	/* terminator */
1042	uint32_t u32;
1043	int rc = SSMR3GetU32(pSSM, &u32);
1044	if (RT_FAILURE(rc))
1045	return rc;
1046	if (u32 != UINT32_MAX)
1047	{
1048	AssertMsgFailed(("u32=%#x\n", u32));
1049	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1050	}
1051	return VINF_SUCCESS;
1052	}
1053
1054
1055	/**
1056	* Suspends the CPU yielder.
1057	*
1058	* @param pVM The cross context VM structure.
1059	*/
1060	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1061	{
1062	#if 0 /* pointless when timers doesn't run on EMT */
1063	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1064	if (!pVM->vmm.s.cYieldResumeMillies)
1065	{
1066	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1067	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1068	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1069	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1070	else
1071	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1072	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1073	}
1074	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1075	#else
1076	RT_NOREF(pVM);
1077	#endif
1078	}
1079
1080
1081	/**
1082	* Stops the CPU yielder.
1083	*
1084	* @param pVM The cross context VM structure.
1085	*/
1086	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1087	{
1088	#if 0 /* pointless when timers doesn't run on EMT */
1089	if (!pVM->vmm.s.cYieldResumeMillies)
1090	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1091	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1092	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1093	#else
1094	RT_NOREF(pVM);
1095	#endif
1096	}
1097
1098
1099	/**
1100	* Resumes the CPU yielder when it has been a suspended or stopped.
1101	*
1102	* @param pVM The cross context VM structure.
1103	*/
1104	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1105	{
1106	#if 0 /* pointless when timers doesn't run on EMT */
1107	if (pVM->vmm.s.cYieldResumeMillies)
1108	{
1109	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1110	pVM->vmm.s.cYieldResumeMillies = 0;
1111	}
1112	#else
1113	RT_NOREF(pVM);
1114	#endif
1115	}
1116
1117
1118	#if 0 /* pointless when timers doesn't run on EMT */
1119	/**
1120	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1121	*
1122	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1123	*/
1124	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1125	{
1126	NOREF(pvUser);
1127
1128	/*
1129	* This really needs some careful tuning. While we shouldn't be too greedy since
1130	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1131	* because that'll cause us to stop up.
1132	*
1133	* The current logic is to use the default interval when there is no lag worth
1134	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1135	*
1136	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1137	* so the lag is up to date.)
1138	*/
1139	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1140	if ( u64Lag < 50000000 /* 50ms */
1141	\|\| ( u64Lag < 1000000000 /* 1s */
1142	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1143	)
1144	{
1145	uint64_t u64Elapsed = RTTimeNanoTS();
1146	pVM->vmm.s.u64LastYield = u64Elapsed;
1147
1148	RTThreadYield();
1149
1150	#ifdef LOG_ENABLED
1151	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1152	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1153	#endif
1154	}
1155	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1156	}
1157	#endif
1158
1159
1160	/**
1161	* Executes guest code (Intel VT-x and AMD-V).
1162	*
1163	* @param pVM The cross context VM structure.
1164	* @param pVCpu The cross context virtual CPU structure.
1165	*/
1166	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1167	{
1168	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1169
1170	int rc;
1171	do
1172	{
1173	#ifdef NO_SUPCALLR0VMM
1174	rc = VERR_GENERAL_FAILURE;
1175	#else
1176	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1177	if (RT_LIKELY(rc == VINF_SUCCESS))
1178	rc = pVCpu->vmm.s.iLastGZRc;
1179	#endif
1180	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1181
1182	#if 0 /** @todo triggers too often */
1183	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1184	#endif
1185
1186	/*
1187	* Flush the logs
1188	*/
1189	#ifdef LOG_ENABLED
1190	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1191	#endif
1192	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1193	if (rc != VERR_VMM_RING0_ASSERTION)
1194	{
1195	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1196	return rc;
1197	}
1198	return vmmR3HandleRing0Assert(pVM, pVCpu);
1199	}
1200
1201
1202	/**
1203	* Perform one of the fast I/O control VMMR0 operation.
1204	*
1205	* @returns VBox strict status code.
1206	* @param pVM The cross context VM structure.
1207	* @param pVCpu The cross context virtual CPU structure.
1208	* @param enmOperation The operation to perform.
1209	*/
1210	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1211	{
1212	VBOXSTRICTRC rcStrict;
1213	do
1214	{
1215	#ifdef NO_SUPCALLR0VMM
1216	rcStrict = VERR_GENERAL_FAILURE;
1217	#else
1218	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1219	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1220	rcStrict = pVCpu->vmm.s.iLastGZRc;
1221	#endif
1222	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1223
1224	/*
1225	* Flush the logs
1226	*/
1227	#ifdef LOG_ENABLED
1228	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1229	#endif
1230	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1231	if (rcStrict != VERR_VMM_RING0_ASSERTION)
1232	return rcStrict;
1233	return vmmR3HandleRing0Assert(pVM, pVCpu);
1234	}
1235
1236
1237	/**
1238	* VCPU worker for VMMR3SendStartupIpi.
1239	*
1240	* @param pVM The cross context VM structure.
1241	* @param idCpu Virtual CPU to perform SIPI on.
1242	* @param uVector The SIPI vector.
1243	*/
1244	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1245	{
1246	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1247	VMCPU_ASSERT_EMT(pVCpu);
1248
1249	/*
1250	* In the INIT state, the target CPU is only responsive to an SIPI.
1251	* This is also true for when when the CPU is in VMX non-root mode.
1252	*
1253	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1254	* See Intel spec. 26.6.2 "Activity State".
1255	*/
1256	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1257	return VINF_SUCCESS;
1258
1259	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1260	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1261	if (CPUMIsGuestInVmxRootMode(pCtx))
1262	{
1263	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1264	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1265	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1266
1267	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1268	return VINF_SUCCESS;
1269	}
1270	#endif
1271
1272	pCtx->cs.Sel = uVector << 8;
1273	pCtx->cs.ValidSel = uVector << 8;
1274	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1275	pCtx->cs.u64Base = uVector << 12;
1276	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1277	pCtx->rip = 0;
1278
1279	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1280
1281	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1282	EMSetState(pVCpu, EMSTATE_HALTED);
1283	return VINF_EM_RESCHEDULE;
1284	# else /* And if we go the VMCPU::enmState way it can stay here. */
1285	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1286	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1287	return VINF_SUCCESS;
1288	# endif
1289	}
1290
1291
1292	/**
1293	* VCPU worker for VMMR3SendInitIpi.
1294	*
1295	* @returns VBox status code.
1296	* @param pVM The cross context VM structure.
1297	* @param idCpu Virtual CPU to perform SIPI on.
1298	*/
1299	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1300	{
1301	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1302	VMCPU_ASSERT_EMT(pVCpu);
1303
1304	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1305
1306	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1307	* wait-for-SIPI state. Verify. */
1308
1309	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1310	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1311	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1312	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1313	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1314	#endif
1315
1316	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1317	* IPI (e.g. SVM_EXIT_INIT). */
1318
1319	PGMR3ResetCpu(pVM, pVCpu);
1320	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1321	APICR3InitIpi(pVCpu);
1322	TRPMR3ResetCpu(pVCpu);
1323	CPUMR3ResetCpu(pVM, pVCpu);
1324	EMR3ResetCpu(pVCpu);
1325	HMR3ResetCpu(pVCpu);
1326	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1327
1328	/* This will trickle up on the target EMT. */
1329	return VINF_EM_WAIT_SIPI;
1330	}
1331
1332
1333	/**
1334	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1335	* vector-dependent state and unhalting processor.
1336	*
1337	* @param pVM The cross context VM structure.
1338	* @param idCpu Virtual CPU to perform SIPI on.
1339	* @param uVector SIPI vector.
1340	*/
1341	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1342	{
1343	AssertReturnVoid(idCpu < pVM->cCpus);
1344
1345	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1346	AssertRC(rc);
1347	}
1348
1349
1350	/**
1351	* Sends init IPI to the virtual CPU.
1352	*
1353	* @param pVM The cross context VM structure.
1354	* @param idCpu Virtual CPU to perform int IPI on.
1355	*/
1356	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1357	{
1358	AssertReturnVoid(idCpu < pVM->cCpus);
1359
1360	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1361	AssertRC(rc);
1362	}
1363
1364
1365	/**
1366	* Registers the guest memory range that can be used for patching.
1367	*
1368	* @returns VBox status code.
1369	* @param pVM The cross context VM structure.
1370	* @param pPatchMem Patch memory range.
1371	* @param cbPatchMem Size of the memory range.
1372	*/
1373	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1374	{
1375	VM_ASSERT_EMT(pVM);
1376	if (HMIsEnabled(pVM))
1377	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1378
1379	return VERR_NOT_SUPPORTED;
1380	}
1381
1382
1383	/**
1384	* Deregisters the guest memory range that can be used for patching.
1385	*
1386	* @returns VBox status code.
1387	* @param pVM The cross context VM structure.
1388	* @param pPatchMem Patch memory range.
1389	* @param cbPatchMem Size of the memory range.
1390	*/
1391	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1392	{
1393	if (HMIsEnabled(pVM))
1394	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1395
1396	return VINF_SUCCESS;
1397	}
1398
1399
1400	/**
1401	* Common recursion handler for the other EMTs.
1402	*
1403	* @returns Strict VBox status code.
1404	* @param pVM The cross context VM structure.
1405	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1406	* @param rcStrict Current status code to be combined with the one
1407	* from this recursion and returned.
1408	*/
1409	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1410	{
1411	int rc2;
1412
1413	/*
1414	* We wait here while the initiator of this recursion reconfigures
1415	* everything. The last EMT to get in signals the initiator.
1416	*/
1417	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1418	{
1419	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1420	AssertLogRelRC(rc2);
1421	}
1422
1423	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1424	AssertLogRelRC(rc2);
1425
1426	/*
1427	* Do the normal rendezvous processing.
1428	*/
1429	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1430	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1431
1432	/*
1433	* Wait for the initiator to restore everything.
1434	*/
1435	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1436	AssertLogRelRC(rc2);
1437
1438	/*
1439	* Last thread out of here signals the initiator.
1440	*/
1441	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1442	{
1443	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1444	AssertLogRelRC(rc2);
1445	}
1446
1447	/*
1448	* Merge status codes and return.
1449	*/
1450	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1451	if ( rcStrict2 != VINF_SUCCESS
1452	&& ( rcStrict == VINF_SUCCESS
1453	\|\| rcStrict > rcStrict2))
1454	rcStrict = rcStrict2;
1455	return rcStrict;
1456	}
1457
1458
1459	/**
1460	* Count returns and have the last non-caller EMT wake up the caller.
1461	*
1462	* @returns VBox strict informational status code for EM scheduling. No failures
1463	* will be returned here, those are for the caller only.
1464	*
1465	* @param pVM The cross context VM structure.
1466	* @param rcStrict The current accumulated recursive status code,
1467	* to be merged with i32RendezvousStatus and
1468	* returned.
1469	*/
1470	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1471	{
1472	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1473
1474	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1475	if (cReturned == pVM->cCpus - 1U)
1476	{
1477	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1478	AssertLogRelRC(rc);
1479	}
1480
1481	/*
1482	* Merge the status codes, ignoring error statuses in this code path.
1483	*/
1484	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1485	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1486	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1487	VERR_IPE_UNEXPECTED_INFO_STATUS);
1488
1489	if (RT_SUCCESS(rcStrict2))
1490	{
1491	if ( rcStrict2 != VINF_SUCCESS
1492	&& ( rcStrict == VINF_SUCCESS
1493	\|\| rcStrict > rcStrict2))
1494	rcStrict = rcStrict2;
1495	}
1496	return rcStrict;
1497	}
1498
1499
1500	/**
1501	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1502	*
1503	* @returns VBox strict informational status code for EM scheduling. No failures
1504	* will be returned here, those are for the caller only. When
1505	* fIsCaller is set, VINF_SUCCESS is always returned.
1506	*
1507	* @param pVM The cross context VM structure.
1508	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1509	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1510	* not.
1511	* @param fFlags The flags.
1512	* @param pfnRendezvous The callback.
1513	* @param pvUser The user argument for the callback.
1514	*/
1515	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1516	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1517	{
1518	int rc;
1519	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1520
1521	/*
1522	* Enter, the last EMT triggers the next callback phase.
1523	*/
1524	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1525	if (cEntered != pVM->cCpus)
1526	{
1527	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1528	{
1529	/* Wait for our turn. */
1530	for (;;)
1531	{
1532	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1533	AssertLogRelRC(rc);
1534	if (!pVM->vmm.s.fRendezvousRecursion)
1535	break;
1536	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1537	}
1538	}
1539	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1540	{
1541	/* Wait for the last EMT to arrive and wake everyone up. */
1542	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1543	AssertLogRelRC(rc);
1544	Assert(!pVM->vmm.s.fRendezvousRecursion);
1545	}
1546	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1547	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1548	{
1549	/* Wait for our turn. */
1550	for (;;)
1551	{
1552	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1553	AssertLogRelRC(rc);
1554	if (!pVM->vmm.s.fRendezvousRecursion)
1555	break;
1556	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1557	}
1558	}
1559	else
1560	{
1561	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1562
1563	/*
1564	* The execute once is handled specially to optimize the code flow.
1565	*
1566	* The last EMT to arrive will perform the callback and the other
1567	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1568	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1569	* returns, that EMT will initiate the normal return sequence.
1570	*/
1571	if (!fIsCaller)
1572	{
1573	for (;;)
1574	{
1575	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1576	AssertLogRelRC(rc);
1577	if (!pVM->vmm.s.fRendezvousRecursion)
1578	break;
1579	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1580	}
1581
1582	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1583	}
1584	return VINF_SUCCESS;
1585	}
1586	}
1587	else
1588	{
1589	/*
1590	* All EMTs are waiting, clear the FF and take action according to the
1591	* execution method.
1592	*/
1593	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1594
1595	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1596	{
1597	/* Wake up everyone. */
1598	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1599	AssertLogRelRC(rc);
1600	}
1601	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1602	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1603	{
1604	/* Figure out who to wake up and wake it up. If it's ourself, then
1605	it's easy otherwise wait for our turn. */
1606	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1607	? 0
1608	: pVM->cCpus - 1U;
1609	if (pVCpu->idCpu != iFirst)
1610	{
1611	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1612	AssertLogRelRC(rc);
1613	for (;;)
1614	{
1615	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1616	AssertLogRelRC(rc);
1617	if (!pVM->vmm.s.fRendezvousRecursion)
1618	break;
1619	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1620	}
1621	}
1622	}
1623	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1624	}
1625
1626
1627	/*
1628	* Do the callback and update the status if necessary.
1629	*/
1630	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1631	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1632	{
1633	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1634	if (rcStrict2 != VINF_SUCCESS)
1635	{
1636	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1637	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1638	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1639	int32_t i32RendezvousStatus;
1640	do
1641	{
1642	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1643	if ( rcStrict2 == i32RendezvousStatus
1644	\|\| RT_FAILURE(i32RendezvousStatus)
1645	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1646	&& rcStrict2 > i32RendezvousStatus))
1647	break;
1648	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1649	}
1650	}
1651
1652	/*
1653	* Increment the done counter and take action depending on whether we're
1654	* the last to finish callback execution.
1655	*/
1656	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1657	if ( cDone != pVM->cCpus
1658	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1659	{
1660	/* Signal the next EMT? */
1661	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1662	{
1663	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1664	AssertLogRelRC(rc);
1665	}
1666	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1667	{
1668	Assert(cDone == pVCpu->idCpu + 1U);
1669	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1670	AssertLogRelRC(rc);
1671	}
1672	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1673	{
1674	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1675	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1676	AssertLogRelRC(rc);
1677	}
1678
1679	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1680	if (!fIsCaller)
1681	{
1682	for (;;)
1683	{
1684	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1685	AssertLogRelRC(rc);
1686	if (!pVM->vmm.s.fRendezvousRecursion)
1687	break;
1688	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1689	}
1690	}
1691	}
1692	else
1693	{
1694	/* Callback execution is all done, tell the rest to return. */
1695	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1696	AssertLogRelRC(rc);
1697	}
1698
1699	if (!fIsCaller)
1700	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1701	return rcStrictRecursion;
1702	}
1703
1704
1705	/**
1706	* Called in response to VM_FF_EMT_RENDEZVOUS.
1707	*
1708	* @returns VBox strict status code - EM scheduling. No errors will be returned
1709	* here, nor will any non-EM scheduling status codes be returned.
1710	*
1711	* @param pVM The cross context VM structure.
1712	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1713	*
1714	* @thread EMT
1715	*/
1716	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1717	{
1718	Assert(!pVCpu->vmm.s.fInRendezvous);
1719	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1720	pVCpu->vmm.s.fInRendezvous = true;
1721	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1722	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1723	pVCpu->vmm.s.fInRendezvous = false;
1724	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1725	return VBOXSTRICTRC_TODO(rcStrict);
1726	}
1727
1728
1729	/**
1730	* Helper for resetting an single wakeup event sempahore.
1731	*
1732	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1733	* @param hEvt The event semaphore to reset.
1734	*/
1735	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1736	{
1737	for (uint32_t cLoops = 0; ; cLoops++)
1738	{
1739	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1740	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1741	return rc;
1742	}
1743	}
1744
1745
1746	/**
1747	* Worker for VMMR3EmtRendezvous that handles recursion.
1748	*
1749	* @returns VBox strict status code. This will be the first error,
1750	* VINF_SUCCESS, or an EM scheduling status code.
1751	*
1752	* @param pVM The cross context VM structure.
1753	* @param pVCpu The cross context virtual CPU structure of the
1754	* calling EMT.
1755	* @param fFlags Flags indicating execution methods. See
1756	* grp_VMMR3EmtRendezvous_fFlags.
1757	* @param pfnRendezvous The callback.
1758	* @param pvUser User argument for the callback.
1759	*
1760	* @thread EMT(pVCpu)
1761	*/
1762	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1763	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1764	{
1765	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1766	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1767	Assert(pVCpu->vmm.s.fInRendezvous);
1768
1769	/*
1770	* Save the current state.
1771	*/
1772	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1773	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1774	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1775	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1776	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1777
1778	/*
1779	* Check preconditions and save the current state.
1780	*/
1781	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1782	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1783	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1784	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1785	VERR_INTERNAL_ERROR);
1786	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1787	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1788
1789	/*
1790	* Reset the recursion prep and pop semaphores.
1791	*/
1792	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1793	AssertLogRelRCReturn(rc, rc);
1794	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1795	AssertLogRelRCReturn(rc, rc);
1796	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1797	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1798	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1799	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1800
1801	/*
1802	* Usher the other thread into the recursion routine.
1803	*/
1804	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1805	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1806
1807	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1808	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1809	while (cLeft-- > 0)
1810	{
1811	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1812	AssertLogRelRC(rc);
1813	}
1814	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1815	{
1816	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1817	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1818	{
1819	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1820	AssertLogRelRC(rc);
1821	}
1822	}
1823	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1824	{
1825	Assert(cLeft == pVCpu->idCpu);
1826	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1827	{
1828	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1829	AssertLogRelRC(rc);
1830	}
1831	}
1832	else
1833	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1834	VERR_INTERNAL_ERROR_4);
1835
1836	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1837	AssertLogRelRC(rc);
1838	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1839	AssertLogRelRC(rc);
1840
1841
1842	/*
1843	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1844	*/
1845	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1846	{
1847	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1848	AssertLogRelRC(rc);
1849	}
1850
1851	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1852
1853	/*
1854	* Clear the slate and setup the new rendezvous.
1855	*/
1856	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1857	{
1858	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1859	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1860	}
1861	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1862	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1863	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1864	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1865
1866	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1867	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1868	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1869	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1870	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1871	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1872	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1873	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1874
1875	/*
1876	* We're ready to go now, do normal rendezvous processing.
1877	*/
1878	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1879	AssertLogRelRC(rc);
1880
1881	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1882
1883	/*
1884	* The caller waits for the other EMTs to be done, return and waiting on the
1885	* pop semaphore.
1886	*/
1887	for (;;)
1888	{
1889	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1890	AssertLogRelRC(rc);
1891	if (!pVM->vmm.s.fRendezvousRecursion)
1892	break;
1893	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1894	}
1895
1896	/*
1897	* Get the return code and merge it with the above recursion status.
1898	*/
1899	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1900	if ( rcStrict2 != VINF_SUCCESS
1901	&& ( rcStrict == VINF_SUCCESS
1902	\|\| rcStrict > rcStrict2))
1903	rcStrict = rcStrict2;
1904
1905	/*
1906	* Restore the parent rendezvous state.
1907	*/
1908	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1909	{
1910	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1911	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1912	}
1913	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1914	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1915	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1916	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1917
1918	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1919	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1920	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1921	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1922	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1923	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1924	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1925
1926	/*
1927	* Usher the other EMTs back to their parent recursion routine, waiting
1928	* for them to all get there before we return (makes sure they've been
1929	* scheduled and are past the pop event sem, see below).
1930	*/
1931	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1932	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1933	AssertLogRelRC(rc);
1934
1935	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1936	{
1937	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1938	AssertLogRelRC(rc);
1939	}
1940
1941	/*
1942	* We must reset the pop semaphore on the way out (doing the pop caller too,
1943	* just in case). The parent may be another recursion.
1944	*/
1945	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1946	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1947
1948	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1949
1950	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1951	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1952	return rcStrict;
1953	}
1954
1955
1956	/**
1957	* EMT rendezvous.
1958	*
1959	* Gathers all the EMTs and execute some code on each of them, either in a one
1960	* by one fashion or all at once.
1961	*
1962	* @returns VBox strict status code. This will be the first error,
1963	* VINF_SUCCESS, or an EM scheduling status code.
1964	*
1965	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1966	* doesn't support it or if the recursion is too deep.
1967	*
1968	* @param pVM The cross context VM structure.
1969	* @param fFlags Flags indicating execution methods. See
1970	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1971	* descending and ascending rendezvous types support
1972	* recursion from inside @a pfnRendezvous.
1973	* @param pfnRendezvous The callback.
1974	* @param pvUser User argument for the callback.
1975	*
1976	* @thread Any.
1977	*/
1978	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1979	{
1980	/*
1981	* Validate input.
1982	*/
1983	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1984	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1985	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1986	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1987	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1988	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1989	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1990	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1991
1992	VBOXSTRICTRC rcStrict;
1993	PVMCPU pVCpu = VMMGetCpu(pVM);
1994	if (!pVCpu)
1995	{
1996	/*
1997	* Forward the request to an EMT thread.
1998	*/
1999	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2000	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2001	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2002	else
2003	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2004	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2005	}
2006	else if ( pVM->cCpus == 1
2007	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2008	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2009	{
2010	/*
2011	* Shortcut for the single EMT case.
2012	*
2013	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2014	* during vmR3Destroy after other emulation threads have started terminating.
2015	*/
2016	if (!pVCpu->vmm.s.fInRendezvous)
2017	{
2018	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2019	pVCpu->vmm.s.fInRendezvous = true;
2020	pVM->vmm.s.fRendezvousFlags = fFlags;
2021	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2022	pVCpu->vmm.s.fInRendezvous = false;
2023	}
2024	else
2025	{
2026	/* Recursion. Do the same checks as in the SMP case. */
2027	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2028	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2029	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2030	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2031	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2032	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2033	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2034	, VERR_DEADLOCK);
2035
2036	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2037	pVM->vmm.s.cRendezvousRecursions++;
2038	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2039	pVM->vmm.s.fRendezvousFlags = fFlags;
2040
2041	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2042
2043	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2044	pVM->vmm.s.cRendezvousRecursions--;
2045	}
2046	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2047	}
2048	else
2049	{
2050	/*
2051	* Spin lock. If busy, check for recursion, if not recursing wait for
2052	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2053	*/
2054	int rc;
2055	rcStrict = VINF_SUCCESS;
2056	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2057	{
2058	/* Allow recursion in some cases. */
2059	if ( pVCpu->vmm.s.fInRendezvous
2060	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2061	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2062	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2063	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2064	))
2065	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2066
2067	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2068	VERR_DEADLOCK);
2069
2070	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2071	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2072	{
2073	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2074	{
2075	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2076	if ( rc != VINF_SUCCESS
2077	&& ( rcStrict == VINF_SUCCESS
2078	\|\| rcStrict > rc))
2079	rcStrict = rc;
2080	/** @todo Perhaps deal with termination here? */
2081	}
2082	ASMNopPause();
2083	}
2084	}
2085
2086	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2087	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2088	Assert(!pVCpu->vmm.s.fInRendezvous);
2089	pVCpu->vmm.s.fInRendezvous = true;
2090
2091	/*
2092	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2093	*/
2094	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2095	{
2096	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2097	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2098	}
2099	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2100	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2101	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2102	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2103	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2104	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2105	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2106	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2107	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2108	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2109	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2110
2111	/*
2112	* Set the FF and poke the other EMTs.
2113	*/
2114	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2115	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2116
2117	/*
2118	* Do the same ourselves.
2119	*/
2120	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2121
2122	/*
2123	* The caller waits for the other EMTs to be done and return before doing
2124	* the cleanup. This makes away with wakeup / reset races we would otherwise
2125	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2126	*/
2127	for (;;)
2128	{
2129	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2130	AssertLogRelRC(rc);
2131	if (!pVM->vmm.s.fRendezvousRecursion)
2132	break;
2133	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2134	}
2135
2136	/*
2137	* Get the return code and clean up a little bit.
2138	*/
2139	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2140	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2141
2142	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2143	pVCpu->vmm.s.fInRendezvous = false;
2144
2145	/*
2146	* Merge rcStrict, rcStrict2 and rcStrict3.
2147	*/
2148	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2149	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2150	if ( rcStrict2 != VINF_SUCCESS
2151	&& ( rcStrict == VINF_SUCCESS
2152	\|\| rcStrict > rcStrict2))
2153	rcStrict = rcStrict2;
2154	if ( rcStrict3 != VINF_SUCCESS
2155	&& ( rcStrict == VINF_SUCCESS
2156	\|\| rcStrict > rcStrict3))
2157	rcStrict = rcStrict3;
2158	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2159	}
2160
2161	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2162	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2163	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2164	VERR_IPE_UNEXPECTED_INFO_STATUS);
2165	return VBOXSTRICTRC_VAL(rcStrict);
2166	}
2167
2168
2169	/**
2170	* Interface for vmR3SetHaltMethodU.
2171	*
2172	* @param pVCpu The cross context virtual CPU structure of the
2173	* calling EMT.
2174	* @param fMayHaltInRing0 The new state.
2175	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2176	* @thread EMT(pVCpu)
2177	*
2178	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2179	* component.
2180	*/
2181	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2182	{
2183	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2184	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2185	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2186	}
2187
2188
2189	/**
2190	* Read from the ring 0 jump buffer stack.
2191	*
2192	* @returns VBox status code.
2193	*
2194	* @param pVM The cross context VM structure.
2195	* @param idCpu The ID of the source CPU context (for the address).
2196	* @param R0Addr Where to start reading.
2197	* @param pvBuf Where to store the data we've read.
2198	* @param cbRead The number of bytes to read.
2199	*/
2200	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2201	{
2202	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2203	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2204	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2205
2206	/*
2207	* Hopefully we've got all the requested bits. If not supply what we
2208	* can and zero the remaining stuff.
2209	*/
2210	RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2211	if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2212	{
2213	size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2214	if (cbRead <= cbValid)
2215	{
2216	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2217	return VINF_SUCCESS;
2218	}
2219
2220	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2221	RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2222	}
2223	else
2224	RT_BZERO(pvBuf, cbRead);
2225
2226	/*
2227	* Supply the setjmp return RIP/EIP if requested.
2228	*/
2229	if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2230	&& pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2231	{
2232	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2233	size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2234	size_t offDst = 0;
2235	if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2236	offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2237	else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2238	{
2239	size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2240	Assert(offSrc < cbSrc);
2241	pbSrc -= offSrc;
2242	cbSrc -= offSrc;
2243	}
2244	if (cbSrc > cbRead - offDst)
2245	cbSrc = cbRead - offDst;
2246	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2247
2248	//if (cbSrc == cbRead)
2249	// rc = VINF_SUCCESS;
2250	}
2251
2252	return VINF_SUCCESS;
2253	}
2254
2255
2256	/**
2257	* Used by the DBGF stack unwinder to initialize the register state.
2258	*
2259	* @param pUVM The user mode VM handle.
2260	* @param idCpu The ID of the CPU being unwound.
2261	* @param pState The unwind state to initialize.
2262	*/
2263	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2264	{
2265	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2266	AssertReturnVoid(pVCpu);
2267
2268	/*
2269	* This is all we really need here if we had proper unwind info (win64 only)...
2270	*/
2271	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2272	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2273	pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2274
2275	/*
2276	* Locate the resume point on the stack.
2277	*/
2278	uintptr_t off = 0;
2279
2280	#ifdef RT_ARCH_AMD64
2281	/*
2282	* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly.
2283	*/
2284	# ifdef RT_OS_WINDOWS
2285	off += 0xa0; /* XMM6 thru XMM15 */
2286	# endif
2287	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2288	off += 8;
2289	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2290	off += 8;
2291	# ifdef RT_OS_WINDOWS
2292	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2293	off += 8;
2294	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2295	off += 8;
2296	# endif
2297	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2298	off += 8;
2299	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2300	off += 8;
2301	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2302	off += 8;
2303	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2304	off += 8;
2305	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2306	off += 8;
2307	pState->uPc = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2308	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2309
2310	#elif defined(RT_ARCH_X86)
2311	/*
2312	* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly.
2313	*/
2314	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2315	off += 4;
2316	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2317	off += 4;
2318	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2319	off += 4;
2320	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2321	off += 4;
2322	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2323	off += 4;
2324	pState->uPc = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2325	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2326	#else
2327	# error "Port me"
2328	#endif
2329	}
2330
2331
2332	/**
2333	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2334	*
2335	* @returns VBox status code.
2336	* @param pVM The cross context VM structure.
2337	* @param uOperation Operation to execute.
2338	* @param u64Arg Constant argument.
2339	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2340	* details.
2341	*/
2342	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2343	{
2344	PVMCPU pVCpu = VMMGetCpu(pVM);
2345	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2346	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2347	}
2348
2349
2350	/**
2351	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2352	*
2353	* @returns VBox status code.
2354	* @param pVM The cross context VM structure.
2355	* @param pVCpu The cross context VM structure.
2356	* @param enmOperation Operation to execute.
2357	* @param u64Arg Constant argument.
2358	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2359	* details.
2360	*/
2361	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2362	{
2363	/*
2364	* Call ring-0.
2365	*/
2366	#ifdef NO_SUPCALLR0VMM
2367	int rc = VERR_GENERAL_FAILURE;
2368	#else
2369	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2370	#endif
2371
2372	/*
2373	* Flush the logs and deal with ring-0 assertions.
2374	*/
2375	#ifdef LOG_ENABLED
2376	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2377	#endif
2378	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2379	if (rc != VERR_VMM_RING0_ASSERTION)
2380	{
2381	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2382	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2383	VERR_IPE_UNEXPECTED_INFO_STATUS);
2384	return rc;
2385	}
2386	return vmmR3HandleRing0Assert(pVM, pVCpu);
2387	}
2388
2389
2390	/**
2391	* Logs a ring-0 assertion ASAP after returning to ring-3.
2392	*
2393	* @returns VBox status code.
2394	* @param pVM The cross context VM structure.
2395	* @param pVCpu The cross context virtual CPU structure.
2396	*/
2397	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2398	{
2399	RT_NOREF(pVCpu);
2400	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2401	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2402	return VERR_VMM_RING0_ASSERTION;
2403	}
2404
2405
2406	/**
2407	* Displays the Force action Flags.
2408	*
2409	* @param pVM The cross context VM structure.
2410	* @param pHlp The output helpers.
2411	* @param pszArgs The additional arguments (ignored).
2412	*/
2413	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2414	{
2415	int c;
2416	uint32_t f;
2417	NOREF(pszArgs);
2418
2419	#define PRINT_FLAG(prf,flag) do { \
2420	if (f & (prf##flag)) \
2421	{ \
2422	static const char *s_psz = #flag; \
2423	if (!(c % 6)) \
2424	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2425	else \
2426	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2427	c++; \
2428	f &= ~(prf##flag); \
2429	} \
2430	} while (0)
2431
2432	#define PRINT_GROUP(prf,grp,sfx) do { \
2433	if (f & (prf##grp##sfx)) \
2434	{ \
2435	static const char *s_psz = #grp; \
2436	if (!(c % 5)) \
2437	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2438	else \
2439	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2440	c++; \
2441	} \
2442	} while (0)
2443
2444	/*
2445	* The global flags.
2446	*/
2447	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2448	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2449
2450	/* show the flag mnemonics */
2451	c = 0;
2452	f = fGlobalForcedActions;
2453	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2454	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2455	PRINT_FLAG(VM_FF_,PDM_DMA);
2456	PRINT_FLAG(VM_FF_,DBGF);
2457	PRINT_FLAG(VM_FF_,REQUEST);
2458	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2459	PRINT_FLAG(VM_FF_,RESET);
2460	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2461	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2462	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2463	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2464	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2465	if (f)
2466	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2467	else
2468	pHlp->pfnPrintf(pHlp, "\n");
2469
2470	/* the groups */
2471	c = 0;
2472	f = fGlobalForcedActions;
2473	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2474	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2475	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2476	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2477	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2478	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2479	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2480	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2481	if (c)
2482	pHlp->pfnPrintf(pHlp, "\n");
2483
2484	/*
2485	* Per CPU flags.
2486	*/
2487	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2488	{
2489	PVMCPU pVCpu = pVM->apCpusR3[i];
2490	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2491	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2492
2493	/* show the flag mnemonics */
2494	c = 0;
2495	f = fLocalForcedActions;
2496	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2497	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2498	PRINT_FLAG(VMCPU_FF_,TIMER);
2499	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2500	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2501	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2502	PRINT_FLAG(VMCPU_FF_,UNHALT);
2503	PRINT_FLAG(VMCPU_FF_,IEM);
2504	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2505	PRINT_FLAG(VMCPU_FF_,DBGF);
2506	PRINT_FLAG(VMCPU_FF_,REQUEST);
2507	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2508	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2509	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2510	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2511	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2512	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2513	PRINT_FLAG(VMCPU_FF_,TO_R3);
2514	PRINT_FLAG(VMCPU_FF_,IOM);
2515	if (f)
2516	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2517	else
2518	pHlp->pfnPrintf(pHlp, "\n");
2519
2520	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2521	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2522
2523	/* the groups */
2524	c = 0;
2525	f = fLocalForcedActions;
2526	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2527	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2528	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2529	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2530	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2531	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2532	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2533	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2534	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2535	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2536	if (c)
2537	pHlp->pfnPrintf(pHlp, "\n");
2538	}
2539
2540	#undef PRINT_FLAG
2541	#undef PRINT_GROUP
2542	}
2543

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 92424

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