VMM.cpp@ 92676

Last change on this file since 92676 was 92493, checked in by vboxsync, 3 years ago
VMM: Nested VMX: bugref:10092 Purge VINF_PGM_CHANGE_MODE, no longer used.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 104.3 KB

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1	/* $Id: VMM.cpp 92493 2021-11-18 14:01:56Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
154	do { \
155	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
156	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
157	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
158	{ /* likely? */ } \
159	else \
160	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
161	} while (0)
162
163
164	/*********************************************************************************************************************************
165	* Internal Functions *
166	*********************************************************************************************************************************/
167	static void vmmR3InitRegisterStats(PVM pVM);
168	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
169	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
170	#if 0 /* pointless when timers doesn't run on EMT */
171	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
172	#endif
173	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
174	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
175	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
176	static FNRTTHREAD vmmR3LogFlusher;
177	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
178	PRTLOGGER pDstLogger);
179	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
180
181
182
183	/**
184	* Initializes the VMM.
185	*
186	* @returns VBox status code.
187	* @param pVM The cross context VM structure.
188	*/
189	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
190	{
191	LogFlow(("VMMR3Init\n"));
192
193	/*
194	* Assert alignment, sizes and order.
195	*/
196	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
197	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
198
199	/*
200	* Init basic VM VMM members.
201	*/
202	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
203	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
204	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
205	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
207	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
208	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
210	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
212
213	#if 0 /* pointless when timers doesn't run on EMT */
214	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
215	* The EMT yield interval. The EMT yielding is a hack we employ to play a
216	* bit nicer with the rest of the system (like for instance the GUI).
217	*/
218	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
219	23 /* Value arrived at after experimenting with the grub boot prompt. */);
220	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
221	#endif
222
223	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
224	* Controls whether we employ per-cpu preemption timers to limit the time
225	* spent executing guest code. This option is not available on all
226	* platforms and we will silently ignore this setting then. If we are
227	* running in VT-x mode, we will use the VMX-preemption timer instead of
228	* this one when possible.
229	*/
230	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
231	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
232	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
233
234	/*
235	* Initialize the VMM rendezvous semaphores.
236	*/
237	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
238	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
239	return VERR_NO_MEMORY;
240	for (VMCPUID i = 0; i < pVM->cCpus; i++)
241	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
242	for (VMCPUID i = 0; i < pVM->cCpus; i++)
243	{
244	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
245	AssertRCReturn(rc, rc);
246	}
247	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
262	AssertRCReturn(rc, rc);
263
264	/*
265	* Register the saved state data unit.
266	*/
267	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
268	NULL, NULL, NULL,
269	NULL, vmmR3Save, NULL,
270	NULL, vmmR3Load, NULL);
271	if (RT_FAILURE(rc))
272	return rc;
273
274	/*
275	* Register the Ring-0 VM handle with the session for fast ioctl calls.
276	*/
277	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
278	if (RT_FAILURE(rc))
279	return rc;
280
281	#ifdef VBOX_WITH_NMI
282	/*
283	* Allocate mapping for the host APIC.
284	*/
285	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
286	AssertRC(rc);
287	#endif
288	if (RT_SUCCESS(rc))
289	{
290	/*
291	* Start the log flusher thread.
292	*/
293	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
294	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
295	if (RT_SUCCESS(rc))
296	{
297
298	/*
299	* Debug info and statistics.
300	*/
301	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
302	vmmR3InitRegisterStats(pVM);
303	vmmInitFormatTypes();
304
305	return VINF_SUCCESS;
306	}
307	}
308	/** @todo Need failure cleanup? */
309
310	return rc;
311	}
312
313
314	/**
315	* VMMR3Init worker that register the statistics with STAM.
316	*
317	* @param pVM The cross context VM structure.
318	*/
319	static void vmmR3InitRegisterStats(PVM pVM)
320	{
321	RT_NOREF_PV(pVM);
322
323	/*
324	* Statistics.
325	*/
326	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
327	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
328	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
329	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
330	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
331	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
332	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
333	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
334	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
335	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
336	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
337	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
338	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
339	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
340	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
341	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
342	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
343	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
344	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
345	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
346	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
347	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
348	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
349	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
350	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
351	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
352	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
353	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
354	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
378
379	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
380	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
381
382	for (VMCPUID i = 0; i < pVM->cCpus; i++)
383	{
384	PVMCPU pVCpu = pVM->apCpusR3[i];
385	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
386	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
387	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
388	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
389	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
390	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
391	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
392	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
393	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
394	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
395	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
396	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
397	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
398	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
399	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
400	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
401	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
402
403	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
404
405	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
406	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
407	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
408	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
409	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
410	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
411	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
412	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
413	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
414
415	pShared = &pVCpu->vmm.s.u.s.RelLogger;
416	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
417	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
418	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
419	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
420	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
421	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
422	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
423	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
424	}
425	}
426
427
428	/**
429	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
430	*
431	* @returns VBox status code.
432	* @param pVM The cross context VM structure.
433	* @param pVCpu The cross context per CPU structure.
434	* @thread EMT(pVCpu)
435	*/
436	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
437	{
438	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
439	}
440
441
442	/**
443	* Initializes the R0 VMM.
444	*
445	* @returns VBox status code.
446	* @param pVM The cross context VM structure.
447	*/
448	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
449	{
450	int rc;
451	PVMCPU pVCpu = VMMGetCpu(pVM);
452	Assert(pVCpu && pVCpu->idCpu == 0);
453
454	/*
455	* Make sure the ring-0 loggers are up to date.
456	*/
457	rc = VMMR3UpdateLoggers(pVM);
458	if (RT_FAILURE(rc))
459	return rc;
460
461	/*
462	* Call Ring-0 entry with init code.
463	*/
464	#ifdef NO_SUPCALLR0VMM
465	//rc = VERR_GENERAL_FAILURE;
466	rc = VINF_SUCCESS;
467	#else
468	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
469	#endif
470
471	/*
472	* Flush the logs & deal with assertions.
473	*/
474	#ifdef LOG_ENABLED
475	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
476	#endif
477	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
478	if (rc == VERR_VMM_RING0_ASSERTION)
479	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
480	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
481	{
482	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
483	if (RT_SUCCESS(rc))
484	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
485	}
486
487	/*
488	* Log stuff we learned in ring-0.
489	*/
490	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
491	if (pVM->vmm.s.fIsUsingContextHooks)
492	LogRel(("VMM: Enabled thread-context hooks\n"));
493	else
494	LogRel(("VMM: Thread-context hooks unavailable\n"));
495
496	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
497	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
498	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
499	else
500	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
501	if (pVM->vmm.s.fIsPreemptPossible)
502	LogRel(("VMM: Kernel preemption is possible\n"));
503	else
504	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
505
506	/*
507	* Send all EMTs to ring-0 to get their logger initialized.
508	*/
509	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
510	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
511
512	return rc;
513	}
514
515
516	/**
517	* Called when an init phase completes.
518	*
519	* @returns VBox status code.
520	* @param pVM The cross context VM structure.
521	* @param enmWhat Which init phase.
522	*/
523	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
524	{
525	int rc = VINF_SUCCESS;
526
527	switch (enmWhat)
528	{
529	case VMINITCOMPLETED_RING3:
530	{
531	#if 0 /* pointless when timers doesn't run on EMT */
532	/*
533	* Create the EMT yield timer.
534	*/
535	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
536	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
537	AssertRCReturn(rc, rc);
538
539	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
540	AssertRCReturn(rc, rc);
541	#endif
542	break;
543	}
544
545	case VMINITCOMPLETED_HM:
546	{
547	/*
548	* Disable the periodic preemption timers if we can use the
549	* VMX-preemption timer instead.
550	*/
551	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
552	&& HMR3IsVmxPreemptionTimerUsed(pVM))
553	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
554	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
555
556	/*
557	* Last chance for GIM to update its CPUID leaves if it requires
558	* knowledge/information from HM initialization.
559	*/
560	rc = GIMR3InitCompleted(pVM);
561	AssertRCReturn(rc, rc);
562
563	/*
564	* CPUM's post-initialization (print CPUIDs).
565	*/
566	CPUMR3LogCpuIdAndMsrFeatures(pVM);
567	break;
568	}
569
570	default: /* shuts up gcc */
571	break;
572	}
573
574	return rc;
575	}
576
577
578	/**
579	* Terminate the VMM bits.
580	*
581	* @returns VBox status code.
582	* @param pVM The cross context VM structure.
583	*/
584	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
585	{
586	PVMCPU pVCpu = VMMGetCpu(pVM);
587	Assert(pVCpu && pVCpu->idCpu == 0);
588
589	/*
590	* Call Ring-0 entry with termination code.
591	*/
592	#ifdef NO_SUPCALLR0VMM
593	//rc = VERR_GENERAL_FAILURE;
594	int rc = VINF_SUCCESS;
595	#else
596	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
597	#endif
598
599	/*
600	* Flush the logs & deal with assertions.
601	*/
602	#ifdef LOG_ENABLED
603	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
604	#endif
605	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
606	if (rc == VERR_VMM_RING0_ASSERTION)
607	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
608	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
609	{
610	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
611	if (RT_SUCCESS(rc))
612	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
613	}
614
615	/*
616	* Do clean ups.
617	*/
618	for (VMCPUID i = 0; i < pVM->cCpus; i++)
619	{
620	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
621	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
622	}
623	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
624	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
625	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
626	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
627	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
628	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
629	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
630	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
631	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
632	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
633	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
634	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
635	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
636	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
637	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
638	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
639
640	vmmTermFormatTypes();
641
642	/*
643	* Wait for the log flusher thread to complete.
644	*/
645	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
646	{
647	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
648	AssertLogRelRC(rc2);
649	if (RT_SUCCESS(rc2))
650	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
651	}
652
653	return rc;
654	}
655
656
657	/**
658	* Applies relocations to data and code managed by this
659	* component. This function will be called at init and
660	* whenever the VMM need to relocate it self inside the GC.
661	*
662	* The VMM will need to apply relocations to the core code.
663	*
664	* @param pVM The cross context VM structure.
665	* @param offDelta The relocation delta.
666	*/
667	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
668	{
669	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
670	RT_NOREF(offDelta);
671
672	/*
673	* Update the logger.
674	*/
675	VMMR3UpdateLoggers(pVM);
676	}
677
678
679	/**
680	* Worker for VMMR3UpdateLoggers.
681	*/
682	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
683	{
684	/*
685	* Get the group count.
686	*/
687	uint32_t uGroupsCrc32 = 0;
688	uint32_t cGroups = 0;
689	uint64_t fFlags = 0;
690	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
691	Assert(rc == VERR_BUFFER_OVERFLOW);
692
693	/*
694	* Allocate the request of the right size.
695	*/
696	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
697	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
698	if (pReq)
699	{
700	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
701	pReq->Hdr.cbReq = cbReq;
702	pReq->cGroups = cGroups;
703	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
704	AssertRC(rc);
705	if (RT_SUCCESS(rc))
706	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fReleaseLogger, &pReq->Hdr);
707
708	RTMemFree(pReq);
709	}
710	else
711	rc = VERR_NO_MEMORY;
712	return rc;
713	}
714
715
716	/**
717	* Updates the settings for the RC and R0 loggers.
718	*
719	* @returns VBox status code.
720	* @param pVM The cross context VM structure.
721	* @thread EMT
722	*/
723	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
724	{
725	VM_ASSERT_EMT(pVM);
726	PVMCPU pVCpu = VMMGetCpu(pVM);
727	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
728
729	/*
730	* Each EMT has each own logger instance.
731	*/
732	/* Debug logging.*/
733	int rcDebug = VINF_SUCCESS;
734	#ifdef LOG_ENABLED
735	PRTLOGGER const pDefault = RTLogDefaultInstance();
736	if (pDefault)
737	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
738	#else
739	RT_NOREF(pVM);
740	#endif
741
742	/* Release logging. */
743	int rcRelease = VINF_SUCCESS;
744	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
745	if (pRelease)
746	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
747
748	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
749	}
750
751
752	/**
753	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
754	*/
755	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
756	{
757	PVM const pVM = (PVM)pvUser;
758	RT_NOREF(hThreadSelf);
759
760	/* Reset the flusher state before we start: */
761	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
762
763	/*
764	* The work loop.
765	*/
766	for (;;)
767	{
768	/*
769	* Wait for work.
770	*/
771	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
772	if (RT_SUCCESS(rc))
773	{
774	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
775	VMMLOGFLUSHERENTRY Item;
776	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
777	if ( Item.s.idCpu < pVM->cCpus
778	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
779	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
780	{
781	/*
782	* Verify the request.
783	*/
784	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
785	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
786	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
787	if (cbToFlush > 0)
788	{
789	if (cbToFlush <= pShared->cbBuf)
790	{
791	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
792	if (pchBufR3)
793	{
794	/*
795	* Do the flushing.
796	*/
797	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
798	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
799	if (pLogger)
800	{
801	char szBefore[128];
802	RTStrPrintf(szBefore, sizeof(szBefore),
803	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
804	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
805	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
806	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
807	}
808	}
809	else
810	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
811	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
812	}
813	else
814	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
815	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
816	}
817	else
818	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
819	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
820
821	/*
822	* Mark the descriptor as flushed and set the request flag for same.
823	*/
824	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
825	}
826	else
827	{
828	Assert(Item.s.idCpu == UINT16_MAX);
829	Assert(Item.s.idxLogger == UINT8_MAX);
830	Assert(Item.s.idxBuffer == UINT8_MAX);
831	}
832	}
833	/*
834	* Interrupted can happen, just ignore it.
835	*/
836	else if (rc == VERR_INTERRUPTED)
837	{ /* ignore*/ }
838	/*
839	* The ring-0 termination code will set the shutdown flag and wake us
840	* up, and we should return with object destroyed. In case there is
841	* some kind of race, we might also get sempahore destroyed.
842	*/
843	else if ( rc == VERR_OBJECT_DESTROYED
844	\|\| rc == VERR_SEM_DESTROYED
845	\|\| rc == VERR_INVALID_HANDLE)
846	{
847	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
848	return VINF_SUCCESS;
849	}
850	/*
851	* There shouldn't be any other errors...
852	*/
853	else
854	{
855	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
856	AssertRC(rc);
857	RTThreadSleep(1);
858	}
859	}
860	}
861
862
863	/**
864	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
865	*
866	* @param pVM The cross context VM structure.
867	* @param pVCpu The cross context virtual CPU structure of the calling
868	* EMT.
869	* @param pShared The shared logger data.
870	* @param idxBuf The buffer to flush.
871	* @param pDstLogger The destination IPRT logger.
872	*/
873	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
874	{
875	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
876	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
877	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
878
879	#if VMMLOGGER_BUFFER_COUNT > 1
880	/*
881	* When we have more than one log buffer, the flusher thread may still be
882	* working on the previous buffer when we get here.
883	*/
884	char szBefore[64];
885	if (pShared->cFlushing > 0)
886	{
887	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
888	uint64_t const nsStart = RTTimeNanoTS();
889
890	/* A no-op, but it takes the lock and the hope is that we end up waiting
891	on the flusher to finish up. */
892	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
893	if (pShared->cFlushing != 0)
894	{
895	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
896
897	/* If no luck, go to ring-0 and to proper waiting. */
898	if (pShared->cFlushing != 0)
899	{
900	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
901	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
902	}
903	}
904
905	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
906	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
907	pszBefore = szBefore;
908	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
909	}
910	#else
911	RT_NOREF(pVM, pVCpu);
912	#endif
913
914	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
915	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
916	}
917
918
919	/**
920	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
921	*
922	* @returns Pointer to the buffer.
923	* @param pVM The cross context VM structure.
924	*/
925	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
926	{
927	return pVM->vmm.s.szRing0AssertMsg1;
928	}
929
930
931	/**
932	* Returns the VMCPU of the specified virtual CPU.
933	*
934	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
935	*
936	* @param pUVM The user mode VM handle.
937	* @param idCpu The ID of the virtual CPU.
938	*/
939	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
940	{
941	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
942	AssertReturn(idCpu < pUVM->cCpus, NULL);
943	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
944	return pUVM->pVM->apCpusR3[idCpu];
945	}
946
947
948	/**
949	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
950	*
951	* @returns Pointer to the buffer.
952	* @param pVM The cross context VM structure.
953	*/
954	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
955	{
956	return pVM->vmm.s.szRing0AssertMsg2;
957	}
958
959
960	/**
961	* Execute state save operation.
962	*
963	* @returns VBox status code.
964	* @param pVM The cross context VM structure.
965	* @param pSSM SSM operation handle.
966	*/
967	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
968	{
969	LogFlow(("vmmR3Save:\n"));
970
971	/*
972	* Save the started/stopped state of all CPUs except 0 as it will always
973	* be running. This avoids breaking the saved state version. :-)
974	*/
975	for (VMCPUID i = 1; i < pVM->cCpus; i++)
976	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
977
978	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
979	}
980
981
982	/**
983	* Execute state load operation.
984	*
985	* @returns VBox status code.
986	* @param pVM The cross context VM structure.
987	* @param pSSM SSM operation handle.
988	* @param uVersion Data layout version.
989	* @param uPass The data pass.
990	*/
991	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
992	{
993	LogFlow(("vmmR3Load:\n"));
994	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
995
996	/*
997	* Validate version.
998	*/
999	if ( uVersion != VMM_SAVED_STATE_VERSION
1000	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1001	{
1002	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1003	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1004	}
1005
1006	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1007	{
1008	/* Ignore the stack bottom, stack pointer and stack bits. */
1009	RTRCPTR RCPtrIgnored;
1010	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1011	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1012	#ifdef RT_OS_DARWIN
1013	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1014	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1015	&& SSMR3HandleRevision(pSSM) >= 48858
1016	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1017	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1018	)
1019	SSMR3Skip(pSSM, 16384);
1020	else
1021	SSMR3Skip(pSSM, 8192);
1022	#else
1023	SSMR3Skip(pSSM, 8192);
1024	#endif
1025	}
1026
1027	/*
1028	* Restore the VMCPU states. VCPU 0 is always started.
1029	*/
1030	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1031	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1032	{
1033	bool fStarted;
1034	int rc = SSMR3GetBool(pSSM, &fStarted);
1035	if (RT_FAILURE(rc))
1036	return rc;
1037	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1038	}
1039
1040	/* terminator */
1041	uint32_t u32;
1042	int rc = SSMR3GetU32(pSSM, &u32);
1043	if (RT_FAILURE(rc))
1044	return rc;
1045	if (u32 != UINT32_MAX)
1046	{
1047	AssertMsgFailed(("u32=%#x\n", u32));
1048	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1049	}
1050	return VINF_SUCCESS;
1051	}
1052
1053
1054	/**
1055	* Suspends the CPU yielder.
1056	*
1057	* @param pVM The cross context VM structure.
1058	*/
1059	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1060	{
1061	#if 0 /* pointless when timers doesn't run on EMT */
1062	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1063	if (!pVM->vmm.s.cYieldResumeMillies)
1064	{
1065	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1066	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1067	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1068	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1069	else
1070	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1071	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1072	}
1073	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1074	#else
1075	RT_NOREF(pVM);
1076	#endif
1077	}
1078
1079
1080	/**
1081	* Stops the CPU yielder.
1082	*
1083	* @param pVM The cross context VM structure.
1084	*/
1085	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1086	{
1087	#if 0 /* pointless when timers doesn't run on EMT */
1088	if (!pVM->vmm.s.cYieldResumeMillies)
1089	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1090	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1091	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1092	#else
1093	RT_NOREF(pVM);
1094	#endif
1095	}
1096
1097
1098	/**
1099	* Resumes the CPU yielder when it has been a suspended or stopped.
1100	*
1101	* @param pVM The cross context VM structure.
1102	*/
1103	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1104	{
1105	#if 0 /* pointless when timers doesn't run on EMT */
1106	if (pVM->vmm.s.cYieldResumeMillies)
1107	{
1108	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1109	pVM->vmm.s.cYieldResumeMillies = 0;
1110	}
1111	#else
1112	RT_NOREF(pVM);
1113	#endif
1114	}
1115
1116
1117	#if 0 /* pointless when timers doesn't run on EMT */
1118	/**
1119	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1120	*
1121	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1122	*/
1123	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1124	{
1125	NOREF(pvUser);
1126
1127	/*
1128	* This really needs some careful tuning. While we shouldn't be too greedy since
1129	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1130	* because that'll cause us to stop up.
1131	*
1132	* The current logic is to use the default interval when there is no lag worth
1133	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1134	*
1135	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1136	* so the lag is up to date.)
1137	*/
1138	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1139	if ( u64Lag < 50000000 /* 50ms */
1140	\|\| ( u64Lag < 1000000000 /* 1s */
1141	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1142	)
1143	{
1144	uint64_t u64Elapsed = RTTimeNanoTS();
1145	pVM->vmm.s.u64LastYield = u64Elapsed;
1146
1147	RTThreadYield();
1148
1149	#ifdef LOG_ENABLED
1150	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1151	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1152	#endif
1153	}
1154	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1155	}
1156	#endif
1157
1158
1159	/**
1160	* Executes guest code (Intel VT-x and AMD-V).
1161	*
1162	* @param pVM The cross context VM structure.
1163	* @param pVCpu The cross context virtual CPU structure.
1164	*/
1165	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1166	{
1167	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1168
1169	int rc;
1170	do
1171	{
1172	#ifdef NO_SUPCALLR0VMM
1173	rc = VERR_GENERAL_FAILURE;
1174	#else
1175	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1176	if (RT_LIKELY(rc == VINF_SUCCESS))
1177	rc = pVCpu->vmm.s.iLastGZRc;
1178	#endif
1179	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1180
1181	#if 0 /** @todo triggers too often */
1182	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1183	#endif
1184
1185	/*
1186	* Flush the logs
1187	*/
1188	#ifdef LOG_ENABLED
1189	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1190	#endif
1191	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1192	if (rc != VERR_VMM_RING0_ASSERTION)
1193	{
1194	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1195	return rc;
1196	}
1197	return vmmR3HandleRing0Assert(pVM, pVCpu);
1198	}
1199
1200
1201	/**
1202	* Perform one of the fast I/O control VMMR0 operation.
1203	*
1204	* @returns VBox strict status code.
1205	* @param pVM The cross context VM structure.
1206	* @param pVCpu The cross context virtual CPU structure.
1207	* @param enmOperation The operation to perform.
1208	*/
1209	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1210	{
1211	VBOXSTRICTRC rcStrict;
1212	do
1213	{
1214	#ifdef NO_SUPCALLR0VMM
1215	rcStrict = VERR_GENERAL_FAILURE;
1216	#else
1217	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1218	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1219	rcStrict = pVCpu->vmm.s.iLastGZRc;
1220	#endif
1221	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1222
1223	/*
1224	* Flush the logs
1225	*/
1226	#ifdef LOG_ENABLED
1227	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1228	#endif
1229	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1230	if (rcStrict != VERR_VMM_RING0_ASSERTION)
1231	return rcStrict;
1232	return vmmR3HandleRing0Assert(pVM, pVCpu);
1233	}
1234
1235
1236	/**
1237	* VCPU worker for VMMR3SendStartupIpi.
1238	*
1239	* @param pVM The cross context VM structure.
1240	* @param idCpu Virtual CPU to perform SIPI on.
1241	* @param uVector The SIPI vector.
1242	*/
1243	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1244	{
1245	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1246	VMCPU_ASSERT_EMT(pVCpu);
1247
1248	/*
1249	* In the INIT state, the target CPU is only responsive to an SIPI.
1250	* This is also true for when when the CPU is in VMX non-root mode.
1251	*
1252	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1253	* See Intel spec. 26.6.2 "Activity State".
1254	*/
1255	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1256	return VINF_SUCCESS;
1257
1258	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1259	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1260	if (CPUMIsGuestInVmxRootMode(pCtx))
1261	{
1262	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1263	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1264	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1265
1266	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1267	return VINF_SUCCESS;
1268	}
1269	#endif
1270
1271	pCtx->cs.Sel = uVector << 8;
1272	pCtx->cs.ValidSel = uVector << 8;
1273	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1274	pCtx->cs.u64Base = uVector << 12;
1275	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1276	pCtx->rip = 0;
1277
1278	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1279
1280	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1281	EMSetState(pVCpu, EMSTATE_HALTED);
1282	return VINF_EM_RESCHEDULE;
1283	# else /* And if we go the VMCPU::enmState way it can stay here. */
1284	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1285	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1286	return VINF_SUCCESS;
1287	# endif
1288	}
1289
1290
1291	/**
1292	* VCPU worker for VMMR3SendInitIpi.
1293	*
1294	* @returns VBox status code.
1295	* @param pVM The cross context VM structure.
1296	* @param idCpu Virtual CPU to perform SIPI on.
1297	*/
1298	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1299	{
1300	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1301	VMCPU_ASSERT_EMT(pVCpu);
1302
1303	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1304
1305	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1306	* wait-for-SIPI state. Verify. */
1307
1308	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1309	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1310	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1311	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1312	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1313	#endif
1314
1315	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1316	* IPI (e.g. SVM_EXIT_INIT). */
1317
1318	PGMR3ResetCpu(pVM, pVCpu);
1319	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1320	APICR3InitIpi(pVCpu);
1321	TRPMR3ResetCpu(pVCpu);
1322	CPUMR3ResetCpu(pVM, pVCpu);
1323	EMR3ResetCpu(pVCpu);
1324	HMR3ResetCpu(pVCpu);
1325	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1326
1327	/* This will trickle up on the target EMT. */
1328	return VINF_EM_WAIT_SIPI;
1329	}
1330
1331
1332	/**
1333	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1334	* vector-dependent state and unhalting processor.
1335	*
1336	* @param pVM The cross context VM structure.
1337	* @param idCpu Virtual CPU to perform SIPI on.
1338	* @param uVector SIPI vector.
1339	*/
1340	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1341	{
1342	AssertReturnVoid(idCpu < pVM->cCpus);
1343
1344	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1345	AssertRC(rc);
1346	}
1347
1348
1349	/**
1350	* Sends init IPI to the virtual CPU.
1351	*
1352	* @param pVM The cross context VM structure.
1353	* @param idCpu Virtual CPU to perform int IPI on.
1354	*/
1355	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1356	{
1357	AssertReturnVoid(idCpu < pVM->cCpus);
1358
1359	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1360	AssertRC(rc);
1361	}
1362
1363
1364	/**
1365	* Registers the guest memory range that can be used for patching.
1366	*
1367	* @returns VBox status code.
1368	* @param pVM The cross context VM structure.
1369	* @param pPatchMem Patch memory range.
1370	* @param cbPatchMem Size of the memory range.
1371	*/
1372	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1373	{
1374	VM_ASSERT_EMT(pVM);
1375	if (HMIsEnabled(pVM))
1376	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1377
1378	return VERR_NOT_SUPPORTED;
1379	}
1380
1381
1382	/**
1383	* Deregisters the guest memory range that can be used for patching.
1384	*
1385	* @returns VBox status code.
1386	* @param pVM The cross context VM structure.
1387	* @param pPatchMem Patch memory range.
1388	* @param cbPatchMem Size of the memory range.
1389	*/
1390	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1391	{
1392	if (HMIsEnabled(pVM))
1393	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1394
1395	return VINF_SUCCESS;
1396	}
1397
1398
1399	/**
1400	* Common recursion handler for the other EMTs.
1401	*
1402	* @returns Strict VBox status code.
1403	* @param pVM The cross context VM structure.
1404	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1405	* @param rcStrict Current status code to be combined with the one
1406	* from this recursion and returned.
1407	*/
1408	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1409	{
1410	int rc2;
1411
1412	/*
1413	* We wait here while the initiator of this recursion reconfigures
1414	* everything. The last EMT to get in signals the initiator.
1415	*/
1416	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1417	{
1418	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1419	AssertLogRelRC(rc2);
1420	}
1421
1422	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1423	AssertLogRelRC(rc2);
1424
1425	/*
1426	* Do the normal rendezvous processing.
1427	*/
1428	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1429	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1430
1431	/*
1432	* Wait for the initiator to restore everything.
1433	*/
1434	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1435	AssertLogRelRC(rc2);
1436
1437	/*
1438	* Last thread out of here signals the initiator.
1439	*/
1440	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1441	{
1442	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1443	AssertLogRelRC(rc2);
1444	}
1445
1446	/*
1447	* Merge status codes and return.
1448	*/
1449	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1450	if ( rcStrict2 != VINF_SUCCESS
1451	&& ( rcStrict == VINF_SUCCESS
1452	\|\| rcStrict > rcStrict2))
1453	rcStrict = rcStrict2;
1454	return rcStrict;
1455	}
1456
1457
1458	/**
1459	* Count returns and have the last non-caller EMT wake up the caller.
1460	*
1461	* @returns VBox strict informational status code for EM scheduling. No failures
1462	* will be returned here, those are for the caller only.
1463	*
1464	* @param pVM The cross context VM structure.
1465	* @param rcStrict The current accumulated recursive status code,
1466	* to be merged with i32RendezvousStatus and
1467	* returned.
1468	*/
1469	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1470	{
1471	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1472
1473	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1474	if (cReturned == pVM->cCpus - 1U)
1475	{
1476	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1477	AssertLogRelRC(rc);
1478	}
1479
1480	/*
1481	* Merge the status codes, ignoring error statuses in this code path.
1482	*/
1483	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1484	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1485	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1486	VERR_IPE_UNEXPECTED_INFO_STATUS);
1487
1488	if (RT_SUCCESS(rcStrict2))
1489	{
1490	if ( rcStrict2 != VINF_SUCCESS
1491	&& ( rcStrict == VINF_SUCCESS
1492	\|\| rcStrict > rcStrict2))
1493	rcStrict = rcStrict2;
1494	}
1495	return rcStrict;
1496	}
1497
1498
1499	/**
1500	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1501	*
1502	* @returns VBox strict informational status code for EM scheduling. No failures
1503	* will be returned here, those are for the caller only. When
1504	* fIsCaller is set, VINF_SUCCESS is always returned.
1505	*
1506	* @param pVM The cross context VM structure.
1507	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1508	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1509	* not.
1510	* @param fFlags The flags.
1511	* @param pfnRendezvous The callback.
1512	* @param pvUser The user argument for the callback.
1513	*/
1514	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1515	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1516	{
1517	int rc;
1518	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1519
1520	/*
1521	* Enter, the last EMT triggers the next callback phase.
1522	*/
1523	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1524	if (cEntered != pVM->cCpus)
1525	{
1526	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1527	{
1528	/* Wait for our turn. */
1529	for (;;)
1530	{
1531	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1532	AssertLogRelRC(rc);
1533	if (!pVM->vmm.s.fRendezvousRecursion)
1534	break;
1535	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1536	}
1537	}
1538	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1539	{
1540	/* Wait for the last EMT to arrive and wake everyone up. */
1541	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1542	AssertLogRelRC(rc);
1543	Assert(!pVM->vmm.s.fRendezvousRecursion);
1544	}
1545	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1546	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1547	{
1548	/* Wait for our turn. */
1549	for (;;)
1550	{
1551	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1552	AssertLogRelRC(rc);
1553	if (!pVM->vmm.s.fRendezvousRecursion)
1554	break;
1555	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1556	}
1557	}
1558	else
1559	{
1560	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1561
1562	/*
1563	* The execute once is handled specially to optimize the code flow.
1564	*
1565	* The last EMT to arrive will perform the callback and the other
1566	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1567	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1568	* returns, that EMT will initiate the normal return sequence.
1569	*/
1570	if (!fIsCaller)
1571	{
1572	for (;;)
1573	{
1574	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1575	AssertLogRelRC(rc);
1576	if (!pVM->vmm.s.fRendezvousRecursion)
1577	break;
1578	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1579	}
1580
1581	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1582	}
1583	return VINF_SUCCESS;
1584	}
1585	}
1586	else
1587	{
1588	/*
1589	* All EMTs are waiting, clear the FF and take action according to the
1590	* execution method.
1591	*/
1592	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1593
1594	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1595	{
1596	/* Wake up everyone. */
1597	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1598	AssertLogRelRC(rc);
1599	}
1600	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1601	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1602	{
1603	/* Figure out who to wake up and wake it up. If it's ourself, then
1604	it's easy otherwise wait for our turn. */
1605	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1606	? 0
1607	: pVM->cCpus - 1U;
1608	if (pVCpu->idCpu != iFirst)
1609	{
1610	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1611	AssertLogRelRC(rc);
1612	for (;;)
1613	{
1614	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1615	AssertLogRelRC(rc);
1616	if (!pVM->vmm.s.fRendezvousRecursion)
1617	break;
1618	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1619	}
1620	}
1621	}
1622	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1623	}
1624
1625
1626	/*
1627	* Do the callback and update the status if necessary.
1628	*/
1629	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1630	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1631	{
1632	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1633	if (rcStrict2 != VINF_SUCCESS)
1634	{
1635	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1636	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1637	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1638	int32_t i32RendezvousStatus;
1639	do
1640	{
1641	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1642	if ( rcStrict2 == i32RendezvousStatus
1643	\|\| RT_FAILURE(i32RendezvousStatus)
1644	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1645	&& rcStrict2 > i32RendezvousStatus))
1646	break;
1647	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1648	}
1649	}
1650
1651	/*
1652	* Increment the done counter and take action depending on whether we're
1653	* the last to finish callback execution.
1654	*/
1655	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1656	if ( cDone != pVM->cCpus
1657	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1658	{
1659	/* Signal the next EMT? */
1660	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1661	{
1662	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1663	AssertLogRelRC(rc);
1664	}
1665	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1666	{
1667	Assert(cDone == pVCpu->idCpu + 1U);
1668	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1669	AssertLogRelRC(rc);
1670	}
1671	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1672	{
1673	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1674	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1675	AssertLogRelRC(rc);
1676	}
1677
1678	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1679	if (!fIsCaller)
1680	{
1681	for (;;)
1682	{
1683	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1684	AssertLogRelRC(rc);
1685	if (!pVM->vmm.s.fRendezvousRecursion)
1686	break;
1687	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1688	}
1689	}
1690	}
1691	else
1692	{
1693	/* Callback execution is all done, tell the rest to return. */
1694	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1695	AssertLogRelRC(rc);
1696	}
1697
1698	if (!fIsCaller)
1699	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1700	return rcStrictRecursion;
1701	}
1702
1703
1704	/**
1705	* Called in response to VM_FF_EMT_RENDEZVOUS.
1706	*
1707	* @returns VBox strict status code - EM scheduling. No errors will be returned
1708	* here, nor will any non-EM scheduling status codes be returned.
1709	*
1710	* @param pVM The cross context VM structure.
1711	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1712	*
1713	* @thread EMT
1714	*/
1715	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1716	{
1717	Assert(!pVCpu->vmm.s.fInRendezvous);
1718	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1719	pVCpu->vmm.s.fInRendezvous = true;
1720	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1721	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1722	pVCpu->vmm.s.fInRendezvous = false;
1723	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1724	return VBOXSTRICTRC_TODO(rcStrict);
1725	}
1726
1727
1728	/**
1729	* Helper for resetting an single wakeup event sempahore.
1730	*
1731	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1732	* @param hEvt The event semaphore to reset.
1733	*/
1734	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1735	{
1736	for (uint32_t cLoops = 0; ; cLoops++)
1737	{
1738	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1739	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1740	return rc;
1741	}
1742	}
1743
1744
1745	/**
1746	* Worker for VMMR3EmtRendezvous that handles recursion.
1747	*
1748	* @returns VBox strict status code. This will be the first error,
1749	* VINF_SUCCESS, or an EM scheduling status code.
1750	*
1751	* @param pVM The cross context VM structure.
1752	* @param pVCpu The cross context virtual CPU structure of the
1753	* calling EMT.
1754	* @param fFlags Flags indicating execution methods. See
1755	* grp_VMMR3EmtRendezvous_fFlags.
1756	* @param pfnRendezvous The callback.
1757	* @param pvUser User argument for the callback.
1758	*
1759	* @thread EMT(pVCpu)
1760	*/
1761	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1762	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1763	{
1764	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1765	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1766	Assert(pVCpu->vmm.s.fInRendezvous);
1767
1768	/*
1769	* Save the current state.
1770	*/
1771	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1772	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1773	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1774	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1775	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1776
1777	/*
1778	* Check preconditions and save the current state.
1779	*/
1780	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1781	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1782	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1783	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1784	VERR_INTERNAL_ERROR);
1785	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1786	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1787
1788	/*
1789	* Reset the recursion prep and pop semaphores.
1790	*/
1791	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1792	AssertLogRelRCReturn(rc, rc);
1793	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1794	AssertLogRelRCReturn(rc, rc);
1795	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1796	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1797	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1798	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1799
1800	/*
1801	* Usher the other thread into the recursion routine.
1802	*/
1803	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1804	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1805
1806	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1807	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1808	while (cLeft-- > 0)
1809	{
1810	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1811	AssertLogRelRC(rc);
1812	}
1813	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1814	{
1815	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1816	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1817	{
1818	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1819	AssertLogRelRC(rc);
1820	}
1821	}
1822	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1823	{
1824	Assert(cLeft == pVCpu->idCpu);
1825	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1826	{
1827	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1828	AssertLogRelRC(rc);
1829	}
1830	}
1831	else
1832	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1833	VERR_INTERNAL_ERROR_4);
1834
1835	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1836	AssertLogRelRC(rc);
1837	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1838	AssertLogRelRC(rc);
1839
1840
1841	/*
1842	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1843	*/
1844	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1845	{
1846	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1847	AssertLogRelRC(rc);
1848	}
1849
1850	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1851
1852	/*
1853	* Clear the slate and setup the new rendezvous.
1854	*/
1855	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1856	{
1857	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1858	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1859	}
1860	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1861	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1862	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1863	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1864
1865	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1866	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1867	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1868	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1869	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1870	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1871	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1872	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1873
1874	/*
1875	* We're ready to go now, do normal rendezvous processing.
1876	*/
1877	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1878	AssertLogRelRC(rc);
1879
1880	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1881
1882	/*
1883	* The caller waits for the other EMTs to be done, return and waiting on the
1884	* pop semaphore.
1885	*/
1886	for (;;)
1887	{
1888	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1889	AssertLogRelRC(rc);
1890	if (!pVM->vmm.s.fRendezvousRecursion)
1891	break;
1892	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1893	}
1894
1895	/*
1896	* Get the return code and merge it with the above recursion status.
1897	*/
1898	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1899	if ( rcStrict2 != VINF_SUCCESS
1900	&& ( rcStrict == VINF_SUCCESS
1901	\|\| rcStrict > rcStrict2))
1902	rcStrict = rcStrict2;
1903
1904	/*
1905	* Restore the parent rendezvous state.
1906	*/
1907	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1908	{
1909	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1910	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1911	}
1912	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1913	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1914	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1915	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1916
1917	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1918	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1919	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1920	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1921	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1922	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1923	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1924
1925	/*
1926	* Usher the other EMTs back to their parent recursion routine, waiting
1927	* for them to all get there before we return (makes sure they've been
1928	* scheduled and are past the pop event sem, see below).
1929	*/
1930	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1931	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1932	AssertLogRelRC(rc);
1933
1934	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1935	{
1936	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1937	AssertLogRelRC(rc);
1938	}
1939
1940	/*
1941	* We must reset the pop semaphore on the way out (doing the pop caller too,
1942	* just in case). The parent may be another recursion.
1943	*/
1944	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1945	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1946
1947	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1948
1949	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1950	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1951	return rcStrict;
1952	}
1953
1954
1955	/**
1956	* EMT rendezvous.
1957	*
1958	* Gathers all the EMTs and execute some code on each of them, either in a one
1959	* by one fashion or all at once.
1960	*
1961	* @returns VBox strict status code. This will be the first error,
1962	* VINF_SUCCESS, or an EM scheduling status code.
1963	*
1964	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1965	* doesn't support it or if the recursion is too deep.
1966	*
1967	* @param pVM The cross context VM structure.
1968	* @param fFlags Flags indicating execution methods. See
1969	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1970	* descending and ascending rendezvous types support
1971	* recursion from inside @a pfnRendezvous.
1972	* @param pfnRendezvous The callback.
1973	* @param pvUser User argument for the callback.
1974	*
1975	* @thread Any.
1976	*/
1977	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1978	{
1979	/*
1980	* Validate input.
1981	*/
1982	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1983	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1984	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1985	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1986	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1987	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1988	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1989	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1990
1991	VBOXSTRICTRC rcStrict;
1992	PVMCPU pVCpu = VMMGetCpu(pVM);
1993	if (!pVCpu)
1994	{
1995	/*
1996	* Forward the request to an EMT thread.
1997	*/
1998	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1999	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2000	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2001	else
2002	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2003	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2004	}
2005	else if ( pVM->cCpus == 1
2006	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2007	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2008	{
2009	/*
2010	* Shortcut for the single EMT case.
2011	*
2012	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2013	* during vmR3Destroy after other emulation threads have started terminating.
2014	*/
2015	if (!pVCpu->vmm.s.fInRendezvous)
2016	{
2017	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2018	pVCpu->vmm.s.fInRendezvous = true;
2019	pVM->vmm.s.fRendezvousFlags = fFlags;
2020	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2021	pVCpu->vmm.s.fInRendezvous = false;
2022	}
2023	else
2024	{
2025	/* Recursion. Do the same checks as in the SMP case. */
2026	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2027	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2028	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2029	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2030	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2031	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2032	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2033	, VERR_DEADLOCK);
2034
2035	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2036	pVM->vmm.s.cRendezvousRecursions++;
2037	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2038	pVM->vmm.s.fRendezvousFlags = fFlags;
2039
2040	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2041
2042	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2043	pVM->vmm.s.cRendezvousRecursions--;
2044	}
2045	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2046	}
2047	else
2048	{
2049	/*
2050	* Spin lock. If busy, check for recursion, if not recursing wait for
2051	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2052	*/
2053	int rc;
2054	rcStrict = VINF_SUCCESS;
2055	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2056	{
2057	/* Allow recursion in some cases. */
2058	if ( pVCpu->vmm.s.fInRendezvous
2059	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2060	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2061	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2062	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2063	))
2064	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2065
2066	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2067	VERR_DEADLOCK);
2068
2069	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2070	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2071	{
2072	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2073	{
2074	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2075	if ( rc != VINF_SUCCESS
2076	&& ( rcStrict == VINF_SUCCESS
2077	\|\| rcStrict > rc))
2078	rcStrict = rc;
2079	/** @todo Perhaps deal with termination here? */
2080	}
2081	ASMNopPause();
2082	}
2083	}
2084
2085	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2086	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2087	Assert(!pVCpu->vmm.s.fInRendezvous);
2088	pVCpu->vmm.s.fInRendezvous = true;
2089
2090	/*
2091	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2092	*/
2093	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2094	{
2095	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2096	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2097	}
2098	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2099	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2100	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2101	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2102	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2103	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2104	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2105	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2106	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2107	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2108	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2109
2110	/*
2111	* Set the FF and poke the other EMTs.
2112	*/
2113	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2114	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2115
2116	/*
2117	* Do the same ourselves.
2118	*/
2119	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2120
2121	/*
2122	* The caller waits for the other EMTs to be done and return before doing
2123	* the cleanup. This makes away with wakeup / reset races we would otherwise
2124	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2125	*/
2126	for (;;)
2127	{
2128	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2129	AssertLogRelRC(rc);
2130	if (!pVM->vmm.s.fRendezvousRecursion)
2131	break;
2132	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2133	}
2134
2135	/*
2136	* Get the return code and clean up a little bit.
2137	*/
2138	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2139	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2140
2141	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2142	pVCpu->vmm.s.fInRendezvous = false;
2143
2144	/*
2145	* Merge rcStrict, rcStrict2 and rcStrict3.
2146	*/
2147	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2148	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2149	if ( rcStrict2 != VINF_SUCCESS
2150	&& ( rcStrict == VINF_SUCCESS
2151	\|\| rcStrict > rcStrict2))
2152	rcStrict = rcStrict2;
2153	if ( rcStrict3 != VINF_SUCCESS
2154	&& ( rcStrict == VINF_SUCCESS
2155	\|\| rcStrict > rcStrict3))
2156	rcStrict = rcStrict3;
2157	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2158	}
2159
2160	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2161	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2162	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2163	VERR_IPE_UNEXPECTED_INFO_STATUS);
2164	return VBOXSTRICTRC_VAL(rcStrict);
2165	}
2166
2167
2168	/**
2169	* Interface for vmR3SetHaltMethodU.
2170	*
2171	* @param pVCpu The cross context virtual CPU structure of the
2172	* calling EMT.
2173	* @param fMayHaltInRing0 The new state.
2174	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2175	* @thread EMT(pVCpu)
2176	*
2177	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2178	* component.
2179	*/
2180	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2181	{
2182	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2183	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2184	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2185	}
2186
2187
2188	/**
2189	* Read from the ring 0 jump buffer stack.
2190	*
2191	* @returns VBox status code.
2192	*
2193	* @param pVM The cross context VM structure.
2194	* @param idCpu The ID of the source CPU context (for the address).
2195	* @param R0Addr Where to start reading.
2196	* @param pvBuf Where to store the data we've read.
2197	* @param cbRead The number of bytes to read.
2198	*/
2199	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2200	{
2201	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2202	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2203	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2204
2205	/*
2206	* Hopefully we've got all the requested bits. If not supply what we
2207	* can and zero the remaining stuff.
2208	*/
2209	RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2210	if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2211	{
2212	size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2213	if (cbRead <= cbValid)
2214	{
2215	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2216	return VINF_SUCCESS;
2217	}
2218
2219	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2220	RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2221	}
2222	else
2223	RT_BZERO(pvBuf, cbRead);
2224
2225	/*
2226	* Supply the setjmp return RIP/EIP if requested.
2227	*/
2228	if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2229	&& pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2230	{
2231	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2232	size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2233	size_t offDst = 0;
2234	if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2235	offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2236	else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2237	{
2238	size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2239	Assert(offSrc < cbSrc);
2240	pbSrc -= offSrc;
2241	cbSrc -= offSrc;
2242	}
2243	if (cbSrc > cbRead - offDst)
2244	cbSrc = cbRead - offDst;
2245	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2246
2247	//if (cbSrc == cbRead)
2248	// rc = VINF_SUCCESS;
2249	}
2250
2251	return VINF_SUCCESS;
2252	}
2253
2254
2255	/**
2256	* Used by the DBGF stack unwinder to initialize the register state.
2257	*
2258	* @param pUVM The user mode VM handle.
2259	* @param idCpu The ID of the CPU being unwound.
2260	* @param pState The unwind state to initialize.
2261	*/
2262	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2263	{
2264	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2265	AssertReturnVoid(pVCpu);
2266
2267	/*
2268	* This is all we really need here if we had proper unwind info (win64 only)...
2269	*/
2270	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2271	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2272	pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2273
2274	/*
2275	* Locate the resume point on the stack.
2276	*/
2277	uintptr_t off = 0;
2278
2279	#ifdef RT_ARCH_AMD64
2280	/*
2281	* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly.
2282	*/
2283	# ifdef RT_OS_WINDOWS
2284	off += 0xa0; /* XMM6 thru XMM15 */
2285	# endif
2286	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2287	off += 8;
2288	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2289	off += 8;
2290	# ifdef RT_OS_WINDOWS
2291	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2292	off += 8;
2293	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2294	off += 8;
2295	# endif
2296	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2297	off += 8;
2298	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2299	off += 8;
2300	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2301	off += 8;
2302	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2303	off += 8;
2304	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2305	off += 8;
2306	pState->uPc = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2307	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2308
2309	#elif defined(RT_ARCH_X86)
2310	/*
2311	* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly.
2312	*/
2313	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2314	off += 4;
2315	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2316	off += 4;
2317	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2318	off += 4;
2319	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2320	off += 4;
2321	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2322	off += 4;
2323	pState->uPc = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2324	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2325	#else
2326	# error "Port me"
2327	#endif
2328	}
2329
2330
2331	/**
2332	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2333	*
2334	* @returns VBox status code.
2335	* @param pVM The cross context VM structure.
2336	* @param uOperation Operation to execute.
2337	* @param u64Arg Constant argument.
2338	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2339	* details.
2340	*/
2341	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2342	{
2343	PVMCPU pVCpu = VMMGetCpu(pVM);
2344	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2345	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2346	}
2347
2348
2349	/**
2350	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2351	*
2352	* @returns VBox status code.
2353	* @param pVM The cross context VM structure.
2354	* @param pVCpu The cross context VM structure.
2355	* @param enmOperation Operation to execute.
2356	* @param u64Arg Constant argument.
2357	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2358	* details.
2359	*/
2360	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2361	{
2362	/*
2363	* Call ring-0.
2364	*/
2365	#ifdef NO_SUPCALLR0VMM
2366	int rc = VERR_GENERAL_FAILURE;
2367	#else
2368	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2369	#endif
2370
2371	/*
2372	* Flush the logs and deal with ring-0 assertions.
2373	*/
2374	#ifdef LOG_ENABLED
2375	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2376	#endif
2377	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2378	if (rc != VERR_VMM_RING0_ASSERTION)
2379	{
2380	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2381	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2382	VERR_IPE_UNEXPECTED_INFO_STATUS);
2383	return rc;
2384	}
2385	return vmmR3HandleRing0Assert(pVM, pVCpu);
2386	}
2387
2388
2389	/**
2390	* Logs a ring-0 assertion ASAP after returning to ring-3.
2391	*
2392	* @returns VBox status code.
2393	* @param pVM The cross context VM structure.
2394	* @param pVCpu The cross context virtual CPU structure.
2395	*/
2396	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2397	{
2398	RT_NOREF(pVCpu);
2399	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2400	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2401	return VERR_VMM_RING0_ASSERTION;
2402	}
2403
2404
2405	/**
2406	* Displays the Force action Flags.
2407	*
2408	* @param pVM The cross context VM structure.
2409	* @param pHlp The output helpers.
2410	* @param pszArgs The additional arguments (ignored).
2411	*/
2412	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2413	{
2414	int c;
2415	uint32_t f;
2416	NOREF(pszArgs);
2417
2418	#define PRINT_FLAG(prf,flag) do { \
2419	if (f & (prf##flag)) \
2420	{ \
2421	static const char *s_psz = #flag; \
2422	if (!(c % 6)) \
2423	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2424	else \
2425	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2426	c++; \
2427	f &= ~(prf##flag); \
2428	} \
2429	} while (0)
2430
2431	#define PRINT_GROUP(prf,grp,sfx) do { \
2432	if (f & (prf##grp##sfx)) \
2433	{ \
2434	static const char *s_psz = #grp; \
2435	if (!(c % 5)) \
2436	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2437	else \
2438	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2439	c++; \
2440	} \
2441	} while (0)
2442
2443	/*
2444	* The global flags.
2445	*/
2446	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2447	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2448
2449	/* show the flag mnemonics */
2450	c = 0;
2451	f = fGlobalForcedActions;
2452	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2453	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2454	PRINT_FLAG(VM_FF_,PDM_DMA);
2455	PRINT_FLAG(VM_FF_,DBGF);
2456	PRINT_FLAG(VM_FF_,REQUEST);
2457	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2458	PRINT_FLAG(VM_FF_,RESET);
2459	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2460	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2461	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2462	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2463	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2464	if (f)
2465	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2466	else
2467	pHlp->pfnPrintf(pHlp, "\n");
2468
2469	/* the groups */
2470	c = 0;
2471	f = fGlobalForcedActions;
2472	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2473	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2474	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2475	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2476	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2477	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2478	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2479	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2480	if (c)
2481	pHlp->pfnPrintf(pHlp, "\n");
2482
2483	/*
2484	* Per CPU flags.
2485	*/
2486	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2487	{
2488	PVMCPU pVCpu = pVM->apCpusR3[i];
2489	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2490	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2491
2492	/* show the flag mnemonics */
2493	c = 0;
2494	f = fLocalForcedActions;
2495	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2496	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2497	PRINT_FLAG(VMCPU_FF_,TIMER);
2498	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2499	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2500	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2501	PRINT_FLAG(VMCPU_FF_,UNHALT);
2502	PRINT_FLAG(VMCPU_FF_,IEM);
2503	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2504	PRINT_FLAG(VMCPU_FF_,DBGF);
2505	PRINT_FLAG(VMCPU_FF_,REQUEST);
2506	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2507	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2508	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2509	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2510	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2511	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2512	PRINT_FLAG(VMCPU_FF_,TO_R3);
2513	PRINT_FLAG(VMCPU_FF_,IOM);
2514	if (f)
2515	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2516	else
2517	pHlp->pfnPrintf(pHlp, "\n");
2518
2519	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2520	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2521
2522	/* the groups */
2523	c = 0;
2524	f = fLocalForcedActions;
2525	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2526	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2527	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2528	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2529	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2530	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2531	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2532	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2533	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2534	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2535	if (c)
2536	pHlp->pfnPrintf(pHlp, "\n");
2537	}
2538
2539	#undef PRINT_FLAG
2540	#undef PRINT_GROUP
2541	}
2542

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 92676

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