VMM.cpp@ 99210

Last change on this file since 99210 was 99051, checked in by vboxsync, 2 years ago
VMM: More ARMv8 x86/amd64 separation work, VBoxVMMArm compiles and links now, bugref:10385
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 106.0 KB

Line
1	/* $Id: VMM.cpp 99051 2023-03-19 16:40:06Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	//#define NO_SUPCALLR0VMM
29
30	/** @page pg_vmm VMM - The Virtual Machine Monitor
31	*
32	* The VMM component is two things at the moment, it's a component doing a few
33	* management and routing tasks, and it's the whole virtual machine monitor
34	* thing. For hysterical reasons, it is not doing all the management that one
35	* would expect, this is instead done by @ref pg_vm. We'll address this
36	* misdesign eventually, maybe.
37	*
38	* VMM is made up of these components:
39	* - @subpage pg_cfgm
40	* - @subpage pg_cpum
41	* - @subpage pg_dbgf
42	* - @subpage pg_em
43	* - @subpage pg_gim
44	* - @subpage pg_gmm
45	* - @subpage pg_gvmm
46	* - @subpage pg_hm
47	* - @subpage pg_iem
48	* - @subpage pg_iom
49	* - @subpage pg_mm
50	* - @subpage pg_nem
51	* - @subpage pg_pdm
52	* - @subpage pg_pgm
53	* - @subpage pg_selm
54	* - @subpage pg_ssm
55	* - @subpage pg_stam
56	* - @subpage pg_tm
57	* - @subpage pg_trpm
58	* - @subpage pg_vm
59	*
60	*
61	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62	*
63	*
64	* @section sec_vmmstate VMM State
65	*
66	* @image html VM_Statechart_Diagram.gif
67	*
68	* To be written.
69	*
70	*
71	* @subsection subsec_vmm_init VMM Initialization
72	*
73	* To be written.
74	*
75	*
76	* @subsection subsec_vmm_term VMM Termination
77	*
78	* To be written.
79	*
80	*
81	* @section sec_vmm_limits VMM Limits
82	*
83	* There are various resource limits imposed by the VMM and it's
84	* sub-components. We'll list some of them here.
85	*
86	* On 64-bit hosts:
87	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88	* can be increased up to 64K - 1.
89	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91	* - A VM can be assigned all the memory we can use (16TB), however, the
92	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94	*
95	* On 32-bit hosts:
96	* - Max 127 VMs. Imposed by GMM's per page structure.
97	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98	* ROM pages. The limit is imposed by the 28-bit page ID used
99	* internally in GMM. It is also limited by PAE.
100	* - A VM can be assigned all the memory GMM can allocate, however, the
101	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103	*
104	*/
105
106
107	/*********************************************************************************************************************************
108	* Header Files *
109	*********************************************************************************************************************************/
110	#define LOG_GROUP LOG_GROUP_VMM
111	#include <VBox/vmm/vmm.h>
112	#include <VBox/vmm/vmapi.h>
113	#include <VBox/vmm/pgm.h>
114	#include <VBox/vmm/cfgm.h>
115	#include <VBox/vmm/pdmqueue.h>
116	#include <VBox/vmm/pdmcritsect.h>
117	#include <VBox/vmm/pdmcritsectrw.h>
118	#include <VBox/vmm/pdmapi.h>
119	#include <VBox/vmm/cpum.h>
120	#include <VBox/vmm/gim.h>
121	#include <VBox/vmm/mm.h>
122	#include <VBox/vmm/nem.h>
123	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124	# include <VBox/vmm/iem.h>
125	#endif
126	#include <VBox/vmm/iom.h>
127	#include <VBox/vmm/trpm.h>
128	#include <VBox/vmm/selm.h>
129	#include <VBox/vmm/em.h>
130	#include <VBox/sup.h>
131	#include <VBox/vmm/dbgf.h>
132	#include <VBox/vmm/apic.h>
133	#include <VBox/vmm/ssm.h>
134	#include <VBox/vmm/tm.h>
135	#include "VMMInternal.h"
136	#include <VBox/vmm/vmcc.h>
137
138	#include <VBox/err.h>
139	#include <VBox/param.h>
140	#include <VBox/version.h>
141	#include <VBox/vmm/hm.h>
142	#include <iprt/assert.h>
143	#include <iprt/alloc.h>
144	#include <iprt/asm.h>
145	#include <iprt/time.h>
146	#include <iprt/semaphore.h>
147	#include <iprt/stream.h>
148	#include <iprt/string.h>
149	#include <iprt/stdarg.h>
150	#include <iprt/ctype.h>
151	#include <iprt/x86.h>
152
153
154	/*********************************************************************************************************************************
155	* Defined Constants And Macros *
156	*********************************************************************************************************************************/
157	/** The saved state version. */
158	#define VMM_SAVED_STATE_VERSION 4
159	/** The saved state version used by v3.0 and earlier. (Teleportation) */
160	#define VMM_SAVED_STATE_VERSION_3_0 3
161
162	/** Macro for flushing the ring-0 logging. */
163	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
164	do { \
165	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
166	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
167	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
168	{ /* likely? */ } \
169	else \
170	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
171	} while (0)
172
173
174	/*********************************************************************************************************************************
175	* Internal Functions *
176	*********************************************************************************************************************************/
177	static void vmmR3InitRegisterStats(PVM pVM);
178	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
179	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
180	#if 0 /* pointless when timers doesn't run on EMT */
181	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
182	#endif
183	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
184	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
185	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
186	static FNRTTHREAD vmmR3LogFlusher;
187	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
188	PRTLOGGER pDstLogger);
189	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
190
191
192
193	/**
194	* Initializes the VMM.
195	*
196	* @returns VBox status code.
197	* @param pVM The cross context VM structure.
198	*/
199	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
200	{
201	LogFlow(("VMMR3Init\n"));
202
203	/*
204	* Assert alignment, sizes and order.
205	*/
206	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
207	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
208
209	/*
210	* Init basic VM VMM members.
211	*/
212	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
213	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
214	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
215	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
216	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
217	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
218	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
219	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
220	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
221	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
222
223	#if 0 /* pointless when timers doesn't run on EMT */
224	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
225	* The EMT yield interval. The EMT yielding is a hack we employ to play a
226	* bit nicer with the rest of the system (like for instance the GUI).
227	*/
228	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
229	23 /* Value arrived at after experimenting with the grub boot prompt. */);
230	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
231	#endif
232
233	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
234	* Controls whether we employ per-cpu preemption timers to limit the time
235	* spent executing guest code. This option is not available on all
236	* platforms and we will silently ignore this setting then. If we are
237	* running in VT-x mode, we will use the VMX-preemption timer instead of
238	* this one when possible.
239	*/
240	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
241	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
242	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
243
244	/*
245	* Initialize the VMM rendezvous semaphores.
246	*/
247	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
248	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
249	return VERR_NO_MEMORY;
250	for (VMCPUID i = 0; i < pVM->cCpus; i++)
251	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
252	for (VMCPUID i = 0; i < pVM->cCpus; i++)
253	{
254	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
255	AssertRCReturn(rc, rc);
256	}
257	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
262	AssertRCReturn(rc, rc);
263	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
264	AssertRCReturn(rc, rc);
265	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
266	AssertRCReturn(rc, rc);
267	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
268	AssertRCReturn(rc, rc);
269	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
270	AssertRCReturn(rc, rc);
271	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
272	AssertRCReturn(rc, rc);
273
274	/*
275	* Register the saved state data unit.
276	*/
277	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
278	NULL, NULL, NULL,
279	NULL, vmmR3Save, NULL,
280	NULL, vmmR3Load, NULL);
281	if (RT_FAILURE(rc))
282	return rc;
283
284	/*
285	* Register the Ring-0 VM handle with the session for fast ioctl calls.
286	*/
287	bool const fDriverless = SUPR3IsDriverless();
288	if (!fDriverless)
289	{
290	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
291	if (RT_FAILURE(rc))
292	return rc;
293	}
294
295	#ifdef VBOX_WITH_NMI
296	/*
297	* Allocate mapping for the host APIC.
298	*/
299	rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
300	AssertRC(rc);
301	#endif
302	if (RT_SUCCESS(rc))
303	{
304	/*
305	* Start the log flusher thread.
306	*/
307	if (!fDriverless)
308	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
309	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
310	if (RT_SUCCESS(rc))
311	{
312
313	/*
314	* Debug info and statistics.
315	*/
316	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
317	vmmR3InitRegisterStats(pVM);
318	vmmInitFormatTypes();
319
320	return VINF_SUCCESS;
321	}
322	}
323	/** @todo Need failure cleanup? */
324
325	return rc;
326	}
327
328
329	/**
330	* VMMR3Init worker that register the statistics with STAM.
331	*
332	* @param pVM The cross context VM structure.
333	*/
334	static void vmmR3InitRegisterStats(PVM pVM)
335	{
336	RT_NOREF_PV(pVM);
337
338	/* Nothing to do here in driverless mode. */
339	if (SUPR3IsDriverless())
340	return;
341
342	/*
343	* Statistics.
344	*/
345	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
346	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
347	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
348	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
349	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
350	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
351	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
352	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
353	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
354	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
397
398	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
399	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
400
401	for (VMCPUID i = 0; i < pVM->cCpus; i++)
402	{
403	PVMCPU pVCpu = pVM->apCpusR3[i];
404	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
405	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
406	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
407	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
408	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
409	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
410	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
411	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
412	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
413	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
414	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
415	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
416	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
417	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
418	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
419	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
420	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
421
422	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
423
424	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
425	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
426	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
427	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
428	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
429	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
430	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
431	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
432	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
433
434	pShared = &pVCpu->vmm.s.u.s.RelLogger;
435	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
436	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
437	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
438	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
439	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
440	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
441	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
442	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
443	}
444	}
445
446
447	/**
448	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
449	*
450	* @returns VBox status code.
451	* @param pVM The cross context VM structure.
452	* @param pVCpu The cross context per CPU structure.
453	* @thread EMT(pVCpu)
454	*/
455	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
456	{
457	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
458	}
459
460
461	/**
462	* Initializes the R0 VMM.
463	*
464	* @returns VBox status code.
465	* @param pVM The cross context VM structure.
466	*/
467	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
468	{
469	int rc;
470	PVMCPU pVCpu = VMMGetCpu(pVM);
471	Assert(pVCpu && pVCpu->idCpu == 0);
472
473	/*
474	* Nothing to do here in driverless mode.
475	*/
476	if (SUPR3IsDriverless())
477	return VINF_SUCCESS;
478
479	/*
480	* Make sure the ring-0 loggers are up to date.
481	*/
482	rc = VMMR3UpdateLoggers(pVM);
483	if (RT_FAILURE(rc))
484	return rc;
485
486	/*
487	* Call Ring-0 entry with init code.
488	*/
489	#ifdef NO_SUPCALLR0VMM
490	//rc = VERR_GENERAL_FAILURE;
491	rc = VINF_SUCCESS;
492	#else
493	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
494	#endif
495
496	/*
497	* Flush the logs & deal with assertions.
498	*/
499	#ifdef LOG_ENABLED
500	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
501	#endif
502	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
503	if (rc == VERR_VMM_RING0_ASSERTION)
504	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
505	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
506	{
507	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
508	if (RT_SUCCESS(rc))
509	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
510	}
511
512	/*
513	* Log stuff we learned in ring-0.
514	*/
515	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
516	if (pVM->vmm.s.fIsUsingContextHooks)
517	LogRel(("VMM: Enabled thread-context hooks\n"));
518	else
519	LogRel(("VMM: Thread-context hooks unavailable\n"));
520
521	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
522	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
523	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
524	else
525	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
526	if (pVM->vmm.s.fIsPreemptPossible)
527	LogRel(("VMM: Kernel preemption is possible\n"));
528	else
529	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
530
531	/*
532	* Send all EMTs to ring-0 to get their logger initialized.
533	*/
534	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
535	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
536
537	return rc;
538	}
539
540
541	/**
542	* Called when an init phase completes.
543	*
544	* @returns VBox status code.
545	* @param pVM The cross context VM structure.
546	* @param enmWhat Which init phase.
547	*/
548	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
549	{
550	int rc = VINF_SUCCESS;
551
552	switch (enmWhat)
553	{
554	case VMINITCOMPLETED_RING3:
555	{
556	#if 0 /* pointless when timers doesn't run on EMT */
557	/*
558	* Create the EMT yield timer.
559	*/
560	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
561	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
562	AssertRCReturn(rc, rc);
563
564	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
565	AssertRCReturn(rc, rc);
566	#endif
567	break;
568	}
569
570	case VMINITCOMPLETED_HM:
571	{
572	#if !defined(VBOX_VMM_TARGET_ARMV8)
573	/*
574	* Disable the periodic preemption timers if we can use the
575	* VMX-preemption timer instead.
576	*/
577	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
578	&& HMR3IsVmxPreemptionTimerUsed(pVM))
579	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
580	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
581	#endif
582
583	/*
584	* Last chance for GIM to update its CPUID leaves if it requires
585	* knowledge/information from HM initialization.
586	*/
587	/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
588	rc = GIMR3InitCompleted(pVM);
589	AssertRCReturn(rc, rc);
590
591	/*
592	* CPUM's post-initialization (print CPUIDs).
593	*/
594	CPUMR3LogCpuIdAndMsrFeatures(pVM);
595	break;
596	}
597
598	default: /* shuts up gcc */
599	break;
600	}
601
602	return rc;
603	}
604
605
606	/**
607	* Terminate the VMM bits.
608	*
609	* @returns VBox status code.
610	* @param pVM The cross context VM structure.
611	*/
612	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
613	{
614	PVMCPU pVCpu = VMMGetCpu(pVM);
615	Assert(pVCpu && pVCpu->idCpu == 0);
616
617	/*
618	* Call Ring-0 entry with termination code.
619	*/
620	int rc = VINF_SUCCESS;
621	if (!SUPR3IsDriverless())
622	{
623	#ifndef NO_SUPCALLR0VMM
624	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
625	#endif
626	}
627
628	/*
629	* Flush the logs & deal with assertions.
630	*/
631	#ifdef LOG_ENABLED
632	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
633	#endif
634	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
635	if (rc == VERR_VMM_RING0_ASSERTION)
636	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
637	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
638	{
639	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
640	if (RT_SUCCESS(rc))
641	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
642	}
643
644	/*
645	* Do clean ups.
646	*/
647	for (VMCPUID i = 0; i < pVM->cCpus; i++)
648	{
649	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
650	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
651	}
652	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
653	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
654	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
655	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
656	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
657	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
658	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
659	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
660	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
661	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
662	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
663	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
664	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
665	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
666	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
667	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
668
669	vmmTermFormatTypes();
670
671	/*
672	* Wait for the log flusher thread to complete.
673	*/
674	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
675	{
676	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
677	AssertLogRelRC(rc2);
678	if (RT_SUCCESS(rc2))
679	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
680	}
681
682	return rc;
683	}
684
685
686	/**
687	* Applies relocations to data and code managed by this
688	* component. This function will be called at init and
689	* whenever the VMM need to relocate it self inside the GC.
690	*
691	* The VMM will need to apply relocations to the core code.
692	*
693	* @param pVM The cross context VM structure.
694	* @param offDelta The relocation delta.
695	*/
696	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
697	{
698	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
699	RT_NOREF(offDelta);
700
701	/*
702	* Update the logger.
703	*/
704	VMMR3UpdateLoggers(pVM);
705	}
706
707
708	/**
709	* Worker for VMMR3UpdateLoggers.
710	*/
711	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
712	{
713	/*
714	* Get the group count.
715	*/
716	uint32_t uGroupsCrc32 = 0;
717	uint32_t cGroups = 0;
718	uint64_t fFlags = 0;
719	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
720	Assert(rc == VERR_BUFFER_OVERFLOW);
721
722	/*
723	* Allocate the request of the right size.
724	*/
725	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
726	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
727	if (pReq)
728	{
729	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
730	pReq->Hdr.cbReq = cbReq;
731	pReq->cGroups = cGroups;
732	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
733	AssertRC(rc);
734	if (RT_SUCCESS(rc))
735	{
736	/*
737	* The 64-bit value argument.
738	*/
739	uint64_t fExtraArg = fReleaseLogger;
740
741	/* Only outputting to the parent VMM's logs? Enable ring-0 to flush directly. */
742	uint32_t fDst = RTLogGetDestinations(pSrcLogger);
743	fDst &= ~(RTLOGDEST_DUMMY \| RTLOGDEST_F_NO_DENY \| RTLOGDEST_F_DELAY_FILE \| RTLOGDEST_FIXED_FILE \| RTLOGDEST_FIXED_DIR);
744	if ( (fDst & (RTLOGDEST_VMM \| RTLOGDEST_VMM_REL))
745	&& !(fDst & ~(RTLOGDEST_VMM \| RTLOGDEST_VMM_REL)))
746	fExtraArg \|= (fDst & RTLOGDEST_VMM ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_DBG : 0)
747	\| (fDst & RTLOGDEST_VMM_REL ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_REL : 0);
748
749	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fExtraArg, &pReq->Hdr);
750	}
751
752	RTMemFree(pReq);
753	}
754	else
755	rc = VERR_NO_MEMORY;
756	return rc;
757	}
758
759
760	/**
761	* Updates the settings for the RC and R0 loggers.
762	*
763	* @returns VBox status code.
764	* @param pVM The cross context VM structure.
765	* @thread EMT
766	*/
767	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
768	{
769	/* Nothing to do here if we're in driverless mode: */
770	if (SUPR3IsDriverless())
771	return VINF_SUCCESS;
772
773	PVMCPU pVCpu = VMMGetCpu(pVM);
774	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
775
776	/*
777	* Each EMT has each own logger instance.
778	*/
779	/* Debug logging.*/
780	int rcDebug = VINF_SUCCESS;
781	#ifdef LOG_ENABLED
782	PRTLOGGER const pDefault = RTLogDefaultInstance();
783	if (pDefault)
784	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
785	#else
786	RT_NOREF(pVM);
787	#endif
788
789	/* Release logging. */
790	int rcRelease = VINF_SUCCESS;
791	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
792	if (pRelease)
793	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
794
795	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
796	}
797
798
799	/**
800	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
801	*/
802	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
803	{
804	PVM const pVM = (PVM)pvUser;
805	RT_NOREF(hThreadSelf);
806
807	/* Reset the flusher state before we start: */
808	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
809
810	/*
811	* The work loop.
812	*/
813	for (;;)
814	{
815	/*
816	* Wait for work.
817	*/
818	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
819	if (RT_SUCCESS(rc))
820	{
821	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
822	VMMLOGFLUSHERENTRY Item;
823	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
824	if ( Item.s.idCpu < pVM->cCpus
825	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
826	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
827	{
828	/*
829	* Verify the request.
830	*/
831	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
832	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
833	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
834	if (cbToFlush > 0)
835	{
836	if (cbToFlush <= pShared->cbBuf)
837	{
838	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
839	if (pchBufR3)
840	{
841	/*
842	* Do the flushing.
843	*/
844	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
845	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
846	if (pLogger)
847	{
848	char szBefore[128];
849	RTStrPrintf(szBefore, sizeof(szBefore),
850	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
851	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
852	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
853	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
854	}
855	}
856	else
857	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
858	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
859	}
860	else
861	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
862	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
863	}
864	else
865	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
866	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
867
868	/*
869	* Mark the descriptor as flushed and set the request flag for same.
870	*/
871	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
872	}
873	else
874	{
875	Assert(Item.s.idCpu == UINT16_MAX);
876	Assert(Item.s.idxLogger == UINT8_MAX);
877	Assert(Item.s.idxBuffer == UINT8_MAX);
878	}
879	}
880	/*
881	* Interrupted can happen, just ignore it.
882	*/
883	else if (rc == VERR_INTERRUPTED)
884	{ /* ignore*/ }
885	/*
886	* The ring-0 termination code will set the shutdown flag and wake us
887	* up, and we should return with object destroyed. In case there is
888	* some kind of race, we might also get sempahore destroyed.
889	*/
890	else if ( rc == VERR_OBJECT_DESTROYED
891	\|\| rc == VERR_SEM_DESTROYED
892	\|\| rc == VERR_INVALID_HANDLE)
893	{
894	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
895	return VINF_SUCCESS;
896	}
897	/*
898	* There shouldn't be any other errors...
899	*/
900	else
901	{
902	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
903	AssertRC(rc);
904	RTThreadSleep(1);
905	}
906	}
907	}
908
909
910	/**
911	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
912	*
913	* @param pVM The cross context VM structure.
914	* @param pVCpu The cross context virtual CPU structure of the calling
915	* EMT.
916	* @param pShared The shared logger data.
917	* @param idxBuf The buffer to flush.
918	* @param pDstLogger The destination IPRT logger.
919	*/
920	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
921	{
922	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
923	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
924	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
925
926	#if VMMLOGGER_BUFFER_COUNT > 1
927	/*
928	* When we have more than one log buffer, the flusher thread may still be
929	* working on the previous buffer when we get here.
930	*/
931	char szBefore[64];
932	if (pShared->cFlushing > 0)
933	{
934	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
935	uint64_t const nsStart = RTTimeNanoTS();
936
937	/* A no-op, but it takes the lock and the hope is that we end up waiting
938	on the flusher to finish up. */
939	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
940	if (pShared->cFlushing != 0)
941	{
942	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
943
944	/* If no luck, go to ring-0 and to proper waiting. */
945	if (pShared->cFlushing != 0)
946	{
947	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
948	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
949	}
950	}
951
952	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
953	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
954	pszBefore = szBefore;
955	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
956	}
957	#else
958	RT_NOREF(pVM, pVCpu);
959	#endif
960
961	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
962	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
963	}
964
965
966	/**
967	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
968	*
969	* @returns Pointer to the buffer.
970	* @param pVM The cross context VM structure.
971	*/
972	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
973	{
974	return pVM->vmm.s.szRing0AssertMsg1;
975	}
976
977
978	/**
979	* Returns the VMCPU of the specified virtual CPU.
980	*
981	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
982	*
983	* @param pUVM The user mode VM handle.
984	* @param idCpu The ID of the virtual CPU.
985	*/
986	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
987	{
988	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
989	AssertReturn(idCpu < pUVM->cCpus, NULL);
990	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
991	return pUVM->pVM->apCpusR3[idCpu];
992	}
993
994
995	/**
996	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
997	*
998	* @returns Pointer to the buffer.
999	* @param pVM The cross context VM structure.
1000	*/
1001	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1002	{
1003	return pVM->vmm.s.szRing0AssertMsg2;
1004	}
1005
1006
1007	/**
1008	* Execute state save operation.
1009	*
1010	* @returns VBox status code.
1011	* @param pVM The cross context VM structure.
1012	* @param pSSM SSM operation handle.
1013	*/
1014	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1015	{
1016	LogFlow(("vmmR3Save:\n"));
1017
1018	/*
1019	* Save the started/stopped state of all CPUs except 0 as it will always
1020	* be running. This avoids breaking the saved state version. :-)
1021	*/
1022	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1023	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1024
1025	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1026	}
1027
1028
1029	/**
1030	* Execute state load operation.
1031	*
1032	* @returns VBox status code.
1033	* @param pVM The cross context VM structure.
1034	* @param pSSM SSM operation handle.
1035	* @param uVersion Data layout version.
1036	* @param uPass The data pass.
1037	*/
1038	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1039	{
1040	LogFlow(("vmmR3Load:\n"));
1041	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1042
1043	/*
1044	* Validate version.
1045	*/
1046	if ( uVersion != VMM_SAVED_STATE_VERSION
1047	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1048	{
1049	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1050	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1051	}
1052
1053	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1054	{
1055	/* Ignore the stack bottom, stack pointer and stack bits. */
1056	RTRCPTR RCPtrIgnored;
1057	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1058	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1059	#ifdef RT_OS_DARWIN
1060	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1061	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1062	&& SSMR3HandleRevision(pSSM) >= 48858
1063	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1064	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1065	)
1066	SSMR3Skip(pSSM, 16384);
1067	else
1068	SSMR3Skip(pSSM, 8192);
1069	#else
1070	SSMR3Skip(pSSM, 8192);
1071	#endif
1072	}
1073
1074	/*
1075	* Restore the VMCPU states. VCPU 0 is always started.
1076	*/
1077	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1078	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1079	{
1080	bool fStarted;
1081	int rc = SSMR3GetBool(pSSM, &fStarted);
1082	if (RT_FAILURE(rc))
1083	return rc;
1084	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1085	}
1086
1087	/* terminator */
1088	uint32_t u32;
1089	int rc = SSMR3GetU32(pSSM, &u32);
1090	if (RT_FAILURE(rc))
1091	return rc;
1092	if (u32 != UINT32_MAX)
1093	{
1094	AssertMsgFailed(("u32=%#x\n", u32));
1095	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1096	}
1097	return VINF_SUCCESS;
1098	}
1099
1100
1101	/**
1102	* Suspends the CPU yielder.
1103	*
1104	* @param pVM The cross context VM structure.
1105	*/
1106	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1107	{
1108	#if 0 /* pointless when timers doesn't run on EMT */
1109	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1110	if (!pVM->vmm.s.cYieldResumeMillies)
1111	{
1112	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1113	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1114	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1115	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1116	else
1117	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1118	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1119	}
1120	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1121	#else
1122	RT_NOREF(pVM);
1123	#endif
1124	}
1125
1126
1127	/**
1128	* Stops the CPU yielder.
1129	*
1130	* @param pVM The cross context VM structure.
1131	*/
1132	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1133	{
1134	#if 0 /* pointless when timers doesn't run on EMT */
1135	if (!pVM->vmm.s.cYieldResumeMillies)
1136	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1137	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1138	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1139	#else
1140	RT_NOREF(pVM);
1141	#endif
1142	}
1143
1144
1145	/**
1146	* Resumes the CPU yielder when it has been a suspended or stopped.
1147	*
1148	* @param pVM The cross context VM structure.
1149	*/
1150	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1151	{
1152	#if 0 /* pointless when timers doesn't run on EMT */
1153	if (pVM->vmm.s.cYieldResumeMillies)
1154	{
1155	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1156	pVM->vmm.s.cYieldResumeMillies = 0;
1157	}
1158	#else
1159	RT_NOREF(pVM);
1160	#endif
1161	}
1162
1163
1164	#if 0 /* pointless when timers doesn't run on EMT */
1165	/**
1166	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1167	*
1168	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1169	*/
1170	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1171	{
1172	NOREF(pvUser);
1173
1174	/*
1175	* This really needs some careful tuning. While we shouldn't be too greedy since
1176	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1177	* because that'll cause us to stop up.
1178	*
1179	* The current logic is to use the default interval when there is no lag worth
1180	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1181	*
1182	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1183	* so the lag is up to date.)
1184	*/
1185	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1186	if ( u64Lag < 50000000 /* 50ms */
1187	\|\| ( u64Lag < 1000000000 /* 1s */
1188	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1189	)
1190	{
1191	uint64_t u64Elapsed = RTTimeNanoTS();
1192	pVM->vmm.s.u64LastYield = u64Elapsed;
1193
1194	RTThreadYield();
1195
1196	#ifdef LOG_ENABLED
1197	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1198	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1199	#endif
1200	}
1201	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1202	}
1203	#endif
1204
1205
1206	/**
1207	* Executes guest code (Intel VT-x and AMD-V).
1208	*
1209	* @param pVM The cross context VM structure.
1210	* @param pVCpu The cross context virtual CPU structure.
1211	*/
1212	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1213	{
1214	#if defined(VBOX_VMM_TARGET_ARMV8)
1215	/* We should actually never get here as the only execution engine is NEM. */
1216	RT_NOREF(pVM, pVCpu);
1217	AssertReleaseFailed();
1218	return VERR_NOT_SUPPORTED;
1219	#else
1220	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1221
1222	int rc;
1223	do
1224	{
1225	# ifdef NO_SUPCALLR0VMM
1226	rc = VERR_GENERAL_FAILURE;
1227	# else
1228	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1229	if (RT_LIKELY(rc == VINF_SUCCESS))
1230	rc = pVCpu->vmm.s.iLastGZRc;
1231	# endif
1232	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1233
1234	# if 0 /** @todo triggers too often */
1235	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1236	# endif
1237
1238	/*
1239	* Flush the logs
1240	*/
1241	# ifdef LOG_ENABLED
1242	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1243	# endif
1244	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1245	if (rc != VERR_VMM_RING0_ASSERTION)
1246	{
1247	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1248	return rc;
1249	}
1250	return vmmR3HandleRing0Assert(pVM, pVCpu);
1251	#endif
1252	}
1253
1254
1255	/**
1256	* Perform one of the fast I/O control VMMR0 operation.
1257	*
1258	* @returns VBox strict status code.
1259	* @param pVM The cross context VM structure.
1260	* @param pVCpu The cross context virtual CPU structure.
1261	* @param enmOperation The operation to perform.
1262	*/
1263	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1264	{
1265	VBOXSTRICTRC rcStrict;
1266	do
1267	{
1268	#ifdef NO_SUPCALLR0VMM
1269	rcStrict = VERR_GENERAL_FAILURE;
1270	#else
1271	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1272	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1273	rcStrict = pVCpu->vmm.s.iLastGZRc;
1274	#endif
1275	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1276
1277	/*
1278	* Flush the logs
1279	*/
1280	#ifdef LOG_ENABLED
1281	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1282	#endif
1283	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1284	if (rcStrict != VERR_VMM_RING0_ASSERTION)
1285	return rcStrict;
1286	return vmmR3HandleRing0Assert(pVM, pVCpu);
1287	}
1288
1289
1290	/**
1291	* VCPU worker for VMMR3SendStartupIpi.
1292	*
1293	* @param pVM The cross context VM structure.
1294	* @param idCpu Virtual CPU to perform SIPI on.
1295	* @param uVector The SIPI vector.
1296	*/
1297	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1298	{
1299	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1300	VMCPU_ASSERT_EMT(pVCpu);
1301
1302	/*
1303	* In the INIT state, the target CPU is only responsive to an SIPI.
1304	* This is also true for when when the CPU is in VMX non-root mode.
1305	*
1306	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1307	* See Intel spec. 26.6.2 "Activity State".
1308	*/
1309	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1310	return VINF_SUCCESS;
1311
1312	#if defined(VBOX_VMM_TARGET_ARMV8)
1313	AssertReleaseFailed(); /** @todo */
1314	#else
1315	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1316	# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1317	if (CPUMIsGuestInVmxRootMode(pCtx))
1318	{
1319	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1320	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1321	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1322
1323	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1324	return VINF_SUCCESS;
1325	}
1326	# endif
1327
1328	pCtx->cs.Sel = uVector << 8;
1329	pCtx->cs.ValidSel = uVector << 8;
1330	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1331	pCtx->cs.u64Base = uVector << 12;
1332	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1333	pCtx->rip = 0;
1334	#endif
1335
1336	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1337
1338	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1339	EMSetState(pVCpu, EMSTATE_HALTED);
1340	return VINF_EM_RESCHEDULE;
1341	# else /* And if we go the VMCPU::enmState way it can stay here. */
1342	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1343	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1344	return VINF_SUCCESS;
1345	# endif
1346	}
1347
1348
1349	/**
1350	* VCPU worker for VMMR3SendInitIpi.
1351	*
1352	* @returns VBox status code.
1353	* @param pVM The cross context VM structure.
1354	* @param idCpu Virtual CPU to perform SIPI on.
1355	*/
1356	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1357	{
1358	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1359	VMCPU_ASSERT_EMT(pVCpu);
1360
1361	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1362
1363	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1364	* wait-for-SIPI state. Verify. */
1365
1366	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1367	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1368	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1369	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1370	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1371	#endif
1372
1373	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1374	* IPI (e.g. SVM_EXIT_INIT). */
1375
1376	PGMR3ResetCpu(pVM, pVCpu);
1377	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1378	#if !defined(VBOX_VMM_TARGET_ARMV8)
1379	APICR3InitIpi(pVCpu);
1380	#endif
1381	TRPMR3ResetCpu(pVCpu);
1382	CPUMR3ResetCpu(pVM, pVCpu);
1383	EMR3ResetCpu(pVCpu);
1384	HMR3ResetCpu(pVCpu);
1385	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1386
1387	/* This will trickle up on the target EMT. */
1388	return VINF_EM_WAIT_SIPI;
1389	}
1390
1391
1392	/**
1393	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1394	* vector-dependent state and unhalting processor.
1395	*
1396	* @param pVM The cross context VM structure.
1397	* @param idCpu Virtual CPU to perform SIPI on.
1398	* @param uVector SIPI vector.
1399	*/
1400	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1401	{
1402	AssertReturnVoid(idCpu < pVM->cCpus);
1403
1404	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1405	AssertRC(rc);
1406	}
1407
1408
1409	/**
1410	* Sends init IPI to the virtual CPU.
1411	*
1412	* @param pVM The cross context VM structure.
1413	* @param idCpu Virtual CPU to perform int IPI on.
1414	*/
1415	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1416	{
1417	AssertReturnVoid(idCpu < pVM->cCpus);
1418
1419	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1420	AssertRC(rc);
1421	}
1422
1423
1424	/**
1425	* Registers the guest memory range that can be used for patching.
1426	*
1427	* @returns VBox status code.
1428	* @param pVM The cross context VM structure.
1429	* @param pPatchMem Patch memory range.
1430	* @param cbPatchMem Size of the memory range.
1431	*/
1432	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1433	{
1434	VM_ASSERT_EMT(pVM);
1435	if (HMIsEnabled(pVM))
1436	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1437
1438	return VERR_NOT_SUPPORTED;
1439	}
1440
1441
1442	/**
1443	* Deregisters the guest memory range that can be used for patching.
1444	*
1445	* @returns VBox status code.
1446	* @param pVM The cross context VM structure.
1447	* @param pPatchMem Patch memory range.
1448	* @param cbPatchMem Size of the memory range.
1449	*/
1450	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1451	{
1452	if (HMIsEnabled(pVM))
1453	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1454
1455	return VINF_SUCCESS;
1456	}
1457
1458
1459	/**
1460	* Common recursion handler for the other EMTs.
1461	*
1462	* @returns Strict VBox status code.
1463	* @param pVM The cross context VM structure.
1464	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1465	* @param rcStrict Current status code to be combined with the one
1466	* from this recursion and returned.
1467	*/
1468	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1469	{
1470	int rc2;
1471
1472	/*
1473	* We wait here while the initiator of this recursion reconfigures
1474	* everything. The last EMT to get in signals the initiator.
1475	*/
1476	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1477	{
1478	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1479	AssertLogRelRC(rc2);
1480	}
1481
1482	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1483	AssertLogRelRC(rc2);
1484
1485	/*
1486	* Do the normal rendezvous processing.
1487	*/
1488	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1489	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1490
1491	/*
1492	* Wait for the initiator to restore everything.
1493	*/
1494	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1495	AssertLogRelRC(rc2);
1496
1497	/*
1498	* Last thread out of here signals the initiator.
1499	*/
1500	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1501	{
1502	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1503	AssertLogRelRC(rc2);
1504	}
1505
1506	/*
1507	* Merge status codes and return.
1508	*/
1509	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1510	if ( rcStrict2 != VINF_SUCCESS
1511	&& ( rcStrict == VINF_SUCCESS
1512	\|\| rcStrict > rcStrict2))
1513	rcStrict = rcStrict2;
1514	return rcStrict;
1515	}
1516
1517
1518	/**
1519	* Count returns and have the last non-caller EMT wake up the caller.
1520	*
1521	* @returns VBox strict informational status code for EM scheduling. No failures
1522	* will be returned here, those are for the caller only.
1523	*
1524	* @param pVM The cross context VM structure.
1525	* @param rcStrict The current accumulated recursive status code,
1526	* to be merged with i32RendezvousStatus and
1527	* returned.
1528	*/
1529	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1530	{
1531	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1532
1533	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1534	if (cReturned == pVM->cCpus - 1U)
1535	{
1536	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1537	AssertLogRelRC(rc);
1538	}
1539
1540	/*
1541	* Merge the status codes, ignoring error statuses in this code path.
1542	*/
1543	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1544	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1545	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1546	VERR_IPE_UNEXPECTED_INFO_STATUS);
1547
1548	if (RT_SUCCESS(rcStrict2))
1549	{
1550	if ( rcStrict2 != VINF_SUCCESS
1551	&& ( rcStrict == VINF_SUCCESS
1552	\|\| rcStrict > rcStrict2))
1553	rcStrict = rcStrict2;
1554	}
1555	return rcStrict;
1556	}
1557
1558
1559	/**
1560	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1561	*
1562	* @returns VBox strict informational status code for EM scheduling. No failures
1563	* will be returned here, those are for the caller only. When
1564	* fIsCaller is set, VINF_SUCCESS is always returned.
1565	*
1566	* @param pVM The cross context VM structure.
1567	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1568	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1569	* not.
1570	* @param fFlags The flags.
1571	* @param pfnRendezvous The callback.
1572	* @param pvUser The user argument for the callback.
1573	*/
1574	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1575	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1576	{
1577	int rc;
1578	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1579
1580	/*
1581	* Enter, the last EMT triggers the next callback phase.
1582	*/
1583	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1584	if (cEntered != pVM->cCpus)
1585	{
1586	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1587	{
1588	/* Wait for our turn. */
1589	for (;;)
1590	{
1591	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1592	AssertLogRelRC(rc);
1593	if (!pVM->vmm.s.fRendezvousRecursion)
1594	break;
1595	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1596	}
1597	}
1598	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1599	{
1600	/* Wait for the last EMT to arrive and wake everyone up. */
1601	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1602	AssertLogRelRC(rc);
1603	Assert(!pVM->vmm.s.fRendezvousRecursion);
1604	}
1605	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1606	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1607	{
1608	/* Wait for our turn. */
1609	for (;;)
1610	{
1611	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1612	AssertLogRelRC(rc);
1613	if (!pVM->vmm.s.fRendezvousRecursion)
1614	break;
1615	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1616	}
1617	}
1618	else
1619	{
1620	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1621
1622	/*
1623	* The execute once is handled specially to optimize the code flow.
1624	*
1625	* The last EMT to arrive will perform the callback and the other
1626	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1627	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1628	* returns, that EMT will initiate the normal return sequence.
1629	*/
1630	if (!fIsCaller)
1631	{
1632	for (;;)
1633	{
1634	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1635	AssertLogRelRC(rc);
1636	if (!pVM->vmm.s.fRendezvousRecursion)
1637	break;
1638	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1639	}
1640
1641	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1642	}
1643	return VINF_SUCCESS;
1644	}
1645	}
1646	else
1647	{
1648	/*
1649	* All EMTs are waiting, clear the FF and take action according to the
1650	* execution method.
1651	*/
1652	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1653
1654	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1655	{
1656	/* Wake up everyone. */
1657	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1658	AssertLogRelRC(rc);
1659	}
1660	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1661	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1662	{
1663	/* Figure out who to wake up and wake it up. If it's ourself, then
1664	it's easy otherwise wait for our turn. */
1665	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1666	? 0
1667	: pVM->cCpus - 1U;
1668	if (pVCpu->idCpu != iFirst)
1669	{
1670	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1671	AssertLogRelRC(rc);
1672	for (;;)
1673	{
1674	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1675	AssertLogRelRC(rc);
1676	if (!pVM->vmm.s.fRendezvousRecursion)
1677	break;
1678	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1679	}
1680	}
1681	}
1682	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1683	}
1684
1685
1686	/*
1687	* Do the callback and update the status if necessary.
1688	*/
1689	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1690	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1691	{
1692	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1693	if (rcStrict2 != VINF_SUCCESS)
1694	{
1695	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1696	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1697	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1698	int32_t i32RendezvousStatus;
1699	do
1700	{
1701	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1702	if ( rcStrict2 == i32RendezvousStatus
1703	\|\| RT_FAILURE(i32RendezvousStatus)
1704	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1705	&& rcStrict2 > i32RendezvousStatus))
1706	break;
1707	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1708	}
1709	}
1710
1711	/*
1712	* Increment the done counter and take action depending on whether we're
1713	* the last to finish callback execution.
1714	*/
1715	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1716	if ( cDone != pVM->cCpus
1717	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1718	{
1719	/* Signal the next EMT? */
1720	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1721	{
1722	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1723	AssertLogRelRC(rc);
1724	}
1725	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1726	{
1727	Assert(cDone == pVCpu->idCpu + 1U);
1728	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1729	AssertLogRelRC(rc);
1730	}
1731	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1732	{
1733	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1734	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1735	AssertLogRelRC(rc);
1736	}
1737
1738	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1739	if (!fIsCaller)
1740	{
1741	for (;;)
1742	{
1743	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1744	AssertLogRelRC(rc);
1745	if (!pVM->vmm.s.fRendezvousRecursion)
1746	break;
1747	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1748	}
1749	}
1750	}
1751	else
1752	{
1753	/* Callback execution is all done, tell the rest to return. */
1754	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1755	AssertLogRelRC(rc);
1756	}
1757
1758	if (!fIsCaller)
1759	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1760	return rcStrictRecursion;
1761	}
1762
1763
1764	/**
1765	* Called in response to VM_FF_EMT_RENDEZVOUS.
1766	*
1767	* @returns VBox strict status code - EM scheduling. No errors will be returned
1768	* here, nor will any non-EM scheduling status codes be returned.
1769	*
1770	* @param pVM The cross context VM structure.
1771	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1772	*
1773	* @thread EMT
1774	*/
1775	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1776	{
1777	Assert(!pVCpu->vmm.s.fInRendezvous);
1778	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1779	pVCpu->vmm.s.fInRendezvous = true;
1780	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1781	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1782	pVCpu->vmm.s.fInRendezvous = false;
1783	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1784	return VBOXSTRICTRC_TODO(rcStrict);
1785	}
1786
1787
1788	/**
1789	* Helper for resetting an single wakeup event sempahore.
1790	*
1791	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1792	* @param hEvt The event semaphore to reset.
1793	*/
1794	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1795	{
1796	for (uint32_t cLoops = 0; ; cLoops++)
1797	{
1798	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1799	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1800	return rc;
1801	}
1802	}
1803
1804
1805	/**
1806	* Worker for VMMR3EmtRendezvous that handles recursion.
1807	*
1808	* @returns VBox strict status code. This will be the first error,
1809	* VINF_SUCCESS, or an EM scheduling status code.
1810	*
1811	* @param pVM The cross context VM structure.
1812	* @param pVCpu The cross context virtual CPU structure of the
1813	* calling EMT.
1814	* @param fFlags Flags indicating execution methods. See
1815	* grp_VMMR3EmtRendezvous_fFlags.
1816	* @param pfnRendezvous The callback.
1817	* @param pvUser User argument for the callback.
1818	*
1819	* @thread EMT(pVCpu)
1820	*/
1821	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1822	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1823	{
1824	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1825	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1826	Assert(pVCpu->vmm.s.fInRendezvous);
1827
1828	/*
1829	* Save the current state.
1830	*/
1831	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1832	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1833	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1834	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1835	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1836
1837	/*
1838	* Check preconditions and save the current state.
1839	*/
1840	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1841	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1842	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1843	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1844	VERR_INTERNAL_ERROR);
1845	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1846	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1847
1848	/*
1849	* Reset the recursion prep and pop semaphores.
1850	*/
1851	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1852	AssertLogRelRCReturn(rc, rc);
1853	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1854	AssertLogRelRCReturn(rc, rc);
1855	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1856	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1857	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1858	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1859
1860	/*
1861	* Usher the other thread into the recursion routine.
1862	*/
1863	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1864	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1865
1866	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1867	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1868	while (cLeft-- > 0)
1869	{
1870	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1871	AssertLogRelRC(rc);
1872	}
1873	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1874	{
1875	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1876	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1877	{
1878	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1879	AssertLogRelRC(rc);
1880	}
1881	}
1882	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1883	{
1884	Assert(cLeft == pVCpu->idCpu);
1885	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1886	{
1887	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1888	AssertLogRelRC(rc);
1889	}
1890	}
1891	else
1892	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1893	VERR_INTERNAL_ERROR_4);
1894
1895	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1896	AssertLogRelRC(rc);
1897	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1898	AssertLogRelRC(rc);
1899
1900
1901	/*
1902	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1903	*/
1904	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1905	{
1906	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1907	AssertLogRelRC(rc);
1908	}
1909
1910	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1911
1912	/*
1913	* Clear the slate and setup the new rendezvous.
1914	*/
1915	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1916	{
1917	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1918	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1919	}
1920	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1921	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1922	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1923	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1924
1925	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1926	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1927	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1928	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1929	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1930	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1931	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1932	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1933
1934	/*
1935	* We're ready to go now, do normal rendezvous processing.
1936	*/
1937	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1938	AssertLogRelRC(rc);
1939
1940	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1941
1942	/*
1943	* The caller waits for the other EMTs to be done, return and waiting on the
1944	* pop semaphore.
1945	*/
1946	for (;;)
1947	{
1948	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1949	AssertLogRelRC(rc);
1950	if (!pVM->vmm.s.fRendezvousRecursion)
1951	break;
1952	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1953	}
1954
1955	/*
1956	* Get the return code and merge it with the above recursion status.
1957	*/
1958	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1959	if ( rcStrict2 != VINF_SUCCESS
1960	&& ( rcStrict == VINF_SUCCESS
1961	\|\| rcStrict > rcStrict2))
1962	rcStrict = rcStrict2;
1963
1964	/*
1965	* Restore the parent rendezvous state.
1966	*/
1967	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1968	{
1969	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1970	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1971	}
1972	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1973	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1974	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1975	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1976
1977	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1978	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1979	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1980	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1981	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1982	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1983	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1984
1985	/*
1986	* Usher the other EMTs back to their parent recursion routine, waiting
1987	* for them to all get there before we return (makes sure they've been
1988	* scheduled and are past the pop event sem, see below).
1989	*/
1990	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1991	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1992	AssertLogRelRC(rc);
1993
1994	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1995	{
1996	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1997	AssertLogRelRC(rc);
1998	}
1999
2000	/*
2001	* We must reset the pop semaphore on the way out (doing the pop caller too,
2002	* just in case). The parent may be another recursion.
2003	*/
2004	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2005	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2006
2007	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2008
2009	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2010	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2011	return rcStrict;
2012	}
2013
2014
2015	/**
2016	* EMT rendezvous.
2017	*
2018	* Gathers all the EMTs and execute some code on each of them, either in a one
2019	* by one fashion or all at once.
2020	*
2021	* @returns VBox strict status code. This will be the first error,
2022	* VINF_SUCCESS, or an EM scheduling status code.
2023	*
2024	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2025	* doesn't support it or if the recursion is too deep.
2026	*
2027	* @param pVM The cross context VM structure.
2028	* @param fFlags Flags indicating execution methods. See
2029	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2030	* descending and ascending rendezvous types support
2031	* recursion from inside @a pfnRendezvous.
2032	* @param pfnRendezvous The callback.
2033	* @param pvUser User argument for the callback.
2034	*
2035	* @thread Any.
2036	*/
2037	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2038	{
2039	/*
2040	* Validate input.
2041	*/
2042	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2043	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2044	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2045	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2046	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2047	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2048	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2049	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2050
2051	VBOXSTRICTRC rcStrict;
2052	PVMCPU pVCpu = VMMGetCpu(pVM);
2053	if (!pVCpu)
2054	{
2055	/*
2056	* Forward the request to an EMT thread.
2057	*/
2058	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2059	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2060	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2061	else
2062	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2063	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2064	}
2065	else if ( pVM->cCpus == 1
2066	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2067	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2068	{
2069	/*
2070	* Shortcut for the single EMT case.
2071	*
2072	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2073	* during vmR3Destroy after other emulation threads have started terminating.
2074	*/
2075	if (!pVCpu->vmm.s.fInRendezvous)
2076	{
2077	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2078	pVCpu->vmm.s.fInRendezvous = true;
2079	pVM->vmm.s.fRendezvousFlags = fFlags;
2080	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2081	pVCpu->vmm.s.fInRendezvous = false;
2082	}
2083	else
2084	{
2085	/* Recursion. Do the same checks as in the SMP case. */
2086	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2087	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2088	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2089	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2090	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2091	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2092	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2093	, VERR_DEADLOCK);
2094
2095	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2096	pVM->vmm.s.cRendezvousRecursions++;
2097	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2098	pVM->vmm.s.fRendezvousFlags = fFlags;
2099
2100	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2101
2102	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2103	pVM->vmm.s.cRendezvousRecursions--;
2104	}
2105	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2106	}
2107	else
2108	{
2109	/*
2110	* Spin lock. If busy, check for recursion, if not recursing wait for
2111	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2112	*/
2113	int rc;
2114	rcStrict = VINF_SUCCESS;
2115	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2116	{
2117	/* Allow recursion in some cases. */
2118	if ( pVCpu->vmm.s.fInRendezvous
2119	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2120	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2121	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2122	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2123	))
2124	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2125
2126	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2127	VERR_DEADLOCK);
2128
2129	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2130	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2131	{
2132	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2133	{
2134	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2135	if ( rc != VINF_SUCCESS
2136	&& ( rcStrict == VINF_SUCCESS
2137	\|\| rcStrict > rc))
2138	rcStrict = rc;
2139	/** @todo Perhaps deal with termination here? */
2140	}
2141	ASMNopPause();
2142	}
2143	}
2144
2145	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2146	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2147	Assert(!pVCpu->vmm.s.fInRendezvous);
2148	pVCpu->vmm.s.fInRendezvous = true;
2149
2150	/*
2151	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2152	*/
2153	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2154	{
2155	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2156	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2157	}
2158	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2159	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2160	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2161	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2162	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2163	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2164	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2165	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2166	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2167	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2168	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2169
2170	/*
2171	* Set the FF and poke the other EMTs.
2172	*/
2173	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2174	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2175
2176	/*
2177	* Do the same ourselves.
2178	*/
2179	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2180
2181	/*
2182	* The caller waits for the other EMTs to be done and return before doing
2183	* the cleanup. This makes away with wakeup / reset races we would otherwise
2184	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2185	*/
2186	for (;;)
2187	{
2188	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2189	AssertLogRelRC(rc);
2190	if (!pVM->vmm.s.fRendezvousRecursion)
2191	break;
2192	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2193	}
2194
2195	/*
2196	* Get the return code and clean up a little bit.
2197	*/
2198	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2199	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2200
2201	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2202	pVCpu->vmm.s.fInRendezvous = false;
2203
2204	/*
2205	* Merge rcStrict, rcStrict2 and rcStrict3.
2206	*/
2207	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2208	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2209	if ( rcStrict2 != VINF_SUCCESS
2210	&& ( rcStrict == VINF_SUCCESS
2211	\|\| rcStrict > rcStrict2))
2212	rcStrict = rcStrict2;
2213	if ( rcStrict3 != VINF_SUCCESS
2214	&& ( rcStrict == VINF_SUCCESS
2215	\|\| rcStrict > rcStrict3))
2216	rcStrict = rcStrict3;
2217	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2218	}
2219
2220	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2221	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2222	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2223	VERR_IPE_UNEXPECTED_INFO_STATUS);
2224	return VBOXSTRICTRC_VAL(rcStrict);
2225	}
2226
2227
2228	/**
2229	* Interface for vmR3SetHaltMethodU.
2230	*
2231	* @param pVCpu The cross context virtual CPU structure of the
2232	* calling EMT.
2233	* @param fMayHaltInRing0 The new state.
2234	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2235	* @thread EMT(pVCpu)
2236	*
2237	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2238	* component.
2239	*/
2240	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2241	{
2242	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2243	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2244	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2245	}
2246
2247
2248	/**
2249	* Read from the ring 0 jump buffer stack.
2250	*
2251	* @returns VBox status code.
2252	*
2253	* @param pVM The cross context VM structure.
2254	* @param idCpu The ID of the source CPU context (for the address).
2255	* @param R0Addr Where to start reading.
2256	* @param pvBuf Where to store the data we've read.
2257	* @param cbRead The number of bytes to read.
2258	*/
2259	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2260	{
2261	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2262	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2263	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2264
2265	/*
2266	* Hopefully we've got all the requested bits. If not supply what we
2267	* can and zero the remaining stuff.
2268	*/
2269	RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2270	if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2271	{
2272	size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2273	if (cbRead <= cbValid)
2274	{
2275	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2276	return VINF_SUCCESS;
2277	}
2278
2279	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2280	RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2281	}
2282	else
2283	RT_BZERO(pvBuf, cbRead);
2284
2285	/*
2286	* Supply the setjmp return RIP/EIP if requested.
2287	*/
2288	if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2289	&& pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2290	{
2291	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2292	size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2293	size_t offDst = 0;
2294	if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2295	offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2296	else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2297	{
2298	size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2299	Assert(offSrc < cbSrc);
2300	pbSrc -= offSrc;
2301	cbSrc -= offSrc;
2302	}
2303	if (cbSrc > cbRead - offDst)
2304	cbSrc = cbRead - offDst;
2305	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2306
2307	//if (cbSrc == cbRead)
2308	// rc = VINF_SUCCESS;
2309	}
2310
2311	return VINF_SUCCESS;
2312	}
2313
2314
2315	/**
2316	* Used by the DBGF stack unwinder to initialize the register state.
2317	*
2318	* @param pUVM The user mode VM handle.
2319	* @param idCpu The ID of the CPU being unwound.
2320	* @param pState The unwind state to initialize.
2321	*/
2322	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2323	{
2324	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2325	AssertReturnVoid(pVCpu);
2326
2327	/*
2328	* This is all we really need here if we had proper unwind info (win64 only)...
2329	*/
2330	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2331	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2332	pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2333
2334	/*
2335	* Locate the resume point on the stack.
2336	*/
2337	#ifdef RT_ARCH_AMD64
2338	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2339	uintptr_t off = 0;
2340	# ifdef RT_OS_WINDOWS
2341	off += 0xa0; /* XMM6 thru XMM15 */
2342	# endif
2343	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2344	off += 8;
2345	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2346	off += 8;
2347	# ifdef RT_OS_WINDOWS
2348	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2349	off += 8;
2350	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2351	off += 8;
2352	# endif
2353	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2354	off += 8;
2355	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2356	off += 8;
2357	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2358	off += 8;
2359	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2360	off += 8;
2361	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2362	off += 8;
2363	pState->uPc = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2364	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2365
2366	#elif defined(RT_ARCH_X86)
2367	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2368	uintptr_t off = 0;
2369	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2370	off += 4;
2371	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2372	off += 4;
2373	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2374	off += 4;
2375	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2376	off += 4;
2377	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2378	off += 4;
2379	pState->uPc = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2380	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2381
2382	#elif defined(RT_ARCH_ARM64)
2383	/** @todo PORTME: arm ring-0 */
2384
2385	#else
2386	# error "Port me"
2387	#endif
2388	}
2389
2390
2391	/**
2392	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2393	*
2394	* @returns VBox status code.
2395	* @param pVM The cross context VM structure.
2396	* @param uOperation Operation to execute.
2397	* @param u64Arg Constant argument.
2398	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2399	* details.
2400	*/
2401	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2402	{
2403	PVMCPU pVCpu = VMMGetCpu(pVM);
2404	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2405	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2406	}
2407
2408
2409	/**
2410	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2411	*
2412	* @returns VBox status code.
2413	* @param pVM The cross context VM structure.
2414	* @param pVCpu The cross context VM structure.
2415	* @param enmOperation Operation to execute.
2416	* @param u64Arg Constant argument.
2417	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2418	* details.
2419	*/
2420	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2421	{
2422	/*
2423	* Call ring-0.
2424	*/
2425	#ifdef NO_SUPCALLR0VMM
2426	int rc = VERR_GENERAL_FAILURE;
2427	#else
2428	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2429	#endif
2430
2431	/*
2432	* Flush the logs and deal with ring-0 assertions.
2433	*/
2434	#ifdef LOG_ENABLED
2435	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2436	#endif
2437	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2438	if (rc != VERR_VMM_RING0_ASSERTION)
2439	{
2440	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2441	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2442	VERR_IPE_UNEXPECTED_INFO_STATUS);
2443	return rc;
2444	}
2445	return vmmR3HandleRing0Assert(pVM, pVCpu);
2446	}
2447
2448
2449	/**
2450	* Logs a ring-0 assertion ASAP after returning to ring-3.
2451	*
2452	* @returns VBox status code.
2453	* @param pVM The cross context VM structure.
2454	* @param pVCpu The cross context virtual CPU structure.
2455	*/
2456	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2457	{
2458	RT_NOREF(pVCpu);
2459	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2460	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2461	return VERR_VMM_RING0_ASSERTION;
2462	}
2463
2464
2465	/**
2466	* Displays the Force action Flags.
2467	*
2468	* @param pVM The cross context VM structure.
2469	* @param pHlp The output helpers.
2470	* @param pszArgs The additional arguments (ignored).
2471	*/
2472	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2473	{
2474	int c;
2475	uint32_t f;
2476	NOREF(pszArgs);
2477
2478	#define PRINT_FLAG(prf,flag) do { \
2479	if (f & (prf##flag)) \
2480	{ \
2481	static const char *s_psz = #flag; \
2482	if (!(c % 6)) \
2483	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2484	else \
2485	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2486	c++; \
2487	f &= ~(prf##flag); \
2488	} \
2489	} while (0)
2490
2491	#define PRINT_GROUP(prf,grp,sfx) do { \
2492	if (f & (prf##grp##sfx)) \
2493	{ \
2494	static const char *s_psz = #grp; \
2495	if (!(c % 5)) \
2496	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2497	else \
2498	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2499	c++; \
2500	} \
2501	} while (0)
2502
2503	/*
2504	* The global flags.
2505	*/
2506	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2507	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2508
2509	/* show the flag mnemonics */
2510	c = 0;
2511	f = fGlobalForcedActions;
2512	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2513	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2514	PRINT_FLAG(VM_FF_,PDM_DMA);
2515	PRINT_FLAG(VM_FF_,DBGF);
2516	PRINT_FLAG(VM_FF_,REQUEST);
2517	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2518	PRINT_FLAG(VM_FF_,RESET);
2519	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2520	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2521	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2522	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2523	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2524	if (f)
2525	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2526	else
2527	pHlp->pfnPrintf(pHlp, "\n");
2528
2529	/* the groups */
2530	c = 0;
2531	f = fGlobalForcedActions;
2532	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2533	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2534	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2535	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2536	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2537	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2538	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2539	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2540	if (c)
2541	pHlp->pfnPrintf(pHlp, "\n");
2542
2543	/*
2544	* Per CPU flags.
2545	*/
2546	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2547	{
2548	PVMCPU pVCpu = pVM->apCpusR3[i];
2549	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2550	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2551
2552	/* show the flag mnemonics */
2553	c = 0;
2554	f = fLocalForcedActions;
2555	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2556	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2557	PRINT_FLAG(VMCPU_FF_,TIMER);
2558	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2559	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2560	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2561	PRINT_FLAG(VMCPU_FF_,UNHALT);
2562	PRINT_FLAG(VMCPU_FF_,IEM);
2563	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2564	PRINT_FLAG(VMCPU_FF_,DBGF);
2565	PRINT_FLAG(VMCPU_FF_,REQUEST);
2566	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2567	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2568	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2569	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2570	PRINT_FLAG(VMCPU_FF_,TO_R3);
2571	PRINT_FLAG(VMCPU_FF_,IOM);
2572	if (f)
2573	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2574	else
2575	pHlp->pfnPrintf(pHlp, "\n");
2576
2577	/* the groups */
2578	c = 0;
2579	f = fLocalForcedActions;
2580	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2581	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2582	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2583	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2584	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2585	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2586	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2587	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2588	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2589	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2590	if (c)
2591	pHlp->pfnPrintf(pHlp, "\n");
2592	}
2593
2594	#undef PRINT_FLAG
2595	#undef PRINT_GROUP
2596	}
2597

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 99210

Download in other formats: