VMMTests.cpp@ 48235

Last change on this file since 48235 was 47843, checked in by vboxsync, 11 years ago
tstVMM: No double fault test for me either.
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1	/* $Id: VMMTests.cpp 47843 2013-08-19 14:03:11Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core, Tests.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23	#define LOG_GROUP LOG_GROUP_VMM
24	#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/pdmapi.h>
27	#include <VBox/vmm/cpum.h>
28	#include <VBox/dbg.h>
29	#include <VBox/vmm/hm.h>
30	#include <VBox/vmm/mm.h>
31	#include <VBox/vmm/trpm.h>
32	#include <VBox/vmm/selm.h>
33	#include "VMMInternal.h"
34	#include <VBox/vmm/vm.h>
35	#include <VBox/err.h>
36	#include <VBox/param.h>
37
38	#include <iprt/assert.h>
39	#include <iprt/asm.h>
40	#include <iprt/time.h>
41	#include <iprt/stream.h>
42	#include <iprt/string.h>
43	#include <iprt/x86.h>
44
45	static void vmmR3TestClearStack(PVMCPU pVCpu)
46	{
47	/* We leave the first 64 bytes of the stack alone because of strict
48	ring-0 long jump code uses it. */
49	memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);
50	}
51
52
53	#ifdef VBOX_WITH_RAW_MODE
54
55	/**
56	* Performs a testcase.
57	*
58	* @returns return value from the test.
59	* @param pVM Pointer to the VM.
60	* @param enmTestcase The testcase operation to perform.
61	* @param uVariation The testcase variation id.
62	*/
63	static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
64	{
65	PVMCPU pVCpu = &pVM->aCpus[0];
66
67	RTRCPTR RCPtrEP;
68	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
69	if (RT_FAILURE(rc))
70	return rc;
71
72	Log(("vmmR3DoGCTest: %d %#x\n", enmTestcase, uVariation));
73	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
74	vmmR3TestClearStack(pVCpu);
75	CPUMPushHyper(pVCpu, uVariation);
76	CPUMPushHyper(pVCpu, enmTestcase);
77	CPUMPushHyper(pVCpu, pVM->pVMRC);
78	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
79	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
80	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
81	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
82
83	#if 1
84	/* flush the raw-mode logs. */
85	# ifdef LOG_ENABLED
86	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
87	if ( pLogger
88	&& pLogger->offScratch > 0)
89	RTLogFlushRC(NULL, pLogger);
90	# endif
91	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
92	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
93	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
94	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
95	# endif
96	#endif
97
98	Log(("vmmR3DoGCTest: rc=%Rrc iLastGZRc=%Rrc\n", rc, pVCpu->vmm.s.iLastGZRc));
99	if (RT_LIKELY(rc == VINF_SUCCESS))
100	rc = pVCpu->vmm.s.iLastGZRc;
101	return rc;
102	}
103
104
105	/**
106	* Performs a trap test.
107	*
108	* @returns Return value from the trap test.
109	* @param pVM Pointer to the VM.
110	* @param u8Trap The trap number to test.
111	* @param uVariation The testcase variation.
112	* @param rcExpect The expected result.
113	* @param u32Eax The expected eax value.
114	* @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
115	* @param pszDesc The test description.
116	*/
117	static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char pszFaultEIP, const char pszDesc)
118	{
119	PVMCPU pVCpu = &pVM->aCpus[0];
120
121	RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
122
123	RTRCPTR RCPtrEP;
124	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
125	if (RT_FAILURE(rc))
126	return rc;
127
128	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
129	vmmR3TestClearStack(pVCpu);
130	CPUMPushHyper(pVCpu, uVariation);
131	CPUMPushHyper(pVCpu, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
132	CPUMPushHyper(pVCpu, pVM->pVMRC);
133	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
134	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
135	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
136	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
137	if (RT_LIKELY(rc == VINF_SUCCESS))
138	rc = pVCpu->vmm.s.iLastGZRc;
139	bool fDump = false;
140	if (rc != rcExpect)
141	{
142	RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
143	if (rc != VERR_NOT_IMPLEMENTED)
144	fDump = true;
145	}
146	else if ( rcExpect != VINF_SUCCESS
147	&& u8Trap != 8 /* double fault doesn't dare set TrapNo. */
148	&& u8Trap != 3 /* guest only, we're not in guest. */
149	&& u8Trap != 1 /* guest only, we're not in guest. */
150	&& u8Trap != TRPMGetTrapNo(pVCpu))
151	{
152	RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
153	fDump = true;
154	}
155	else if (pszFaultEIP)
156	{
157	RTRCPTR RCPtrFault;
158	int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
159	if (RT_FAILURE(rc2))
160	RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
161	else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))
162	{
163	RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);
164	fDump = true;
165	}
166	}
167	else if (rcExpect != VINF_SUCCESS)
168	{
169	if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))
170	RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));
171	if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))
172	RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));
173	if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))
174	RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));
175	if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))
176	RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));
177	if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))
178	RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));
179	if (CPUMGetHyperEDI(pVCpu) == 0x01234567)
180	RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);
181	if (CPUMGetHyperESI(pVCpu) == 0x42000042)
182	RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);
183	if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)
184	RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);
185	if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)
186	RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);
187	if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)
188	RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);
189	if (CPUMGetHyperEDX(pVCpu) == 0x77778888)
190	RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);
191	if (CPUMGetHyperEAX(pVCpu) == u32Eax)
192	RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);
193	}
194	if (fDump)
195	VMMR3FatalDump(pVM, pVCpu, rc);
196	return rc;
197	}
198
199	#endif /* VBOX_WITH_RAW_MODE */
200
201
202	/* execute the switch. */
203	VMMR3DECL(int) VMMDoTest(PVM pVM)
204	{
205	int rc = VINF_SUCCESS;
206
207	#ifdef VBOX_WITH_RAW_MODE
208	PVMCPU pVCpu = &pVM->aCpus[0];
209	PUVM pUVM = pVM->pUVM;
210
211	# ifdef NO_SUPCALLR0VMM
212	RTPrintf("NO_SUPCALLR0VMM\n");
213	return rc;
214	# endif
215
216	/*
217	* Setup stack for calling VMMGCEntry().
218	*/
219	RTRCPTR RCPtrEP;
220	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
221	if (RT_SUCCESS(rc))
222	{
223	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
224
225	/*
226	* Test various crashes which we must be able to recover from.
227	*/
228	vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
229	vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
230
231	# if 0//defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
232	vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
233	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
234	bool f;
235	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
236	# if !defined(DEBUG_bird)
237	if (RT_SUCCESS(rc) && f)
238	# endif
239	{
240	/* see triple fault warnings in SELM and VMMGC.cpp. */
241	vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
242	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
243	}
244	# endif
245
246	vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
247	///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
248	//vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
249
250	vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
251	vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
252	vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
253	/* This test is no longer relevant as fs and gs are loaded with NULL
254	selectors and we will always return to HC if a #GP occurs while
255	returning to guest code.
256	vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
257	*/
258
259	/*
260	* Set a debug register and perform a context switch.
261	*/
262	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
263	if (rc != VINF_SUCCESS)
264	{
265	RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
266	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
267	}
268
269	/* a harmless breakpoint */
270	RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
271	DBGFADDRESS Addr;
272	DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);
273	RTUINT iBp0;
274	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
275	AssertReleaseRC(rc);
276	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
277	if (rc != VINF_SUCCESS)
278	{
279	RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
280	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
281	}
282
283	/* a bad one at VMMGCEntry */
284	RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
285	DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);
286	RTUINT iBp1;
287	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
288	AssertReleaseRC(rc);
289	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
290	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
291	{
292	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
293	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
294	}
295
296	/* resume the breakpoint */
297	RTPrintf("VMM: resuming hyper after breakpoint\n");
298	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_RF);
299	rc = VMMR3ResumeHyper(pVM, pVCpu);
300	if (rc != VINF_SUCCESS)
301	{
302	RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
303	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
304	}
305
306	/* engage the breakpoint again and try single stepping. */
307	RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
308	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
309	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
310	{
311	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
312	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
313	}
314
315	RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
316	RTPrintf("%RGr=>", OldPc);
317	unsigned i;
318	for (i = 0; i < 8; i++)
319	{
320	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_TF \| X86_EFL_RF);
321	rc = VMMR3ResumeHyper(pVM, pVCpu);
322	if (rc != VINF_EM_DBG_HYPER_STEPPED)
323	{
324	RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
325	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
326	}
327	RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
328	RTPrintf("%RGr=>", Pc);
329	if (Pc == OldPc)
330	{
331	RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
332	return VERR_GENERAL_FAILURE;
333	}
334	OldPc = Pc;
335	}
336	RTPrintf("ok\n");
337
338	/* done, clear it */
339	if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))
340	\|\| RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))
341	{
342	RTPrintf("VMM: Failed to clear breakpoints!\n");
343	return VERR_GENERAL_FAILURE;
344	}
345	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
346	if (rc != VINF_SUCCESS)
347	{
348	RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
349	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
350	}
351
352	/*
353	* Interrupt masking. Failure may indiate NMI watchdog activity.
354	*/
355	RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
356	for (i = 0; i < 10000; i++)
357	{
358	uint64_t StartTick = ASMReadTSC();
359	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
360	if (rc != VINF_SUCCESS)
361	{
362	RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
363	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
364	}
365	uint64_t Ticks = ASMReadTSC() - StartTick;
366	if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
367	RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
368	}
369
370	/*
371	* Interrupt forwarding.
372	*/
373	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
374	CPUMPushHyper(pVCpu, 0);
375	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
376	CPUMPushHyper(pVCpu, pVM->pVMRC);
377	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
378	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
379	Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
380
381	/*
382	* Switch and do da thing.
383	*/
384	RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
385	i = 0;
386	uint64_t tsBegin = RTTimeNanoTS();
387	uint64_t TickStart = ASMReadTSC();
388	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
389	do
390	{
391	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
392	if (RT_LIKELY(rc == VINF_SUCCESS))
393	rc = pVCpu->vmm.s.iLastGZRc;
394	if (RT_FAILURE(rc))
395	{
396	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
397	VMMR3FatalDump(pVM, pVCpu, rc);
398	return rc;
399	}
400	i++;
401	if (!(i % 32))
402	Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
403	i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
404	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
405	uint64_t TickEnd = ASMReadTSC();
406	uint64_t tsEnd = RTTimeNanoTS();
407
408	uint64_t Elapsed = tsEnd - tsBegin;
409	uint64_t PerIteration = Elapsed / (uint64_t)i;
410	uint64_t cTicksElapsed = TickEnd - TickStart;
411	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
412
413	RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
414	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
415	Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
416	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
417
418	/*
419	* These forced actions are not necessary for the test and trigger breakpoints too.
420	*/
421	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
422	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
423
424	/*
425	* Profile switching.
426	*/
427	RTPrintf("VMM: profiling switcher...\n");
428	Log(("VMM: profiling switcher...\n"));
429	uint64_t TickMin = ~0;
430	tsBegin = RTTimeNanoTS();
431	TickStart = ASMReadTSC();
432	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
433	for (i = 0; i < 1000000; i++)
434	{
435	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
436	CPUMPushHyper(pVCpu, 0);
437	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
438	CPUMPushHyper(pVCpu, pVM->pVMRC);
439	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
440	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
441
442	uint64_t TickThisStart = ASMReadTSC();
443	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
444	if (RT_LIKELY(rc == VINF_SUCCESS))
445	rc = pVCpu->vmm.s.iLastGZRc;
446	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
447	if (RT_FAILURE(rc))
448	{
449	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
450	VMMR3FatalDump(pVM, pVCpu, rc);
451	return rc;
452	}
453	if (TickThisElapsed < TickMin)
454	TickMin = TickThisElapsed;
455	}
456	TickEnd = ASMReadTSC();
457	tsEnd = RTTimeNanoTS();
458
459	Elapsed = tsEnd - tsBegin;
460	PerIteration = Elapsed / (uint64_t)i;
461	cTicksElapsed = TickEnd - TickStart;
462	cTicksPerIteration = cTicksElapsed / (uint64_t)i;
463
464	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
465	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
466	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
467	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
468
469	rc = VINF_SUCCESS;
470	}
471	else
472	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
473	#endif
474	return rc;
475	}
476
477	#define SYNC_SEL(pHyperCtx, reg) \
478	if (pHyperCtx->reg.Sel) \
479	{ \
480	DBGFSELINFO selInfo; \
481	int rc2 = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg.Sel, &selInfo); \
482	AssertRC(rc2); \
483	\
484	pHyperCtx->reg.u64Base = selInfo.GCPtrBase; \
485	pHyperCtx->reg.u32Limit = selInfo.cbLimit; \
486	pHyperCtx->reg.Attr.n.u1Present = selInfo.u.Raw.Gen.u1Present; \
487	pHyperCtx->reg.Attr.n.u1DefBig = selInfo.u.Raw.Gen.u1DefBig; \
488	pHyperCtx->reg.Attr.n.u1Granularity = selInfo.u.Raw.Gen.u1Granularity; \
489	pHyperCtx->reg.Attr.n.u4Type = selInfo.u.Raw.Gen.u4Type; \
490	pHyperCtx->reg.Attr.n.u2Dpl = selInfo.u.Raw.Gen.u2Dpl; \
491	pHyperCtx->reg.Attr.n.u1DescType = selInfo.u.Raw.Gen.u1DescType; \
492	pHyperCtx->reg.Attr.n.u1Long = selInfo.u.Raw.Gen.u1Long; \
493	}
494
495	/* execute the switch. */
496	VMMR3DECL(int) VMMDoHmTest(PVM pVM)
497	{
498	uint32_t i;
499	int rc;
500	PCPUMCTX pHyperCtx, pGuestCtx;
501	RTGCPHYS CR3Phys = 0x0; /* fake address */
502	PVMCPU pVCpu = &pVM->aCpus[0];
503
504	if (!HMIsEnabled(pVM))
505	{
506	RTPrintf("VMM: Hardware accelerated test not available!\n");
507	return VERR_ACCESS_DENIED;
508	}
509
510	#ifdef VBOX_WITH_RAW_MODE
511	/*
512	* These forced actions are not necessary for the test and trigger breakpoints too.
513	*/
514	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
515	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
516	#endif
517
518	/* Enable mapping of the hypervisor into the shadow page table. */
519	uint32_t cb;
520	rc = PGMR3MappingsSize(pVM, &cb);
521	AssertRCReturn(rc, rc);
522
523	/* Pretend the mappings are now fixed; to force a refresh of the reserved PDEs. */
524	rc = PGMR3MappingsFix(pVM, MM_HYPER_AREA_ADDRESS, cb);
525	AssertRCReturn(rc, rc);
526
527	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
528
529	pHyperCtx->cr0 = X86_CR0_PE \| X86_CR0_WP \| X86_CR0_PG \| X86_CR0_TS \| X86_CR0_ET \| X86_CR0_NE \| X86_CR0_MP;
530	pHyperCtx->cr4 = X86_CR4_PGE \| X86_CR4_OSFSXR \| X86_CR4_OSXMMEEXCPT;
531	PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
532	PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
533
534	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
535	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
536	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
537	VM_FF_CLEAR(pVM, VM_FF_REQUEST);
538
539	/*
540	* Setup stack for calling VMMGCEntry().
541	*/
542	RTRCPTR RCPtrEP;
543	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
544	if (RT_SUCCESS(rc))
545	{
546	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
547
548	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
549
550	/* Fill in hidden selector registers for the hypervisor state. */
551	SYNC_SEL(pHyperCtx, cs);
552	SYNC_SEL(pHyperCtx, ds);
553	SYNC_SEL(pHyperCtx, es);
554	SYNC_SEL(pHyperCtx, fs);
555	SYNC_SEL(pHyperCtx, gs);
556	SYNC_SEL(pHyperCtx, ss);
557	SYNC_SEL(pHyperCtx, tr);
558
559	/*
560	* Profile switching.
561	*/
562	RTPrintf("VMM: profiling switcher...\n");
563	Log(("VMM: profiling switcher...\n"));
564	uint64_t TickMin = ~0;
565	uint64_t tsBegin = RTTimeNanoTS();
566	uint64_t TickStart = ASMReadTSC();
567	for (i = 0; i < 1000000; i++)
568	{
569	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
570	CPUMPushHyper(pVCpu, 0);
571	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HM_NOP);
572	CPUMPushHyper(pVCpu, pVM->pVMRC);
573	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
574	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
575
576	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
577	pGuestCtx = CPUMQueryGuestCtxPtr(pVCpu);
578
579	/* Copy the hypervisor context to make sure we have a valid guest context. */
580	pGuestCtx = pHyperCtx;
581	pGuestCtx->cr3 = CR3Phys;
582
583	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
584	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
585	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
586
587	uint64_t TickThisStart = ASMReadTSC();
588	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, 0);
589	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
590	if (RT_FAILURE(rc))
591	{
592	Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
593	VMMR3FatalDump(pVM, pVCpu, rc);
594	return rc;
595	}
596	if (TickThisElapsed < TickMin)
597	TickMin = TickThisElapsed;
598	}
599	uint64_t TickEnd = ASMReadTSC();
600	uint64_t tsEnd = RTTimeNanoTS();
601
602	uint64_t Elapsed = tsEnd - tsBegin;
603	uint64_t PerIteration = Elapsed / (uint64_t)i;
604	uint64_t cTicksElapsed = TickEnd - TickStart;
605	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
606
607	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
608	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
609	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
610	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
611
612	rc = VINF_SUCCESS;
613	}
614	else
615	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
616
617	return rc;
618	}
619

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMMTests.cpp@ 48235

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