VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMMTests.cpp@ 45745

Last change on this file since 45745 was 45618, checked in by vboxsync, 12 years ago

Do HMR3Init first in vmR3InitRing3 so the other components can skip raw-mode bits during init.

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1/* $Id: VMMTests.cpp 45618 2013-04-18 18:41:07Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core, Tests.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/*******************************************************************************
21* Header Files *
22*******************************************************************************/
23#define LOG_GROUP LOG_GROUP_VMM
24#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
25#include <VBox/vmm/vmm.h>
26#include <VBox/vmm/pdmapi.h>
27#include <VBox/vmm/cpum.h>
28#include <VBox/dbg.h>
29#include <VBox/vmm/hm.h>
30#include <VBox/vmm/mm.h>
31#include <VBox/vmm/trpm.h>
32#include <VBox/vmm/selm.h>
33#include "VMMInternal.h"
34#include <VBox/vmm/vm.h>
35#include <VBox/err.h>
36#include <VBox/param.h>
37
38#include <iprt/assert.h>
39#include <iprt/asm.h>
40#include <iprt/time.h>
41#include <iprt/stream.h>
42#include <iprt/string.h>
43#include <iprt/x86.h>
44
45static void vmmR3TestClearStack(PVMCPU pVCpu)
46{
47 /* We leave the first 64 bytes of the stack alone because of strict
48 ring-0 long jump code uses it. */
49 memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);
50}
51
52
53#ifdef VBOX_WITH_RAW_MODE
54
55/**
56 * Performs a testcase.
57 *
58 * @returns return value from the test.
59 * @param pVM Pointer to the VM.
60 * @param enmTestcase The testcase operation to perform.
61 * @param uVariation The testcase variation id.
62 */
63static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
64{
65 PVMCPU pVCpu = &pVM->aCpus[0];
66
67 RTRCPTR RCPtrEP;
68 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
69 if (RT_FAILURE(rc))
70 return rc;
71
72 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
73 vmmR3TestClearStack(pVCpu);
74 CPUMPushHyper(pVCpu, uVariation);
75 CPUMPushHyper(pVCpu, enmTestcase);
76 CPUMPushHyper(pVCpu, pVM->pVMRC);
77 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
78 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
79 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
80 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
81 if (RT_LIKELY(rc == VINF_SUCCESS))
82 rc = pVCpu->vmm.s.iLastGZRc;
83 return rc;
84}
85
86
87/**
88 * Performs a trap test.
89 *
90 * @returns Return value from the trap test.
91 * @param pVM Pointer to the VM.
92 * @param u8Trap The trap number to test.
93 * @param uVariation The testcase variation.
94 * @param rcExpect The expected result.
95 * @param u32Eax The expected eax value.
96 * @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
97 * @param pszDesc The test description.
98 */
99static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char *pszFaultEIP, const char *pszDesc)
100{
101 PVMCPU pVCpu = &pVM->aCpus[0];
102
103 RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
104
105 RTRCPTR RCPtrEP;
106 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
107 if (RT_FAILURE(rc))
108 return rc;
109
110 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
111 vmmR3TestClearStack(pVCpu);
112 CPUMPushHyper(pVCpu, uVariation);
113 CPUMPushHyper(pVCpu, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
114 CPUMPushHyper(pVCpu, pVM->pVMRC);
115 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
116 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
117 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
118 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
119 if (RT_LIKELY(rc == VINF_SUCCESS))
120 rc = pVCpu->vmm.s.iLastGZRc;
121 bool fDump = false;
122 if (rc != rcExpect)
123 {
124 RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
125 if (rc != VERR_NOT_IMPLEMENTED)
126 fDump = true;
127 }
128 else if ( rcExpect != VINF_SUCCESS
129 && u8Trap != 8 /* double fault doesn't dare set TrapNo. */
130 && u8Trap != 3 /* guest only, we're not in guest. */
131 && u8Trap != 1 /* guest only, we're not in guest. */
132 && u8Trap != TRPMGetTrapNo(pVCpu))
133 {
134 RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
135 fDump = true;
136 }
137 else if (pszFaultEIP)
138 {
139 RTRCPTR RCPtrFault;
140 int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
141 if (RT_FAILURE(rc2))
142 RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
143 else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))
144 {
145 RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);
146 fDump = true;
147 }
148 }
149 else if (rcExpect != VINF_SUCCESS)
150 {
151 if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))
152 RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));
153 if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))
154 RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));
155 if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))
156 RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));
157 if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))
158 RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));
159 if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))
160 RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));
161 if (CPUMGetHyperEDI(pVCpu) == 0x01234567)
162 RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);
163 if (CPUMGetHyperESI(pVCpu) == 0x42000042)
164 RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);
165 if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)
166 RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);
167 if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)
168 RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);
169 if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)
170 RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);
171 if (CPUMGetHyperEDX(pVCpu) == 0x77778888)
172 RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);
173 if (CPUMGetHyperEAX(pVCpu) == u32Eax)
174 RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);
175 }
176 if (fDump)
177 VMMR3FatalDump(pVM, pVCpu, rc);
178 return rc;
179}
180
181#endif /* VBOX_WITH_RAW_MODE */
182
183
184/* execute the switch. */
185VMMR3DECL(int) VMMDoTest(PVM pVM)
186{
187 int rc = VINF_SUCCESS;
188
189#ifdef VBOX_WITH_RAW_MODE
190 PVMCPU pVCpu = &pVM->aCpus[0];
191 PUVM pUVM = pVM->pUVM;
192
193# ifdef NO_SUPCALLR0VMM
194 RTPrintf("NO_SUPCALLR0VMM\n");
195 return rc;
196# endif
197
198 /*
199 * Setup stack for calling VMMGCEntry().
200 */
201 RTRCPTR RCPtrEP;
202 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
203 if (RT_SUCCESS(rc))
204 {
205 RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
206
207 /*
208 * Test various crashes which we must be able to recover from.
209 */
210 vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
211 vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
212
213# if defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
214 vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
215 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
216 bool f;
217 rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
218# if !defined(DEBUG_bird)
219 if (RT_SUCCESS(rc) && f)
220# endif
221 {
222 /* see triple fault warnings in SELM and VMMGC.cpp. */
223 vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
224 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
225 }
226# endif
227
228 vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
229 ///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
230 //vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
231
232 vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
233 vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
234 vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
235 /* This test is no longer relevant as fs and gs are loaded with NULL
236 selectors and we will always return to HC if a #GP occurs while
237 returning to guest code.
238 vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
239 */
240
241 /*
242 * Set a debug register and perform a context switch.
243 */
244 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
245 if (rc != VINF_SUCCESS)
246 {
247 RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
248 return rc;
249 }
250
251 /* a harmless breakpoint */
252 RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
253 DBGFADDRESS Addr;
254 DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);
255 RTUINT iBp0;
256 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
257 AssertReleaseRC(rc);
258 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
259 if (rc != VINF_SUCCESS)
260 {
261 RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
262 return rc;
263 }
264
265 /* a bad one at VMMGCEntry */
266 RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
267 DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);
268 RTUINT iBp1;
269 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
270 AssertReleaseRC(rc);
271 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
272 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
273 {
274 RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
275 return rc;
276 }
277
278 /* resume the breakpoint */
279 RTPrintf("VMM: resuming hyper after breakpoint\n");
280 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_RF);
281 rc = VMMR3ResumeHyper(pVM, pVCpu);
282 if (rc != VINF_SUCCESS)
283 {
284 RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
285 return rc;
286 }
287
288 /* engage the breakpoint again and try single stepping. */
289 RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
290 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
291 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
292 {
293 RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
294 return rc;
295 }
296
297 RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
298 RTPrintf("%RGr=>", OldPc);
299 unsigned i;
300 for (i = 0; i < 8; i++)
301 {
302 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);
303 rc = VMMR3ResumeHyper(pVM, pVCpu);
304 if (rc != VINF_EM_DBG_HYPER_STEPPED)
305 {
306 RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
307 return rc;
308 }
309 RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
310 RTPrintf("%RGr=>", Pc);
311 if (Pc == OldPc)
312 {
313 RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
314 return VERR_GENERAL_FAILURE;
315 }
316 OldPc = Pc;
317 }
318 RTPrintf("ok\n");
319
320 /* done, clear it */
321 if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))
322 || RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))
323 {
324 RTPrintf("VMM: Failed to clear breakpoints!\n");
325 return VERR_GENERAL_FAILURE;
326 }
327 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
328 if (rc != VINF_SUCCESS)
329 {
330 RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
331 return rc;
332 }
333
334 /*
335 * Interrupt masking.
336 */
337 RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
338 for (i = 0; i < 10000; i++)
339 {
340 uint64_t StartTick = ASMReadTSC();
341 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
342 if (rc != VINF_SUCCESS)
343 {
344 RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
345 return rc;
346 }
347 uint64_t Ticks = ASMReadTSC() - StartTick;
348 if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
349 RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
350 }
351
352 /*
353 * Interrupt forwarding.
354 */
355 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
356 CPUMPushHyper(pVCpu, 0);
357 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
358 CPUMPushHyper(pVCpu, pVM->pVMRC);
359 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
360 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
361 Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
362
363 /*
364 * Switch and do da thing.
365 */
366 RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
367 i = 0;
368 uint64_t tsBegin = RTTimeNanoTS();
369 uint64_t TickStart = ASMReadTSC();
370 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
371 do
372 {
373 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
374 if (RT_LIKELY(rc == VINF_SUCCESS))
375 rc = pVCpu->vmm.s.iLastGZRc;
376 if (RT_FAILURE(rc))
377 {
378 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
379 VMMR3FatalDump(pVM, pVCpu, rc);
380 return rc;
381 }
382 i++;
383 if (!(i % 32))
384 Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
385 i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
386 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
387 uint64_t TickEnd = ASMReadTSC();
388 uint64_t tsEnd = RTTimeNanoTS();
389
390 uint64_t Elapsed = tsEnd - tsBegin;
391 uint64_t PerIteration = Elapsed / (uint64_t)i;
392 uint64_t cTicksElapsed = TickEnd - TickStart;
393 uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
394
395 RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
396 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
397 Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
398 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
399
400 /*
401 * These forced actions are not necessary for the test and trigger breakpoints too.
402 */
403 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
404 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
405
406 /*
407 * Profile switching.
408 */
409 RTPrintf("VMM: profiling switcher...\n");
410 Log(("VMM: profiling switcher...\n"));
411 uint64_t TickMin = ~0;
412 tsBegin = RTTimeNanoTS();
413 TickStart = ASMReadTSC();
414 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
415 for (i = 0; i < 1000000; i++)
416 {
417 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
418 CPUMPushHyper(pVCpu, 0);
419 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
420 CPUMPushHyper(pVCpu, pVM->pVMRC);
421 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
422 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
423
424 uint64_t TickThisStart = ASMReadTSC();
425 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
426 if (RT_LIKELY(rc == VINF_SUCCESS))
427 rc = pVCpu->vmm.s.iLastGZRc;
428 uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
429 if (RT_FAILURE(rc))
430 {
431 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
432 VMMR3FatalDump(pVM, pVCpu, rc);
433 return rc;
434 }
435 if (TickThisElapsed < TickMin)
436 TickMin = TickThisElapsed;
437 }
438 TickEnd = ASMReadTSC();
439 tsEnd = RTTimeNanoTS();
440
441 Elapsed = tsEnd - tsBegin;
442 PerIteration = Elapsed / (uint64_t)i;
443 cTicksElapsed = TickEnd - TickStart;
444 cTicksPerIteration = cTicksElapsed / (uint64_t)i;
445
446 RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
447 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
448 Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
449 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
450
451 rc = VINF_SUCCESS;
452 }
453 else
454 AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
455#endif
456 return rc;
457}
458
459#define SYNC_SEL(pHyperCtx, reg) \
460 if (pHyperCtx->reg.Sel) \
461 { \
462 DBGFSELINFO selInfo; \
463 int rc2 = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg.Sel, &selInfo); \
464 AssertRC(rc2); \
465 \
466 pHyperCtx->reg.u64Base = selInfo.GCPtrBase; \
467 pHyperCtx->reg.u32Limit = selInfo.cbLimit; \
468 pHyperCtx->reg.Attr.n.u1Present = selInfo.u.Raw.Gen.u1Present; \
469 pHyperCtx->reg.Attr.n.u1DefBig = selInfo.u.Raw.Gen.u1DefBig; \
470 pHyperCtx->reg.Attr.n.u1Granularity = selInfo.u.Raw.Gen.u1Granularity; \
471 pHyperCtx->reg.Attr.n.u4Type = selInfo.u.Raw.Gen.u4Type; \
472 pHyperCtx->reg.Attr.n.u2Dpl = selInfo.u.Raw.Gen.u2Dpl; \
473 pHyperCtx->reg.Attr.n.u1DescType = selInfo.u.Raw.Gen.u1DescType; \
474 pHyperCtx->reg.Attr.n.u1Long = selInfo.u.Raw.Gen.u1Long; \
475 }
476
477/* execute the switch. */
478VMMR3DECL(int) VMMDoHmTest(PVM pVM)
479{
480 uint32_t i;
481 int rc;
482 PCPUMCTX pHyperCtx, pGuestCtx;
483 RTGCPHYS CR3Phys = 0x0; /* fake address */
484 PVMCPU pVCpu = &pVM->aCpus[0];
485
486 if (!HMIsEnabled(pVM))
487 {
488 RTPrintf("VMM: Hardware accelerated test not available!\n");
489 return VERR_ACCESS_DENIED;
490 }
491
492#ifdef VBOX_WITH_RAW_MODE
493 /*
494 * These forced actions are not necessary for the test and trigger breakpoints too.
495 */
496 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
497 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
498#endif
499
500 /* Enable mapping of the hypervisor into the shadow page table. */
501 uint32_t cb;
502 rc = PGMR3MappingsSize(pVM, &cb);
503 AssertRCReturn(rc, rc);
504
505 /* Pretend the mappings are now fixed; to force a refresh of the reserved PDEs. */
506 rc = PGMR3MappingsFix(pVM, MM_HYPER_AREA_ADDRESS, cb);
507 AssertRCReturn(rc, rc);
508
509 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
510
511 pHyperCtx->cr0 = X86_CR0_PE | X86_CR0_WP | X86_CR0_PG | X86_CR0_TS | X86_CR0_ET | X86_CR0_NE | X86_CR0_MP;
512 pHyperCtx->cr4 = X86_CR4_PGE | X86_CR4_OSFSXR | X86_CR4_OSXMMEEXCPT;
513 PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
514 PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
515
516 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
517 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
518 VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
519 VM_FF_CLEAR(pVM, VM_FF_REQUEST);
520
521 /*
522 * Setup stack for calling VMMGCEntry().
523 */
524 RTRCPTR RCPtrEP;
525 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
526 if (RT_SUCCESS(rc))
527 {
528 RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
529
530 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
531
532 /* Fill in hidden selector registers for the hypervisor state. */
533 SYNC_SEL(pHyperCtx, cs);
534 SYNC_SEL(pHyperCtx, ds);
535 SYNC_SEL(pHyperCtx, es);
536 SYNC_SEL(pHyperCtx, fs);
537 SYNC_SEL(pHyperCtx, gs);
538 SYNC_SEL(pHyperCtx, ss);
539 SYNC_SEL(pHyperCtx, tr);
540
541 /*
542 * Profile switching.
543 */
544 RTPrintf("VMM: profiling switcher...\n");
545 Log(("VMM: profiling switcher...\n"));
546 uint64_t TickMin = ~0;
547 uint64_t tsBegin = RTTimeNanoTS();
548 uint64_t TickStart = ASMReadTSC();
549 for (i = 0; i < 1000000; i++)
550 {
551 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
552 CPUMPushHyper(pVCpu, 0);
553 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HM_NOP);
554 CPUMPushHyper(pVCpu, pVM->pVMRC);
555 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
556 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
557
558 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
559 pGuestCtx = CPUMQueryGuestCtxPtr(pVCpu);
560
561 /* Copy the hypervisor context to make sure we have a valid guest context. */
562 *pGuestCtx = *pHyperCtx;
563 pGuestCtx->cr3 = CR3Phys;
564
565 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
566 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
567 VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
568
569 uint64_t TickThisStart = ASMReadTSC();
570 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, 0);
571 uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
572 if (RT_FAILURE(rc))
573 {
574 Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
575 VMMR3FatalDump(pVM, pVCpu, rc);
576 return rc;
577 }
578 if (TickThisElapsed < TickMin)
579 TickMin = TickThisElapsed;
580 }
581 uint64_t TickEnd = ASMReadTSC();
582 uint64_t tsEnd = RTTimeNanoTS();
583
584 uint64_t Elapsed = tsEnd - tsBegin;
585 uint64_t PerIteration = Elapsed / (uint64_t)i;
586 uint64_t cTicksElapsed = TickEnd - TickStart;
587 uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
588
589 RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
590 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
591 Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
592 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
593
594 rc = VINF_SUCCESS;
595 }
596 else
597 AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
598
599 return rc;
600}
601
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