VMMTests.cpp@ 49357

Last change on this file since 49357 was 49357, checked in by vboxsync, 11 years ago
VMM/VMMTests: test fewer MSRs in the 0xc0000000 range to prevent reboots of two AMD testboxes
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File size: 31.1 KB

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1	/* $Id: VMMTests.cpp 49357 2013-11-01 09:17:55Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core, Tests.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23	#define LOG_GROUP LOG_GROUP_VMM
24	#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/pdmapi.h>
27	#include <VBox/vmm/cpum.h>
28	#include <VBox/dbg.h>
29	#include <VBox/vmm/hm.h>
30	#include <VBox/vmm/mm.h>
31	#include <VBox/vmm/trpm.h>
32	#include <VBox/vmm/selm.h>
33	#include "VMMInternal.h"
34	#include <VBox/vmm/vm.h>
35	#include <VBox/err.h>
36	#include <VBox/param.h>
37
38	#include <iprt/assert.h>
39	#include <iprt/asm.h>
40	#include <iprt/time.h>
41	#include <iprt/stream.h>
42	#include <iprt/string.h>
43	#include <iprt/x86.h>
44
45	static void vmmR3TestClearStack(PVMCPU pVCpu)
46	{
47	/* We leave the first 64 bytes of the stack alone because of strict
48	ring-0 long jump code uses it. */
49	memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);
50	}
51
52
53	#ifdef VBOX_WITH_RAW_MODE
54
55	static int vmmR3ReportMsrRange(PVM pVM, uint32_t uMsr, uint64_t cMsrs, PRTSTREAM pReportStrm, uint32_t *pcMsrsFound)
56	{
57	/*
58	* Preps.
59	*/
60	RTRCPTR RCPtrEP;
61	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMRCTestReadMsrs", &RCPtrEP);
62	AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);
63
64	uint32_t const cMsrsPerCall = 16384;
65	uint32_t cbResults = cMsrsPerCall * sizeof(VMMTESTMSRENTRY);
66	PVMMTESTMSRENTRY paResults;
67	rc = MMHyperAlloc(pVM, cbResults, 0, MM_TAG_VMM, (void **)&paResults);
68	AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", cbResults, rc), rc);
69	/*
70	* The loop.
71	*/
72	RTRCPTR RCPtrResults = MMHyperR3ToRC(pVM, paResults);
73	uint32_t cMsrsFound = 0;
74	uint32_t uLastMsr = uMsr;
75	uint64_t uNsTsStart = RTTimeNanoTS();
76
77	for (;;)
78	{
79	if ( pReportStrm
80	&& uMsr - uLastMsr > _64K
81	&& (uMsr & (_4M - 1)) == 0)
82	{
83	if (uMsr - uLastMsr < 16U*_1M)
84	RTStrmFlush(pReportStrm);
85	RTPrintf("... %#010x [%u ns/msr] ...\n", uMsr, (RTTimeNanoTS() - uNsTsStart) / uMsr);
86	}
87
88	/RT_BZERO(paResults, cbResults);/
89	uint32_t const cBatch = RT_MIN(cMsrsPerCall, cMsrs);
90	rc = VMMR3CallRC(pVM, RCPtrEP, 4, pVM->pVMRC, uMsr, cBatch, RCPtrResults);
91	if (RT_FAILURE(rc))
92	{
93	RTPrintf("VMM: VMMR3CallRC failed rc=%Rrc, uMsr=%#x\n", rc, uMsr);
94	break;
95	}
96
97	for (uint32_t i = 0; i < cBatch; i++)
98	if (paResults[i].uMsr != UINT64_MAX)
99	{
100	if (paResults[i].uValue == 0)
101	{
102	if (pReportStrm)
103	RTStrmPrintf(pReportStrm, "%#010llx = 0\n", paResults[i].uMsr);
104	RTPrintf("%#010llx = 0\n", paResults[i].uMsr);
105	}
106	else
107	{
108	if (pReportStrm)
109	RTStrmPrintf(pReportStrm, "%#010llx = %#010x`%08x\n", paResults[i].uMsr,
110	(uint32_t)(paResults[i].uValue >> 32), (uint32_t)paResults[i].uValue);
111	RTPrintf("%#010llx = %#010x`%08x\n", paResults[i].uMsr,
112	(uint32_t)(paResults[i].uValue >> 32), (uint32_t)paResults[i].uValue);
113	}
114	cMsrsFound++;
115	uLastMsr = paResults[i].uMsr;
116	}
117
118	/* Advance. */
119	if (cMsrs <= cMsrsPerCall)
120	break;
121	cMsrs -= cMsrsPerCall;
122	uMsr += cMsrsPerCall;
123	}
124
125	*pcMsrsFound += cMsrsFound;
126	MMHyperFree(pVM, paResults);
127	return rc;
128	}
129
130
131	/**
132	* Produces a quick report of MSRs.
133	*
134	* @returns VBox status code.
135	* @param pVM Pointer to the cross context VM structure.
136	*/
137	static int vmmR3DoMsrQuickReport(PVM pVM)
138	{
139	uint64_t uTsStart = RTTimeNanoTS();
140	RTPrintf("=== MSR Quick Report Start ===\n");
141	RTStrmFlush(g_pStdOut);
142	DBGFR3InfoStdErr(pVM->pUVM, "cpuid", "verbose");
143	RTPrintf("\n");
144	uint32_t cMsrsFound = 0;
145	int rc = vmmR3ReportMsrRange(pVM, 0x00000000, 0x00042000, NULL, &cMsrsFound);
146	int rc2 = vmmR3ReportMsrRange(pVM, 0x40000000, 0x00012000, NULL, &cMsrsFound);
147	int rc3 = vmmR3ReportMsrRange(pVM, 0x80000000, 0x00012000, NULL, &cMsrsFound);
148	/* for some reason this crashes two AMD testboxes */
149	// int rc4 = vmmR3ReportMsrRange(pVM, 0xc0000000, 0x00102000, NULL, &cMsrsFound);
150	int rc4 = vmmR3ReportMsrRange(pVM, 0xc0000000, 0x00010000, NULL, &cMsrsFound);
151	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
152	rc = rc2;
153	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
154	rc = rc3;
155	if (RT_FAILURE(rc4) && RT_SUCCESS(rc))
156	rc = rc4;
157	RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
158	RTPrintf("=== MSR Quick Report End (rc=%Rrc, %'llu ns) ===\n", rc, RTTimeNanoTS() - uTsStart);
159	return rc;
160	}
161
162
163	/**
164	* Performs a testcase.
165	*
166	* @returns return value from the test.
167	* @param pVM Pointer to the VM.
168	* @param enmTestcase The testcase operation to perform.
169	* @param uVariation The testcase variation id.
170	*/
171	static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
172	{
173	PVMCPU pVCpu = &pVM->aCpus[0];
174
175	RTRCPTR RCPtrEP;
176	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
177	if (RT_FAILURE(rc))
178	return rc;
179
180	Log(("vmmR3DoGCTest: %d %#x\n", enmTestcase, uVariation));
181	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
182	vmmR3TestClearStack(pVCpu);
183	CPUMPushHyper(pVCpu, uVariation);
184	CPUMPushHyper(pVCpu, enmTestcase);
185	CPUMPushHyper(pVCpu, pVM->pVMRC);
186	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
187	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
188	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
189	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
190
191	#if 1
192	/* flush the raw-mode logs. */
193	# ifdef LOG_ENABLED
194	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
195	if ( pLogger
196	&& pLogger->offScratch > 0)
197	RTLogFlushRC(NULL, pLogger);
198	# endif
199	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
200	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
201	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
202	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
203	# endif
204	#endif
205
206	Log(("vmmR3DoGCTest: rc=%Rrc iLastGZRc=%Rrc\n", rc, pVCpu->vmm.s.iLastGZRc));
207	if (RT_LIKELY(rc == VINF_SUCCESS))
208	rc = pVCpu->vmm.s.iLastGZRc;
209	return rc;
210	}
211
212
213	/**
214	* Performs a trap test.
215	*
216	* @returns Return value from the trap test.
217	* @param pVM Pointer to the VM.
218	* @param u8Trap The trap number to test.
219	* @param uVariation The testcase variation.
220	* @param rcExpect The expected result.
221	* @param u32Eax The expected eax value.
222	* @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
223	* @param pszDesc The test description.
224	*/
225	static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char pszFaultEIP, const char pszDesc)
226	{
227	PVMCPU pVCpu = &pVM->aCpus[0];
228
229	RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
230
231	RTRCPTR RCPtrEP;
232	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
233	if (RT_FAILURE(rc))
234	return rc;
235
236	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
237	vmmR3TestClearStack(pVCpu);
238	CPUMPushHyper(pVCpu, uVariation);
239	CPUMPushHyper(pVCpu, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
240	CPUMPushHyper(pVCpu, pVM->pVMRC);
241	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
242	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
243	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
244	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
245	if (RT_LIKELY(rc == VINF_SUCCESS))
246	rc = pVCpu->vmm.s.iLastGZRc;
247	bool fDump = false;
248	if (rc != rcExpect)
249	{
250	RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
251	if (rc != VERR_NOT_IMPLEMENTED)
252	fDump = true;
253	}
254	else if ( rcExpect != VINF_SUCCESS
255	&& u8Trap != 8 /* double fault doesn't dare set TrapNo. */
256	&& u8Trap != 3 /* guest only, we're not in guest. */
257	&& u8Trap != 1 /* guest only, we're not in guest. */
258	&& u8Trap != TRPMGetTrapNo(pVCpu))
259	{
260	RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
261	fDump = true;
262	}
263	else if (pszFaultEIP)
264	{
265	RTRCPTR RCPtrFault;
266	int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
267	if (RT_FAILURE(rc2))
268	RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
269	else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))
270	{
271	RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);
272	fDump = true;
273	}
274	}
275	else if (rcExpect != VINF_SUCCESS)
276	{
277	if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))
278	RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));
279	if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))
280	RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));
281	if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))
282	RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));
283	if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))
284	RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));
285	if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))
286	RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));
287	if (CPUMGetHyperEDI(pVCpu) == 0x01234567)
288	RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);
289	if (CPUMGetHyperESI(pVCpu) == 0x42000042)
290	RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);
291	if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)
292	RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);
293	if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)
294	RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);
295	if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)
296	RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);
297	if (CPUMGetHyperEDX(pVCpu) == 0x77778888)
298	RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);
299	if (CPUMGetHyperEAX(pVCpu) == u32Eax)
300	RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);
301	}
302	if (fDump)
303	VMMR3FatalDump(pVM, pVCpu, rc);
304	return rc;
305	}
306
307	#endif /* VBOX_WITH_RAW_MODE */
308
309
310	/* execute the switch. */
311	VMMR3DECL(int) VMMDoTest(PVM pVM)
312	{
313	int rc = VINF_SUCCESS;
314
315	#ifdef VBOX_WITH_RAW_MODE
316	PVMCPU pVCpu = &pVM->aCpus[0];
317	PUVM pUVM = pVM->pUVM;
318
319	# ifdef NO_SUPCALLR0VMM
320	RTPrintf("NO_SUPCALLR0VMM\n");
321	return rc;
322	# endif
323
324	/*
325	* Setup stack for calling VMMGCEntry().
326	*/
327	RTRCPTR RCPtrEP;
328	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
329	if (RT_SUCCESS(rc))
330	{
331	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
332
333	/*
334	* Test various crashes which we must be able to recover from.
335	*/
336	vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
337	vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
338
339	# if 0//defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
340	vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
341	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
342	bool f;
343	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
344	# if !defined(DEBUG_bird)
345	if (RT_SUCCESS(rc) && f)
346	# endif
347	{
348	/* see triple fault warnings in SELM and VMMGC.cpp. */
349	vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
350	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
351	}
352	# endif
353
354	vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
355	///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
356	//vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
357
358	vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
359	vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
360	vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
361	/* This test is no longer relevant as fs and gs are loaded with NULL
362	selectors and we will always return to HC if a #GP occurs while
363	returning to guest code.
364	vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
365	*/
366
367	/*
368	* Set a debug register and perform a context switch.
369	*/
370	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
371	if (rc != VINF_SUCCESS)
372	{
373	RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
374	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
375	}
376
377	/* a harmless breakpoint */
378	RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
379	DBGFADDRESS Addr;
380	DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);
381	RTUINT iBp0;
382	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
383	AssertReleaseRC(rc);
384	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
385	if (rc != VINF_SUCCESS)
386	{
387	RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
388	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
389	}
390
391	/* a bad one at VMMGCEntry */
392	RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
393	DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);
394	RTUINT iBp1;
395	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
396	AssertReleaseRC(rc);
397	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
398	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
399	{
400	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
401	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
402	}
403
404	/* resume the breakpoint */
405	RTPrintf("VMM: resuming hyper after breakpoint\n");
406	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_RF);
407	rc = VMMR3ResumeHyper(pVM, pVCpu);
408	if (rc != VINF_SUCCESS)
409	{
410	RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
411	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
412	}
413
414	/* engage the breakpoint again and try single stepping. */
415	RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
416	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
417	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
418	{
419	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
420	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
421	}
422
423	RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
424	RTPrintf("%RGr=>", OldPc);
425	unsigned i;
426	for (i = 0; i < 8; i++)
427	{
428	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_TF \| X86_EFL_RF);
429	rc = VMMR3ResumeHyper(pVM, pVCpu);
430	if (rc != VINF_EM_DBG_HYPER_STEPPED)
431	{
432	RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
433	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
434	}
435	RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
436	RTPrintf("%RGr=>", Pc);
437	if (Pc == OldPc)
438	{
439	RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
440	return VERR_GENERAL_FAILURE;
441	}
442	OldPc = Pc;
443	}
444	RTPrintf("ok\n");
445
446	/* done, clear it */
447	if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))
448	\|\| RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))
449	{
450	RTPrintf("VMM: Failed to clear breakpoints!\n");
451	return VERR_GENERAL_FAILURE;
452	}
453	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
454	if (rc != VINF_SUCCESS)
455	{
456	RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
457	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
458	}
459
460	/*
461	* Interrupt masking. Failure may indiate NMI watchdog activity.
462	*/
463	RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
464	for (i = 0; i < 10000; i++)
465	{
466	uint64_t StartTick = ASMReadTSC();
467	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
468	if (rc != VINF_SUCCESS)
469	{
470	RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
471	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
472	}
473	uint64_t Ticks = ASMReadTSC() - StartTick;
474	if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
475	RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
476	}
477
478	/*
479	* Interrupt forwarding.
480	*/
481	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
482	CPUMPushHyper(pVCpu, 0);
483	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
484	CPUMPushHyper(pVCpu, pVM->pVMRC);
485	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
486	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
487	Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
488
489	/*
490	* Switch and do da thing.
491	*/
492	RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
493	i = 0;
494	uint64_t tsBegin = RTTimeNanoTS();
495	uint64_t TickStart = ASMReadTSC();
496	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
497	do
498	{
499	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
500	if (RT_LIKELY(rc == VINF_SUCCESS))
501	rc = pVCpu->vmm.s.iLastGZRc;
502	if (RT_FAILURE(rc))
503	{
504	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
505	VMMR3FatalDump(pVM, pVCpu, rc);
506	return rc;
507	}
508	i++;
509	if (!(i % 32))
510	Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
511	i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
512	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
513	uint64_t TickEnd = ASMReadTSC();
514	uint64_t tsEnd = RTTimeNanoTS();
515
516	uint64_t Elapsed = tsEnd - tsBegin;
517	uint64_t PerIteration = Elapsed / (uint64_t)i;
518	uint64_t cTicksElapsed = TickEnd - TickStart;
519	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
520
521	RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
522	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
523	Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
524	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
525
526	/*
527	* These forced actions are not necessary for the test and trigger breakpoints too.
528	*/
529	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
530	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
531
532	/*
533	* Profile switching.
534	*/
535	RTPrintf("VMM: profiling switcher...\n");
536	Log(("VMM: profiling switcher...\n"));
537	uint64_t TickMin = ~0;
538	tsBegin = RTTimeNanoTS();
539	TickStart = ASMReadTSC();
540	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
541	for (i = 0; i < 1000000; i++)
542	{
543	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
544	CPUMPushHyper(pVCpu, 0);
545	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
546	CPUMPushHyper(pVCpu, pVM->pVMRC);
547	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
548	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
549
550	uint64_t TickThisStart = ASMReadTSC();
551	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
552	if (RT_LIKELY(rc == VINF_SUCCESS))
553	rc = pVCpu->vmm.s.iLastGZRc;
554	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
555	if (RT_FAILURE(rc))
556	{
557	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
558	VMMR3FatalDump(pVM, pVCpu, rc);
559	return rc;
560	}
561	if (TickThisElapsed < TickMin)
562	TickMin = TickThisElapsed;
563	}
564	TickEnd = ASMReadTSC();
565	tsEnd = RTTimeNanoTS();
566
567	Elapsed = tsEnd - tsBegin;
568	PerIteration = Elapsed / (uint64_t)i;
569	cTicksElapsed = TickEnd - TickStart;
570	cTicksPerIteration = cTicksElapsed / (uint64_t)i;
571
572	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
573	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
574	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
575	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
576
577	rc = VINF_SUCCESS;
578
579	/*
580	* A quick MSR report.
581	*/
582	vmmR3DoMsrQuickReport(pVM);
583	}
584	else
585	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
586	#endif
587	return rc;
588	}
589
590	#define SYNC_SEL(pHyperCtx, reg) \
591	if (pHyperCtx->reg.Sel) \
592	{ \
593	DBGFSELINFO selInfo; \
594	int rc2 = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg.Sel, &selInfo); \
595	AssertRC(rc2); \
596	\
597	pHyperCtx->reg.u64Base = selInfo.GCPtrBase; \
598	pHyperCtx->reg.u32Limit = selInfo.cbLimit; \
599	pHyperCtx->reg.Attr.n.u1Present = selInfo.u.Raw.Gen.u1Present; \
600	pHyperCtx->reg.Attr.n.u1DefBig = selInfo.u.Raw.Gen.u1DefBig; \
601	pHyperCtx->reg.Attr.n.u1Granularity = selInfo.u.Raw.Gen.u1Granularity; \
602	pHyperCtx->reg.Attr.n.u4Type = selInfo.u.Raw.Gen.u4Type; \
603	pHyperCtx->reg.Attr.n.u2Dpl = selInfo.u.Raw.Gen.u2Dpl; \
604	pHyperCtx->reg.Attr.n.u1DescType = selInfo.u.Raw.Gen.u1DescType; \
605	pHyperCtx->reg.Attr.n.u1Long = selInfo.u.Raw.Gen.u1Long; \
606	}
607
608	/* execute the switch. */
609	VMMR3DECL(int) VMMDoHmTest(PVM pVM)
610	{
611	uint32_t i;
612	int rc;
613	PCPUMCTX pHyperCtx, pGuestCtx;
614	RTGCPHYS CR3Phys = 0x0; /* fake address */
615	PVMCPU pVCpu = &pVM->aCpus[0];
616
617	if (!HMIsEnabled(pVM))
618	{
619	RTPrintf("VMM: Hardware accelerated test not available!\n");
620	return VERR_ACCESS_DENIED;
621	}
622
623	#ifdef VBOX_WITH_RAW_MODE
624	/*
625	* These forced actions are not necessary for the test and trigger breakpoints too.
626	*/
627	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
628	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
629	#endif
630
631	/* Enable mapping of the hypervisor into the shadow page table. */
632	uint32_t cb;
633	rc = PGMR3MappingsSize(pVM, &cb);
634	AssertRCReturn(rc, rc);
635
636	/* Pretend the mappings are now fixed; to force a refresh of the reserved PDEs. */
637	rc = PGMR3MappingsFix(pVM, MM_HYPER_AREA_ADDRESS, cb);
638	AssertRCReturn(rc, rc);
639
640	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
641
642	pHyperCtx->cr0 = X86_CR0_PE \| X86_CR0_WP \| X86_CR0_PG \| X86_CR0_TS \| X86_CR0_ET \| X86_CR0_NE \| X86_CR0_MP;
643	pHyperCtx->cr4 = X86_CR4_PGE \| X86_CR4_OSFSXR \| X86_CR4_OSXMMEEXCPT;
644	PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
645	PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
646
647	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
648	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
649	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
650	VM_FF_CLEAR(pVM, VM_FF_REQUEST);
651
652	/*
653	* Setup stack for calling VMMGCEntry().
654	*/
655	RTRCPTR RCPtrEP;
656	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
657	if (RT_SUCCESS(rc))
658	{
659	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
660
661	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
662
663	/* Fill in hidden selector registers for the hypervisor state. */
664	SYNC_SEL(pHyperCtx, cs);
665	SYNC_SEL(pHyperCtx, ds);
666	SYNC_SEL(pHyperCtx, es);
667	SYNC_SEL(pHyperCtx, fs);
668	SYNC_SEL(pHyperCtx, gs);
669	SYNC_SEL(pHyperCtx, ss);
670	SYNC_SEL(pHyperCtx, tr);
671
672	/*
673	* Profile switching.
674	*/
675	RTPrintf("VMM: profiling switcher...\n");
676	Log(("VMM: profiling switcher...\n"));
677	uint64_t TickMin = ~0;
678	uint64_t tsBegin = RTTimeNanoTS();
679	uint64_t TickStart = ASMReadTSC();
680	for (i = 0; i < 1000000; i++)
681	{
682	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
683	CPUMPushHyper(pVCpu, 0);
684	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HM_NOP);
685	CPUMPushHyper(pVCpu, pVM->pVMRC);
686	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
687	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
688
689	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
690	pGuestCtx = CPUMQueryGuestCtxPtr(pVCpu);
691
692	/* Copy the hypervisor context to make sure we have a valid guest context. */
693	pGuestCtx = pHyperCtx;
694	pGuestCtx->cr3 = CR3Phys;
695
696	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
697	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
698	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
699
700	uint64_t TickThisStart = ASMReadTSC();
701	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, 0);
702	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
703	if (RT_FAILURE(rc))
704	{
705	Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
706	VMMR3FatalDump(pVM, pVCpu, rc);
707	return rc;
708	}
709	if (TickThisElapsed < TickMin)
710	TickMin = TickThisElapsed;
711	}
712	uint64_t TickEnd = ASMReadTSC();
713	uint64_t tsEnd = RTTimeNanoTS();
714
715	uint64_t Elapsed = tsEnd - tsBegin;
716	uint64_t PerIteration = Elapsed / (uint64_t)i;
717	uint64_t cTicksElapsed = TickEnd - TickStart;
718	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
719
720	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
721	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
722	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
723	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
724
725	rc = VINF_SUCCESS;
726	}
727	else
728	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
729
730	return rc;
731	}
732
733
734	#ifdef VBOX_WITH_RAW_MODE
735
736	/**
737	* Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
738	* prefix to the MSR report.
739	*/
740	static DECLCALLBACK(void) vmmDoPrintfVToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, va_list va)
741	{
742	PRTSTREAM pOutStrm = ((PRTSTREAM *)pHlp)[-1];
743	RTStrmPrintfV(pOutStrm, pszFormat, va);
744	}
745
746	/**
747	* Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
748	* prefix to the MSR report.
749	*/
750	static DECLCALLBACK(void) vmmDoPrintfToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, ...)
751	{
752	va_list va;
753	va_start(va, pszFormat);
754	vmmDoPrintfVToStream(pHlp, pszFormat, va);
755	va_end(va);
756	}
757
758	#endif
759
760
761	/**
762	* Uses raw-mode to query all possible MSRs on the real hardware.
763	*
764	* This generates a msr-report.txt file (appending, no overwriting) as well as
765	* writing the values and process to stdout.
766	*
767	* @returns VBox status code.
768	* @param pVM The VM handle.
769	*/
770	VMMDECL(int) VMMDoBruteForceMsrs(PVM pVM)
771	{
772	#ifdef VBOX_WITH_RAW_MODE
773	PRTSTREAM pOutStrm;
774	int rc = RTStrmOpen("msr-report.txt", "a", &pOutStrm);
775	if (RT_SUCCESS(rc))
776	{
777	/* Header */
778	struct
779	{
780	PRTSTREAM pOutStrm;
781	DBGFINFOHLP Hlp;
782	} MyHlp = { pOutStrm, { vmmDoPrintfToStream, vmmDoPrintfVToStream } };
783	DBGFR3Info(pVM->pUVM, "cpuid", "verbose", &MyHlp.Hlp);
784	RTStrmPrintf(pOutStrm, "\n");
785
786	uint32_t cMsrsFound = 0;
787	vmmR3ReportMsrRange(pVM, 0, _4G, pOutStrm, &cMsrsFound);
788
789	RTStrmPrintf(pOutStrm, "Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
790	RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
791
792	RTStrmClose(pOutStrm);
793	}
794	return rc;
795	#else
796	return VERR_NOT_SUPPORTED;
797	#endif
798	}
799

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMMTests.cpp@ 49357

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