VMMTests.cpp@ 49375

Last change on this file since 49375 was 49375, checked in by vboxsync, 11 years ago
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1	/* $Id: VMMTests.cpp 49375 2013-11-04 02:40:16Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core, Tests.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23	#define LOG_GROUP LOG_GROUP_VMM
24	#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/pdmapi.h>
27	#include <VBox/vmm/cpum.h>
28	#include <VBox/dbg.h>
29	#include <VBox/vmm/hm.h>
30	#include <VBox/vmm/mm.h>
31	#include <VBox/vmm/trpm.h>
32	#include <VBox/vmm/selm.h>
33	#include "VMMInternal.h"
34	#include <VBox/vmm/vm.h>
35	#include <VBox/err.h>
36	#include <VBox/param.h>
37
38	#include <iprt/assert.h>
39	#include <iprt/asm.h>
40	#include <iprt/time.h>
41	#include <iprt/stream.h>
42	#include <iprt/string.h>
43	#include <iprt/x86.h>
44
45	static void vmmR3TestClearStack(PVMCPU pVCpu)
46	{
47	/* We leave the first 64 bytes of the stack alone because of strict
48	ring-0 long jump code uses it. */
49	memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);
50	}
51
52
53	#ifdef VBOX_WITH_RAW_MODE
54
55	static int vmmR3ReportMsrRange(PVM pVM, uint32_t uMsr, uint64_t cMsrs, PRTSTREAM pReportStrm, uint32_t *pcMsrsFound)
56	{
57	/*
58	* Preps.
59	*/
60	RTRCPTR RCPtrEP;
61	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMRCTestReadMsrs", &RCPtrEP);
62	AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);
63
64	uint32_t const cMsrsPerCall = 16384;
65	uint32_t cbResults = cMsrsPerCall * sizeof(VMMTESTMSRENTRY);
66	PVMMTESTMSRENTRY paResults;
67	rc = MMHyperAlloc(pVM, cbResults, 0, MM_TAG_VMM, (void **)&paResults);
68	AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", cbResults, rc), rc);
69	/*
70	* The loop.
71	*/
72	RTRCPTR RCPtrResults = MMHyperR3ToRC(pVM, paResults);
73	uint32_t cMsrsFound = 0;
74	uint32_t uLastMsr = uMsr;
75	uint64_t uNsTsStart = RTTimeNanoTS();
76
77	for (;;)
78	{
79	if ( pReportStrm
80	&& uMsr - uLastMsr > _64K
81	&& (uMsr & (_4M - 1)) == 0)
82	{
83	if (uMsr - uLastMsr < 16U*_1M)
84	RTStrmFlush(pReportStrm);
85	RTPrintf("... %#010x [%u ns/msr] ...\n", uMsr, (RTTimeNanoTS() - uNsTsStart) / uMsr);
86	}
87
88	/RT_BZERO(paResults, cbResults);/
89	uint32_t const cBatch = RT_MIN(cMsrsPerCall, cMsrs);
90	rc = VMMR3CallRC(pVM, RCPtrEP, 4, pVM->pVMRC, uMsr, cBatch, RCPtrResults);
91	if (RT_FAILURE(rc))
92	{
93	RTPrintf("VMM: VMMR3CallRC failed rc=%Rrc, uMsr=%#x\n", rc, uMsr);
94	break;
95	}
96
97	for (uint32_t i = 0; i < cBatch; i++)
98	if (paResults[i].uMsr != UINT64_MAX)
99	{
100	if (paResults[i].uValue == 0)
101	{
102	if (pReportStrm)
103	RTStrmPrintf(pReportStrm,
104	" MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);
105	RTPrintf("%#010llx = 0\n", paResults[i].uMsr);
106	}
107	else
108	{
109	if (pReportStrm)
110	RTStrmPrintf(pReportStrm,
111	" MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);
112	RTPrintf("%#010llx = %#010x`%08x\n", paResults[i].uMsr,
113	(uint32_t)(paResults[i].uValue >> 32), (uint32_t)paResults[i].uValue);
114	}
115	cMsrsFound++;
116	uLastMsr = paResults[i].uMsr;
117	}
118
119	/* Advance. */
120	if (cMsrs <= cMsrsPerCall)
121	break;
122	cMsrs -= cMsrsPerCall;
123	uMsr += cMsrsPerCall;
124	}
125
126	*pcMsrsFound += cMsrsFound;
127	MMHyperFree(pVM, paResults);
128	return rc;
129	}
130
131
132	/**
133	* Produces a quick report of MSRs.
134	*
135	* @returns VBox status code.
136	* @param pVM Pointer to the cross context VM structure.
137	* @param pReportStrm Pointer to the report output stream. Optional.
138	* @param fWithCpuId Whether CPUID should be included.
139	*/
140	static int vmmR3DoMsrQuickReport(PVM pVM, PRTSTREAM pReportStrm, bool fWithCpuId)
141	{
142	uint64_t uTsStart = RTTimeNanoTS();
143	RTPrintf("=== MSR Quick Report Start ===\n");
144	RTStrmFlush(g_pStdOut);
145	if (fWithCpuId)
146	{
147	DBGFR3InfoStdErr(pVM->pUVM, "cpuid", "verbose");
148	RTPrintf("\n");
149	}
150	if (pReportStrm)
151	RTStrmPrintf(pReportStrm, "\n\n{\n");
152
153	static struct { uint32_t uFirst, cMsrs; } const s_aRanges[] =
154	{
155	{ 0x00000000, 0x00042000 },
156	{ 0x10000000, 0x00001000 },
157	{ 0x20000000, 0x00001000 },
158	{ 0x40000000, 0x00012000 },
159	{ 0x80000000, 0x00012000 },
160	// Need 0xc0000000..0xc001106f (at least), but trouble on solaris w/ 10h and 0fh family cpus:
161	// { 0xc0000000, 0x00022000 },
162	{ 0xc0000000, 0x00010000 },
163	{ 0xc0010000, 0x00001040 },
164	};
165	uint32_t cMsrsFound = 0;
166	int rc = VINF_SUCCESS;
167	for (unsigned i = 0; i < RT_ELEMENTS(s_aRanges) && RT_SUCCESS(rc); i++)
168	{
169	if (i >= 3)
170	{
171	RTStrmFlush(g_pStdOut);
172	RTThreadSleep(40);
173	}
174	rc = vmmR3ReportMsrRange(pVM, s_aRanges[i].uFirst, s_aRanges[i].cMsrs, pReportStrm, &cMsrsFound);
175	}
176
177	if (pReportStrm)
178	RTStrmPrintf(pReportStrm, "}; /* %u (%#x) MSRs; rc=%Rrc */\n", cMsrsFound, cMsrsFound, rc);
179	RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
180	RTPrintf("=== MSR Quick Report End (rc=%Rrc, %'llu ns) ===\n", rc, RTTimeNanoTS() - uTsStart);
181	return rc;
182	}
183
184
185	/**
186	* Performs a testcase.
187	*
188	* @returns return value from the test.
189	* @param pVM Pointer to the VM.
190	* @param enmTestcase The testcase operation to perform.
191	* @param uVariation The testcase variation id.
192	*/
193	static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
194	{
195	PVMCPU pVCpu = &pVM->aCpus[0];
196
197	RTRCPTR RCPtrEP;
198	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
199	if (RT_FAILURE(rc))
200	return rc;
201
202	Log(("vmmR3DoGCTest: %d %#x\n", enmTestcase, uVariation));
203	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
204	vmmR3TestClearStack(pVCpu);
205	CPUMPushHyper(pVCpu, uVariation);
206	CPUMPushHyper(pVCpu, enmTestcase);
207	CPUMPushHyper(pVCpu, pVM->pVMRC);
208	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
209	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
210	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
211	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
212
213	#if 1
214	/* flush the raw-mode logs. */
215	# ifdef LOG_ENABLED
216	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
217	if ( pLogger
218	&& pLogger->offScratch > 0)
219	RTLogFlushRC(NULL, pLogger);
220	# endif
221	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
222	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
223	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
224	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
225	# endif
226	#endif
227
228	Log(("vmmR3DoGCTest: rc=%Rrc iLastGZRc=%Rrc\n", rc, pVCpu->vmm.s.iLastGZRc));
229	if (RT_LIKELY(rc == VINF_SUCCESS))
230	rc = pVCpu->vmm.s.iLastGZRc;
231	return rc;
232	}
233
234
235	/**
236	* Performs a trap test.
237	*
238	* @returns Return value from the trap test.
239	* @param pVM Pointer to the VM.
240	* @param u8Trap The trap number to test.
241	* @param uVariation The testcase variation.
242	* @param rcExpect The expected result.
243	* @param u32Eax The expected eax value.
244	* @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
245	* @param pszDesc The test description.
246	*/
247	static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char pszFaultEIP, const char pszDesc)
248	{
249	PVMCPU pVCpu = &pVM->aCpus[0];
250
251	RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
252
253	RTRCPTR RCPtrEP;
254	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
255	if (RT_FAILURE(rc))
256	return rc;
257
258	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
259	vmmR3TestClearStack(pVCpu);
260	CPUMPushHyper(pVCpu, uVariation);
261	CPUMPushHyper(pVCpu, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
262	CPUMPushHyper(pVCpu, pVM->pVMRC);
263	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
264	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
265	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
266	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
267	if (RT_LIKELY(rc == VINF_SUCCESS))
268	rc = pVCpu->vmm.s.iLastGZRc;
269	bool fDump = false;
270	if (rc != rcExpect)
271	{
272	RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
273	if (rc != VERR_NOT_IMPLEMENTED)
274	fDump = true;
275	}
276	else if ( rcExpect != VINF_SUCCESS
277	&& u8Trap != 8 /* double fault doesn't dare set TrapNo. */
278	&& u8Trap != 3 /* guest only, we're not in guest. */
279	&& u8Trap != 1 /* guest only, we're not in guest. */
280	&& u8Trap != TRPMGetTrapNo(pVCpu))
281	{
282	RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
283	fDump = true;
284	}
285	else if (pszFaultEIP)
286	{
287	RTRCPTR RCPtrFault;
288	int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
289	if (RT_FAILURE(rc2))
290	RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
291	else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))
292	{
293	RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);
294	fDump = true;
295	}
296	}
297	else if (rcExpect != VINF_SUCCESS)
298	{
299	if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))
300	RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));
301	if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))
302	RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));
303	if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))
304	RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));
305	if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))
306	RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));
307	if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))
308	RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));
309	if (CPUMGetHyperEDI(pVCpu) == 0x01234567)
310	RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);
311	if (CPUMGetHyperESI(pVCpu) == 0x42000042)
312	RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);
313	if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)
314	RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);
315	if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)
316	RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);
317	if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)
318	RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);
319	if (CPUMGetHyperEDX(pVCpu) == 0x77778888)
320	RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);
321	if (CPUMGetHyperEAX(pVCpu) == u32Eax)
322	RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);
323	}
324	if (fDump)
325	VMMR3FatalDump(pVM, pVCpu, rc);
326	return rc;
327	}
328
329	#endif /* VBOX_WITH_RAW_MODE */
330
331
332	/* execute the switch. */
333	VMMR3DECL(int) VMMDoTest(PVM pVM)
334	{
335	int rc = VINF_SUCCESS;
336
337	#ifdef VBOX_WITH_RAW_MODE
338	PVMCPU pVCpu = &pVM->aCpus[0];
339	PUVM pUVM = pVM->pUVM;
340
341	# ifdef NO_SUPCALLR0VMM
342	RTPrintf("NO_SUPCALLR0VMM\n");
343	return rc;
344	# endif
345
346	/*
347	* Setup stack for calling VMMGCEntry().
348	*/
349	RTRCPTR RCPtrEP;
350	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
351	if (RT_SUCCESS(rc))
352	{
353	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
354
355	/*
356	* Test various crashes which we must be able to recover from.
357	*/
358	vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
359	vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
360
361	# if 0//defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
362	vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
363	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
364	bool f;
365	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
366	# if !defined(DEBUG_bird)
367	if (RT_SUCCESS(rc) && f)
368	# endif
369	{
370	/* see triple fault warnings in SELM and VMMGC.cpp. */
371	vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
372	SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
373	}
374	# endif
375
376	vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
377	///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
378	//vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
379
380	vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
381	vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
382	vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
383	/* This test is no longer relevant as fs and gs are loaded with NULL
384	selectors and we will always return to HC if a #GP occurs while
385	returning to guest code.
386	vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
387	*/
388
389	/*
390	* Set a debug register and perform a context switch.
391	*/
392	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
393	if (rc != VINF_SUCCESS)
394	{
395	RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
396	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
397	}
398
399	/* a harmless breakpoint */
400	RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
401	DBGFADDRESS Addr;
402	DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);
403	RTUINT iBp0;
404	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
405	AssertReleaseRC(rc);
406	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
407	if (rc != VINF_SUCCESS)
408	{
409	RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
410	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
411	}
412
413	/* a bad one at VMMGCEntry */
414	RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
415	DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);
416	RTUINT iBp1;
417	rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
418	AssertReleaseRC(rc);
419	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
420	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
421	{
422	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
423	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
424	}
425
426	/* resume the breakpoint */
427	RTPrintf("VMM: resuming hyper after breakpoint\n");
428	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_RF);
429	rc = VMMR3ResumeHyper(pVM, pVCpu);
430	if (rc != VINF_SUCCESS)
431	{
432	RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
433	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
434	}
435
436	/* engage the breakpoint again and try single stepping. */
437	RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
438	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
439	if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
440	{
441	RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
442	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
443	}
444
445	RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
446	RTPrintf("%RGr=>", OldPc);
447	unsigned i;
448	for (i = 0; i < 8; i++)
449	{
450	CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) \| X86_EFL_TF \| X86_EFL_RF);
451	rc = VMMR3ResumeHyper(pVM, pVCpu);
452	if (rc != VINF_EM_DBG_HYPER_STEPPED)
453	{
454	RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
455	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
456	}
457	RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
458	RTPrintf("%RGr=>", Pc);
459	if (Pc == OldPc)
460	{
461	RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
462	return VERR_GENERAL_FAILURE;
463	}
464	OldPc = Pc;
465	}
466	RTPrintf("ok\n");
467
468	/* done, clear it */
469	if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))
470	\|\| RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))
471	{
472	RTPrintf("VMM: Failed to clear breakpoints!\n");
473	return VERR_GENERAL_FAILURE;
474	}
475	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
476	if (rc != VINF_SUCCESS)
477	{
478	RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
479	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
480	}
481
482	/*
483	* Interrupt masking. Failure may indiate NMI watchdog activity.
484	*/
485	RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
486	for (i = 0; i < 10000; i++)
487	{
488	uint64_t StartTick = ASMReadTSC();
489	rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
490	if (rc != VINF_SUCCESS)
491	{
492	RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
493	return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
494	}
495	uint64_t Ticks = ASMReadTSC() - StartTick;
496	if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
497	RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
498	}
499
500	/*
501	* Interrupt forwarding.
502	*/
503	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
504	CPUMPushHyper(pVCpu, 0);
505	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
506	CPUMPushHyper(pVCpu, pVM->pVMRC);
507	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
508	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
509	Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
510
511	/*
512	* Switch and do da thing.
513	*/
514	RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
515	i = 0;
516	uint64_t tsBegin = RTTimeNanoTS();
517	uint64_t TickStart = ASMReadTSC();
518	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
519	do
520	{
521	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
522	if (RT_LIKELY(rc == VINF_SUCCESS))
523	rc = pVCpu->vmm.s.iLastGZRc;
524	if (RT_FAILURE(rc))
525	{
526	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
527	VMMR3FatalDump(pVM, pVCpu, rc);
528	return rc;
529	}
530	i++;
531	if (!(i % 32))
532	Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
533	i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
534	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
535	uint64_t TickEnd = ASMReadTSC();
536	uint64_t tsEnd = RTTimeNanoTS();
537
538	uint64_t Elapsed = tsEnd - tsBegin;
539	uint64_t PerIteration = Elapsed / (uint64_t)i;
540	uint64_t cTicksElapsed = TickEnd - TickStart;
541	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
542
543	RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
544	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
545	Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
546	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
547
548	/*
549	* These forced actions are not necessary for the test and trigger breakpoints too.
550	*/
551	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
552	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
553
554	/*
555	* Profile switching.
556	*/
557	RTPrintf("VMM: profiling switcher...\n");
558	Log(("VMM: profiling switcher...\n"));
559	uint64_t TickMin = ~0;
560	tsBegin = RTTimeNanoTS();
561	TickStart = ASMReadTSC();
562	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
563	for (i = 0; i < 1000000; i++)
564	{
565	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
566	CPUMPushHyper(pVCpu, 0);
567	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
568	CPUMPushHyper(pVCpu, pVM->pVMRC);
569	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
570	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
571
572	uint64_t TickThisStart = ASMReadTSC();
573	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
574	if (RT_LIKELY(rc == VINF_SUCCESS))
575	rc = pVCpu->vmm.s.iLastGZRc;
576	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
577	if (RT_FAILURE(rc))
578	{
579	Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
580	VMMR3FatalDump(pVM, pVCpu, rc);
581	return rc;
582	}
583	if (TickThisElapsed < TickMin)
584	TickMin = TickThisElapsed;
585	}
586	TickEnd = ASMReadTSC();
587	tsEnd = RTTimeNanoTS();
588
589	Elapsed = tsEnd - tsBegin;
590	PerIteration = Elapsed / (uint64_t)i;
591	cTicksElapsed = TickEnd - TickStart;
592	cTicksPerIteration = cTicksElapsed / (uint64_t)i;
593
594	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
595	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
596	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
597	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
598
599	rc = VINF_SUCCESS;
600
601	/*
602	* A quick MSR report.
603	*/
604	vmmR3DoMsrQuickReport(pVM, NULL, true);
605	}
606	else
607	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
608	#endif
609	return rc;
610	}
611
612	#define SYNC_SEL(pHyperCtx, reg) \
613	if (pHyperCtx->reg.Sel) \
614	{ \
615	DBGFSELINFO selInfo; \
616	int rc2 = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg.Sel, &selInfo); \
617	AssertRC(rc2); \
618	\
619	pHyperCtx->reg.u64Base = selInfo.GCPtrBase; \
620	pHyperCtx->reg.u32Limit = selInfo.cbLimit; \
621	pHyperCtx->reg.Attr.n.u1Present = selInfo.u.Raw.Gen.u1Present; \
622	pHyperCtx->reg.Attr.n.u1DefBig = selInfo.u.Raw.Gen.u1DefBig; \
623	pHyperCtx->reg.Attr.n.u1Granularity = selInfo.u.Raw.Gen.u1Granularity; \
624	pHyperCtx->reg.Attr.n.u4Type = selInfo.u.Raw.Gen.u4Type; \
625	pHyperCtx->reg.Attr.n.u2Dpl = selInfo.u.Raw.Gen.u2Dpl; \
626	pHyperCtx->reg.Attr.n.u1DescType = selInfo.u.Raw.Gen.u1DescType; \
627	pHyperCtx->reg.Attr.n.u1Long = selInfo.u.Raw.Gen.u1Long; \
628	}
629
630	/* execute the switch. */
631	VMMR3DECL(int) VMMDoHmTest(PVM pVM)
632	{
633	uint32_t i;
634	int rc;
635	PCPUMCTX pHyperCtx, pGuestCtx;
636	RTGCPHYS CR3Phys = 0x0; /* fake address */
637	PVMCPU pVCpu = &pVM->aCpus[0];
638
639	if (!HMIsEnabled(pVM))
640	{
641	RTPrintf("VMM: Hardware accelerated test not available!\n");
642	return VERR_ACCESS_DENIED;
643	}
644
645	#ifdef VBOX_WITH_RAW_MODE
646	/*
647	* These forced actions are not necessary for the test and trigger breakpoints too.
648	*/
649	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
650	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
651	#endif
652
653	/* Enable mapping of the hypervisor into the shadow page table. */
654	uint32_t cb;
655	rc = PGMR3MappingsSize(pVM, &cb);
656	AssertRCReturn(rc, rc);
657
658	/* Pretend the mappings are now fixed; to force a refresh of the reserved PDEs. */
659	rc = PGMR3MappingsFix(pVM, MM_HYPER_AREA_ADDRESS, cb);
660	AssertRCReturn(rc, rc);
661
662	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
663
664	pHyperCtx->cr0 = X86_CR0_PE \| X86_CR0_WP \| X86_CR0_PG \| X86_CR0_TS \| X86_CR0_ET \| X86_CR0_NE \| X86_CR0_MP;
665	pHyperCtx->cr4 = X86_CR4_PGE \| X86_CR4_OSFSXR \| X86_CR4_OSXMMEEXCPT;
666	PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
667	PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
668
669	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
670	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
671	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
672	VM_FF_CLEAR(pVM, VM_FF_REQUEST);
673
674	/*
675	* Setup stack for calling VMMGCEntry().
676	*/
677	RTRCPTR RCPtrEP;
678	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
679	if (RT_SUCCESS(rc))
680	{
681	RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
682
683	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
684
685	/* Fill in hidden selector registers for the hypervisor state. */
686	SYNC_SEL(pHyperCtx, cs);
687	SYNC_SEL(pHyperCtx, ds);
688	SYNC_SEL(pHyperCtx, es);
689	SYNC_SEL(pHyperCtx, fs);
690	SYNC_SEL(pHyperCtx, gs);
691	SYNC_SEL(pHyperCtx, ss);
692	SYNC_SEL(pHyperCtx, tr);
693
694	/*
695	* Profile switching.
696	*/
697	RTPrintf("VMM: profiling switcher...\n");
698	Log(("VMM: profiling switcher...\n"));
699	uint64_t TickMin = ~0;
700	uint64_t tsBegin = RTTimeNanoTS();
701	uint64_t TickStart = ASMReadTSC();
702	for (i = 0; i < 1000000; i++)
703	{
704	CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
705	CPUMPushHyper(pVCpu, 0);
706	CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HM_NOP);
707	CPUMPushHyper(pVCpu, pVM->pVMRC);
708	CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
709	CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
710
711	pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
712	pGuestCtx = CPUMQueryGuestCtxPtr(pVCpu);
713
714	/* Copy the hypervisor context to make sure we have a valid guest context. */
715	pGuestCtx = pHyperCtx;
716	pGuestCtx->cr3 = CR3Phys;
717
718	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
719	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
720	VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
721
722	uint64_t TickThisStart = ASMReadTSC();
723	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, 0);
724	uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
725	if (RT_FAILURE(rc))
726	{
727	Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
728	VMMR3FatalDump(pVM, pVCpu, rc);
729	return rc;
730	}
731	if (TickThisElapsed < TickMin)
732	TickMin = TickThisElapsed;
733	}
734	uint64_t TickEnd = ASMReadTSC();
735	uint64_t tsEnd = RTTimeNanoTS();
736
737	uint64_t Elapsed = tsEnd - tsBegin;
738	uint64_t PerIteration = Elapsed / (uint64_t)i;
739	uint64_t cTicksElapsed = TickEnd - TickStart;
740	uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
741
742	RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
743	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
744	Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
745	i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
746
747	rc = VINF_SUCCESS;
748	}
749	else
750	AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
751
752	return rc;
753	}
754
755
756	#ifdef VBOX_WITH_RAW_MODE
757
758	/**
759	* Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
760	* prefix to the MSR report.
761	*/
762	static DECLCALLBACK(void) vmmDoPrintfVToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, va_list va)
763	{
764	PRTSTREAM pOutStrm = ((PRTSTREAM *)pHlp)[-1];
765	RTStrmPrintfV(pOutStrm, pszFormat, va);
766	}
767
768	/**
769	* Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
770	* prefix to the MSR report.
771	*/
772	static DECLCALLBACK(void) vmmDoPrintfToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, ...)
773	{
774	va_list va;
775	va_start(va, pszFormat);
776	vmmDoPrintfVToStream(pHlp, pszFormat, va);
777	va_end(va);
778	}
779
780	#endif
781
782
783	/**
784	* Uses raw-mode to query all possible MSRs on the real hardware.
785	*
786	* This generates a msr-report.txt file (appending, no overwriting) as well as
787	* writing the values and process to stdout.
788	*
789	* @returns VBox status code.
790	* @param pVM The VM handle.
791	*/
792	VMMR3DECL(int) VMMDoBruteForceMsrs(PVM pVM)
793	{
794	#ifdef VBOX_WITH_RAW_MODE
795	PRTSTREAM pOutStrm;
796	int rc = RTStrmOpen("msr-report.txt", "a", &pOutStrm);
797	if (RT_SUCCESS(rc))
798	{
799	/* Header */
800	struct
801	{
802	PRTSTREAM pOutStrm;
803	DBGFINFOHLP Hlp;
804	} MyHlp = { pOutStrm, { vmmDoPrintfToStream, vmmDoPrintfVToStream } };
805	DBGFR3Info(pVM->pUVM, "cpuid", "verbose", &MyHlp.Hlp);
806	RTStrmPrintf(pOutStrm, "\n");
807
808	uint32_t cMsrsFound = 0;
809	vmmR3ReportMsrRange(pVM, 0, _4G, pOutStrm, &cMsrsFound);
810
811	RTStrmPrintf(pOutStrm, "Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
812	RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
813
814	RTStrmClose(pOutStrm);
815	}
816	return rc;
817	#else
818	return VERR_NOT_SUPPORTED;
819	#endif
820	}
821
822
823	/**
824	* Uses raw-mode to query all known MSRS on the real hardware.
825	*
826	* This generates a known-msr-report.txt file (appending, no overwriting) as
827	* well as writing the values and process to stdout.
828	*
829	* @returns VBox status code.
830	* @param pVM The VM handle.
831	*/
832	VMMR3DECL(int) VMMDoKnownMsrs(PVM pVM)
833	{
834	#ifdef VBOX_WITH_RAW_MODE
835	PRTSTREAM pOutStrm;
836	int rc = RTStrmOpen("known-msr-report.txt", "a", &pOutStrm);
837	if (RT_SUCCESS(rc))
838	{
839	vmmR3DoMsrQuickReport(pVM, pOutStrm, false);
840	RTStrmClose(pOutStrm);
841	}
842	return rc;
843	#else
844	return VERR_NOT_SUPPORTED;
845	#endif
846	}
847
848
849	/**
850	* MSR experimentation.
851	*
852	* @returns VBox status code.
853	* @param pVM The VM handle.
854	*/
855	VMMR3DECL(int) VMMDoMsrExperiments(PVM pVM)
856	{
857	#ifdef VBOX_WITH_RAW_MODE
858	/*
859	* Preps.
860	*/
861	RTRCPTR RCPtrEP;
862	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMRCTestTestWriteMsr", &RCPtrEP);
863	AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);
864
865	uint64_t *pauValues;
866	rc = MMHyperAlloc(pVM, 2 * sizeof(uint64_t), 0, MM_TAG_VMM, (void **)&pauValues);
867	AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", 2 * sizeof(uint64_t), rc), rc);
868	RTRCPTR RCPtrValues = MMHyperR3ToRC(pVM, pauValues);
869
870	/*
871	* Do the experiments.
872	*/
873	uint32_t uMsr = 0xc0011011;
874	uint64_t uValue = 0x10000;
875	#if 0
876	rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
877	RCPtrValues, RCPtrValues + sizeof(uint64_t));
878	RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
879	uMsr, pauValues[0], uValue, pauValues[1], rc);
880	#endif
881	for (uint32_t i = 0; i <= 63; i++)
882	{
883	uValue = RT_BIT_64(i);
884	rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
885	RCPtrValues, RCPtrValues + sizeof(uint64_t));
886	RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
887	uMsr, pauValues[0], uValue, pauValues[1], rc);
888	}
889
890	uValue = 0;
891	rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
892	RCPtrValues, RCPtrValues + sizeof(uint64_t));
893	RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
894	uMsr, pauValues[0], uValue, pauValues[1], rc);
895
896	uValue = UINT64_MAX;
897	rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
898	RCPtrValues, RCPtrValues + sizeof(uint64_t));
899	RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
900	uMsr, pauValues[0], uValue, pauValues[1], rc);
901
902	/*
903	* Cleanups.
904	*/
905	MMHyperFree(pVM, pauValues);
906	return rc;
907	#else
908	return VERR_NOT_SUPPORTED;
909	#endif
910	}
911

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMMTests.cpp@ 49375

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