VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp@ 62748

Last change on this file since 62748 was 62478, checked in by vboxsync, 8 years ago

(C) 2016

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 6.0 KB
Line 
1/* $Id: DBGFRZ.cpp 62478 2016-07-22 18:29:06Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, RZ part.
4 */
5
6/*
7 * Copyright (C) 2006-2016 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DBGF
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/selm.h>
25#include <VBox/log.h>
26#include "DBGFInternal.h"
27#include <VBox/vmm/vm.h>
28#include <VBox/err.h>
29#include <iprt/assert.h>
30
31
32
33/**
34 * \#DB (Debug event) handler.
35 *
36 * @returns VBox status code.
37 * VINF_SUCCESS means we completely handled this trap,
38 * other codes are passed execution to host context.
39 *
40 * @param pVM The cross context VM structure.
41 * @param pVCpu The cross context virtual CPU structure.
42 * @param pRegFrame Pointer to the register frame for the trap.
43 * @param uDr6 The DR6 hypervisor register value.
44 * @param fAltStepping Alternative stepping indicator.
45 */
46VMMRZ_INT_DECL(int) DBGFRZTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6, bool fAltStepping)
47{
48#ifdef IN_RC
49 const bool fInHyper = !(pRegFrame->ss.Sel & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM;
50#else
51 NOREF(pRegFrame);
52 const bool fInHyper = false;
53#endif
54
55 /** @todo Intel docs say that X86_DR6_BS has the highest priority... */
56 /*
57 * A breakpoint?
58 */
59 AssertCompile(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
60 if ( (uDr6 & (X86_DR6_B0 | X86_DR6_B1 | X86_DR6_B2 | X86_DR6_B3))
61 && pVM->dbgf.s.cEnabledHwBreakpoints > 0)
62 {
63 for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
64 {
65 if ( ((uint32_t)uDr6 & RT_BIT_32(iBp))
66 && pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
67 {
68 pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
69 pVCpu->dbgf.s.fSingleSteppingRaw = false;
70 LogFlow(("DBGFRZTrap03Handler: hit hw breakpoint %d at %04x:%RGv\n",
71 pVM->dbgf.s.aHwBreakpoints[iBp].iBp, pRegFrame->cs.Sel, pRegFrame->rip));
72
73 return fInHyper ? VINF_EM_DBG_HYPER_BREAKPOINT : VINF_EM_DBG_BREAKPOINT;
74 }
75 }
76 }
77
78 /*
79 * Single step?
80 * Are we single stepping or is it the guest?
81 */
82 if ( (uDr6 & X86_DR6_BS)
83 && (fInHyper || pVCpu->dbgf.s.fSingleSteppingRaw || fAltStepping))
84 {
85 pVCpu->dbgf.s.fSingleSteppingRaw = false;
86 LogFlow(("DBGFRZTrap01Handler: single step at %04x:%RGv\n", pRegFrame->cs.Sel, pRegFrame->rip));
87 return fInHyper ? VINF_EM_DBG_HYPER_STEPPED : VINF_EM_DBG_STEPPED;
88 }
89
90 /*
91 * Either an ICEBP in hypervisor code or a guest related debug exception
92 * of sorts.
93 */
94 if (RT_UNLIKELY(fInHyper))
95 {
96 LogFlow(("DBGFRZTrap01Handler: unabled bp at %04x:%RGv\n", pRegFrame->cs.Sel, pRegFrame->rip));
97 return VERR_DBGF_HYPER_DB_XCPT;
98 }
99
100 LogFlow(("DBGFRZTrap01Handler: guest debug event %#x at %04x:%RGv!\n", (uint32_t)uDr6, pRegFrame->cs.Sel, pRegFrame->rip));
101 return VINF_EM_RAW_GUEST_TRAP;
102}
103
104
105/**
106 * \#BP (Breakpoint) handler.
107 *
108 * @returns VBox status code.
109 * VINF_SUCCESS means we completely handled this trap,
110 * other codes are passed execution to host context.
111 *
112 * @param pVM The cross context VM structure.
113 * @param pVCpu The cross context virtual CPU structure.
114 * @param pRegFrame Pointer to the register frame for the trap.
115 */
116VMMRZ_INT_DECL(int) DBGFRZTrap03Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
117{
118#ifdef IN_RC
119 const bool fInHyper = !(pRegFrame->ss.Sel & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM;
120#else
121 const bool fInHyper = false;
122#endif
123
124 /*
125 * Get the trap address and look it up in the breakpoint table.
126 * Don't bother if we don't have any breakpoints.
127 */
128 unsigned cToSearch = pVM->dbgf.s.Int3.cToSearch;
129 if (cToSearch > 0)
130 {
131 RTGCPTR pPc;
132 int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss.Sel, pRegFrame->cs.Sel, &pRegFrame->cs,
133#ifdef IN_RC
134 pRegFrame->eip - 1,
135#else
136 pRegFrame->rip /* no -1 in R0 */,
137#endif
138 &pPc);
139 AssertRCReturn(rc, rc);
140
141 unsigned iBp = pVM->dbgf.s.Int3.iStartSearch;
142 while (cToSearch-- > 0)
143 {
144 if ( pVM->dbgf.s.aBreakpoints[iBp].u.GCPtr == (RTGCUINTPTR)pPc
145 && pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_INT3)
146 {
147 pVM->dbgf.s.aBreakpoints[iBp].cHits++;
148 pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aBreakpoints[iBp].iBp;
149
150 LogFlow(("DBGFRZTrap03Handler: hit breakpoint %d at %RGv (%04x:%RGv) cHits=0x%RX64\n",
151 pVM->dbgf.s.aBreakpoints[iBp].iBp, pPc, pRegFrame->cs.Sel, pRegFrame->rip,
152 pVM->dbgf.s.aBreakpoints[iBp].cHits));
153 return fInHyper
154 ? VINF_EM_DBG_HYPER_BREAKPOINT
155 : VINF_EM_DBG_BREAKPOINT;
156 }
157 iBp++;
158 }
159 }
160
161 return fInHyper
162 ? VINF_EM_DBG_HYPER_ASSERTION
163 : VINF_EM_RAW_GUEST_TRAP;
164}
165
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