DBGFRZ.cpp@ 80274

Last change on this file since 80274 was 80274, checked in by vboxsync, 6 years ago
VMM: Refactoring VMMR0/* and VMMRZ/* to use VMCC & VMMCPUCC. bugref:9217
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 9.1 KB

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1	/* $Id: DBGFRZ.cpp 80274 2019-08-14 14:34:38Z vboxsync $ */
2	/** @file
3	* DBGF - Debugger Facility, RZ part.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define VBOX_BUGREF_9217_PART_I
23	#define LOG_GROUP LOG_GROUP_DBGF
24	#include <VBox/vmm/dbgf.h>
25	#include <VBox/vmm/selm.h>
26	#ifdef IN_RC
27	# include <VBox/vmm/trpm.h>
28	#endif
29	#include <VBox/log.h>
30	#include "DBGFInternal.h"
31	#include <VBox/vmm/vmcc.h>
32	#include <VBox/err.h>
33	#include <iprt/assert.h>
34
35	#ifdef IN_RC
36	DECLASM(void) TRPMRCHandlerAsmTrap03(void);
37	#endif
38
39
40	/**
41	* \#DB (Debug event) handler.
42	*
43	* @returns VBox status code.
44	* VINF_SUCCESS means we completely handled this trap,
45	* other codes are passed execution to host context.
46	*
47	* @param pVM The cross context VM structure.
48	* @param pVCpu The cross context virtual CPU structure.
49	* @param pRegFrame Pointer to the register frame for the trap.
50	* @param uDr6 The DR6 hypervisor register value.
51	* @param fAltStepping Alternative stepping indicator.
52	*/
53	VMMRZ_INT_DECL(int) DBGFRZTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6, bool fAltStepping)
54	{
55	#ifdef IN_RC
56	const bool fInHyper = !(pRegFrame->ss.Sel & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM;
57	#else
58	NOREF(pRegFrame);
59	const bool fInHyper = false;
60	#endif
61
62	/** @todo Intel docs say that X86_DR6_BS has the highest priority... */
63	/*
64	* A breakpoint?
65	*/
66	AssertCompile(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
67	if ( (uDr6 & (X86_DR6_B0 \| X86_DR6_B1 \| X86_DR6_B2 \| X86_DR6_B3))
68	&& pVM->dbgf.s.cEnabledHwBreakpoints > 0)
69	{
70	for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
71	{
72	if ( ((uint32_t)uDr6 & RT_BIT_32(iBp))
73	&& pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
74	{
75	pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
76	pVCpu->dbgf.s.fSingleSteppingRaw = false;
77	LogFlow(("DBGFRZTrap03Handler: hit hw breakpoint %d at %04x:%RGv\n",
78	pVM->dbgf.s.aHwBreakpoints[iBp].iBp, pRegFrame->cs.Sel, pRegFrame->rip));
79
80	return fInHyper ? VINF_EM_DBG_HYPER_BREAKPOINT : VINF_EM_DBG_BREAKPOINT;
81	}
82	}
83	}
84
85	/*
86	* Single step?
87	* Are we single stepping or is it the guest?
88	*/
89	if ( (uDr6 & X86_DR6_BS)
90	&& (fInHyper \|\| pVCpu->dbgf.s.fSingleSteppingRaw \|\| fAltStepping))
91	{
92	pVCpu->dbgf.s.fSingleSteppingRaw = false;
93	LogFlow(("DBGFRZTrap01Handler: single step at %04x:%RGv\n", pRegFrame->cs.Sel, pRegFrame->rip));
94	return fInHyper ? VINF_EM_DBG_HYPER_STEPPED : VINF_EM_DBG_STEPPED;
95	}
96
97	#ifdef IN_RC
98	/*
99	* Either an ICEBP in hypervisor code or a guest related debug exception
100	* of sorts.
101	*/
102	if (RT_UNLIKELY(fInHyper))
103	{
104	/*
105	* Is this a guest debug event that was delayed past a ring transition?
106	*
107	* Since we do no allow sysenter/syscall in raw-mode, the only
108	* non-trap/fault type transitions that can occur are thru interrupt gates.
109	* Of those, only INT3 (#BP) has a DPL other than 0 with a CS.RPL of 0.
110	* See bugref:9171 and bs3-cpu-weird-1 for more details.
111	*
112	* We need to reconstruct the guest register state from the hypervisor one
113	* here, so here is the layout of the IRET frame on the stack:
114	* 20:[8] GS (V86 only)
115	* 1C:[7] FS (V86 only)
116	* 18:[6] DS (V86 only)
117	* 14:[5] ES (V86 only)
118	* 10:[4] SS
119	* 0c:[3] ESP
120	* 08:[2] EFLAGS
121	* 04:[1] CS
122	* 00:[0] EIP
123	*/
124	if (pRegFrame->rip == (uintptr_t)TRPMRCHandlerAsmTrap03)
125	{
126	uint32_t const pu32Stack = (uint32_t const )pRegFrame->esp;
127	if ( (pu32Stack[2] & X86_EFL_VM)
128	\|\| (pu32Stack[1] & X86_SEL_RPL))
129	{
130	LogFlow(("DBGFRZTrap01Handler: Detected guest #DB delayed past ring transition %04x:%RX32 %#x\n",
131	pu32Stack[1] & 0xffff, pu32Stack[0], pu32Stack[2]));
132	PCPUMCTX pGstCtx = CPUMQueryGuestCtxPtr(pVCpu);
133	pGstCtx->rip = pu32Stack[0];
134	pGstCtx->cs.Sel = pu32Stack[1];
135	pGstCtx->eflags.u = pu32Stack[2];
136	pGstCtx->rsp = pu32Stack[3];
137	pGstCtx->ss.Sel = pu32Stack[4];
138	if (pu32Stack[2] & X86_EFL_VM)
139	{
140	pGstCtx->es.Sel = pu32Stack[5];
141	pGstCtx->ds.Sel = pu32Stack[6];
142	pGstCtx->fs.Sel = pu32Stack[7];
143	pGstCtx->gs.Sel = pu32Stack[8];
144	}
145	else
146	{
147	pGstCtx->es.Sel = pRegFrame->es.Sel;
148	pGstCtx->ds.Sel = pRegFrame->ds.Sel;
149	pGstCtx->fs.Sel = pRegFrame->fs.Sel;
150	pGstCtx->gs.Sel = pRegFrame->gs.Sel;
151	}
152	pGstCtx->rax = pRegFrame->rax;
153	pGstCtx->rcx = pRegFrame->rcx;
154	pGstCtx->rdx = pRegFrame->rdx;
155	pGstCtx->rbx = pRegFrame->rbx;
156	pGstCtx->rsi = pRegFrame->rsi;
157	pGstCtx->rdi = pRegFrame->rdi;
158	pGstCtx->rbp = pRegFrame->rbp;
159
160	/*
161	* We should assert a #BP followed by a #DB here, but TRPM cannot
162	* do that. So, we'll just assert the #BP and ignore the #DB, even
163	* if that isn't strictly correct.
164	*/
165	TRPMResetTrap(pVCpu);
166	TRPMAssertTrap(pVCpu, X86_XCPT_BP, TRPM_SOFTWARE_INT);
167	return VINF_EM_RAW_GUEST_TRAP;
168	}
169	}
170
171	LogFlow(("DBGFRZTrap01Handler: Unknown bp at %04x:%RGv\n", pRegFrame->cs.Sel, pRegFrame->rip));
172	return VERR_DBGF_HYPER_DB_XCPT;
173	}
174	#endif
175
176	LogFlow(("DBGFRZTrap01Handler: guest debug event %#x at %04x:%RGv!\n", (uint32_t)uDr6, pRegFrame->cs.Sel, pRegFrame->rip));
177	return VINF_EM_RAW_GUEST_TRAP;
178	}
179
180
181	/**
182	* \#BP (Breakpoint) handler.
183	*
184	* @returns VBox status code.
185	* VINF_SUCCESS means we completely handled this trap,
186	* other codes are passed execution to host context.
187	*
188	* @param pVM The cross context VM structure.
189	* @param pVCpu The cross context virtual CPU structure.
190	* @param pRegFrame Pointer to the register frame for the trap.
191	*/
192	VMMRZ_INT_DECL(int) DBGFRZTrap03Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
193	{
194	#ifdef IN_RC
195	const bool fInHyper = !(pRegFrame->ss.Sel & X86_SEL_RPL) && !pRegFrame->eflags.Bits.u1VM;
196	#else
197	const bool fInHyper = false;
198	#endif
199
200	/*
201	* Get the trap address and look it up in the breakpoint table.
202	* Don't bother if we don't have any breakpoints.
203	*/
204	unsigned cToSearch = pVM->dbgf.s.Int3.cToSearch;
205	if (cToSearch > 0)
206	{
207	RTGCPTR pPc;
208	int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss.Sel, pRegFrame->cs.Sel, &pRegFrame->cs,
209	#ifdef IN_RC
210	pRegFrame->eip - 1,
211	#else
212	pRegFrame->rip /* no -1 in R0 */,
213	#endif
214	&pPc);
215	AssertRCReturn(rc, rc);
216
217	unsigned iBp = pVM->dbgf.s.Int3.iStartSearch;
218	while (cToSearch-- > 0)
219	{
220	if ( pVM->dbgf.s.aBreakpoints[iBp].u.GCPtr == (RTGCUINTPTR)pPc
221	&& pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_INT3)
222	{
223	pVM->dbgf.s.aBreakpoints[iBp].cHits++;
224	pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aBreakpoints[iBp].iBp;
225
226	LogFlow(("DBGFRZTrap03Handler: hit breakpoint %d at %RGv (%04x:%RGv) cHits=0x%RX64\n",
227	pVM->dbgf.s.aBreakpoints[iBp].iBp, pPc, pRegFrame->cs.Sel, pRegFrame->rip,
228	pVM->dbgf.s.aBreakpoints[iBp].cHits));
229	return fInHyper
230	? VINF_EM_DBG_HYPER_BREAKPOINT
231	: VINF_EM_DBG_BREAKPOINT;
232	}
233	iBp++;
234	}
235	}
236
237	return fInHyper
238	? VINF_EM_DBG_HYPER_ASSERTION
239	: VINF_EM_RAW_GUEST_TRAP;
240	}
241

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source: vbox/trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp@ 80274

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