| 1 | ; VMM - World Switchers, 32Bit to AMD64.
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| 2 | ;
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| 3 |
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| 4 | ;
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| 5 | ; Copyright (C) 2006-2007 Sun Microsystems, Inc.
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| 6 | ;
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| 7 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 8 | ; available from http://www.virtualbox.org. This file is free software;
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| 9 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 10 | ; General Public License (GPL) as published by the Free Software
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| 11 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 12 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 13 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 14 | ;
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| 15 | ; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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| 16 | ; Clara, CA 95054 USA or visit http://www.sun.com if you need
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| 17 | ; additional information or have any questions.
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| 18 | ;
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| 19 |
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| 20 | ;%define DEBUG_STUFF 1
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| 21 | ;%define STRICT_IF 1
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| 22 |
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| 23 | ;*******************************************************************************
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| 24 | ;* Defined Constants And Macros *
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| 25 | ;*******************************************************************************
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| 26 |
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| 27 |
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| 28 | ;*******************************************************************************
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| 29 | ;* Header Files *
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| 30 | ;*******************************************************************************
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| 31 | %include "VBox/asmdefs.mac"
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| 32 | %include "VBox/x86.mac"
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| 33 | %include "VBox/cpum.mac"
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| 34 | %include "VBox/stam.mac"
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| 35 | %include "VBox/vm.mac"
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| 36 | %include "CPUMInternal.mac"
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| 37 | %include "VMMSwitcher/VMMSwitcher.mac"
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| 38 |
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| 39 |
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| 40 | ;
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| 41 | ; Start the fixup records
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| 42 | ; We collect the fixups in the .data section as we go along
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| 43 | ; It is therefore VITAL that no-one is using the .data section
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| 44 | ; for anything else between 'Start' and 'End'.
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| 45 | ;
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| 46 | BEGINDATA
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| 47 | GLOBALNAME Fixups
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| 48 |
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| 49 |
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| 50 |
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| 51 | BEGINCODE
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| 52 | GLOBALNAME Start
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| 53 |
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| 54 | BITS 32
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| 55 |
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| 56 | ;;
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| 57 | ; The C interface.
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| 58 | ;
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| 59 | BEGINPROC vmmR0HostToGuest
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| 60 | %ifdef DEBUG_STUFF
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| 61 | COM32_S_NEWLINE
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| 62 | COM32_S_CHAR '^'
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| 63 | %endif
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| 64 |
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| 65 | %ifdef VBOX_WITH_STATISTICS
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| 66 | ;
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| 67 | ; Switcher stats.
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| 68 | ;
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| 69 | FIXUP FIX_HC_VM_OFF, 1, VM.StatSwitcherToGC
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| 70 | mov edx, 0ffffffffh
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| 71 | STAM_PROFILE_ADV_START edx
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| 72 | %endif
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| 73 |
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| 74 | ;
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| 75 | ; Call worker.
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| 76 | ;
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| 77 | FIXUP FIX_HC_CPUM_OFF, 1, 0
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| 78 | mov edx, 0ffffffffh
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| 79 | push cs ; allow for far return and restore cs correctly.
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| 80 | call NAME(vmmR0HostToGuestAsm)
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| 81 |
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| 82 | %ifdef VBOX_WITH_STATISTICS
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| 83 | ;
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| 84 | ; Switcher stats.
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| 85 | ;
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| 86 | FIXUP FIX_HC_VM_OFF, 1, VM.StatSwitcherToHC
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| 87 | mov edx, 0ffffffffh
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| 88 | STAM_PROFILE_ADV_STOP edx
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| 89 | %endif
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| 90 |
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| 91 | ret
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| 92 |
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| 93 | ENDPROC vmmR0HostToGuest
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| 94 |
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| 95 | ; *****************************************************************************
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| 96 | ; vmmR0HostToGuestAsm
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| 97 | ;
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| 98 | ; Phase one of the switch from host to guest context (host MMU context)
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| 99 | ;
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| 100 | ; INPUT:
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| 101 | ; - edx virtual address of CPUM structure (valid in host context)
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| 102 | ;
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| 103 | ; USES/DESTROYS:
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| 104 | ; - eax, ecx, edx, esi
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| 105 | ;
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| 106 | ; ASSUMPTION:
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| 107 | ; - current CS and DS selectors are wide open
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| 108 | ;
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| 109 | ; *****************************************************************************
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| 110 | ALIGNCODE(16)
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| 111 | BEGINPROC vmmR0HostToGuestAsm
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| 112 | ;;
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| 113 | ;; Save CPU host context
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| 114 | ;; Skip eax, edx and ecx as these are not preserved over calls.
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| 115 | ;;
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| 116 | CPUMCPU_FROM_CPUM(edx)
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| 117 | ; general registers.
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| 118 | mov [edx + CPUMCPU.Host.ebx], ebx
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| 119 | mov [edx + CPUMCPU.Host.edi], edi
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| 120 | mov [edx + CPUMCPU.Host.esi], esi
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| 121 | mov [edx + CPUMCPU.Host.esp], esp
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| 122 | mov [edx + CPUMCPU.Host.ebp], ebp
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| 123 | ; selectors.
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| 124 | mov [edx + CPUMCPU.Host.ds], ds
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| 125 | mov [edx + CPUMCPU.Host.es], es
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| 126 | mov [edx + CPUMCPU.Host.fs], fs
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| 127 | mov [edx + CPUMCPU.Host.gs], gs
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| 128 | mov [edx + CPUMCPU.Host.ss], ss
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| 129 | ; special registers.
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| 130 | sldt [edx + CPUMCPU.Host.ldtr]
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| 131 | sidt [edx + CPUMCPU.Host.idtr]
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| 132 | sgdt [edx + CPUMCPU.Host.gdtr]
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| 133 | str [edx + CPUMCPU.Host.tr]
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| 134 | ; flags
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| 135 | pushfd
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| 136 | pop dword [edx + CPUMCPU.Host.eflags]
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| 137 |
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| 138 | ; control registers.
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| 139 | mov eax, cr0
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| 140 | mov [edx + CPUMCPU.Host.cr0], eax
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| 141 | ;Skip cr2; assume host os don't stuff things in cr2. (safe)
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| 142 | mov eax, cr3
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| 143 | mov [edx + CPUMCPU.Host.cr3], eax
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| 144 | mov eax, cr4
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| 145 | mov [edx + CPUMCPU.Host.cr4], eax
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| 146 |
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| 147 | CPUM_FROM_CPUMCPU(edx)
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| 148 | ; Load new gdt so we can do a far jump after going into 64 bits mode
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| 149 | lgdt [edx + CPUM.Hyper.gdtr]
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| 150 |
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| 151 | ;;
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| 152 | ;; Load Intermediate memory context.
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| 153 | ;;
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| 154 | FIXUP SWITCHER_FIX_INTER_CR3_HC, 1
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| 155 | mov eax, 0ffffffffh
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| 156 | mov cr3, eax
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| 157 | DEBUG_CHAR('?')
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| 158 |
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| 159 | ;;
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| 160 | ;; Jump to identity mapped location
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| 161 | ;;
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| 162 | FIXUP FIX_HC_2_ID_NEAR_REL, 1, NAME(IDEnterTarget) - NAME(Start)
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| 163 | jmp near NAME(IDEnterTarget)
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| 164 |
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| 165 |
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| 166 | ; We're now on identity mapped pages!
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| 167 | ALIGNCODE(16)
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| 168 | GLOBALNAME IDEnterTarget
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| 169 | DEBUG_CHAR('2')
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| 170 |
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| 171 | ; 1. Disable paging.
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| 172 | mov ebx, cr0
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| 173 | and ebx, ~X86_CR0_PG
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| 174 | mov cr0, ebx
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| 175 | DEBUG_CHAR('2')
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| 176 |
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| 177 | ; 2. Enable PAE.
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| 178 | mov ecx, cr4
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| 179 | or ecx, X86_CR4_PAE
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| 180 | mov cr4, ecx
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| 181 |
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| 182 | ; 3. Load long mode intermediate CR3.
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| 183 | FIXUP FIX_INTER_AMD64_CR3, 1
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| 184 | mov ecx, 0ffffffffh
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| 185 | mov cr3, ecx
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| 186 | DEBUG_CHAR('3')
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| 187 |
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| 188 | ; 4. Enable long mode.
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| 189 | mov ebp, edx
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| 190 | mov ecx, MSR_K6_EFER
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| 191 | rdmsr
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| 192 | or eax, MSR_K6_EFER_LME
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| 193 | wrmsr
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| 194 | mov edx, ebp
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| 195 | DEBUG_CHAR('4')
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| 196 |
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| 197 | ; 5. Enable paging.
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| 198 | or ebx, X86_CR0_PG
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| 199 | ; Disable ring 0 write protection too
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| 200 | and ebx, ~X86_CR0_WRITE_PROTECT
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| 201 | mov cr0, ebx
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| 202 | DEBUG_CHAR('5')
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| 203 |
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| 204 | ; Jump from compatability mode to 64-bit mode.
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| 205 | FIXUP FIX_ID_FAR32_TO_64BIT_MODE, 1, NAME(IDEnter64Mode) - NAME(Start)
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| 206 | jmp 0ffffh:0fffffffeh
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| 207 |
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| 208 | ;
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| 209 | ; We're in 64-bit mode (ds, ss, es, fs, gs are all bogus).
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| 210 | BITS 64
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| 211 | ALIGNCODE(16)
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| 212 | NAME(IDEnter64Mode):
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| 213 | DEBUG_CHAR('6')
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| 214 | jmp [NAME(pICEnterTarget) wrt rip]
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| 215 |
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| 216 | ; 64-bit jump target
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| 217 | NAME(pICEnterTarget):
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| 218 | FIXUP FIX_HC_64BIT_NOCHECK, 0, NAME(ICEnterTarget) - NAME(Start)
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| 219 | dq 0ffffffffffffffffh
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| 220 |
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| 221 | ; 64-bit pCpum address.
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| 222 | NAME(pCpumIC):
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| 223 | FIXUP FIX_GC_64_BIT_CPUM_OFF, 0, 0
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| 224 | dq 0ffffffffffffffffh
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| 225 |
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| 226 | ;
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| 227 | ; When we arrive here we're in 64 bits mode in the intermediate context
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| 228 | ;
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| 229 | ALIGNCODE(16)
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| 230 | GLOBALNAME ICEnterTarget
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| 231 | ; Load CPUM pointer into rdx
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| 232 | mov rdx, [NAME(pCpumIC) wrt rip]
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| 233 |
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| 234 | mov rax, cs
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| 235 | mov ds, rax
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| 236 | mov es, rax
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| 237 |
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| 238 | ; Setup stack; use the lss_esp, ss pair for lss
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| 239 | DEBUG_CHAR('7')
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| 240 | mov rsp, 0
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| 241 | mov eax, [rdx + CPUM.Hyper.esp]
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| 242 | mov [rdx + CPUM.Hyper.lss_esp], eax
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| 243 | lss esp, [rdx + CPUM.Hyper.lss_esp]
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| 244 |
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| 245 | ; load the hypervisor function address
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| 246 | mov r9, [rdx + CPUM.Hyper.eip]
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| 247 |
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| 248 | CPUMCPU_FROM_CPUM(edx)
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| 249 |
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| 250 | ; Check if we need to restore the guest FPU state
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| 251 | mov esi, [rdx + CPUMCPU.fUseFlags] ; esi == use flags.
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| 252 | test esi, CPUM_SYNC_FPU_STATE
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| 253 | jz near gth_fpu_no
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| 254 |
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| 255 | mov rax, cr0
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| 256 | mov rcx, rax ; save old CR0
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| 257 | and rax, ~(X86_CR0_TS | X86_CR0_EM)
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| 258 | mov cr0, rax
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| 259 | fxrstor [rdx + CPUMCPU.Guest.fpu]
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| 260 | mov cr0, rcx ; and restore old CR0 again
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| 261 |
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| 262 | and dword [rdx + CPUMCPU.fUseFlags], ~CPUM_SYNC_FPU_STATE
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| 263 |
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| 264 | gth_fpu_no:
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| 265 | ; Check if we need to restore the guest debug state
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| 266 | test esi, CPUM_SYNC_DEBUG_STATE
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| 267 | jz near gth_debug_no
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| 268 |
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| 269 | mov rax, qword [rdx + CPUMCPU.Guest.dr + 0*8]
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| 270 | mov dr0, rax
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| 271 | mov rax, qword [rdx + CPUMCPU.Guest.dr + 1*8]
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| 272 | mov dr1, rax
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| 273 | mov rax, qword [rdx + CPUMCPU.Guest.dr + 2*8]
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| 274 | mov dr2, rax
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| 275 | mov rax, qword [rdx + CPUMCPU.Guest.dr + 3*8]
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| 276 | mov dr3, rax
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| 277 | mov rax, qword [rdx + CPUMCPU.Guest.dr + 6*8]
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| 278 | mov dr6, rax ; not required for AMD-V
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| 279 |
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| 280 | and dword [rdx + CPUMCPU.fUseFlags], ~CPUM_SYNC_DEBUG_STATE
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| 281 |
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| 282 | gth_debug_no:
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| 283 |
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| 284 | ; parameter for all helper functions (pCtx)
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| 285 | lea rsi, [rdx + CPUMCPU.Guest.fpu]
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| 286 | call r9
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| 287 |
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| 288 | ; Load CPUM pointer into rdx
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| 289 | mov rdx, [NAME(pCpumIC) wrt rip]
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| 290 | CPUMCPU_FROM_CPUM(edx)
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| 291 |
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| 292 | ; Save the return code
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| 293 | mov [rdx + CPUMCPU.u32RetCode], eax
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| 294 |
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| 295 | ; now let's switch back
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| 296 | jmp NAME(VMMGCGuestToHostAsm) ; rax = returncode.
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| 297 |
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| 298 | ENDPROC vmmR0HostToGuestAsm
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| 299 |
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| 300 |
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| 301 | ;;
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| 302 | ; Trampoline for doing a call when starting the hyper visor execution.
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| 303 | ;
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| 304 | ; Push any arguments to the routine.
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| 305 | ; Push the argument frame size (cArg * 4).
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| 306 | ; Push the call target (_cdecl convention).
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| 307 | ; Push the address of this routine.
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| 308 | ;
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| 309 | ;
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| 310 | BITS 64
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| 311 | ALIGNCODE(16)
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| 312 | BEGINPROC vmmGCCallTrampoline
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| 313 | %ifdef DEBUG_STUFF
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| 314 | COM32_S_CHAR 'c'
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| 315 | COM32_S_CHAR 't'
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| 316 | COM32_S_CHAR '!'
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| 317 | %endif
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| 318 | int3
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| 319 | ENDPROC vmmGCCallTrampoline
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| 320 |
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| 321 |
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| 322 | ;;
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| 323 | ; The C interface.
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| 324 | ;
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| 325 | BITS 64
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| 326 | ALIGNCODE(16)
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| 327 | BEGINPROC vmmGCGuestToHost
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| 328 | %ifdef DEBUG_STUFF
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| 329 | push esi
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| 330 | COM_NEWLINE
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| 331 | DEBUG_CHAR('b')
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| 332 | DEBUG_CHAR('a')
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| 333 | DEBUG_CHAR('c')
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| 334 | DEBUG_CHAR('k')
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| 335 | DEBUG_CHAR('!')
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| 336 | COM_NEWLINE
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| 337 | pop esi
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| 338 | %endif
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| 339 | int3
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| 340 | ENDPROC vmmGCGuestToHost
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| 341 |
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| 342 | ;;
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| 343 | ; VMMGCGuestToHostAsm
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| 344 | ;
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| 345 | ; This is an alternative entry point which we'll be using
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| 346 | ; when the we have saved the guest state already or we haven't
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| 347 | ; been messing with the guest at all.
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| 348 | ;
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| 349 | ; @param eax Return code.
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| 350 | ; @uses eax, edx, ecx (or it may use them in the future)
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| 351 | ;
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| 352 | BITS 64
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| 353 | ALIGNCODE(16)
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| 354 | BEGINPROC VMMGCGuestToHostAsm
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| 355 | ;; We're still in the intermediate memory context!
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| 356 |
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| 357 | ;;
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| 358 | ;; Switch to compatibility mode, placing ourselves in identity mapped code.
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| 359 | ;;
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| 360 | jmp far [NAME(fpIDEnterTarget) wrt rip]
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| 361 |
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| 362 | ; 16:32 Pointer to IDEnterTarget.
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| 363 | NAME(fpIDEnterTarget):
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| 364 | FIXUP FIX_ID_32BIT, 0, NAME(IDExitTarget) - NAME(Start)
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| 365 | dd 0
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| 366 | FIXUP FIX_HYPER_CS, 0
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| 367 | dd 0
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| 368 |
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| 369 | ; We're now on identity mapped pages!
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| 370 | ALIGNCODE(16)
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| 371 | GLOBALNAME IDExitTarget
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| 372 | BITS 32
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| 373 | DEBUG_CHAR('1')
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| 374 |
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| 375 | ; 1. Deactivate long mode by turning off paging.
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| 376 | mov ebx, cr0
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| 377 | and ebx, ~X86_CR0_PG
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| 378 | mov cr0, ebx
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| 379 | DEBUG_CHAR('2')
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| 380 |
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| 381 | ; 2. Load intermediate page table.
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| 382 | FIXUP SWITCHER_FIX_INTER_CR3_HC, 1
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| 383 | mov edx, 0ffffffffh
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| 384 | mov cr3, edx
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| 385 | DEBUG_CHAR('3')
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| 386 |
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| 387 | ; 3. Disable long mode.
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| 388 | mov ecx, MSR_K6_EFER
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| 389 | rdmsr
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| 390 | DEBUG_CHAR('5')
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| 391 | and eax, ~(MSR_K6_EFER_LME)
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| 392 | wrmsr
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| 393 | DEBUG_CHAR('6')
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| 394 |
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| 395 | %ifndef NEED_PAE_ON_HOST
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| 396 | ; 3b. Disable PAE.
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| 397 | mov eax, cr4
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| 398 | and eax, ~X86_CR4_PAE
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| 399 | mov cr4, eax
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| 400 | DEBUG_CHAR('7')
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| 401 | %endif
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| 402 |
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| 403 | ; 4. Enable paging.
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| 404 | or ebx, X86_CR0_PG
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| 405 | mov cr0, ebx
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| 406 | jmp short just_a_jump
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| 407 | just_a_jump:
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| 408 | DEBUG_CHAR('8')
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| 409 |
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| 410 | ;;
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| 411 | ;; 5. Jump to guest code mapping of the code and load the Hypervisor CS.
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| 412 | ;;
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| 413 | FIXUP FIX_ID_2_HC_NEAR_REL, 1, NAME(ICExitTarget) - NAME(Start)
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| 414 | jmp near NAME(ICExitTarget)
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| 415 |
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| 416 | ;;
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| 417 | ;; When we arrive at this label we're at the
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| 418 | ;; intermediate mapping of the switching code.
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| 419 | ;;
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| 420 | BITS 32
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| 421 | ALIGNCODE(16)
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| 422 | GLOBALNAME ICExitTarget
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| 423 | DEBUG_CHAR('8')
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| 424 |
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| 425 | ; load the hypervisor data selector into ds & es
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| 426 | FIXUP FIX_HYPER_DS, 1
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| 427 | mov eax, 0ffffh
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| 428 | mov ds, eax
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| 429 | mov es, eax
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| 430 |
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| 431 | FIXUP FIX_GC_CPUM_OFF, 1, 0
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| 432 | mov edx, 0ffffffffh
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| 433 | CPUMCPU_FROM_CPUM(edx)
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| 434 | mov esi, [edx + CPUMCPU.Host.cr3]
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| 435 | mov cr3, esi
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| 436 |
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| 437 | ;; now we're in host memory context, let's restore regs
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| 438 | FIXUP FIX_HC_CPUM_OFF, 1, 0
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| 439 | mov edx, 0ffffffffh
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| 440 | CPUMCPU_FROM_CPUM(edx)
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| 441 |
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| 442 |
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| 443 | ; activate host gdt and idt
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| 444 | lgdt [edx + CPUMCPU.Host.gdtr]
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| 445 | DEBUG_CHAR('0')
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| 446 | lidt [edx + CPUMCPU.Host.idtr]
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| 447 | DEBUG_CHAR('1')
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| 448 |
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| 449 | ; Restore TSS selector; must mark it as not busy before using ltr (!)
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| 450 | ; ASSUME that this is supposed to be 'BUSY'. (saves 20-30 ticks on the T42p)
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| 451 | movzx eax, word [edx + CPUMCPU.Host.tr] ; eax <- TR
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| 452 | and al, 0F8h ; mask away TI and RPL bits, get descriptor offset.
|
|---|
| 453 | add eax, [edx + CPUMCPU.Host.gdtr + 2] ; eax <- GDTR.address + descriptor offset.
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| 454 | and dword [eax + 4], ~0200h ; clear busy flag (2nd type2 bit)
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| 455 | ltr word [edx + CPUMCPU.Host.tr]
|
|---|
| 456 |
|
|---|
| 457 | ; activate ldt
|
|---|
| 458 | DEBUG_CHAR('2')
|
|---|
| 459 | lldt [edx + CPUMCPU.Host.ldtr]
|
|---|
| 460 |
|
|---|
| 461 | ; Restore segment registers
|
|---|
| 462 | mov eax, [edx + CPUMCPU.Host.ds]
|
|---|
| 463 | mov ds, eax
|
|---|
| 464 | mov eax, [edx + CPUMCPU.Host.es]
|
|---|
| 465 | mov es, eax
|
|---|
| 466 | mov eax, [edx + CPUMCPU.Host.fs]
|
|---|
| 467 | mov fs, eax
|
|---|
| 468 | mov eax, [edx + CPUMCPU.Host.gs]
|
|---|
| 469 | mov gs, eax
|
|---|
| 470 | ; restore stack
|
|---|
| 471 | lss esp, [edx + CPUMCPU.Host.esp]
|
|---|
| 472 |
|
|---|
| 473 | ; Control registers.
|
|---|
| 474 | mov ecx, [edx + CPUMCPU.Host.cr4]
|
|---|
| 475 | mov cr4, ecx
|
|---|
| 476 | mov ecx, [edx + CPUMCPU.Host.cr0]
|
|---|
| 477 | mov cr0, ecx
|
|---|
| 478 | ;mov ecx, [edx + CPUMCPU.Host.cr2] ; assumes this is waste of time.
|
|---|
| 479 | ;mov cr2, ecx
|
|---|
| 480 |
|
|---|
| 481 | ; restore general registers.
|
|---|
| 482 | mov edi, [edx + CPUMCPU.Host.edi]
|
|---|
| 483 | mov esi, [edx + CPUMCPU.Host.esi]
|
|---|
| 484 | mov ebx, [edx + CPUMCPU.Host.ebx]
|
|---|
| 485 | mov ebp, [edx + CPUMCPU.Host.ebp]
|
|---|
| 486 |
|
|---|
| 487 | ; store the return code in eax
|
|---|
| 488 | mov eax, [edx + CPUMCPU.u32RetCode]
|
|---|
| 489 |
|
|---|
| 490 | push dword [edx + CPUMCPU.Host.eflags]
|
|---|
| 491 | popfd
|
|---|
| 492 |
|
|---|
| 493 | retf
|
|---|
| 494 |
|
|---|
| 495 | ENDPROC VMMGCGuestToHostAsm
|
|---|
| 496 |
|
|---|
| 497 | ;;
|
|---|
| 498 | ; VMMGCGuestToHostAsmHyperCtx
|
|---|
| 499 | ;
|
|---|
| 500 | ; This is an alternative entry point which we'll be using
|
|---|
| 501 | ; when the we have the hypervisor context and need to save
|
|---|
| 502 | ; that before going to the host.
|
|---|
| 503 | ;
|
|---|
| 504 | ; This is typically useful when abandoning the hypervisor
|
|---|
| 505 | ; because of a trap and want the trap state to be saved.
|
|---|
| 506 | ;
|
|---|
| 507 | ; @param eax Return code.
|
|---|
| 508 | ; @param ecx Points to CPUMCTXCORE.
|
|---|
| 509 | ; @uses eax,edx,ecx
|
|---|
| 510 | ALIGNCODE(16)
|
|---|
| 511 | BEGINPROC VMMGCGuestToHostAsmHyperCtx
|
|---|
| 512 | int3
|
|---|
| 513 |
|
|---|
| 514 | ;;
|
|---|
| 515 | ; VMMGCGuestToHostAsmGuestCtx
|
|---|
| 516 | ;
|
|---|
| 517 | ; Switches from Guest Context to Host Context.
|
|---|
| 518 | ; Of course it's only called from within the GC.
|
|---|
| 519 | ;
|
|---|
| 520 | ; @param eax Return code.
|
|---|
| 521 | ; @param esp + 4 Pointer to CPUMCTXCORE.
|
|---|
| 522 | ;
|
|---|
| 523 | ; @remark ASSUMES interrupts disabled.
|
|---|
| 524 | ;
|
|---|
| 525 | ALIGNCODE(16)
|
|---|
| 526 | BEGINPROC VMMGCGuestToHostAsmGuestCtx
|
|---|
| 527 | int3
|
|---|
| 528 |
|
|---|
| 529 | GLOBALNAME End
|
|---|
| 530 | ;
|
|---|
| 531 | ; The description string (in the text section).
|
|---|
| 532 | ;
|
|---|
| 533 | NAME(Description):
|
|---|
| 534 | db SWITCHER_DESCRIPTION
|
|---|
| 535 | db 0
|
|---|
| 536 |
|
|---|
| 537 | extern NAME(Relocate)
|
|---|
| 538 |
|
|---|
| 539 | ;
|
|---|
| 540 | ; End the fixup records.
|
|---|
| 541 | ;
|
|---|
| 542 | BEGINDATA
|
|---|
| 543 | db FIX_THE_END ; final entry.
|
|---|
| 544 | GLOBALNAME FixupsEnd
|
|---|
| 545 |
|
|---|
| 546 | ;;
|
|---|
| 547 | ; The switcher definition structure.
|
|---|
| 548 | ALIGNDATA(16)
|
|---|
| 549 | GLOBALNAME Def
|
|---|
| 550 | istruc VMMSWITCHERDEF
|
|---|
| 551 | at VMMSWITCHERDEF.pvCode, RTCCPTR_DEF NAME(Start)
|
|---|
| 552 | at VMMSWITCHERDEF.pvFixups, RTCCPTR_DEF NAME(Fixups)
|
|---|
| 553 | at VMMSWITCHERDEF.pszDesc, RTCCPTR_DEF NAME(Description)
|
|---|
| 554 | at VMMSWITCHERDEF.pfnRelocate, RTCCPTR_DEF NAME(Relocate)
|
|---|
| 555 | at VMMSWITCHERDEF.enmType, dd SWITCHER_TYPE
|
|---|
| 556 | at VMMSWITCHERDEF.cbCode, dd NAME(End) - NAME(Start)
|
|---|
| 557 | at VMMSWITCHERDEF.offR0HostToGuest, dd NAME(vmmR0HostToGuest) - NAME(Start)
|
|---|
| 558 | at VMMSWITCHERDEF.offGCGuestToHost, dd NAME(vmmGCGuestToHost) - NAME(Start)
|
|---|
| 559 | at VMMSWITCHERDEF.offGCCallTrampoline, dd NAME(vmmGCCallTrampoline) - NAME(Start)
|
|---|
| 560 | at VMMSWITCHERDEF.offGCGuestToHostAsm, dd NAME(VMMGCGuestToHostAsm) - NAME(Start)
|
|---|
| 561 | at VMMSWITCHERDEF.offGCGuestToHostAsmHyperCtx, dd NAME(VMMGCGuestToHostAsmHyperCtx)- NAME(Start)
|
|---|
| 562 | at VMMSWITCHERDEF.offGCGuestToHostAsmGuestCtx, dd NAME(VMMGCGuestToHostAsmGuestCtx)- NAME(Start)
|
|---|
| 563 | ; disasm help
|
|---|
| 564 | at VMMSWITCHERDEF.offHCCode0, dd 0
|
|---|
| 565 | at VMMSWITCHERDEF.cbHCCode0, dd NAME(IDEnterTarget) - NAME(Start)
|
|---|
| 566 | at VMMSWITCHERDEF.offHCCode1, dd NAME(ICExitTarget) - NAME(Start)
|
|---|
| 567 | at VMMSWITCHERDEF.cbHCCode1, dd NAME(End) - NAME(ICExitTarget)
|
|---|
| 568 | at VMMSWITCHERDEF.offIDCode0, dd NAME(IDEnterTarget) - NAME(Start)
|
|---|
| 569 | at VMMSWITCHERDEF.cbIDCode0, dd NAME(ICEnterTarget) - NAME(IDEnterTarget)
|
|---|
| 570 | at VMMSWITCHERDEF.offIDCode1, dd NAME(IDExitTarget) - NAME(Start)
|
|---|
| 571 | at VMMSWITCHERDEF.cbIDCode1, dd NAME(ICExitTarget) - NAME(Start)
|
|---|
| 572 | at VMMSWITCHERDEF.offGCCode, dd 0
|
|---|
| 573 | at VMMSWITCHERDEF.cbGCCode, dd 0
|
|---|
| 574 |
|
|---|
| 575 | iend
|
|---|
| 576 |
|
|---|
