1 | ; $Id: CPUMInternal.mac 47845 2013-08-19 14:10:34Z vboxsync $
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2 | ;; @file
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3 | ; CPUM - Internal header file (asm).
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2012 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 |
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18 | %include "VBox/asmdefs.mac"
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19 |
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20 |
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21 | %define CPUM_USED_FPU RT_BIT(0)
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22 | %define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
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23 | %define CPUM_USED_MANUAL_XMM_RESTORE RT_BIT(2)
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24 | %define CPUM_USE_SYSENTER RT_BIT(3)
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25 | %define CPUM_USE_SYSCALL RT_BIT(4)
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26 | %define CPUM_USE_DEBUG_REGS_HOST RT_BIT(5)
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27 | %define CPUM_USED_DEBUG_REGS_HOST RT_BIT(6)
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28 | %define CPUM_USE_DEBUG_REGS_HYPER RT_BIT(7)
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29 | %define CPUM_USED_DEBUG_REGS_HYPER RT_BIT(8)
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30 | %define CPUM_USED_DEBUG_REGS_GUEST RT_BIT(9)
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31 | %define CPUM_SYNC_FPU_STATE RT_BIT(16)
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32 | %define CPUM_SYNC_DEBUG_REGS_GUEST RT_BIT(17)
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33 | %define CPUM_SYNC_DEBUG_REGS_HYPER RT_BIT(18)
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34 |
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35 |
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36 | %define CPUM_HANDLER_DS 1
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37 | %define CPUM_HANDLER_ES 2
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38 | %define CPUM_HANDLER_FS 3
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39 | %define CPUM_HANDLER_GS 4
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40 | %define CPUM_HANDLER_IRET 5
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41 | %define CPUM_HANDLER_TYPEMASK 0ffh
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42 | %define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
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43 |
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44 | %define VMMGCRET_USED_FPU 040000000h
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45 |
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46 | %define FPUSTATE_SIZE 512
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47 |
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48 | ;; if anyone figures how to do %if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) in
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49 | ; nasm please tell / fix this hack.
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50 | %ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
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51 | %define fVBOX_WITH_HYBRID_32BIT_KERNEL 1
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52 | %else
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53 | %define fVBOX_WITH_HYBRID_32BIT_KERNEL 0
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54 | %endif
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55 |
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56 | struc CPUM
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57 | ;...
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58 | .offCPUMCPU0 resd 1
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59 | .fHostUseFlags resd 1
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60 |
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61 | ; CPUID eax=1
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62 | .CPUFeatures.edx resd 1
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63 | .CPUFeatures.ecx resd 1
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64 |
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65 | ; CPUID eax=0x80000001
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66 | .CPUFeaturesExt.edx resd 1
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67 | .CPUFeaturesExt.ecx resd 1
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68 |
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69 | .enmHostCpuVendor resd 1
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70 | .enmGuestCpuVendor resd 1
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71 |
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72 | ; CR4 masks
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73 | .CR4.AndMask resd 1
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74 | .CR4.OrMask resd 1
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75 | ; entered rawmode?
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76 | .fSyntheticCpu resb 1
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77 | .u8PortableCpuIdLevel resb 1
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78 | .fPendingRestore resb 1
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79 | %if RTHCPTR_CB == 8
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80 | .abPadding resb 5
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81 | %else
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82 | .abPadding resb 1
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83 | %endif
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84 |
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85 | ; CPUID leafs
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86 | .aGuestCpuIdStd resb 16*6
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87 | .aGuestCpuIdExt resb 16*10
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88 | .aGuestCpuIdCentaur resb 16*4
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89 | .aGuestCpuIdHyper resb 16*4
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90 | .GuestCpuIdDef resb 16
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91 |
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92 | %if HC_ARCH_BITS == 32
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93 | .abPadding2 resb 4
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94 | %endif
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95 | endstruc
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96 |
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97 | struc CPUMCPU
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98 | ;
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99 | ; Hypervisor Context.
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100 | ;
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101 | .Hyper.fpu resb 512
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102 | .Hyper.eax resq 1
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103 | .Hyper.ecx resq 1
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104 | .Hyper.edx resq 1
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105 | .Hyper.ebx resq 1
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106 | .Hyper.esp resq 1
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107 | .Hyper.ebp resq 1
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108 | .Hyper.esi resq 1
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109 | .Hyper.edi resq 1
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110 | .Hyper.r8 resq 1
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111 | .Hyper.r9 resq 1
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112 | .Hyper.r10 resq 1
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113 | .Hyper.r11 resq 1
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114 | .Hyper.r12 resq 1
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115 | .Hyper.r13 resq 1
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116 | .Hyper.r14 resq 1
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117 | .Hyper.r15 resq 1
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118 | .Hyper.es.Sel resw 1
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119 | .Hyper.es.PaddingSel resw 1
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120 | .Hyper.es.ValidSel resw 1
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121 | .Hyper.es.fFlags resw 1
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122 | .Hyper.es.u64Base resq 1
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123 | .Hyper.es.u32Limit resd 1
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124 | .Hyper.es.Attr resd 1
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125 | .Hyper.cs.Sel resw 1
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126 | .Hyper.cs.PaddingSel resw 1
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127 | .Hyper.cs.ValidSel resw 1
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128 | .Hyper.cs.fFlags resw 1
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129 | .Hyper.cs.u64Base resq 1
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130 | .Hyper.cs.u32Limit resd 1
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131 | .Hyper.cs.Attr resd 1
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132 | .Hyper.ss.Sel resw 1
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133 | .Hyper.ss.PaddingSel resw 1
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134 | .Hyper.ss.ValidSel resw 1
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135 | .Hyper.ss.fFlags resw 1
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136 | .Hyper.ss.u64Base resq 1
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137 | .Hyper.ss.u32Limit resd 1
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138 | .Hyper.ss.Attr resd 1
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139 | .Hyper.ds.Sel resw 1
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140 | .Hyper.ds.PaddingSel resw 1
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141 | .Hyper.ds.ValidSel resw 1
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142 | .Hyper.ds.fFlags resw 1
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143 | .Hyper.ds.u64Base resq 1
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144 | .Hyper.ds.u32Limit resd 1
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145 | .Hyper.ds.Attr resd 1
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146 | .Hyper.fs.Sel resw 1
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147 | .Hyper.fs.PaddingSel resw 1
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148 | .Hyper.fs.ValidSel resw 1
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149 | .Hyper.fs.fFlags resw 1
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150 | .Hyper.fs.u64Base resq 1
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151 | .Hyper.fs.u32Limit resd 1
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152 | .Hyper.fs.Attr resd 1
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153 | .Hyper.gs.Sel resw 1
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154 | .Hyper.gs.PaddingSel resw 1
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155 | .Hyper.gs.ValidSel resw 1
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156 | .Hyper.gs.fFlags resw 1
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157 | .Hyper.gs.u64Base resq 1
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158 | .Hyper.gs.u32Limit resd 1
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159 | .Hyper.gs.Attr resd 1
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160 | .Hyper.eip resq 1
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161 | .Hyper.eflags resq 1
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162 | .Hyper.cr0 resq 1
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163 | .Hyper.cr2 resq 1
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164 | .Hyper.cr3 resq 1
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165 | .Hyper.cr4 resq 1
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166 | .Hyper.dr resq 8
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167 | .Hyper.gdtrPadding resw 3
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168 | .Hyper.gdtr resw 0
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169 | .Hyper.gdtr.cbGdt resw 1
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170 | .Hyper.gdtr.pGdt resq 1
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171 | .Hyper.idtrPadding resw 3
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172 | .Hyper.idtr resw 0
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173 | .Hyper.idtr.cbIdt resw 1
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174 | .Hyper.idtr.pIdt resq 1
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175 | .Hyper.ldtr.Sel resw 1
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176 | .Hyper.ldtr.PaddingSel resw 1
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177 | .Hyper.ldtr.ValidSel resw 1
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178 | .Hyper.ldtr.fFlags resw 1
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179 | .Hyper.ldtr.u64Base resq 1
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180 | .Hyper.ldtr.u32Limit resd 1
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181 | .Hyper.ldtr.Attr resd 1
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182 | .Hyper.tr.Sel resw 1
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183 | .Hyper.tr.PaddingSel resw 1
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184 | .Hyper.tr.ValidSel resw 1
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185 | .Hyper.tr.fFlags resw 1
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186 | .Hyper.tr.u64Base resq 1
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187 | .Hyper.tr.u32Limit resd 1
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188 | .Hyper.tr.Attr resd 1
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189 | .Hyper.SysEnter.cs resb 8
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190 | .Hyper.SysEnter.eip resb 8
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191 | .Hyper.SysEnter.esp resb 8
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192 | .Hyper.msrEFER resb 8
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193 | .Hyper.msrSTAR resb 8
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194 | .Hyper.msrPAT resb 8
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195 | .Hyper.msrLSTAR resb 8
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196 | .Hyper.msrCSTAR resb 8
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197 | .Hyper.msrSFMASK resb 8
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198 | .Hyper.msrKERNELGSBASE resb 8
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199 | .Hyper.msrApicBase resb 8
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200 |
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201 | ;
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202 | ; Host context state
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203 | ;
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204 | alignb 64
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205 | .Host.fpu resb FPUSTATE_SIZE
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206 |
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207 | %if HC_ARCH_BITS == 64 || fVBOX_WITH_HYBRID_32BIT_KERNEL
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208 | ;.Host.rax resq 1 - scratch
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209 | .Host.rbx resq 1
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210 | ;.Host.rcx resq 1 - scratch
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211 | ;.Host.rdx resq 1 - scratch
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212 | .Host.rdi resq 1
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213 | .Host.rsi resq 1
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214 | .Host.rbp resq 1
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215 | .Host.rsp resq 1
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216 | ;.Host.r8 resq 1 - scratch
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217 | ;.Host.r9 resq 1 - scratch
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218 | .Host.r10 resq 1
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219 | .Host.r11 resq 1
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220 | .Host.r12 resq 1
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221 | .Host.r13 resq 1
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222 | .Host.r14 resq 1
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223 | .Host.r15 resq 1
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224 | ;.Host.rip resd 1 - scratch
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225 | .Host.rflags resq 1
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226 | %endif
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227 | %if HC_ARCH_BITS == 32
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228 | ;.Host.eax resd 1 - scratch
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229 | .Host.ebx resd 1
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230 | ;.Host.edx resd 1 - scratch
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231 | ;.Host.ecx resd 1 - scratch
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232 | .Host.edi resd 1
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233 | .Host.esi resd 1
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234 | .Host.ebp resd 1
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235 | .Host.eflags resd 1
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236 | ;.Host.eip resd 1 - scratch
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237 | ; lss pair!
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238 | .Host.esp resd 1
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239 | %endif
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240 | .Host.ss resw 1
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241 | .Host.ssPadding resw 1
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242 | .Host.gs resw 1
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243 | .Host.gsPadding resw 1
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244 | .Host.fs resw 1
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245 | .Host.fsPadding resw 1
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246 | .Host.es resw 1
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247 | .Host.esPadding resw 1
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248 | .Host.ds resw 1
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249 | .Host.dsPadding resw 1
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250 | .Host.cs resw 1
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251 | .Host.csPadding resw 1
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252 |
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253 | %if HC_ARCH_BITS == 32 && fVBOX_WITH_HYBRID_32BIT_KERNEL == 0
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254 | .Host.cr0 resd 1
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255 | ;.Host.cr2 resd 1 - scratch
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256 | .Host.cr3 resd 1
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257 | .Host.cr4 resd 1
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258 |
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259 | .Host.dr0 resd 1
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260 | .Host.dr1 resd 1
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261 | .Host.dr2 resd 1
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262 | .Host.dr3 resd 1
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263 | .Host.dr6 resd 1
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264 | .Host.dr7 resd 1
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265 |
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266 | .Host.gdtr resb 6 ; GDT limit + linear address
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267 | .Host.gdtrPadding resw 1
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268 | .Host.idtr resb 6 ; IDT limit + linear address
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269 | .Host.idtrPadding resw 1
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270 | .Host.ldtr resw 1
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271 | .Host.ldtrPadding resw 1
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272 | .Host.tr resw 1
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273 | .Host.trPadding resw 1
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274 |
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275 | .Host.SysEnterPadding resd 1
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276 | .Host.SysEnter.cs resq 1
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277 | .Host.SysEnter.eip resq 1
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278 | .Host.SysEnter.esp resq 1
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279 | .Host.efer resq 1
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280 |
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281 | %else ; 64-bit
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282 |
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283 | .Host.cr0 resq 1
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284 | ;.Host.cr2 resq 1 - scratch
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285 | .Host.cr3 resq 1
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286 | .Host.cr4 resq 1
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287 | .Host.cr8 resq 1
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288 |
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289 | .Host.dr0 resq 1
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290 | .Host.dr1 resq 1
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291 | .Host.dr2 resq 1
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292 | .Host.dr3 resq 1
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293 | .Host.dr6 resq 1
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294 | .Host.dr7 resq 1
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295 |
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296 | .Host.gdtr resb 10 ; GDT limit + linear address
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297 | .Host.gdtrPadding resw 1
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298 | .Host.idtr resb 10 ; IDT limit + linear address
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299 | .Host.idtrPadding resw 1
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300 | .Host.ldtr resw 1
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301 | .Host.ldtrPadding resw 1
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302 | .Host.tr resw 1
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303 | .Host.trPadding resw 1
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304 |
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305 | .Host.SysEnter.cs resq 1
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306 | .Host.SysEnter.eip resq 1
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307 | .Host.SysEnter.esp resq 1
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308 | .Host.FSbase resq 1
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309 | .Host.GSbase resq 1
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310 | .Host.efer resq 1
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311 | %endif ; 64-bit
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312 |
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313 | %ifdef VBOX_WITH_CRASHDUMP_MAGIC
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314 | .aMagic resb 56
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315 | .uMagic resq 1
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316 | %endif
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317 | ;
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318 | ; Guest context state
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319 | ; (Identical to the .Hyper chunk above.)
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320 | ;
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321 | alignb 64
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322 | .Guest.fpu resb 512
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323 | .Guest.eax resq 1
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324 | .Guest.ecx resq 1
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325 | .Guest.edx resq 1
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326 | .Guest.ebx resq 1
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327 | .Guest.esp resq 1
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328 | .Guest.ebp resq 1
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329 | .Guest.esi resq 1
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330 | .Guest.edi resq 1
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331 | .Guest.r8 resq 1
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332 | .Guest.r9 resq 1
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333 | .Guest.r10 resq 1
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334 | .Guest.r11 resq 1
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335 | .Guest.r12 resq 1
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336 | .Guest.r13 resq 1
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337 | .Guest.r14 resq 1
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338 | .Guest.r15 resq 1
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339 | .Guest.es.Sel resw 1
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340 | .Guest.es.PaddingSel resw 1
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341 | .Guest.es.ValidSel resw 1
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342 | .Guest.es.fFlags resw 1
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343 | .Guest.es.u64Base resq 1
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344 | .Guest.es.u32Limit resd 1
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345 | .Guest.es.Attr resd 1
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346 | .Guest.cs.Sel resw 1
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347 | .Guest.cs.PaddingSel resw 1
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348 | .Guest.cs.ValidSel resw 1
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349 | .Guest.cs.fFlags resw 1
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350 | .Guest.cs.u64Base resq 1
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351 | .Guest.cs.u32Limit resd 1
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352 | .Guest.cs.Attr resd 1
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353 | .Guest.ss.Sel resw 1
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354 | .Guest.ss.PaddingSel resw 1
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355 | .Guest.ss.ValidSel resw 1
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356 | .Guest.ss.fFlags resw 1
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357 | .Guest.ss.u64Base resq 1
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358 | .Guest.ss.u32Limit resd 1
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359 | .Guest.ss.Attr resd 1
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360 | .Guest.ds.Sel resw 1
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361 | .Guest.ds.PaddingSel resw 1
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362 | .Guest.ds.ValidSel resw 1
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363 | .Guest.ds.fFlags resw 1
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364 | .Guest.ds.u64Base resq 1
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365 | .Guest.ds.u32Limit resd 1
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366 | .Guest.ds.Attr resd 1
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367 | .Guest.fs.Sel resw 1
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368 | .Guest.fs.PaddingSel resw 1
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369 | .Guest.fs.ValidSel resw 1
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370 | .Guest.fs.fFlags resw 1
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371 | .Guest.fs.u64Base resq 1
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372 | .Guest.fs.u32Limit resd 1
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373 | .Guest.fs.Attr resd 1
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374 | .Guest.gs.Sel resw 1
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375 | .Guest.gs.PaddingSel resw 1
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376 | .Guest.gs.ValidSel resw 1
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377 | .Guest.gs.fFlags resw 1
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378 | .Guest.gs.u64Base resq 1
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379 | .Guest.gs.u32Limit resd 1
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380 | .Guest.gs.Attr resd 1
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381 | .Guest.eip resq 1
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382 | .Guest.eflags resq 1
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383 | .Guest.cr0 resq 1
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384 | .Guest.cr2 resq 1
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385 | .Guest.cr3 resq 1
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386 | .Guest.cr4 resq 1
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387 | .Guest.dr resq 8
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388 | .Guest.gdtrPadding resw 3
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389 | .Guest.gdtr resw 0
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390 | .Guest.gdtr.cbGdt resw 1
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391 | .Guest.gdtr.pGdt resq 1
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392 | .Guest.idtrPadding resw 3
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393 | .Guest.idtr resw 0
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394 | .Guest.idtr.cbIdt resw 1
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395 | .Guest.idtr.pIdt resq 1
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396 | .Guest.ldtr.Sel resw 1
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397 | .Guest.ldtr.PaddingSel resw 1
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398 | .Guest.ldtr.ValidSel resw 1
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399 | .Guest.ldtr.fFlags resw 1
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400 | .Guest.ldtr.u64Base resq 1
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401 | .Guest.ldtr.u32Limit resd 1
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402 | .Guest.ldtr.Attr resd 1
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403 | .Guest.tr.Sel resw 1
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404 | .Guest.tr.PaddingSel resw 1
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405 | .Guest.tr.ValidSel resw 1
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406 | .Guest.tr.fFlags resw 1
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407 | .Guest.tr.u64Base resq 1
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408 | .Guest.tr.u32Limit resd 1
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409 | .Guest.tr.Attr resd 1
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410 | .Guest.SysEnter.cs resb 8
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411 | .Guest.SysEnter.eip resb 8
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412 | .Guest.SysEnter.esp resb 8
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413 | .Guest.msrEFER resb 8
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414 | .Guest.msrSTAR resb 8
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415 | .Guest.msrPAT resb 8
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416 | .Guest.msrLSTAR resb 8
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417 | .Guest.msrCSTAR resb 8
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418 | .Guest.msrSFMASK resb 8
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419 | .Guest.msrKERNELGSBASE resb 8
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420 | .Guest.msrApicBase resb 8
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421 |
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422 |
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423 | alignb 64
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424 | .GuestMsrs.au64 resq 64
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425 |
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426 | ;
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427 | ; Other stuff.
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428 | ;
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429 | .fUseFlags resd 1
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430 | .fChanged resd 1
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431 | .offCPUM resd 1
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432 | .u32RetCode resd 1
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433 |
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434 | %ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
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435 | .pvApicBase RTR0PTR_RES 1
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436 | .fApicDisVectors resd 1
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437 | .fX2Apic resb 1
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438 | %else
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439 | .abPadding3 resb (RTR0PTR_CB + 4 + 1)
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440 | %endif
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441 |
|
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442 | .fRawEntered resb 1
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443 | .fRemEntered resb 1
|
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444 |
|
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445 | .abPadding2 resb (64 - 16 - RTR0PTR_CB - 4 - 1 - 2)
|
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446 | endstruc
|
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447 |
|
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448 |
|
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449 | ;;
|
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450 | ; Converts the CPUM pointer to CPUMCPU
|
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451 | ; @param %1 register name
|
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452 | %macro CPUMCPU_FROM_CPUM 1
|
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453 | add %1, dword [%1 + CPUM.offCPUMCPU0]
|
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454 | %endmacro
|
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455 |
|
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456 | ;;
|
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457 | ; Converts the CPUM pointer to CPUMCPU
|
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458 | ; @param %1 register name (PVM)
|
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459 | ; @param %2 register name (CPUMCPU offset)
|
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460 | %macro CPUMCPU_FROM_CPUM_WITH_OFFSET 2
|
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461 | add %1, %2
|
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462 | %endmacro
|
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463 |
|
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464 | ;;
|
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465 | ; Converts the CPUMCPU pointer to CPUM
|
---|
466 | ; @param %1 register name
|
---|
467 | %macro CPUM_FROM_CPUMCPU 1
|
---|
468 | sub %1, dword [%1 + CPUMCPU.offCPUM]
|
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469 | %endmacro
|
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470 |
|
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471 | ;;
|
---|
472 | ; Converts the CPUMCPU pointer to CPUM
|
---|
473 | ; @param %1 register name (PVM)
|
---|
474 | ; @param %2 register name (CPUMCPU offset)
|
---|
475 | %macro CPUM_FROM_CPUMCPU_WITH_OFFSET 2
|
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476 | sub %1, %2
|
---|
477 | %endmacro
|
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