VirtualBox

source: vbox/trunk/src/VBox/VMM/include/GICInternal.h@ 99734

Last change on this file since 99734 was 99734, checked in by vboxsync, 19 months ago

VMM/GIC: Updates to the implementation, implement forwarding of SGIs and PPIs, bugref:10404

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  • Property svn:keywords set to Author Date Id Revision
File size: 6.1 KB
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1/* $Id: GICInternal.h 99734 2023-05-10 17:28:24Z vboxsync $ */
2/** @file
3 * GIC - Generic Interrupt Controller Architecture (GICv3).
4 */
5
6/*
7 * Copyright (C) 2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28#ifndef VMM_INCLUDED_SRC_include_GICInternal_h
29#define VMM_INCLUDED_SRC_include_GICInternal_h
30#ifndef RT_WITHOUT_PRAGMA_ONCE
31# pragma once
32#endif
33
34#include <VBox/gic.h>
35#include <VBox/vmm/pdmdev.h>
36
37
38/** @defgroup grp_gic_int Internal
39 * @ingroup grp_gic
40 * @internal
41 * @{
42 */
43
44#define VMCPU_TO_GICCPU(a_pVCpu) (&(a_pVCpu)->gic.s)
45#define VM_TO_GIC(a_pVM) (&(a_pVM)->gic.s)
46#define VM_TO_GICDEV(a_pVM) CTX_SUFF(VM_TO_GIC(a_pVM)->pGicDev)
47#ifdef IN_RING3
48# define VMCPU_TO_DEVINS(a_pVCpu) ((a_pVCpu)->pVMR3->gic.s.pDevInsR3)
49#elif defined(IN_RING0)
50# error "Not implemented!"
51#endif
52
53/**
54 * GIC PDM instance data (per-VM).
55 */
56typedef struct GICDEV
57{
58 /** The distributor MMIO handle. */
59 IOMMMIOHANDLE hMmioDist;
60 /** The redistributor MMIO handle. */
61 IOMMMIOHANDLE hMmioReDist;
62} GICDEV;
63/** Pointer to a GIC device. */
64typedef GICDEV *PGICDEV;
65/** Pointer to a const GIC device. */
66typedef GICDEV const *PCGICDEV;
67
68
69/**
70 * GIC VM Instance data.
71 */
72typedef struct GIC
73{
74 /** The ring-3 device instance. */
75 PPDMDEVINSR3 pDevInsR3;
76} GIC;
77/** Pointer to GIC VM instance data. */
78typedef GIC *PGIC;
79/** Pointer to const GIC VM instance data. */
80typedef GIC const *PCGIC;
81AssertCompileSizeAlignment(GIC, 8);
82
83/**
84 * GIC VMCPU Instance data.
85 */
86typedef struct GICCPU
87{
88 /** @name The per vCPU redistributor data is kept here.
89 * @{ */
90
91 /** @name Physical LPI register state.
92 * @{ */
93 /** @} */
94
95 /** @name SGI and PPI redistributor register state.
96 * @{ */
97 /** Interrupt Group 0 Register. */
98 volatile uint32_t u32RegIGrp0;
99 /** Interrupt Configuration Register 0. */
100 volatile uint32_t u32RegICfg0;
101 /** Interrupt Configuration Register 1. */
102 volatile uint32_t u32RegICfg1;
103 /** Interrupt enabled bitmap. */
104 volatile uint32_t bmIntEnabled;
105 /** Current interrupt pending state. */
106 volatile uint32_t bmIntPending;
107 /** The current interrupt active state. */
108 volatile uint32_t bmIntActive;
109 /** The interrupt priority for each of the SGI/PPIs */
110 volatile uint8_t abIntPriority[GIC_INTID_RANGE_PPI_LAST + 1];
111 /** @} */
112
113 /** @name ICC system register state.
114 * @{ */
115 /** Flag whether group 0 interrupts are currently enabled. */
116 volatile bool fIrqGrp0Enabled;
117 /** Flag whether group 1 interrupts are currently enabled. */
118 volatile bool fIrqGrp1Enabled;
119 /** The current interrupt priority, only interrupts with a higher priority get signalled. */
120 volatile uint8_t bInterruptPriority;
121 /** The interrupt controller Binary Point Register for Group 0 interrupts. */
122 uint8_t bBinaryPointGrp0;
123 /** The interrupt controller Binary Point Register for Group 1 interrupts. */
124 uint8_t bBinaryPointGrp1;
125 /** @} */
126
127 /** @name Log Max counters
128 * @{ */
129 uint32_t cLogMaxAccessError;
130 uint32_t cLogMaxSetApicBaseAddr;
131 uint32_t cLogMaxGetApicBaseAddr;
132 uint32_t uAlignment4;
133 /** @} */
134
135 /** @name APIC statistics.
136 * @{ */
137#ifdef VBOX_WITH_STATISTICS
138 /** Number of MMIO reads in R3. */
139 STAMCOUNTER StatMmioReadR3;
140 /** Number of MMIO writes in R3. */
141 STAMCOUNTER StatMmioWriteR3;
142 /** Number of MSR reads in R3. */
143 STAMCOUNTER StatSysRegReadR3;
144 /** Number of MSR writes in R3. */
145 STAMCOUNTER StatSysRegWriteR3;
146
147# if 0 /* No R0 for now. */
148 /** Number of MMIO reads in RZ. */
149 STAMCOUNTER StatMmioReadRZ;
150 /** Number of MMIO writes in RZ. */
151 STAMCOUNTER StatMmioWriteRZ;
152 /** Number of MSR reads in RZ. */
153 STAMCOUNTER StatSysRegReadRZ;
154 /** Number of MSR writes in RZ. */
155 STAMCOUNTER StatSysRegWriteRZ;
156# endif
157#endif
158 /** @} */
159} GICCPU;
160/** Pointer to GIC VMCPU instance data. */
161typedef GICCPU *PGICCPU;
162/** Pointer to a const GIC VMCPU instance data. */
163typedef GICCPU const *PCGICCPU;
164
165DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gicDistMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb);
166DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gicDistMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb);
167
168DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gicReDistMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb);
169DECL_HIDDEN_CALLBACK(VBOXSTRICTRC) gicReDistMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb);
170
171DECLHIDDEN(void) gicResetCpu(PVMCPUCC pVCpu);
172
173DECLCALLBACK(int) gicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
174DECLCALLBACK(int) gicR3Destruct(PPDMDEVINS pDevIns);
175DECLCALLBACK(void) gicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
176DECLCALLBACK(void) gicR3Reset(PPDMDEVINS pDevIns);
177
178/** @} */
179
180#endif /* !VMM_INCLUDED_SRC_include_GICInternal_h */
181
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