1 | ;$Id: HMInternal.mac 87388 2021-01-22 23:26:29Z vboxsync $
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2 | ;; @file
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3 | ; HM - Internal header file.
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2020 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 |
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18 | %ifndef VMX_VMCS_GUEST_FIELD_ES
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19 | %include "VBox/vmm/hm_vmx.mac" ; For VMXRESTOREHOST
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20 | %endif
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21 |
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22 |
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23 | struc VMXVMCSINFO
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24 | .pfnStartVM RTR0PTR_RES 1
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25 | .HCPhysEPTP RTHCPHYS_RES 1
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26 | .fVmcsState resd 1
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27 | .fShadowVmcsState resd 1
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28 | .idHostCpuState resd 1
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29 | .idHostCpuExec resd 1
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30 | .cEntryMsrLoad resd 1
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31 | .cExitMsrStore resd 1
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32 | .cExitMsrLoad resd 1
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33 |
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34 | .u32PinCtls resd 1
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35 | .u32ProcCtls resd 1
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36 | .u32ProcCtls2 resd 1
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37 | .u32EntryCtls resd 1
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38 | .u32ExitCtls resd 1
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39 | .u32XcptBitmap resd 1
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40 | .u32XcptPFMask resd 1
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41 | .u32XcptPFMatch resd 1
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42 |
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43 | alignb 8
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44 | .u64TscOffset resq 1
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45 | .u64VmcsLinkPtr resq 1
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46 | .u64Cr0Mask resq 1
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47 | .u64Cr4Mask resq 1
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48 |
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49 | .pvVmcs RTR0PTR_RES 1
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50 | .pvShadowVmcs RTR0PTR_RES 1
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51 | .pbVirtApic RTR0PTR_RES 1
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52 | .pvMsrBitmap RTR0PTR_RES 1
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53 | .pvGuestMsrLoad RTR0PTR_RES 1
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54 | .pvGuestMsrStore RTR0PTR_RES 1
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55 | .pvHostMsrLoad RTR0PTR_RES 1
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56 |
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57 | .fWasInRealMode resb 1
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58 | .fSwitchedTo64on32Obsolete resb 1
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59 | alignb 8
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60 | .RealMode.AttrCS resd 1
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61 | .RealMode.AttrDS resd 1
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62 | .RealMode.AttrES resd 1
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63 | .RealMode.AttrFS resd 1
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64 | .RealMode.AttrGS resd 1
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65 | .RealMode.AttrSS resd 1
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66 | .RealMode.Eflags resd 1 ; should be EFlags?
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67 | .RealMode.fRealOnV86Active resb 1
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68 |
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69 | alignb 8
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70 | .HCPhysVmcs RTHCPHYS_RES 1
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71 | .HCPhysShadowVmcs RTHCPHYS_RES 1
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72 | .HCPhysVirtApic RTHCPHYS_RES 1
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73 | .HCPhysMsrBitmap RTHCPHYS_RES 1
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74 | .HCPhysGuestMsrLoad RTHCPHYS_RES 1
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75 | .HCPhysGuestMsrStore RTHCPHYS_RES 1
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76 | .HCPhysHostMsrLoad RTHCPHYS_RES 1
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77 |
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78 | .hMemObj RTR0PTR_RES 1
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79 |
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80 | alignb 8
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81 | .au64LbrFromIpMsr resq 32
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82 | .au64LbrToIpMsr resq 32
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83 | .u64LbrTosMsr resq 1
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84 | endstruc
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85 |
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86 | %define VMX_RESTORE_HOST_SEL_DS 0001h ;RT_BIT(0)
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87 | %define VMX_RESTORE_HOST_SEL_ES 0002h ;RT_BIT(1)
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88 | %define VMX_RESTORE_HOST_SEL_FS 0004h ;RT_BIT(2)
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89 | %define VMX_RESTORE_HOST_SEL_GS 0008h ;RT_BIT(3)
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90 | %define VMX_RESTORE_HOST_SEL_TR 0010h ;RT_BIT(4)
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91 | %define VMX_RESTORE_HOST_GDTR 0020h ;RT_BIT(5)
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92 | %define VMX_RESTORE_HOST_IDTR 0040h ;RT_BIT(6)
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93 | %define VMX_RESTORE_HOST_GDT_READ_ONLY 0080h ;RT_BIT(7)
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94 | %define VMX_RESTORE_HOST_GDT_NEED_WRITABLE 0100h ;RT_BIT(8)
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95 | %define VMX_RESTORE_HOST_REQUIRED 0200h ;RT_BIT(9) - must be the highest bit!
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96 | struc VMXRESTOREHOST
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97 | .uHostSelDS resw 1
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98 | .uHostSelES resw 1
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99 | .uHostSelFS resw 1
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100 | .uHostSelGS resw 1
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101 | .uHostSelTR resw 1
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102 | .abPadding0 resb 4
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103 | .HostGdtr resb 10
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104 | .abPadding1 resb 6
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105 | .HostGdtrRw resb 10
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106 | .abPadding2 resb 6
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107 | .HostIdtr resb 10
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108 | .uHostFSBase resq 1
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109 | .uHostGSBase resq 1
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110 | endstruc
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111 | AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtr, 16-2)
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112 | AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtrRw, 32-2)
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113 | AssertCompileMemberOffset(VMXRESTOREHOST, HostIdtr, 48-2)
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114 | AssertCompileMemberOffset(VMXRESTOREHOST, uHostFSBase, 56)
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115 | AssertCompileSize(VMXRESTOREHOST, 72)
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116 |
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117 | struc HMCPUVMX
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118 | .VmcsInfo resb VMXVMCSINFO_size
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119 | .VmcsInfoNstGst resb VMXVMCSINFO_size
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120 | .fSwitchedToNstGstVmcs resb 1
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121 | .fMergedNstGstCtls resb 1
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122 | .fCopiedNstGstToShadowVmcs resb 1
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123 | .fSwitchedNstGstFlushTlb resb 1
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124 |
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125 | alignb 8
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126 | .u64GstMsrApicBase resq 1
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127 |
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128 | .u64HostMsrLStar resq 1
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129 | .u64HostMsrStar resq 1
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130 | .u64HostMsrSfMask resq 1
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131 | .u64HostMsrKernelGsBase resq 1
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132 | .fLazyMsrs resd 1
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133 | .fUpdatedHostAutoMsrs resb 1
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134 | alignb 4
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135 | .fRestoreHostFlags resd 1
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136 | alignb 8
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137 | .RestoreHost resb VMXRESTOREHOST_size
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138 |
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139 | .LastError.idCurrentCpu resd 1
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140 | .LastError.idEnteredCpu resd 1
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141 | .LastError.HCPhysCurrentVmcs resq 1
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142 | .LastError.u32VmcsRev resd 1
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143 | .LastError.u32InstrError resd 1
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144 | .LastError.u32ExitReason resd 1
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145 | .LastError.u32GuestIntrState resd 1
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146 | endstruc
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147 |
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148 | struc HMCPUSVM
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149 | .pfnVMRun RTR0PTR_RES 1
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150 | .HCPhysVmcbHost RTHCPHYS_RES 1
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151 |
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152 | .hMemObjVmcbHost RTR0PTR_RES 1
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153 | .pvPadding RTR0PTR_RES 1 ; pointless padding
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154 |
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155 | .HCPhysVmcb RTHCPHYS_RES 1
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156 | .hMemObjVmcb RTR0PTR_RES 1
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157 | .pVmcb RTR0PTR_RES 1
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158 |
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159 | .HCPhysMsrBitmap RTHCPHYS_RES 1
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160 | .hMemObjMsrBitmap RTR0PTR_RES 1
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161 | .pvMsrBitmap RTR0PTR_RES 1
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162 |
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163 | .fSyncVTpr resb 1
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164 | .fEmulateLongModeSysEnterExit resb 1
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165 |
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166 | alignb 8
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167 | .u64HostTscAux resq 1
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168 |
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169 | .NstGstVmcbCache resb 40
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170 | endstruc
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171 |
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172 | struc HMCPU
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173 | .fCheckedTLBFlush resb 1
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174 | .fActive resb 1
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175 | .fLeaveDone resb 1
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176 | .fUsingHyperDR7 resb 1
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177 | .fForceTLBFlush resb 1
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178 | .fUseDebugLoop resb 1
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179 | .fUsingDebugLoop resb 1
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180 | .fDebugWantRdTscExit resb 1
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181 |
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182 | .fLoadSaveGuestXcr0 resb 1
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183 | .fGIMTrapXcptUD resb 1
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184 | .fTrapXcptGpForLovelyMesaDrv resb 1
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185 | .fSingleInstruction resb 1
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186 | .fClearTrapFlag resb 1
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187 | alignb 8
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188 |
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189 | .cWorldSwitchExits resd 1
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190 | .idLastCpu resd 1
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191 | .cTlbFlushes resd 1
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192 | .uCurrentAsid resd 1
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193 | .u32HMError resd 1
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194 | .rcLastExitToR3 resd 1
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195 | alignb 8
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196 | .fCtxChanged resq 1
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197 |
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198 | alignb 8
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199 | ;%if HMCPUVMX_size > HMCPUSVM_size
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200 | .u resb HMCPUVMX_size
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201 | ;%else
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202 | ; .u resb HMCPUSVM_size
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203 | ;%endif
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204 |
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205 | .Event.fPending resd 1
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206 | .Event.u32ErrCode resd 1
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207 | .Event.cbInstr resd 1
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208 | alignb 8
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209 | .Event.u64IntInfo resq 1
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210 | .Event.GCPtrFaultAddress RTGCPTR_RES 1
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211 |
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212 | .idEnteredCpu resd 1
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213 | .enmShadowMode resd 1
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214 | alignb 8
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215 | .aPdpes resq 4
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216 |
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217 | ; The remainer is disassembly state and statistics.
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218 | endstruc
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219 |
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