VirtualBox

source: vbox/trunk/src/VBox/VMM/include/HMVMXCommon.h@ 93902

Last change on this file since 93902 was 93728, checked in by vboxsync, 3 years ago

VMM/NEMR3Native-darwin: Apple requires to bind to all MSRs related to the LBR feature if it is enabled, this includes the INFO MSRs as well as the MSR_LER_{TO,FROM}_IP MSRs, bugref:9044
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1/* $Id: HMVMXCommon.h 93728 2022-02-14 14:32:18Z vboxsync $ */
2/** @file
3 * HM/VMX - Internal header file for sharing common bits between the
4 * VMX template code (which is also used with NEM on darwin) and HM.
5 */
6
7/*
8 * Copyright (C) 2006-2022 Oracle Corporation
9 *
10 * This file is part of VirtualBox Open Source Edition (OSE), as
11 * available from http://www.virtualbox.org. This file is free software;
12 * you can redistribute it and/or modify it under the terms of the GNU
13 * General Public License (GPL) as published by the Free Software
14 * Foundation, in version 2 as it comes in the "COPYING" file of the
15 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
16 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
17 */
18
19#ifndef VMM_INCLUDED_SRC_include_HMVMXCommon_h
20#define VMM_INCLUDED_SRC_include_HMVMXCommon_h
21#ifndef RT_WITHOUT_PRAGMA_ONCE
22# pragma once
23#endif
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27
28RT_C_DECLS_BEGIN
29
30
31/** @defgroup grp_hm_int Internal
32 * @ingroup grp_hm
33 * @internal
34 * @{
35 */
36
37/** @name HM_CHANGED_XXX
38 * HM CPU-context changed flags.
39 *
40 * These flags are used to keep track of which registers and state has been
41 * modified since they were imported back into the guest-CPU context.
42 *
43 * @{
44 */
45#define HM_CHANGED_HOST_CONTEXT UINT64_C(0x0000000000000001)
46#define HM_CHANGED_GUEST_RIP UINT64_C(0x0000000000000004)
47#define HM_CHANGED_GUEST_RFLAGS UINT64_C(0x0000000000000008)
48
49#define HM_CHANGED_GUEST_RAX UINT64_C(0x0000000000000010)
50#define HM_CHANGED_GUEST_RCX UINT64_C(0x0000000000000020)
51#define HM_CHANGED_GUEST_RDX UINT64_C(0x0000000000000040)
52#define HM_CHANGED_GUEST_RBX UINT64_C(0x0000000000000080)
53#define HM_CHANGED_GUEST_RSP UINT64_C(0x0000000000000100)
54#define HM_CHANGED_GUEST_RBP UINT64_C(0x0000000000000200)
55#define HM_CHANGED_GUEST_RSI UINT64_C(0x0000000000000400)
56#define HM_CHANGED_GUEST_RDI UINT64_C(0x0000000000000800)
57#define HM_CHANGED_GUEST_R8_R15 UINT64_C(0x0000000000001000)
58#define HM_CHANGED_GUEST_GPRS_MASK UINT64_C(0x0000000000001ff0)
59
60#define HM_CHANGED_GUEST_ES UINT64_C(0x0000000000002000)
61#define HM_CHANGED_GUEST_CS UINT64_C(0x0000000000004000)
62#define HM_CHANGED_GUEST_SS UINT64_C(0x0000000000008000)
63#define HM_CHANGED_GUEST_DS UINT64_C(0x0000000000010000)
64#define HM_CHANGED_GUEST_FS UINT64_C(0x0000000000020000)
65#define HM_CHANGED_GUEST_GS UINT64_C(0x0000000000040000)
66#define HM_CHANGED_GUEST_SREG_MASK UINT64_C(0x000000000007e000)
67
68#define HM_CHANGED_GUEST_GDTR UINT64_C(0x0000000000080000)
69#define HM_CHANGED_GUEST_IDTR UINT64_C(0x0000000000100000)
70#define HM_CHANGED_GUEST_LDTR UINT64_C(0x0000000000200000)
71#define HM_CHANGED_GUEST_TR UINT64_C(0x0000000000400000)
72#define HM_CHANGED_GUEST_TABLE_MASK UINT64_C(0x0000000000780000)
73
74#define HM_CHANGED_GUEST_CR0 UINT64_C(0x0000000000800000)
75#define HM_CHANGED_GUEST_CR2 UINT64_C(0x0000000001000000)
76#define HM_CHANGED_GUEST_CR3 UINT64_C(0x0000000002000000)
77#define HM_CHANGED_GUEST_CR4 UINT64_C(0x0000000004000000)
78#define HM_CHANGED_GUEST_CR_MASK UINT64_C(0x0000000007800000)
79
80#define HM_CHANGED_GUEST_APIC_TPR UINT64_C(0x0000000008000000)
81#define HM_CHANGED_GUEST_EFER_MSR UINT64_C(0x0000000010000000)
82
83#define HM_CHANGED_GUEST_DR0_DR3 UINT64_C(0x0000000020000000)
84#define HM_CHANGED_GUEST_DR6 UINT64_C(0x0000000040000000)
85#define HM_CHANGED_GUEST_DR7 UINT64_C(0x0000000080000000)
86#define HM_CHANGED_GUEST_DR_MASK UINT64_C(0x00000000e0000000)
87
88#define HM_CHANGED_GUEST_X87 UINT64_C(0x0000000100000000)
89#define HM_CHANGED_GUEST_SSE_AVX UINT64_C(0x0000000200000000)
90#define HM_CHANGED_GUEST_OTHER_XSAVE UINT64_C(0x0000000400000000)
91#define HM_CHANGED_GUEST_XCRx UINT64_C(0x0000000800000000)
92
93#define HM_CHANGED_GUEST_KERNEL_GS_BASE UINT64_C(0x0000001000000000)
94#define HM_CHANGED_GUEST_SYSCALL_MSRS UINT64_C(0x0000002000000000)
95#define HM_CHANGED_GUEST_SYSENTER_CS_MSR UINT64_C(0x0000004000000000)
96#define HM_CHANGED_GUEST_SYSENTER_EIP_MSR UINT64_C(0x0000008000000000)
97#define HM_CHANGED_GUEST_SYSENTER_ESP_MSR UINT64_C(0x0000010000000000)
98#define HM_CHANGED_GUEST_SYSENTER_MSR_MASK UINT64_C(0x000001c000000000)
99#define HM_CHANGED_GUEST_TSC_AUX UINT64_C(0x0000020000000000)
100#define HM_CHANGED_GUEST_OTHER_MSRS UINT64_C(0x0000040000000000)
101#define HM_CHANGED_GUEST_ALL_MSRS ( HM_CHANGED_GUEST_EFER \
102 | HM_CHANGED_GUEST_KERNEL_GS_BASE \
103 | HM_CHANGED_GUEST_SYSCALL_MSRS \
104 | HM_CHANGED_GUEST_SYSENTER_MSR_MASK \
105 | HM_CHANGED_GUEST_TSC_AUX \
106 | HM_CHANGED_GUEST_OTHER_MSRS)
107
108#define HM_CHANGED_GUEST_HWVIRT UINT64_C(0x0000080000000000)
109#define HM_CHANGED_GUEST_MASK UINT64_C(0x00000ffffffffffc)
110
111#define HM_CHANGED_KEEPER_STATE_MASK UINT64_C(0xffff000000000000)
112
113#define HM_CHANGED_VMX_XCPT_INTERCEPTS UINT64_C(0x0001000000000000)
114#define HM_CHANGED_VMX_GUEST_AUTO_MSRS UINT64_C(0x0002000000000000)
115#define HM_CHANGED_VMX_GUEST_LAZY_MSRS UINT64_C(0x0004000000000000)
116#define HM_CHANGED_VMX_ENTRY_EXIT_CTLS UINT64_C(0x0008000000000000)
117#define HM_CHANGED_VMX_MASK UINT64_C(0x000f000000000000)
118#define HM_CHANGED_VMX_HOST_GUEST_SHARED_STATE ( HM_CHANGED_GUEST_DR_MASK \
119 | HM_CHANGED_VMX_GUEST_LAZY_MSRS)
120
121#define HM_CHANGED_SVM_XCPT_INTERCEPTS UINT64_C(0x0001000000000000)
122#define HM_CHANGED_SVM_MASK UINT64_C(0x0001000000000000)
123#define HM_CHANGED_SVM_HOST_GUEST_SHARED_STATE HM_CHANGED_GUEST_DR_MASK
124
125#define HM_CHANGED_ALL_GUEST ( HM_CHANGED_GUEST_MASK \
126 | HM_CHANGED_KEEPER_STATE_MASK)
127
128/** Mask of what state might have changed when IEM raised an exception.
129 * This is a based on IEM_CPUMCTX_EXTRN_XCPT_MASK. */
130#define HM_CHANGED_RAISED_XCPT_MASK ( HM_CHANGED_GUEST_GPRS_MASK \
131 | HM_CHANGED_GUEST_RIP \
132 | HM_CHANGED_GUEST_RFLAGS \
133 | HM_CHANGED_GUEST_SS \
134 | HM_CHANGED_GUEST_CS \
135 | HM_CHANGED_GUEST_CR0 \
136 | HM_CHANGED_GUEST_CR3 \
137 | HM_CHANGED_GUEST_CR4 \
138 | HM_CHANGED_GUEST_APIC_TPR \
139 | HM_CHANGED_GUEST_EFER_MSR \
140 | HM_CHANGED_GUEST_DR7 \
141 | HM_CHANGED_GUEST_CR2 \
142 | HM_CHANGED_GUEST_SREG_MASK \
143 | HM_CHANGED_GUEST_TABLE_MASK)
144
145#ifdef VBOX_WITH_NESTED_HWVIRT_SVM
146/** Mask of what state might have changed when \#VMEXIT is emulated. */
147# define HM_CHANGED_SVM_VMEXIT_MASK ( HM_CHANGED_GUEST_RSP \
148 | HM_CHANGED_GUEST_RAX \
149 | HM_CHANGED_GUEST_RIP \
150 | HM_CHANGED_GUEST_RFLAGS \
151 | HM_CHANGED_GUEST_CS \
152 | HM_CHANGED_GUEST_SS \
153 | HM_CHANGED_GUEST_DS \
154 | HM_CHANGED_GUEST_ES \
155 | HM_CHANGED_GUEST_GDTR \
156 | HM_CHANGED_GUEST_IDTR \
157 | HM_CHANGED_GUEST_CR_MASK \
158 | HM_CHANGED_GUEST_EFER_MSR \
159 | HM_CHANGED_GUEST_DR6 \
160 | HM_CHANGED_GUEST_DR7 \
161 | HM_CHANGED_GUEST_OTHER_MSRS \
162 | HM_CHANGED_GUEST_HWVIRT \
163 | HM_CHANGED_SVM_MASK \
164 | HM_CHANGED_GUEST_APIC_TPR)
165
166/** Mask of what state might have changed when VMRUN is emulated. */
167# define HM_CHANGED_SVM_VMRUN_MASK HM_CHANGED_SVM_VMEXIT_MASK
168#endif
169#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
170/** Mask of what state might have changed when VM-exit is emulated.
171 *
172 * This is currently unused, but keeping it here in case we can get away a bit more
173 * fine-grained state handling.
174 *
175 * @note Update IEM_CPUMCTX_EXTRN_VMX_VMEXIT_MASK when this changes. */
176# define HM_CHANGED_VMX_VMEXIT_MASK ( HM_CHANGED_GUEST_CR0 | HM_CHANGED_GUEST_CR3 | HM_CHANGED_GUEST_CR4 \
177 | HM_CHANGED_GUEST_DR7 | HM_CHANGED_GUEST_DR6 \
178 | HM_CHANGED_GUEST_EFER_MSR \
179 | HM_CHANGED_GUEST_SYSENTER_MSR_MASK \
180 | HM_CHANGED_GUEST_OTHER_MSRS /* for PAT MSR */ \
181 | HM_CHANGED_GUEST_RIP | HM_CHANGED_GUEST_RSP | HM_CHANGED_GUEST_RFLAGS \
182 | HM_CHANGED_GUEST_SREG_MASK \
183 | HM_CHANGED_GUEST_TR \
184 | HM_CHANGED_GUEST_LDTR | HM_CHANGED_GUEST_GDTR | HM_CHANGED_GUEST_IDTR \
185 | HM_CHANGED_GUEST_HWVIRT )
186#endif
187/** @} */
188
189
190/** Maximum number of exit reason statistics counters. */
191#define MAX_EXITREASON_STAT 0x100
192#define MASK_EXITREASON_STAT 0xff
193#define MASK_INJECT_IRQ_STAT 0xff
194
195
196/**
197 * HM event.
198 *
199 * VT-x and AMD-V common event injection structure.
200 */
201typedef struct HMEVENT
202{
203 /** Whether the event is pending. */
204 uint32_t fPending;
205 /** The error-code associated with the event. */
206 uint32_t u32ErrCode;
207 /** The length of the instruction in bytes (only relevant for software
208 * interrupts or software exceptions). */
209 uint32_t cbInstr;
210 /** Alignment. */
211 uint32_t u32Padding;
212 /** The encoded event (VM-entry interruption-information for VT-x or EVENTINJ
213 * for SVM). */
214 uint64_t u64IntInfo;
215 /** Guest virtual address if this is a page-fault event. */
216 RTGCUINTPTR GCPtrFaultAddress;
217} HMEVENT;
218/** Pointer to a HMEVENT struct. */
219typedef HMEVENT *PHMEVENT;
220/** Pointer to a const HMEVENT struct. */
221typedef const HMEVENT *PCHMEVENT;
222AssertCompileSizeAlignment(HMEVENT, 8);
223
224
225typedef struct VMXVMCSINFOSHARED
226{
227 /** @name Real-mode emulation state.
228 * @{ */
229 /** Set if guest was executing in real mode (extra checks). */
230 bool fWasInRealMode;
231 /** Padding. */
232 bool afPadding0[7];
233 struct
234 {
235 X86DESCATTR AttrCS;
236 X86DESCATTR AttrDS;
237 X86DESCATTR AttrES;
238 X86DESCATTR AttrFS;
239 X86DESCATTR AttrGS;
240 X86DESCATTR AttrSS;
241 X86EFLAGS Eflags;
242 bool fRealOnV86Active;
243 bool afPadding1[3];
244 } RealMode;
245 /** @} */
246
247 /** @name LBR MSR data.
248 * @{ */
249 /** List of LastBranch-From-IP MSRs. */
250 uint64_t au64LbrFromIpMsr[32];
251 /** List of LastBranch-To-IP MSRs. */
252 uint64_t au64LbrToIpMsr[32];
253 /** List of LastBranch-Info MSRs. */
254 uint64_t au64LbrInfoMsr[32];
255 /** The MSR containing the index to the most recent branch record. */
256 uint64_t u64LbrTosMsr;
257 /** The MSR containing the last event record from IP value. */
258 uint64_t u64LerFromIpMsr;
259 /** The MSR containing the last event record to IP value. */
260 uint64_t u64LerToIpMsr;
261 /** @} */
262} VMXVMCSINFOSHARED;
263/** Pointer to a VMXVMCSINFOSHARED struct. */
264typedef VMXVMCSINFOSHARED *PVMXVMCSINFOSHARED;
265/** Pointer to a const VMXVMCSINFOSHARED struct. */
266typedef const VMXVMCSINFOSHARED *PCVMXVMCSINFOSHARED;
267AssertCompileSizeAlignment(VMXVMCSINFOSHARED, 8);
268
269
270/**
271 * VMX VMCS information, ring-0 only.
272 *
273 * This structure provides information maintained for and during the executing of a
274 * guest (or nested-guest) VMCS (VM control structure) using hardware-assisted VMX.
275 *
276 * Note! The members here are ordered and aligned based on estimated frequency of
277 * usage and grouped to fit within a cache line in hot code paths. Even subtle
278 * changes here have a noticeable effect in the bootsector benchmarks. Modify with
279 * care.
280 */
281typedef struct VMXVMCSINFO
282{
283 /** Pointer to the bits we share with ring-3. */
284 R3R0PTRTYPE(PVMXVMCSINFOSHARED) pShared;
285
286 /** @name Auxiliary information.
287 * @{ */
288 /** Host-physical address of the EPTP. */
289 RTHCPHYS HCPhysEPTP;
290 /** The VMCS launch state, see VMX_V_VMCS_LAUNCH_STATE_XXX. */
291 uint32_t fVmcsState;
292 /** The VMCS launch state of the shadow VMCS, see VMX_V_VMCS_LAUNCH_STATE_XXX. */
293 uint32_t fShadowVmcsState;
294 /** The host CPU for which its state has been exported to this VMCS. */
295 RTCPUID idHostCpuState;
296 /** The host CPU on which we last executed this VMCS. */
297 RTCPUID idHostCpuExec;
298 /** Number of guest MSRs in the VM-entry MSR-load area. */
299 uint32_t cEntryMsrLoad;
300 /** Number of guest MSRs in the VM-exit MSR-store area. */
301 uint32_t cExitMsrStore;
302 /** Number of host MSRs in the VM-exit MSR-load area. */
303 uint32_t cExitMsrLoad;
304 /** @} */
305
306 /** @name Cache of execution related VMCS fields.
307 * @{ */
308 /** Pin-based VM-execution controls. */
309 uint32_t u32PinCtls;
310 /** Processor-based VM-execution controls. */
311 uint32_t u32ProcCtls;
312 /** Secondary processor-based VM-execution controls. */
313 uint32_t u32ProcCtls2;
314 /** Tertiary processor-based VM-execution controls. */
315 uint64_t u64ProcCtls3;
316 /** VM-entry controls. */
317 uint32_t u32EntryCtls;
318 /** VM-exit controls. */
319 uint32_t u32ExitCtls;
320 /** Exception bitmap. */
321 uint32_t u32XcptBitmap;
322 /** Page-fault exception error-code mask. */
323 uint32_t u32XcptPFMask;
324 /** Page-fault exception error-code match. */
325 uint32_t u32XcptPFMatch;
326 /** Padding. */
327 uint32_t u32Alignment0;
328 /** TSC offset. */
329 uint64_t u64TscOffset;
330 /** VMCS link pointer. */
331 uint64_t u64VmcsLinkPtr;
332 /** CR0 guest/host mask. */
333 uint64_t u64Cr0Mask;
334 /** CR4 guest/host mask. */
335 uint64_t u64Cr4Mask;
336#ifndef IN_NEM_DARWIN
337 /** Current VMX_VMCS_HOST_RIP value (only used in HMR0A.asm). */
338 uint64_t uHostRip;
339 /** Current VMX_VMCS_HOST_RSP value (only used in HMR0A.asm). */
340 uint64_t uHostRsp;
341#endif
342 /** @} */
343
344 /** @name Host-virtual address of VMCS and related data structures.
345 * @{ */
346 /** The VMCS. */
347 R3R0PTRTYPE(void *) pvVmcs;
348 /** The shadow VMCS. */
349 R3R0PTRTYPE(void *) pvShadowVmcs;
350 /** The virtual-APIC page. */
351 R3R0PTRTYPE(uint8_t *) pbVirtApic;
352 /** The MSR bitmap. */
353 R3R0PTRTYPE(void *) pvMsrBitmap;
354 /** The VM-entry MSR-load area. */
355 R3R0PTRTYPE(void *) pvGuestMsrLoad;
356 /** The VM-exit MSR-store area. */
357 R3R0PTRTYPE(void *) pvGuestMsrStore;
358 /** The VM-exit MSR-load area. */
359 R3R0PTRTYPE(void *) pvHostMsrLoad;
360 /** @} */
361
362#ifndef IN_NEM_DARWIN
363 /** @name Host-physical address of VMCS and related data structures.
364 * @{ */
365 /** The VMCS. */
366 RTHCPHYS HCPhysVmcs;
367 /** The shadow VMCS. */
368 RTHCPHYS HCPhysShadowVmcs;
369 /** The virtual APIC page. */
370 RTHCPHYS HCPhysVirtApic;
371 /** The MSR bitmap. */
372 RTHCPHYS HCPhysMsrBitmap;
373 /** The VM-entry MSR-load area. */
374 RTHCPHYS HCPhysGuestMsrLoad;
375 /** The VM-exit MSR-store area. */
376 RTHCPHYS HCPhysGuestMsrStore;
377 /** The VM-exit MSR-load area. */
378 RTHCPHYS HCPhysHostMsrLoad;
379 /** @} */
380
381 /** @name R0-memory objects address for VMCS and related data structures.
382 * @{ */
383 /** R0-memory object for VMCS and related data structures. */
384 RTR0MEMOBJ hMemObj;
385 /** @} */
386#endif
387} VMXVMCSINFO;
388/** Pointer to a VMXVMCSINFOR0 struct. */
389typedef VMXVMCSINFO *PVMXVMCSINFO;
390/** Pointer to a const VMXVMCSINFO struct. */
391typedef const VMXVMCSINFO *PCVMXVMCSINFO;
392AssertCompileSizeAlignment(VMXVMCSINFO, 8);
393AssertCompileMemberAlignment(VMXVMCSINFO, u32PinCtls, 4);
394AssertCompileMemberAlignment(VMXVMCSINFO, u64VmcsLinkPtr, 8);
395AssertCompileMemberAlignment(VMXVMCSINFO, pvVmcs, 8);
396AssertCompileMemberAlignment(VMXVMCSINFO, pvShadowVmcs, 8);
397AssertCompileMemberAlignment(VMXVMCSINFO, pbVirtApic, 8);
398AssertCompileMemberAlignment(VMXVMCSINFO, pvMsrBitmap, 8);
399AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrLoad, 8);
400AssertCompileMemberAlignment(VMXVMCSINFO, pvGuestMsrStore, 8);
401AssertCompileMemberAlignment(VMXVMCSINFO, pvHostMsrLoad, 8);
402#ifndef IN_NEM_DARWIN
403AssertCompileMemberAlignment(VMXVMCSINFO, HCPhysVmcs, 8);
404AssertCompileMemberAlignment(VMXVMCSINFO, hMemObj, 8);
405#endif
406
407/** @} */
408
409/** @} */
410
411RT_C_DECLS_END
412
413#endif /* !VMM_INCLUDED_SRC_include_HMVMXCommon_h */
414
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