IEMInternal.h@ 42700

Last change on this file since 42700 was 42662, checked in by vboxsync, 13 years ago
IEM: Fixed verification mode interrupt injection bug.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 54.7 KB

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1	/* $Id: IEMInternal.h 42662 2012-08-07 14:12:04Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* Branch types.
74	*/
75	typedef enum IEMBRANCH
76	{
77	IEMBRANCH_JUMP = 1,
78	IEMBRANCH_CALL,
79	IEMBRANCH_TRAP,
80	IEMBRANCH_SOFTWARE_INT,
81	IEMBRANCH_HARDWARE_INT
82	} IEMBRANCH;
83	AssertCompileSize(IEMBRANCH, 4);
84
85
86	/**
87	* A FPU result.
88	*/
89	typedef struct IEMFPURESULT
90	{
91	/** The output value. */
92	RTFLOAT80U r80Result;
93	/** The output status. */
94	uint16_t FSW;
95	} IEMFPURESULT;
96	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
97	/** Pointer to a FPU result. */
98	typedef IEMFPURESULT *PIEMFPURESULT;
99	/** Pointer to a const FPU result. */
100	typedef IEMFPURESULT const *PCIEMFPURESULT;
101
102
103	/**
104	* A FPU result consisting of two output values and FSW.
105	*/
106	typedef struct IEMFPURESULTTWO
107	{
108	/** The first output value. */
109	RTFLOAT80U r80Result1;
110	/** The output status. */
111	uint16_t FSW;
112	/** The second output value. */
113	RTFLOAT80U r80Result2;
114	} IEMFPURESULTTWO;
115	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
116	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
117	/** Pointer to a FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
119	/** Pointer to a const FPU result consisting of two output values and FSW. */
120	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
121
122
123	#ifdef IEM_VERIFICATION_MODE
124
125	/**
126	* Verification event type.
127	*/
128	typedef enum IEMVERIFYEVENT
129	{
130	IEMVERIFYEVENT_INVALID = 0,
131	IEMVERIFYEVENT_IOPORT_READ,
132	IEMVERIFYEVENT_IOPORT_WRITE,
133	IEMVERIFYEVENT_RAM_WRITE,
134	IEMVERIFYEVENT_RAM_READ
135	} IEMVERIFYEVENT;
136
137	/** Checks if the event type is a RAM read or write. */
138	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
139
140	/**
141	* Verification event record.
142	*/
143	typedef struct IEMVERIFYEVTREC
144	{
145	/** Pointer to the next record in the list. */
146	struct IEMVERIFYEVTREC *pNext;
147	/** The event type. */
148	IEMVERIFYEVENT enmEvent;
149	/** The event data. */
150	union
151	{
152	/** IEMVERIFYEVENT_IOPORT_READ */
153	struct
154	{
155	RTIOPORT Port;
156	uint32_t cbValue;
157	} IOPortRead;
158
159	/** IEMVERIFYEVENT_IOPORT_WRITE */
160	struct
161	{
162	RTIOPORT Port;
163	uint32_t cbValue;
164	uint32_t u32Value;
165	} IOPortWrite;
166
167	/** IEMVERIFYEVENT_RAM_READ */
168	struct
169	{
170	RTGCPHYS GCPhys;
171	uint32_t cb;
172	} RamRead;
173
174	/** IEMVERIFYEVENT_RAM_WRITE */
175	struct
176	{
177	RTGCPHYS GCPhys;
178	uint32_t cb;
179	uint8_t ab[512];
180	} RamWrite;
181	} u;
182	} IEMVERIFYEVTREC;
183	/** Pointer to an IEM event verification records. */
184	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
185
186	#endif /* IEM_VERIFICATION_MODE */
187
188
189	/**
190	* The per-CPU IEM state.
191	*/
192	typedef struct IEMCPU
193	{
194	/** Pointer to the CPU context - ring-3 contex. */
195	R3PTRTYPE(PCPUMCTX) pCtxR3;
196	/** Pointer to the CPU context - ring-0 contex. */
197	R0PTRTYPE(PCPUMCTX) pCtxR0;
198	/** Pointer to the CPU context - raw-mode contex. */
199	RCPTRTYPE(PCPUMCTX) pCtxRC;
200
201	/** Offset of the VMCPU structure relative to this structure (negative). */
202	int32_t offVMCpu;
203	/** Offset of the VM structure relative to this structure (negative). */
204	int32_t offVM;
205
206	/** Whether to bypass access handlers or not. */
207	bool fByPassHandlers;
208	/** Explicit alignment padding. */
209	bool afAlignment0[3];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
264	* CPUM doesn't yet reflect. */
265	uint8_t uInjectCpl;
266	bool afAlignment2[4];
267	/** Mask of undefined eflags.
268	* The verifier will any difference in these flags. */
269	uint32_t fUndefinedEFlags;
270	/** The CS of the instruction being interpreted. */
271	RTSEL uOldCs;
272	/** The RIP of the instruction being interpreted. */
273	uint64_t uOldRip;
274	/** The physical address corresponding to abOpcodes[0]. */
275	RTGCPHYS GCPhysOpcodes;
276	#endif
277	/** @} */
278
279	/** @name Decoder state.
280	* @{ */
281
282	/** The default addressing mode . */
283	IEMMODE enmDefAddrMode;
284	/** The effective addressing mode . */
285	IEMMODE enmEffAddrMode;
286	/** The default operand mode . */
287	IEMMODE enmDefOpSize;
288	/** The effective operand mode . */
289	IEMMODE enmEffOpSize;
290
291	/** The prefix mask (IEM_OP_PRF_XXX). */
292	uint32_t fPrefixes;
293	/** The extra REX ModR/M register field bit (REX.R << 3). */
294	uint8_t uRexReg;
295	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
296	* (REX.B << 3). */
297	uint8_t uRexB;
298	/** The extra REX SIB index field bit (REX.X << 3). */
299	uint8_t uRexIndex;
300	/** The effective segment register (X86_SREG_XXX). */
301	uint8_t iEffSeg;
302
303	/** The current offset into abOpcodes. */
304	uint8_t offOpcode;
305	/** The size of what has currently been fetched into abOpcodes. */
306	uint8_t cbOpcode;
307	/** The opcode bytes. */
308	uint8_t abOpcode[15];
309	/** Offset into abOpcodes where the FPU instruction starts.
310	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
311	* instruction result is committed. */
312	uint8_t offFpuOpcode;
313
314	/** @}*/
315
316	/** Alignment padding for aMemMappings. */
317	uint8_t abAlignment2[4];
318
319	/** The number of active guest memory mappings. */
320	uint8_t cActiveMappings;
321	/** The next unused mapping index. */
322	uint8_t iNextMapping;
323	/** Records for tracking guest memory mappings. */
324	struct
325	{
326	/** The address of the mapped bytes. */
327	void *pv;
328	#if defined(IN_RC) && HC_ARCH_BITS == 64
329	uint32_t u32Alignment3; /*< Alignment padding. /
330	#endif
331	/** The access flags (IEM_ACCESS_XXX).
332	* IEM_ACCESS_INVALID if the entry is unused. */
333	uint32_t fAccess;
334	#if HC_ARCH_BITS == 64
335	uint32_t u32Alignment4; /*< Alignment padding. /
336	#endif
337	} aMemMappings[3];
338
339	/** Locking records for the mapped memory. */
340	union
341	{
342	PGMPAGEMAPLOCK Lock;
343	uint64_t au64Padding[2];
344	} aMemMappingLocks[3];
345
346	/** Bounce buffer info.
347	* This runs in parallel to aMemMappings. */
348	struct
349	{
350	/** The physical address of the first byte. */
351	RTGCPHYS GCPhysFirst;
352	/** The physical address of the second page. */
353	RTGCPHYS GCPhysSecond;
354	/** The number of bytes in the first page. */
355	uint16_t cbFirst;
356	/** The number of bytes in the second page. */
357	uint16_t cbSecond;
358	/** Whether it's unassigned memory. */
359	bool fUnassigned;
360	/** Explicit alignment padding. */
361	bool afAlignment5[3];
362	} aMemBbMappings[3];
363
364	/** Bounce buffer storage.
365	* This runs in parallel to aMemMappings and aMemBbMappings. */
366	struct
367	{
368	uint8_t ab[512];
369	} aBounceBuffers[3];
370
371	#ifdef IEM_VERIFICATION_MODE
372	/** The event verification records for what IEM did (LIFO). */
373	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
374	/** Insertion point for pIemEvtRecHead. */
375	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
376	/** The event verification records for what the other party did (FIFO). */
377	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
378	/** Insertion point for pOtherEvtRecHead. */
379	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
380	/** List of free event records. */
381	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
382	#endif
383	} IEMCPU;
384	/** Pointer to the per-CPU IEM state. */
385	typedef IEMCPU *PIEMCPU;
386
387	/** Converts a IEMCPU pointer to a VMCPU pointer.
388	* @returns VMCPU pointer.
389	* @param a_pIemCpu The IEM per CPU instance data.
390	*/
391	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
392
393	/** Converts a IEMCPU pointer to a VM pointer.
394	* @returns VM pointer.
395	* @param a_pIemCpu The IEM per CPU instance data.
396	*/
397	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
398
399	/** @name IEM_ACCESS_XXX - Access details.
400	* @{ */
401	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
402	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
403	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
404	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
405	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
406	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
407	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
408	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
409	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
410	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
411	/** The writes are partial, so if initialize the bounce buffer with the
412	* orignal RAM content. */
413	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
414	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
415	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
416	/** Read+write data alias. */
417	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
418	/** Write data alias. */
419	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
420	/** Read data alias. */
421	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
422	/** Instruction fetch alias. */
423	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
424	/** Stack write alias. */
425	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
426	/** Stack read alias. */
427	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
428	/** Stack read+write alias. */
429	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
430	/** Read system table alias. */
431	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
432	/** Read+write system table alias. */
433	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
434	/** @} */
435
436	/** @name Prefix constants (IEMCPU::fPrefixes)
437	* @{ */
438	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
439	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
440	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
441	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
442	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
443	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
444	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
445
446	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
447	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
448	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
449
450	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
451	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
452	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
453
454	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
455	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
456	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
457	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
458	/** @} */
459
460	/**
461	* Tests if verification mode is enabled.
462	*
463	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
464	* should therefore cause the compiler to eliminate the verification branch
465	* of an if statement. */
466	#ifdef IEM_VERIFICATION_MODE
467	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
468	#else
469	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
470	#endif
471
472	/**
473	* Indicates to the verifier that the given flag set is undefined.
474	*
475	* Can be invoked again to add more flags.
476	*
477	* This is a NOOP if the verifier isn't compiled in.
478	*/
479	#ifdef IEM_VERIFICATION_MODE
480	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
481	#else
482	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
483	#endif
484
485
486	/** @def IEM_DECL_IMPL_TYPE
487	* For typedef'ing an instruction implementation function.
488	*
489	* @param a_RetType The return type.
490	* @param a_Name The name of the type.
491	* @param a_ArgList The argument list enclosed in parentheses.
492	*/
493
494	/** @def IEM_DECL_IMPL_DEF
495	* For defining an instruction implementation function.
496	*
497	* @param a_RetType The return type.
498	* @param a_Name The name of the type.
499	* @param a_ArgList The argument list enclosed in parentheses.
500	*/
501
502	#if defined(__GNUC__) && defined(RT_ARCH_X86)
503	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
504	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
505	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
506	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
507
508	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
509	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
510	a_RetType (__fastcall a_Name) a_ArgList
511	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
512	a_RetType __fastcall a_Name a_ArgList
513
514	#else
515	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
516	a_RetType (VBOXCALL a_Name) a_ArgList
517	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
518	a_RetType VBOXCALL a_Name a_ArgList
519
520	#endif
521
522	/** @name Arithmetic assignment operations on bytes (binary).
523	* @{ */
524	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
525	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
526	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
527	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
528	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
529	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
530	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
531	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
532	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
533	/** @} */
534
535	/** @name Arithmetic assignment operations on words (binary).
536	* @{ */
537	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
538	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
539	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
540	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
541	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
542	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
543	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
544	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
545	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
546	/** @} */
547
548	/** @name Arithmetic assignment operations on double words (binary).
549	* @{ */
550	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
551	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
552	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
553	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
554	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
555	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
556	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
557	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
558	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
559	/** @} */
560
561	/** @name Arithmetic assignment operations on quad words (binary).
562	* @{ */
563	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
564	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
565	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
566	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
567	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
568	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
569	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
570	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
571	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
572	/** @} */
573
574	/** @name Compare operations (thrown in with the binary ops).
575	* @{ */
576	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
577	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
578	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
579	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
580	/** @} */
581
582	/** @name Test operations (thrown in with the binary ops).
583	* @{ */
584	FNIEMAIMPLBINU8 iemAImpl_test_u8;
585	FNIEMAIMPLBINU16 iemAImpl_test_u16;
586	FNIEMAIMPLBINU32 iemAImpl_test_u32;
587	FNIEMAIMPLBINU64 iemAImpl_test_u64;
588	/** @} */
589
590	/** @name Bit operations operations (thrown in with the binary ops).
591	* @{ */
592	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
593	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
594	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
595	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
596	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
597	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
598	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
599	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
600	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
601	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
602	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
603	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
604	/** @} */
605
606	/** @name Exchange memory with register operations.
607	* @{ */
608	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
609	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
610	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
611	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
612	/** @} */
613
614	/** @name Exchange and add operations.
615	* @{ */
616	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
617	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
618	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
619	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
620	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
621	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
622	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
623	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
624	/** @} */
625
626	/** @name Compare and exchange.
627	* @{ */
628	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
629	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
630	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
631	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
632	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
633	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
634	#ifdef RT_ARCH_X86
635	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
636	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
637	#else
638	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
639	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
640	#endif
641	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
642	uint32_t *pEFlags));
643	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
644	uint32_t *pEFlags));
645	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
646	uint32_t *pEFlags));
647	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
648	uint32_t *pEFlags));
649	/** @} */
650
651	/** @name Double precision shifts
652	* @{ */
653	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
654	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
655	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
656	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
657	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
658	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
659	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
660	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
661	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
662	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
663	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
664	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
665	/** @} */
666
667
668	/** @name Bit search operations (thrown in with the binary ops).
669	* @{ */
670	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
671	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
672	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
673	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
674	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
675	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
676	/** @} */
677
678	/** @name Signed multiplication operations (thrown in with the binary ops).
679	* @{ */
680	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
681	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
682	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
683	/** @} */
684
685	/** @name Arithmetic assignment operations on bytes (unary).
686	* @{ */
687	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
688	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
689	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
690	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
691	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
692	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
693	/** @} */
694
695	/** @name Arithmetic assignment operations on words (unary).
696	* @{ */
697	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
698	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
699	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
700	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
701	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
702	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
703	/** @} */
704
705	/** @name Arithmetic assignment operations on double words (unary).
706	* @{ */
707	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
708	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
709	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
710	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
711	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
712	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
713	/** @} */
714
715	/** @name Arithmetic assignment operations on quad words (unary).
716	* @{ */
717	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
718	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
719	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
720	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
721	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
722	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
723	/** @} */
724
725
726	/** @name Shift operations on bytes (Group 2).
727	* @{ */
728	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
729	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
730	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
731	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
732	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
733	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
734	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
735	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
736	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
737	/** @} */
738
739	/** @name Shift operations on words (Group 2).
740	* @{ */
741	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
742	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
743	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
744	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
745	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
746	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
747	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
748	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
749	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
750	/** @} */
751
752	/** @name Shift operations on double words (Group 2).
753	* @{ */
754	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
755	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
756	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
757	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
758	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
759	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
760	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
761	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
762	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
763	/** @} */
764
765	/** @name Shift operations on words (Group 2).
766	* @{ */
767	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
768	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
769	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
770	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
771	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
772	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
773	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
774	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
775	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
776	/** @} */
777
778	/** @name Multiplication and division operations.
779	* @{ */
780	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
781	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
782	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
783	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
784
785	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
786	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
787	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
788	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
789
790	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
791	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
792	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
793	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
794
795	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
796	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
797	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
798	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
799	/** @} */
800
801	/** @name Byte Swap.
802	* @{ */
803	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
804	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
805	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
806	/** @} */
807
808
809	/** @name FPU operations taking a 32-bit float argument
810	* @{ */
811	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
812	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
813	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
814
815	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
816	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
817	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
818
819	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
820	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
821	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
822	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
823	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
824	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
825	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
826
827	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
828	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
829	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
830	/** @} */
831
832	/** @name FPU operations taking a 64-bit float argument
833	* @{ */
834	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
835	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
836	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
837
838	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
839	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
840	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
841	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
842	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
843	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
844
845	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
846	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
847	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
848	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
849	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
850	/** @} */
851
852	/** @name FPU operations taking a 80-bit float argument
853	* @{ */
854	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
855	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
856	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
857	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
858	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
859	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
860	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
861	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
862	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
863	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
864	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
865	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
866
867	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
868	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
869
870	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
871	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
872	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
873	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
874	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
875
876	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
877	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
878	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
879	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
880	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
881
882	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
883	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
884	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
885	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
886	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
887	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
888	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
889	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
890	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
891	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
892
893	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
894	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
895	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
896	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
897
898	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
899	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
900	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
901	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
902	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
903	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
904	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
905	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
906	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
907
908	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
909	PCRTFLOAT80U pr80Val));
910	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
911	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
912	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
913	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
914
915	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
916	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
917	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
918
919	/** @} */
920
921	/** @name FPU operations taking a 16-bit signed integer argument
922	* @{ */
923	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
924	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
925	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
926
927	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
928	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
929	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
930	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
931	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
932	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
933
934	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
935	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
936
937	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
938	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
939	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
940	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
941	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
942	/** @} */
943
944	/** @name FPU operations taking a 32-bit signed integer argument
945	* @{ */
946	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
947	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
948	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
949
950	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
951	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
952	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
953	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
954	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
955	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
956
957	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
958	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
959
960	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
961	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
962	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
963	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
964	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
965	/** @} */
966
967	/** @name FPU operations taking a 64-bit signed integer argument
968	* @{ */
969	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
970	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
971	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
972
973	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
974	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
975	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
976	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
977	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
978	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
979
980	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
981	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
982
983	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
984	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
985	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
986	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
987	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
988	/** @} */
989
990
991	/** @name Function tables.
992	* @{
993	*/
994
995	/**
996	* Function table for a binary operator providing implementation based on
997	* operand size.
998	*/
999	typedef struct IEMOPBINSIZES
1000	{
1001	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1002	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1003	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1004	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1005	} IEMOPBINSIZES;
1006	/** Pointer to a binary operator function table. */
1007	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1008
1009
1010	/**
1011	* Function table for a unary operator providing implementation based on
1012	* operand size.
1013	*/
1014	typedef struct IEMOPUNARYSIZES
1015	{
1016	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1017	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1018	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1019	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1020	} IEMOPUNARYSIZES;
1021	/** Pointer to a unary operator function table. */
1022	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1023
1024
1025	/**
1026	* Function table for a shift operator providing implementation based on
1027	* operand size.
1028	*/
1029	typedef struct IEMOPSHIFTSIZES
1030	{
1031	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1032	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1033	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1034	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1035	} IEMOPSHIFTSIZES;
1036	/** Pointer to a shift operator function table. */
1037	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1038
1039
1040	/**
1041	* Function table for a multiplication or division operation.
1042	*/
1043	typedef struct IEMOPMULDIVSIZES
1044	{
1045	PFNIEMAIMPLMULDIVU8 pfnU8;
1046	PFNIEMAIMPLMULDIVU16 pfnU16;
1047	PFNIEMAIMPLMULDIVU32 pfnU32;
1048	PFNIEMAIMPLMULDIVU64 pfnU64;
1049	} IEMOPMULDIVSIZES;
1050	/** Pointer to a multiplication or division operation function table. */
1051	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1052
1053
1054	/**
1055	* Function table for a double precision shift operator providing implementation
1056	* based on operand size.
1057	*/
1058	typedef struct IEMOPSHIFTDBLSIZES
1059	{
1060	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1061	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1062	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1063	} IEMOPSHIFTDBLSIZES;
1064	/** Pointer to a double precision shift function table. */
1065	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1066
1067
1068	/** @} */
1069
1070
1071	/** @name C instruction implementations for anything slightly complicated.
1072	* @{ */
1073
1074	/**
1075	* For typedef'ing or declaring a C instruction implementation function taking
1076	* no extra arguments.
1077	*
1078	* @param a_Name The name of the type.
1079	*/
1080	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1081	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1082	/**
1083	* For defining a C instruction implementation function taking no extra
1084	* arguments.
1085	*
1086	* @param a_Name The name of the function
1087	*/
1088	# define IEM_CIMPL_DEF_0(a_Name) \
1089	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1090	/**
1091	* For calling a C instruction implementation function taking no extra
1092	* arguments.
1093	*
1094	* This special call macro adds default arguments to the call and allow us to
1095	* change these later.
1096	*
1097	* @param a_fn The name of the function.
1098	*/
1099	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1100
1101	/**
1102	* For typedef'ing or declaring a C instruction implementation function taking
1103	* one extra argument.
1104	*
1105	* @param a_Name The name of the type.
1106	* @param a_Type0 The argument type.
1107	* @param a_Arg0 The argument name.
1108	*/
1109	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1110	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1111	/**
1112	* For defining a C instruction implementation function taking one extra
1113	* argument.
1114	*
1115	* @param a_Name The name of the function
1116	* @param a_Type0 The argument type.
1117	* @param a_Arg0 The argument name.
1118	*/
1119	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1120	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1121	/**
1122	* For calling a C instruction implementation function taking one extra
1123	* argument.
1124	*
1125	* This special call macro adds default arguments to the call and allow us to
1126	* change these later.
1127	*
1128	* @param a_fn The name of the function.
1129	* @param a0 The name of the 1st argument.
1130	*/
1131	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1132
1133	/**
1134	* For typedef'ing or declaring a C instruction implementation function taking
1135	* two extra arguments.
1136	*
1137	* @param a_Name The name of the type.
1138	* @param a_Type0 The type of the 1st argument
1139	* @param a_Arg0 The name of the 1st argument.
1140	* @param a_Type1 The type of the 2nd argument.
1141	* @param a_Arg1 The name of the 2nd argument.
1142	*/
1143	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1144	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1145	/**
1146	* For defining a C instruction implementation function taking two extra
1147	* arguments.
1148	*
1149	* @param a_Name The name of the function.
1150	* @param a_Type0 The type of the 1st argument
1151	* @param a_Arg0 The name of the 1st argument.
1152	* @param a_Type1 The type of the 2nd argument.
1153	* @param a_Arg1 The name of the 2nd argument.
1154	*/
1155	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1156	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1157	/**
1158	* For calling a C instruction implementation function taking two extra
1159	* arguments.
1160	*
1161	* This special call macro adds default arguments to the call and allow us to
1162	* change these later.
1163	*
1164	* @param a_fn The name of the function.
1165	* @param a0 The name of the 1st argument.
1166	* @param a1 The name of the 2nd argument.
1167	*/
1168	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1169
1170	/**
1171	* For typedef'ing or declaring a C instruction implementation function taking
1172	* three extra arguments.
1173	*
1174	* @param a_Name The name of the type.
1175	* @param a_Type0 The type of the 1st argument
1176	* @param a_Arg0 The name of the 1st argument.
1177	* @param a_Type1 The type of the 2nd argument.
1178	* @param a_Arg1 The name of the 2nd argument.
1179	* @param a_Type2 The type of the 3rd argument.
1180	* @param a_Arg2 The name of the 3rd argument.
1181	*/
1182	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1183	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1184	/**
1185	* For defining a C instruction implementation function taking three extra
1186	* arguments.
1187	*
1188	* @param a_Name The name of the function.
1189	* @param a_Type0 The type of the 1st argument
1190	* @param a_Arg0 The name of the 1st argument.
1191	* @param a_Type1 The type of the 2nd argument.
1192	* @param a_Arg1 The name of the 2nd argument.
1193	* @param a_Type2 The type of the 3rd argument.
1194	* @param a_Arg2 The name of the 3rd argument.
1195	*/
1196	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1197	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1198	/**
1199	* For calling a C instruction implementation function taking three extra
1200	* arguments.
1201	*
1202	* This special call macro adds default arguments to the call and allow us to
1203	* change these later.
1204	*
1205	* @param a_fn The name of the function.
1206	* @param a0 The name of the 1st argument.
1207	* @param a1 The name of the 2nd argument.
1208	* @param a2 The name of the 3rd argument.
1209	*/
1210	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1211
1212
1213	/**
1214	* For typedef'ing or declaring a C instruction implementation function taking
1215	* four extra arguments.
1216	*
1217	* @param a_Name The name of the type.
1218	* @param a_Type0 The type of the 1st argument
1219	* @param a_Arg0 The name of the 1st argument.
1220	* @param a_Type1 The type of the 2nd argument.
1221	* @param a_Arg1 The name of the 2nd argument.
1222	* @param a_Type2 The type of the 3rd argument.
1223	* @param a_Arg2 The name of the 3rd argument.
1224	* @param a_Type3 The type of the 4th argument.
1225	* @param a_Arg3 The name of the 4th argument.
1226	*/
1227	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1228	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1229	/**
1230	* For defining a C instruction implementation function taking four extra
1231	* arguments.
1232	*
1233	* @param a_Name The name of the function.
1234	* @param a_Type0 The type of the 1st argument
1235	* @param a_Arg0 The name of the 1st argument.
1236	* @param a_Type1 The type of the 2nd argument.
1237	* @param a_Arg1 The name of the 2nd argument.
1238	* @param a_Type2 The type of the 3rd argument.
1239	* @param a_Arg2 The name of the 3rd argument.
1240	* @param a_Type3 The type of the 4th argument.
1241	* @param a_Arg3 The name of the 4th argument.
1242	*/
1243	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1244	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1245	a_Type2 a_Arg2, a_Type3 a_Arg3))
1246	/**
1247	* For calling a C instruction implementation function taking four extra
1248	* arguments.
1249	*
1250	* This special call macro adds default arguments to the call and allow us to
1251	* change these later.
1252	*
1253	* @param a_fn The name of the function.
1254	* @param a0 The name of the 1st argument.
1255	* @param a1 The name of the 2nd argument.
1256	* @param a2 The name of the 3rd argument.
1257	* @param a3 The name of the 4th argument.
1258	*/
1259	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1260
1261
1262	/**
1263	* For typedef'ing or declaring a C instruction implementation function taking
1264	* five extra arguments.
1265	*
1266	* @param a_Name The name of the type.
1267	* @param a_Type0 The type of the 1st argument
1268	* @param a_Arg0 The name of the 1st argument.
1269	* @param a_Type1 The type of the 2nd argument.
1270	* @param a_Arg1 The name of the 2nd argument.
1271	* @param a_Type2 The type of the 3rd argument.
1272	* @param a_Arg2 The name of the 3rd argument.
1273	* @param a_Type3 The type of the 4th argument.
1274	* @param a_Arg3 The name of the 4th argument.
1275	* @param a_Type4 The type of the 5th argument.
1276	* @param a_Arg4 The name of the 5th argument.
1277	*/
1278	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1279	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1280	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1281	a_Type3 a_Arg3, a_Type4 a_Arg4))
1282	/**
1283	* For defining a C instruction implementation function taking five extra
1284	* arguments.
1285	*
1286	* @param a_Name The name of the function.
1287	* @param a_Type0 The type of the 1st argument
1288	* @param a_Arg0 The name of the 1st argument.
1289	* @param a_Type1 The type of the 2nd argument.
1290	* @param a_Arg1 The name of the 2nd argument.
1291	* @param a_Type2 The type of the 3rd argument.
1292	* @param a_Arg2 The name of the 3rd argument.
1293	* @param a_Type3 The type of the 4th argument.
1294	* @param a_Arg3 The name of the 4th argument.
1295	* @param a_Type4 The type of the 5th argument.
1296	* @param a_Arg4 The name of the 5th argument.
1297	*/
1298	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1299	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1300	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1301	a_Type3 a_Arg3, a_Type4 a_Arg4))
1302	/**
1303	* For calling a C instruction implementation function taking five extra
1304	* arguments.
1305	*
1306	* This special call macro adds default arguments to the call and allow us to
1307	* change these later.
1308	*
1309	* @param a_fn The name of the function.
1310	* @param a0 The name of the 1st argument.
1311	* @param a1 The name of the 2nd argument.
1312	* @param a2 The name of the 3rd argument.
1313	* @param a3 The name of the 4th argument.
1314	* @param a4 The name of the 5th argument.
1315	*/
1316	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1317
1318	/** @} */
1319
1320
1321	/** @} */
1322
1323	RT_C_DECLS_END
1324
1325	#endif
1326

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 42700

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