1 | /* $Id: IEMInternal.h 100752 2023-07-31 13:24:18Z vboxsync $ */
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2 | /** @file
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3 | * IEM - Internal header file.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2011-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | #ifndef VMM_INCLUDED_SRC_include_IEMInternal_h
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29 | #define VMM_INCLUDED_SRC_include_IEMInternal_h
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30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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31 | # pragma once
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32 | #endif
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33 |
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34 | #include <VBox/vmm/cpum.h>
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35 | #include <VBox/vmm/iem.h>
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36 | #include <VBox/vmm/pgm.h>
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37 | #include <VBox/vmm/stam.h>
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38 | #include <VBox/param.h>
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39 |
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40 | #include <iprt/setjmp-without-sigmask.h>
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41 | #include <iprt/list.h>
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42 |
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43 |
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44 | RT_C_DECLS_BEGIN
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45 |
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46 |
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47 | /** @defgroup grp_iem_int Internals
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48 | * @ingroup grp_iem
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49 | * @internal
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50 | * @{
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51 | */
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52 |
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53 | /** For expanding symbol in slickedit and other products tagging and
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54 | * crossreferencing IEM symbols. */
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55 | #ifndef IEM_STATIC
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56 | # define IEM_STATIC static
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57 | #endif
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58 |
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59 | /** @def IEM_WITH_SETJMP
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60 | * Enables alternative status code handling using setjmps.
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61 | *
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62 | * This adds a bit of expense via the setjmp() call since it saves all the
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63 | * non-volatile registers. However, it eliminates return code checks and allows
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64 | * for more optimal return value passing (return regs instead of stack buffer).
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65 | */
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66 | #if defined(DOXYGEN_RUNNING) || defined(RT_OS_WINDOWS) || 1
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67 | # define IEM_WITH_SETJMP
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68 | #endif
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69 |
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70 | /** @def IEM_WITH_THROW_CATCH
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71 | * Enables using C++ throw/catch as an alternative to setjmp/longjmp in user
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72 | * mode code when IEM_WITH_SETJMP is in effect.
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73 | *
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74 | * With GCC 11.3.1 and code TLB on linux, using throw/catch instead of
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75 | * setjmp/long resulted in bs2-test-1 running 3.00% faster and all but on test
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76 | * result value improving by more than 1%. (Best out of three.)
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77 | *
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78 | * With Visual C++ 2019 and code TLB on windows, using throw/catch instead of
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79 | * setjmp/long resulted in bs2-test-1 running 3.68% faster and all but some of
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80 | * the MMIO and CPUID tests ran noticeably faster. Variation is greater than on
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81 | * Linux, but it should be quite a bit faster for normal code.
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82 | */
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83 | #if (defined(__cplusplus) && defined(IEM_WITH_SETJMP) && defined(IN_RING3) && (defined(__GNUC__) || defined(_MSC_VER))) \
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84 | || defined(DOXYGEN_RUNNING)
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85 | # define IEM_WITH_THROW_CATCH
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86 | #endif
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87 |
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88 | /** @def IEM_DO_LONGJMP
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89 | *
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90 | * Wrapper around longjmp / throw.
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91 | *
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92 | * @param a_pVCpu The CPU handle.
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93 | * @param a_rc The status code jump back with / throw.
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94 | */
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95 | #if defined(IEM_WITH_SETJMP) || defined(DOXYGEN_RUNNING)
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96 | # ifdef IEM_WITH_THROW_CATCH
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97 | # define IEM_DO_LONGJMP(a_pVCpu, a_rc) throw int(a_rc)
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98 | # else
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99 | # define IEM_DO_LONGJMP(a_pVCpu, a_rc) longjmp(*(a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf), (a_rc))
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100 | # endif
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101 | #endif
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102 |
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103 | /** For use with IEM function that may do a longjmp (when enabled).
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104 | *
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105 | * Visual C++ has trouble longjmp'ing from/over functions with the noexcept
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106 | * attribute. So, we indicate that function that may be part of a longjmp may
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107 | * throw "exceptions" and that the compiler should definitely not generate and
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108 | * std::terminate calling unwind code.
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109 | *
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110 | * Here is one example of this ending in std::terminate:
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111 | * @code{.txt}
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112 | 00 00000041`cadfda10 00007ffc`5d5a1f9f ucrtbase!abort+0x4e
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113 | 01 00000041`cadfda40 00007ffc`57af229a ucrtbase!terminate+0x1f
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114 | 02 00000041`cadfda70 00007ffb`eec91030 VCRUNTIME140!__std_terminate+0xa [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\ehhelpers.cpp @ 192]
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115 | 03 00000041`cadfdaa0 00007ffb`eec92c6d VCRUNTIME140_1!_CallSettingFrame+0x20 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\amd64\handlers.asm @ 50]
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116 | 04 00000041`cadfdad0 00007ffb`eec93ae5 VCRUNTIME140_1!__FrameHandler4::FrameUnwindToState+0x241 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\frame.cpp @ 1085]
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117 | 05 00000041`cadfdc00 00007ffb`eec92258 VCRUNTIME140_1!__FrameHandler4::FrameUnwindToEmptyState+0x2d [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\risctrnsctrl.cpp @ 218]
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118 | 06 00000041`cadfdc30 00007ffb`eec940e9 VCRUNTIME140_1!__InternalCxxFrameHandler<__FrameHandler4>+0x194 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\frame.cpp @ 304]
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119 | 07 00000041`cadfdcd0 00007ffc`5f9f249f VCRUNTIME140_1!__CxxFrameHandler4+0xa9 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\risctrnsctrl.cpp @ 290]
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120 | 08 00000041`cadfdd40 00007ffc`5f980939 ntdll!RtlpExecuteHandlerForUnwind+0xf
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121 | 09 00000041`cadfdd70 00007ffc`5f9a0edd ntdll!RtlUnwindEx+0x339
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122 | 0a 00000041`cadfe490 00007ffc`57aff976 ntdll!RtlUnwind+0xcd
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123 | 0b 00000041`cadfea00 00007ffb`e1b5de01 VCRUNTIME140!__longjmp_internal+0xe6 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\amd64\longjmp.asm @ 140]
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124 | 0c (Inline Function) --------`-------- VBoxVMM!iemOpcodeGetNextU8SlowJmp+0x95 [L:\vbox-intern\src\VBox\VMM\VMMAll\IEMAll.cpp @ 1155]
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125 | 0d 00000041`cadfea50 00007ffb`e1b60f6b VBoxVMM!iemOpcodeGetNextU8Jmp+0xc1 [L:\vbox-intern\src\VBox\VMM\include\IEMInline.h @ 402]
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126 | 0e 00000041`cadfea90 00007ffb`e1cc6201 VBoxVMM!IEMExecForExits+0xdb [L:\vbox-intern\src\VBox\VMM\VMMAll\IEMAll.cpp @ 10185]
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127 | 0f 00000041`cadfec70 00007ffb`e1d0df8d VBoxVMM!EMHistoryExec+0x4f1 [L:\vbox-intern\src\VBox\VMM\VMMAll\EMAll.cpp @ 452]
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128 | 10 00000041`cadfed60 00007ffb`e1d0d4c0 VBoxVMM!nemR3WinHandleExitCpuId+0x79d [L:\vbox-intern\src\VBox\VMM\VMMAll\NEMAllNativeTemplate-win.cpp.h @ 1829] @encode
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129 | @endcode
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130 | *
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131 | * @see https://developercommunity.visualstudio.com/t/fragile-behavior-of-longjmp-called-from-noexcept-f/1532859
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132 | */
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133 | #if defined(IEM_WITH_SETJMP) && (defined(_MSC_VER) || defined(IEM_WITH_THROW_CATCH))
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134 | # define IEM_NOEXCEPT_MAY_LONGJMP RT_NOEXCEPT_EX(false)
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135 | #else
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136 | # define IEM_NOEXCEPT_MAY_LONGJMP RT_NOEXCEPT
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137 | #endif
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138 |
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139 | #define IEM_IMPLEMENTS_TASKSWITCH
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140 |
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141 | /** @def IEM_WITH_3DNOW
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142 | * Includes the 3DNow decoding. */
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143 | #if (!defined(IEM_WITH_3DNOW) && !defined(IEM_WITHOUT_3DNOW)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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144 | # define IEM_WITH_3DNOW
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145 | #endif
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146 |
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147 | /** @def IEM_WITH_THREE_0F_38
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148 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
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149 | #if (!defined(IEM_WITH_THREE_0F_38) && !defined(IEM_WITHOUT_THREE_0F_38)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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150 | # define IEM_WITH_THREE_0F_38
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151 | #endif
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152 |
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153 | /** @def IEM_WITH_THREE_0F_3A
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154 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
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155 | #if (!defined(IEM_WITH_THREE_0F_3A) && !defined(IEM_WITHOUT_THREE_0F_3A)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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156 | # define IEM_WITH_THREE_0F_3A
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157 | #endif
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158 |
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159 | /** @def IEM_WITH_VEX
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160 | * Includes the VEX decoding. */
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161 | #if (!defined(IEM_WITH_VEX) && !defined(IEM_WITHOUT_VEX)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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162 | # define IEM_WITH_VEX
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163 | #endif
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164 |
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165 | /** @def IEM_CFG_TARGET_CPU
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166 | * The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value).
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167 | *
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168 | * By default we allow this to be configured by the user via the
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169 | * CPUM/GuestCpuName config string, but this comes at a slight cost during
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170 | * decoding. So, for applications of this code where there is no need to
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171 | * be dynamic wrt target CPU, just modify this define.
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172 | */
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173 | #if !defined(IEM_CFG_TARGET_CPU) || defined(DOXYGEN_RUNNING)
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174 | # define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC
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175 | #endif
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176 |
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177 | //#define IEM_WITH_CODE_TLB // - work in progress
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178 | //#define IEM_WITH_DATA_TLB // - work in progress
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179 |
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180 |
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181 | /** @def IEM_USE_UNALIGNED_DATA_ACCESS
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182 | * Use unaligned accesses instead of elaborate byte assembly. */
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183 | #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) || defined(DOXYGEN_RUNNING)
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184 | # define IEM_USE_UNALIGNED_DATA_ACCESS
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185 | #endif
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186 |
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187 | //#define IEM_LOG_MEMORY_WRITES
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188 |
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189 | #if !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
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190 | /** Instruction statistics. */
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191 | typedef struct IEMINSTRSTATS
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192 | {
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193 | # define IEM_DO_INSTR_STAT(a_Name, a_szDesc) uint32_t a_Name;
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194 | # include "IEMInstructionStatisticsTmpl.h"
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195 | # undef IEM_DO_INSTR_STAT
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196 | } IEMINSTRSTATS;
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197 | #else
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198 | struct IEMINSTRSTATS;
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199 | typedef struct IEMINSTRSTATS IEMINSTRSTATS;
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200 | #endif
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201 | /** Pointer to IEM instruction statistics. */
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202 | typedef IEMINSTRSTATS *PIEMINSTRSTATS;
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203 |
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204 |
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205 | /** @name IEMTARGETCPU_EFL_BEHAVIOR_XXX - IEMCPU::aidxTargetCpuEflFlavour
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206 | * @{ */
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207 | #define IEMTARGETCPU_EFL_BEHAVIOR_NATIVE 0 /**< Native x86 EFLAGS result; Intel EFLAGS when on non-x86 hosts. */
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208 | #define IEMTARGETCPU_EFL_BEHAVIOR_INTEL 1 /**< Intel EFLAGS result. */
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209 | #define IEMTARGETCPU_EFL_BEHAVIOR_AMD 2 /**< AMD EFLAGS result */
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210 | #define IEMTARGETCPU_EFL_BEHAVIOR_RESERVED 3 /**< Reserved/dummy entry slot that's the same as 0. */
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211 | #define IEMTARGETCPU_EFL_BEHAVIOR_MASK 3 /**< For masking the index before use. */
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212 | /** Selects the right variant from a_aArray.
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213 | * pVCpu is implicit in the caller context. */
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214 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT(a_aArray) \
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215 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[1] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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216 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for when no native worker can
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217 | * be used because the host CPU does not support the operation. */
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218 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_NON_NATIVE(a_aArray) \
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219 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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220 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for a two dimentional
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221 | * array paralleling IEMCPU::aidxTargetCpuEflFlavour and a single bit index
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222 | * into the two.
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223 | * @sa IEM_SELECT_NATIVE_OR_FALLBACK */
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224 | #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
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225 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
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226 | (a_aaArray[a_fNative][pVCpu->iem.s.aidxTargetCpuEflFlavour[a_fNative] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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227 | #else
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228 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
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229 | (a_aaArray[0][pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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230 | #endif
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231 | /** @} */
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232 |
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233 | /**
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234 | * Picks @a a_pfnNative or @a a_pfnFallback according to the host CPU feature
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235 | * indicator given by @a a_fCpumFeatureMember (CPUMFEATURES member).
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236 | *
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237 | * On non-x86 hosts, this will shortcut to the fallback w/o checking the
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238 | * indicator.
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239 | *
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240 | * @sa IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX
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241 | */
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242 | #if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
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243 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) \
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244 | (g_CpumHostFeatures.s.a_fCpumFeatureMember ? a_pfnNative : a_pfnFallback)
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245 | #else
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246 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) (a_pfnFallback)
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247 | #endif
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248 |
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249 |
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250 | /**
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251 | * Extended operand mode that includes a representation of 8-bit.
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252 | *
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253 | * This is used for packing down modes when invoking some C instruction
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254 | * implementations.
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255 | */
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256 | typedef enum IEMMODEX
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257 | {
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258 | IEMMODEX_16BIT = IEMMODE_16BIT,
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259 | IEMMODEX_32BIT = IEMMODE_32BIT,
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260 | IEMMODEX_64BIT = IEMMODE_64BIT,
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261 | IEMMODEX_8BIT
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262 | } IEMMODEX;
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263 | AssertCompileSize(IEMMODEX, 4);
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264 |
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265 |
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266 | /**
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267 | * Branch types.
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268 | */
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269 | typedef enum IEMBRANCH
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270 | {
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271 | IEMBRANCH_JUMP = 1,
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272 | IEMBRANCH_CALL,
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273 | IEMBRANCH_TRAP,
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274 | IEMBRANCH_SOFTWARE_INT,
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275 | IEMBRANCH_HARDWARE_INT
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276 | } IEMBRANCH;
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277 | AssertCompileSize(IEMBRANCH, 4);
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278 |
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279 |
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280 | /**
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281 | * INT instruction types.
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282 | */
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283 | typedef enum IEMINT
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284 | {
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285 | /** INT n instruction (opcode 0xcd imm). */
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286 | IEMINT_INTN = 0,
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287 | /** Single byte INT3 instruction (opcode 0xcc). */
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288 | IEMINT_INT3 = IEM_XCPT_FLAGS_BP_INSTR,
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289 | /** Single byte INTO instruction (opcode 0xce). */
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290 | IEMINT_INTO = IEM_XCPT_FLAGS_OF_INSTR,
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291 | /** Single byte INT1 (ICEBP) instruction (opcode 0xf1). */
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292 | IEMINT_INT1 = IEM_XCPT_FLAGS_ICEBP_INSTR
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293 | } IEMINT;
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294 | AssertCompileSize(IEMINT, 4);
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295 |
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296 |
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297 | /**
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298 | * A FPU result.
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299 | */
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300 | typedef struct IEMFPURESULT
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301 | {
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302 | /** The output value. */
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303 | RTFLOAT80U r80Result;
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304 | /** The output status. */
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305 | uint16_t FSW;
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306 | } IEMFPURESULT;
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307 | AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
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308 | /** Pointer to a FPU result. */
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309 | typedef IEMFPURESULT *PIEMFPURESULT;
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310 | /** Pointer to a const FPU result. */
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311 | typedef IEMFPURESULT const *PCIEMFPURESULT;
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312 |
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313 |
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314 | /**
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315 | * A FPU result consisting of two output values and FSW.
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316 | */
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317 | typedef struct IEMFPURESULTTWO
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318 | {
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319 | /** The first output value. */
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320 | RTFLOAT80U r80Result1;
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321 | /** The output status. */
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322 | uint16_t FSW;
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323 | /** The second output value. */
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324 | RTFLOAT80U r80Result2;
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325 | } IEMFPURESULTTWO;
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326 | AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
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327 | AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
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328 | /** Pointer to a FPU result consisting of two output values and FSW. */
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329 | typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
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330 | /** Pointer to a const FPU result consisting of two output values and FSW. */
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331 | typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
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332 |
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333 |
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334 | /**
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335 | * IEM TLB entry.
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336 | *
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337 | * Lookup assembly:
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338 | * @code{.asm}
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339 | ; Calculate tag.
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340 | mov rax, [VA]
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341 | shl rax, 16
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342 | shr rax, 16 + X86_PAGE_SHIFT
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343 | or rax, [uTlbRevision]
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344 |
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345 | ; Do indexing.
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346 | movzx ecx, al
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347 | lea rcx, [pTlbEntries + rcx]
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348 |
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349 | ; Check tag.
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350 | cmp [rcx + IEMTLBENTRY.uTag], rax
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---|
351 | jne .TlbMiss
|
---|
352 |
|
---|
353 | ; Check access.
|
---|
354 | mov rax, ACCESS_FLAGS | MAPPING_R3_NOT_VALID | 0xffffff00
|
---|
355 | and rax, [rcx + IEMTLBENTRY.fFlagsAndPhysRev]
|
---|
356 | cmp rax, [uTlbPhysRev]
|
---|
357 | jne .TlbMiss
|
---|
358 |
|
---|
359 | ; Calc address and we're done.
|
---|
360 | mov eax, X86_PAGE_OFFSET_MASK
|
---|
361 | and eax, [VA]
|
---|
362 | or rax, [rcx + IEMTLBENTRY.pMappingR3]
|
---|
363 | %ifdef VBOX_WITH_STATISTICS
|
---|
364 | inc qword [cTlbHits]
|
---|
365 | %endif
|
---|
366 | jmp .Done
|
---|
367 |
|
---|
368 | .TlbMiss:
|
---|
369 | mov r8d, ACCESS_FLAGS
|
---|
370 | mov rdx, [VA]
|
---|
371 | mov rcx, [pVCpu]
|
---|
372 | call iemTlbTypeMiss
|
---|
373 | .Done:
|
---|
374 |
|
---|
375 | @endcode
|
---|
376 | *
|
---|
377 | */
|
---|
378 | typedef struct IEMTLBENTRY
|
---|
379 | {
|
---|
380 | /** The TLB entry tag.
|
---|
381 | * Bits 35 thru 0 are made up of the virtual address shifted right 12 bits, this
|
---|
382 | * is ASSUMING a virtual address width of 48 bits.
|
---|
383 | *
|
---|
384 | * Bits 63 thru 36 are made up of the TLB revision (zero means invalid).
|
---|
385 | *
|
---|
386 | * The TLB lookup code uses the current TLB revision, which won't ever be zero,
|
---|
387 | * enabling an extremely cheap TLB invalidation most of the time. When the TLB
|
---|
388 | * revision wraps around though, the tags needs to be zeroed.
|
---|
389 | *
|
---|
390 | * @note Try use SHRD instruction? After seeing
|
---|
391 | * https://gmplib.org/~tege/x86-timing.pdf, maybe not.
|
---|
392 | *
|
---|
393 | * @todo This will need to be reorganized for 57-bit wide virtual address and
|
---|
394 | * PCID (currently 12 bits) and ASID (currently 6 bits) support. We'll
|
---|
395 | * have to move the TLB entry versioning entirely to the
|
---|
396 | * fFlagsAndPhysRev member then, 57 bit wide VAs means we'll only have
|
---|
397 | * 19 bits left (64 - 57 + 12 = 19) and they'll almost entire be
|
---|
398 | * consumed by PCID and ASID (12 + 6 = 18).
|
---|
399 | */
|
---|
400 | uint64_t uTag;
|
---|
401 | /** Access flags and physical TLB revision.
|
---|
402 | *
|
---|
403 | * - Bit 0 - page tables - not executable (X86_PTE_PAE_NX).
|
---|
404 | * - Bit 1 - page tables - not writable (complemented X86_PTE_RW).
|
---|
405 | * - Bit 2 - page tables - not user (complemented X86_PTE_US).
|
---|
406 | * - Bit 3 - pgm phys/virt - not directly writable.
|
---|
407 | * - Bit 4 - pgm phys page - not directly readable.
|
---|
408 | * - Bit 5 - page tables - not accessed (complemented X86_PTE_A).
|
---|
409 | * - Bit 6 - page tables - not dirty (complemented X86_PTE_D).
|
---|
410 | * - Bit 7 - tlb entry - pMappingR3 member not valid.
|
---|
411 | * - Bits 63 thru 8 are used for the physical TLB revision number.
|
---|
412 | *
|
---|
413 | * We're using complemented bit meanings here because it makes it easy to check
|
---|
414 | * whether special action is required. For instance a user mode write access
|
---|
415 | * would do a "TEST fFlags, (X86_PTE_RW | X86_PTE_US | X86_PTE_D)" and a
|
---|
416 | * non-zero result would mean special handling needed because either it wasn't
|
---|
417 | * writable, or it wasn't user, or the page wasn't dirty. A user mode read
|
---|
418 | * access would do "TEST fFlags, X86_PTE_US"; and a kernel mode read wouldn't
|
---|
419 | * need to check any PTE flag.
|
---|
420 | */
|
---|
421 | uint64_t fFlagsAndPhysRev;
|
---|
422 | /** The guest physical page address. */
|
---|
423 | uint64_t GCPhys;
|
---|
424 | /** Pointer to the ring-3 mapping. */
|
---|
425 | R3PTRTYPE(uint8_t *) pbMappingR3;
|
---|
426 | #if HC_ARCH_BITS == 32
|
---|
427 | uint32_t u32Padding1;
|
---|
428 | #endif
|
---|
429 | } IEMTLBENTRY;
|
---|
430 | AssertCompileSize(IEMTLBENTRY, 32);
|
---|
431 | /** Pointer to an IEM TLB entry. */
|
---|
432 | typedef IEMTLBENTRY *PIEMTLBENTRY;
|
---|
433 |
|
---|
434 | /** @name IEMTLBE_F_XXX - TLB entry flags (IEMTLBENTRY::fFlagsAndPhysRev)
|
---|
435 | * @{ */
|
---|
436 | #define IEMTLBE_F_PT_NO_EXEC RT_BIT_64(0) /**< Page tables: Not executable. */
|
---|
437 | #define IEMTLBE_F_PT_NO_WRITE RT_BIT_64(1) /**< Page tables: Not writable. */
|
---|
438 | #define IEMTLBE_F_PT_NO_USER RT_BIT_64(2) /**< Page tables: Not user accessible (supervisor only). */
|
---|
439 | #define IEMTLBE_F_PG_NO_WRITE RT_BIT_64(3) /**< Phys page: Not writable (access handler, ROM, whatever). */
|
---|
440 | #define IEMTLBE_F_PG_NO_READ RT_BIT_64(4) /**< Phys page: Not readable (MMIO / access handler, ROM) */
|
---|
441 | #define IEMTLBE_F_PT_NO_ACCESSED RT_BIT_64(5) /**< Phys tables: Not accessed (need to be marked accessed). */
|
---|
442 | #define IEMTLBE_F_PT_NO_DIRTY RT_BIT_64(6) /**< Page tables: Not dirty (needs to be made dirty on write). */
|
---|
443 | #define IEMTLBE_F_NO_MAPPINGR3 RT_BIT_64(7) /**< TLB entry: The IEMTLBENTRY::pMappingR3 member is invalid. */
|
---|
444 | #define IEMTLBE_F_PG_UNASSIGNED RT_BIT_64(8) /**< Phys page: Unassigned memory (not RAM, ROM, MMIO2 or MMIO). */
|
---|
445 | #define IEMTLBE_F_PHYS_REV UINT64_C(0xfffffffffffffe00) /**< Physical revision mask. @sa IEMTLB_PHYS_REV_INCR */
|
---|
446 | /** @} */
|
---|
447 |
|
---|
448 |
|
---|
449 | /**
|
---|
450 | * An IEM TLB.
|
---|
451 | *
|
---|
452 | * We've got two of these, one for data and one for instructions.
|
---|
453 | */
|
---|
454 | typedef struct IEMTLB
|
---|
455 | {
|
---|
456 | /** The TLB entries.
|
---|
457 | * We've choosen 256 because that way we can obtain the result directly from a
|
---|
458 | * 8-bit register without an additional AND instruction. */
|
---|
459 | IEMTLBENTRY aEntries[256];
|
---|
460 | /** The TLB revision.
|
---|
461 | * This is actually only 28 bits wide (see IEMTLBENTRY::uTag) and is incremented
|
---|
462 | * by adding RT_BIT_64(36) to it. When it wraps around and becomes zero, all
|
---|
463 | * the tags in the TLB must be zeroed and the revision set to RT_BIT_64(36).
|
---|
464 | * (The revision zero indicates an invalid TLB entry.)
|
---|
465 | *
|
---|
466 | * The initial value is choosen to cause an early wraparound. */
|
---|
467 | uint64_t uTlbRevision;
|
---|
468 | /** The TLB physical address revision - shadow of PGM variable.
|
---|
469 | *
|
---|
470 | * This is actually only 56 bits wide (see IEMTLBENTRY::fFlagsAndPhysRev) and is
|
---|
471 | * incremented by adding RT_BIT_64(8). When it wraps around and becomes zero,
|
---|
472 | * a rendezvous is called and each CPU wipe the IEMTLBENTRY::pMappingR3 as well
|
---|
473 | * as IEMTLBENTRY::fFlagsAndPhysRev bits 63 thru 8, 4, and 3.
|
---|
474 | *
|
---|
475 | * The initial value is choosen to cause an early wraparound. */
|
---|
476 | uint64_t volatile uTlbPhysRev;
|
---|
477 |
|
---|
478 | /* Statistics: */
|
---|
479 |
|
---|
480 | /** TLB hits (VBOX_WITH_STATISTICS only). */
|
---|
481 | uint64_t cTlbHits;
|
---|
482 | /** TLB misses. */
|
---|
483 | uint32_t cTlbMisses;
|
---|
484 | /** Slow read path. */
|
---|
485 | uint32_t cTlbSlowReadPath;
|
---|
486 | #if 0
|
---|
487 | /** TLB misses because of tag mismatch. */
|
---|
488 | uint32_t cTlbMissesTag;
|
---|
489 | /** TLB misses because of virtual access violation. */
|
---|
490 | uint32_t cTlbMissesVirtAccess;
|
---|
491 | /** TLB misses because of dirty bit. */
|
---|
492 | uint32_t cTlbMissesDirty;
|
---|
493 | /** TLB misses because of MMIO */
|
---|
494 | uint32_t cTlbMissesMmio;
|
---|
495 | /** TLB misses because of write access handlers. */
|
---|
496 | uint32_t cTlbMissesWriteHandler;
|
---|
497 | /** TLB misses because no r3(/r0) mapping. */
|
---|
498 | uint32_t cTlbMissesMapping;
|
---|
499 | #endif
|
---|
500 | /** Alignment padding. */
|
---|
501 | uint32_t au32Padding[3+5];
|
---|
502 | } IEMTLB;
|
---|
503 | AssertCompileSizeAlignment(IEMTLB, 64);
|
---|
504 | /** IEMTLB::uTlbRevision increment. */
|
---|
505 | #define IEMTLB_REVISION_INCR RT_BIT_64(36)
|
---|
506 | /** IEMTLB::uTlbRevision mask. */
|
---|
507 | #define IEMTLB_REVISION_MASK (~(RT_BIT_64(36) - 1))
|
---|
508 | /** IEMTLB::uTlbPhysRev increment.
|
---|
509 | * @sa IEMTLBE_F_PHYS_REV */
|
---|
510 | #define IEMTLB_PHYS_REV_INCR RT_BIT_64(9)
|
---|
511 | /**
|
---|
512 | * Calculates the TLB tag for a virtual address.
|
---|
513 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
---|
514 | * @param a_pTlb The TLB.
|
---|
515 | * @param a_GCPtr The virtual address.
|
---|
516 | */
|
---|
517 | #define IEMTLB_CALC_TAG(a_pTlb, a_GCPtr) ( IEMTLB_CALC_TAG_NO_REV(a_GCPtr) | (a_pTlb)->uTlbRevision )
|
---|
518 | /**
|
---|
519 | * Calculates the TLB tag for a virtual address but without TLB revision.
|
---|
520 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
---|
521 | * @param a_GCPtr The virtual address.
|
---|
522 | */
|
---|
523 | #define IEMTLB_CALC_TAG_NO_REV(a_GCPtr) ( (((a_GCPtr) << 16) >> (GUEST_PAGE_SHIFT + 16)) )
|
---|
524 | /**
|
---|
525 | * Converts a TLB tag value into a TLB index.
|
---|
526 | * @returns Index into IEMTLB::aEntries.
|
---|
527 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
---|
528 | */
|
---|
529 | #define IEMTLB_TAG_TO_INDEX(a_uTag) ( (uint8_t)(a_uTag) )
|
---|
530 | /**
|
---|
531 | * Converts a TLB tag value into a TLB index.
|
---|
532 | * @returns Index into IEMTLB::aEntries.
|
---|
533 | * @param a_pTlb The TLB.
|
---|
534 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
---|
535 | */
|
---|
536 | #define IEMTLB_TAG_TO_ENTRY(a_pTlb, a_uTag) ( &(a_pTlb)->aEntries[IEMTLB_TAG_TO_INDEX(a_uTag)] )
|
---|
537 |
|
---|
538 |
|
---|
539 | /** @name IEM_F_XXX - Execution mode flags (IEMCPU::fExec, IEMTB::fFlags).
|
---|
540 | *
|
---|
541 | * These flags are set when entering IEM and adjusted as code is executed, such
|
---|
542 | * that they will always contain the current values as instructions are
|
---|
543 | * finished.
|
---|
544 | *
|
---|
545 | * In recompiled execution mode, (most of) these flags are included in the
|
---|
546 | * translation block selection key and stored in IEMTB::fFlags alongside the
|
---|
547 | * IEMTB_F_XXX flags. The latter flags uses bits 31 thru 24, which are all zero
|
---|
548 | * in IEMCPU::fExec.
|
---|
549 | *
|
---|
550 | * @{ */
|
---|
551 | /** Mode: The block target mode mask. */
|
---|
552 | #define IEM_F_MODE_MASK UINT32_C(0x0000001f)
|
---|
553 | /** Mode: The IEMMODE part of the IEMTB_F_MODE_MASK value. */
|
---|
554 | #define IEM_F_MODE_CPUMODE_MASK UINT32_C(0x00000003)
|
---|
555 | /** X86 Mode: Bit used to indicating pre-386 CPU in 16-bit mode (for eliminating
|
---|
556 | * conditional in EIP/IP updating), and flat wide open CS, SS DS, and ES in
|
---|
557 | * 32-bit mode (for simplifying most memory accesses). */
|
---|
558 | #define IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK UINT32_C(0x00000004)
|
---|
559 | /** X86 Mode: Bit indicating protected mode, real mode (or SMM) when not set. */
|
---|
560 | #define IEM_F_MODE_X86_PROT_MASK UINT32_C(0x00000008)
|
---|
561 | /** X86 Mode: Bit used to indicate virtual 8086 mode (only 16-bit). */
|
---|
562 | #define IEM_F_MODE_X86_V86_MASK UINT32_C(0x00000010)
|
---|
563 |
|
---|
564 | /** X86 Mode: 16-bit on 386 or later. */
|
---|
565 | #define IEM_F_MODE_X86_16BIT UINT32_C(0x00000000)
|
---|
566 | /** X86 Mode: 80286, 80186 and 8086/88 targetting blocks (EIP update opt). */
|
---|
567 | #define IEM_F_MODE_X86_16BIT_PRE_386 UINT32_C(0x00000004)
|
---|
568 | /** X86 Mode: 16-bit protected mode on 386 or later. */
|
---|
569 | #define IEM_F_MODE_X86_16BIT_PROT UINT32_C(0x00000008)
|
---|
570 | /** X86 Mode: 16-bit protected mode on 386 or later. */
|
---|
571 | #define IEM_F_MODE_X86_16BIT_PROT_PRE_386 UINT32_C(0x0000000c)
|
---|
572 | /** X86 Mode: 16-bit virtual 8086 protected mode (on 386 or later). */
|
---|
573 | #define IEM_F_MODE_X86_16BIT_PROT_V86 UINT32_C(0x00000018)
|
---|
574 |
|
---|
575 | /** X86 Mode: 32-bit on 386 or later. */
|
---|
576 | #define IEM_F_MODE_X86_32BIT UINT32_C(0x00000001)
|
---|
577 | /** X86 Mode: 32-bit mode with wide open flat CS, SS, DS and ES. */
|
---|
578 | #define IEM_F_MODE_X86_32BIT_FLAT UINT32_C(0x00000005)
|
---|
579 | /** X86 Mode: 32-bit protected mode. */
|
---|
580 | #define IEM_F_MODE_X86_32BIT_PROT UINT32_C(0x00000009)
|
---|
581 | /** X86 Mode: 32-bit protected mode with wide open flat CS, SS, DS and ES. */
|
---|
582 | #define IEM_F_MODE_X86_32BIT_PROT_FLAT UINT32_C(0x0000000d)
|
---|
583 |
|
---|
584 | /** X86 Mode: 64-bit (includes protected, but not the flat bit). */
|
---|
585 | #define IEM_F_MODE_X86_64BIT UINT32_C(0x0000000a)
|
---|
586 |
|
---|
587 |
|
---|
588 | /** Bypass access handlers when set. */
|
---|
589 | #define IEM_F_BYPASS_HANDLERS UINT32_C(0x00010000)
|
---|
590 | /** Have pending hardware instruction breakpoints. */
|
---|
591 | #define IEM_F_PENDING_BRK_INSTR UINT32_C(0x00020000)
|
---|
592 | /** Have pending hardware data breakpoints. */
|
---|
593 | #define IEM_F_PENDING_BRK_DATA UINT32_C(0x00040000)
|
---|
594 |
|
---|
595 | /** X86: Have pending hardware I/O breakpoints. */
|
---|
596 | #define IEM_F_PENDING_BRK_X86_IO UINT32_C(0x00000400)
|
---|
597 | /** X86: Disregard the lock prefix (implied or not) when set. */
|
---|
598 | #define IEM_F_X86_DISREGARD_LOCK UINT32_C(0x00000800)
|
---|
599 |
|
---|
600 | /** Pending breakpoint mask (what iemCalcExecDbgFlags works out). */
|
---|
601 | #define IEM_F_PENDING_BRK_MASK (IEM_F_PENDING_BRK_INSTR | IEM_F_PENDING_BRK_DATA | IEM_F_PENDING_BRK_X86_IO)
|
---|
602 |
|
---|
603 | /** Caller configurable options. */
|
---|
604 | #define IEM_F_USER_OPTS (IEM_F_BYPASS_HANDLERS | IEM_F_X86_DISREGARD_LOCK)
|
---|
605 |
|
---|
606 | /** X86: The current protection level (CPL) shift factor. */
|
---|
607 | #define IEM_F_X86_CPL_SHIFT 8
|
---|
608 | /** X86: The current protection level (CPL) mask. */
|
---|
609 | #define IEM_F_X86_CPL_MASK UINT32_C(0x00000300)
|
---|
610 | /** X86: The current protection level (CPL) shifted mask. */
|
---|
611 | #define IEM_F_X86_CPL_SMASK UINT32_C(0x00000003)
|
---|
612 |
|
---|
613 | /** X86 execution context.
|
---|
614 | * The IEM_F_X86_CTX_XXX values are individual flags that can be combined (with
|
---|
615 | * the exception of IEM_F_X86_CTX_NORMAL). This allows running VMs from SMM
|
---|
616 | * mode. */
|
---|
617 | #define IEM_F_X86_CTX_MASK UINT32_C(0x0000f000)
|
---|
618 | /** X86 context: Plain regular execution context. */
|
---|
619 | #define IEM_F_X86_CTX_NORMAL UINT32_C(0x00000000)
|
---|
620 | /** X86 context: VT-x enabled. */
|
---|
621 | #define IEM_F_X86_CTX_VMX UINT32_C(0x00001000)
|
---|
622 | /** X86 context: AMD-V enabled. */
|
---|
623 | #define IEM_F_X86_CTX_SVM UINT32_C(0x00002000)
|
---|
624 | /** X86 context: In AMD-V or VT-x guest mode. */
|
---|
625 | #define IEM_F_X86_CTX_IN_GUEST UINT32_C(0x00004000)
|
---|
626 | /** X86 context: System management mode (SMM). */
|
---|
627 | #define IEM_F_X86_CTX_SMM UINT32_C(0x00008000)
|
---|
628 |
|
---|
629 | /** @todo Add TF+RF+INHIBIT indicator(s), so we can eliminate the conditional in
|
---|
630 | * iemRegFinishClearingRF() most for most situations (CPUMCTX_DBG_HIT_DRX_MASK
|
---|
631 | * and CPUMCTX_DBG_DBGF_MASK are covered by the IEM_F_PENDING_BRK_XXX bits
|
---|
632 | * alread). */
|
---|
633 |
|
---|
634 | /** @todo Add TF+RF+INHIBIT indicator(s), so we can eliminate the conditional in
|
---|
635 | * iemRegFinishClearingRF() most for most situations
|
---|
636 | * (CPUMCTX_DBG_HIT_DRX_MASK and CPUMCTX_DBG_DBGF_MASK are covered by
|
---|
637 | * the IEM_F_PENDING_BRK_XXX bits alread). */
|
---|
638 |
|
---|
639 | /** @} */
|
---|
640 |
|
---|
641 |
|
---|
642 | /** @name IEMTB_F_XXX - Translation block flags (IEMTB::fFlags).
|
---|
643 | *
|
---|
644 | * Extends the IEM_F_XXX flags (subject to IEMTB_F_IEM_F_MASK) to make up the
|
---|
645 | * translation block flags. The combined flag mask (subject to
|
---|
646 | * IEMTB_F_KEY_MASK) is used as part of the lookup key for translation blocks.
|
---|
647 | *
|
---|
648 | * @{ */
|
---|
649 | /** Mask of IEM_F_XXX flags included in IEMTB_F_XXX. */
|
---|
650 | #define IEMTB_F_IEM_F_MASK UINT32_C(0x00ffffff)
|
---|
651 |
|
---|
652 | /** Type: The block type mask. */
|
---|
653 | #define IEMTB_F_TYPE_MASK UINT32_C(0x03000000)
|
---|
654 | /** Type: Purly threaded recompiler (via tables). */
|
---|
655 | #define IEMTB_F_TYPE_THREADED UINT32_C(0x01000000)
|
---|
656 | /** Type: Native recompilation. */
|
---|
657 | #define IEMTB_F_TYPE_NATIVE UINT32_C(0x02000000)
|
---|
658 |
|
---|
659 | /** State mask. */
|
---|
660 | #define IEMTB_F_STATE_MASK UINT32_C(0x0c000000)
|
---|
661 | /** State shift count. */
|
---|
662 | #define IEMTB_F_STATE_SHIFT 26
|
---|
663 | /** State: Compiling. */
|
---|
664 | #define IEMTB_F_STATE_COMPILING UINT32_C(0x04000000)
|
---|
665 | /** State: Ready. */
|
---|
666 | #define IEMTB_F_STATE_READY UINT32_C(0x08000000)
|
---|
667 | /** State: Obsolete, can be deleted when we're sure it's not used any longer. */
|
---|
668 | #define IEMTB_F_STATE_OBSOLETE UINT32_C(0x0c000000)
|
---|
669 |
|
---|
670 | /** Checks that EIP/IP is wihin CS.LIM before each instruction. Used when
|
---|
671 | * we're close the limit before starting a TB, as determined by
|
---|
672 | * iemGetTbFlagsForCurrentPc(). */
|
---|
673 | #define IEMTB_F_CS_LIM_CHECKS UINT32_C(0x0c000000)
|
---|
674 |
|
---|
675 | /** Mask of the IEMTB_F_XXX flags that are part of the TB lookup key.
|
---|
676 | * @note We skip the CPL as we don't currently generate ring-specific code,
|
---|
677 | * that's all handled in CIMPL functions.
|
---|
678 | *
|
---|
679 | * For the same reasons, we skip all of IEM_F_X86_CTX_MASK, with the
|
---|
680 | * exception of SMM (which we don't implement). */
|
---|
681 | #define IEMTB_F_KEY_MASK ((UINT32_C(0xffffffff) & ~(IEM_F_X86_CTX_MASK | IEM_F_X86_CPL_MASK)) | IEM_F_X86_CTX_SMM)
|
---|
682 | /** @} */
|
---|
683 |
|
---|
684 | AssertCompile( (IEM_F_MODE_X86_16BIT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_16BIT);
|
---|
685 | AssertCompile(!(IEM_F_MODE_X86_16BIT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
686 | AssertCompile(!(IEM_F_MODE_X86_16BIT & IEM_F_MODE_X86_PROT_MASK));
|
---|
687 | AssertCompile(!(IEM_F_MODE_X86_16BIT & IEM_F_MODE_X86_V86_MASK));
|
---|
688 | AssertCompile( (IEM_F_MODE_X86_16BIT_PRE_386 & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_16BIT);
|
---|
689 | AssertCompile( IEM_F_MODE_X86_16BIT_PRE_386 & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK);
|
---|
690 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PRE_386 & IEM_F_MODE_X86_PROT_MASK));
|
---|
691 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PRE_386 & IEM_F_MODE_X86_V86_MASK));
|
---|
692 | AssertCompile( (IEM_F_MODE_X86_16BIT_PROT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_16BIT);
|
---|
693 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PROT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
694 | AssertCompile( IEM_F_MODE_X86_16BIT_PROT & IEM_F_MODE_X86_PROT_MASK);
|
---|
695 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PROT & IEM_F_MODE_X86_V86_MASK));
|
---|
696 | AssertCompile( (IEM_F_MODE_X86_16BIT_PROT_PRE_386 & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_16BIT);
|
---|
697 | AssertCompile( IEM_F_MODE_X86_16BIT_PROT_PRE_386 & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK);
|
---|
698 | AssertCompile( IEM_F_MODE_X86_16BIT_PROT_PRE_386 & IEM_F_MODE_X86_PROT_MASK);
|
---|
699 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PROT_PRE_386 & IEM_F_MODE_X86_V86_MASK));
|
---|
700 | AssertCompile( IEM_F_MODE_X86_16BIT_PROT_V86 & IEM_F_MODE_X86_PROT_MASK);
|
---|
701 | AssertCompile(!(IEM_F_MODE_X86_16BIT_PROT_V86 & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
702 | AssertCompile( IEM_F_MODE_X86_16BIT_PROT_V86 & IEM_F_MODE_X86_V86_MASK);
|
---|
703 |
|
---|
704 | AssertCompile( (IEM_F_MODE_X86_32BIT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_32BIT);
|
---|
705 | AssertCompile(!(IEM_F_MODE_X86_32BIT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
706 | AssertCompile(!(IEM_F_MODE_X86_32BIT & IEM_F_MODE_X86_PROT_MASK));
|
---|
707 | AssertCompile( (IEM_F_MODE_X86_32BIT_FLAT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_32BIT);
|
---|
708 | AssertCompile( IEM_F_MODE_X86_32BIT_FLAT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK);
|
---|
709 | AssertCompile(!(IEM_F_MODE_X86_32BIT_FLAT & IEM_F_MODE_X86_PROT_MASK));
|
---|
710 | AssertCompile( (IEM_F_MODE_X86_32BIT_PROT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_32BIT);
|
---|
711 | AssertCompile(!(IEM_F_MODE_X86_32BIT_PROT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
712 | AssertCompile( IEM_F_MODE_X86_32BIT_PROT & IEM_F_MODE_X86_PROT_MASK);
|
---|
713 | AssertCompile( (IEM_F_MODE_X86_32BIT_PROT_FLAT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_32BIT);
|
---|
714 | AssertCompile( IEM_F_MODE_X86_32BIT_PROT_FLAT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK);
|
---|
715 | AssertCompile( IEM_F_MODE_X86_32BIT_PROT_FLAT & IEM_F_MODE_X86_PROT_MASK);
|
---|
716 |
|
---|
717 | AssertCompile( (IEM_F_MODE_X86_64BIT & IEM_F_MODE_CPUMODE_MASK) == IEMMODE_64BIT);
|
---|
718 | AssertCompile( IEM_F_MODE_X86_64BIT & IEM_F_MODE_X86_PROT_MASK);
|
---|
719 | AssertCompile(!(IEM_F_MODE_X86_64BIT & IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK));
|
---|
720 |
|
---|
721 | /**
|
---|
722 | * A call for the threaded call table.
|
---|
723 | */
|
---|
724 | typedef struct IEMTHRDEDCALLENTRY
|
---|
725 | {
|
---|
726 | /** The function to call (IEMTHREADEDFUNCS). */
|
---|
727 | uint16_t enmFunction;
|
---|
728 | uint16_t uUnused0;
|
---|
729 |
|
---|
730 | /** Offset into IEMTB::pabOpcodes. */
|
---|
731 | uint16_t offOpcode;
|
---|
732 | /** The opcode length. */
|
---|
733 | uint8_t cbOpcode;
|
---|
734 | /** Index in to IEMTB::aRanges. */
|
---|
735 | uint8_t idxRange;
|
---|
736 |
|
---|
737 | /** Generic parameters. */
|
---|
738 | uint64_t auParams[3];
|
---|
739 | } IEMTHRDEDCALLENTRY;
|
---|
740 | AssertCompileSize(IEMTHRDEDCALLENTRY, sizeof(uint64_t) * 4);
|
---|
741 | /** Pointer to a threaded call entry. */
|
---|
742 | typedef struct IEMTHRDEDCALLENTRY *PIEMTHRDEDCALLENTRY;
|
---|
743 | /** Pointer to a const threaded call entry. */
|
---|
744 | typedef IEMTHRDEDCALLENTRY const *PCIEMTHRDEDCALLENTRY;
|
---|
745 |
|
---|
746 | /**
|
---|
747 | * Translation block.
|
---|
748 | */
|
---|
749 | #pragma pack(2) /* to prevent the Thrd structure from being padded unnecessarily */
|
---|
750 | typedef struct IEMTB
|
---|
751 | {
|
---|
752 | /** Next block with the same hash table entry. */
|
---|
753 | struct IEMTB * volatile pNext;
|
---|
754 | /** List on the local VCPU for blocks. */
|
---|
755 | RTLISTNODE LocalList;
|
---|
756 |
|
---|
757 | /** @name What uniquely identifies the block.
|
---|
758 | * @{ */
|
---|
759 | RTGCPHYS GCPhysPc;
|
---|
760 | /** IEMTB_F_XXX (i.e. IEM_F_XXX ++). */
|
---|
761 | uint32_t fFlags;
|
---|
762 | union
|
---|
763 | {
|
---|
764 | struct
|
---|
765 | {
|
---|
766 | /**< Relevant CS X86DESCATTR_XXX bits. */
|
---|
767 | uint16_t fAttr;
|
---|
768 | } x86;
|
---|
769 | };
|
---|
770 | /** @} */
|
---|
771 |
|
---|
772 | /** Number of opcode ranges. */
|
---|
773 | uint8_t cRanges;
|
---|
774 | /** Statistics: Number of instructions in the block. */
|
---|
775 | uint8_t cInstructions;
|
---|
776 |
|
---|
777 | /** Type specific info. */
|
---|
778 | union
|
---|
779 | {
|
---|
780 | struct
|
---|
781 | {
|
---|
782 | /** The call sequence table. */
|
---|
783 | PIEMTHRDEDCALLENTRY paCalls;
|
---|
784 | /** Number of calls in paCalls. */
|
---|
785 | uint16_t cCalls;
|
---|
786 | /** Number of calls allocated. */
|
---|
787 | uint16_t cAllocated;
|
---|
788 | } Thrd;
|
---|
789 | };
|
---|
790 |
|
---|
791 | /** Number of bytes of opcodes stored in pabOpcodes. */
|
---|
792 | uint16_t cbOpcodes;
|
---|
793 | /** The max storage available in the pabOpcodes block. */
|
---|
794 | uint16_t cbOpcodesAllocated;
|
---|
795 | /** Pointer to the opcode bytes this block was recompiled from. */
|
---|
796 | uint8_t *pabOpcodes;
|
---|
797 |
|
---|
798 | /* --- 64 byte cache line end --- */
|
---|
799 |
|
---|
800 | /** Opcode ranges.
|
---|
801 | *
|
---|
802 | * The opcode checkers and maybe TLB loading functions will use this to figure
|
---|
803 | * out what to do. The parameter will specify an entry and the opcode offset to
|
---|
804 | * start at and the minimum number of bytes to verify (instruction length).
|
---|
805 | *
|
---|
806 | * When VT-x and AMD-V looks up the opcode bytes for an exitting instruction,
|
---|
807 | * they'll first translate RIP (+ cbInstr - 1) to a physical address using the
|
---|
808 | * code TLB (must have a valid entry for that address) and scan the ranges to
|
---|
809 | * locate the corresponding opcodes. Probably.
|
---|
810 | */
|
---|
811 | struct IEMTBOPCODERANGE
|
---|
812 | {
|
---|
813 | /** Offset within pabOpcodes. */
|
---|
814 | uint16_t offOpcodes;
|
---|
815 | /** Number of bytes. */
|
---|
816 | uint16_t cbOpcodes;
|
---|
817 | /** The page offset. */
|
---|
818 | RT_GCC_EXTENSION
|
---|
819 | uint16_t offPhysPage : 12;
|
---|
820 | /** Unused bits. */
|
---|
821 | RT_GCC_EXTENSION
|
---|
822 | uint16_t u2Unused : 2;
|
---|
823 | /** Index into GCPhysPc + aGCPhysPages for the physical page address. */
|
---|
824 | RT_GCC_EXTENSION
|
---|
825 | uint16_t idxPhysPage : 2;
|
---|
826 | } aRanges[8];
|
---|
827 |
|
---|
828 | /** Physical pages that this TB covers.
|
---|
829 | * The GCPhysPc w/o page offset is element zero, so starting here with 1. */
|
---|
830 | RTGCPHYS aGCPhysPages[2];
|
---|
831 | } IEMTB;
|
---|
832 | #pragma pack()
|
---|
833 | AssertCompileMemberOffset(IEMTB, x86, 36);
|
---|
834 | AssertCompileMemberOffset(IEMTB, cRanges, 38);
|
---|
835 | AssertCompileMemberOffset(IEMTB, Thrd, 40);
|
---|
836 | AssertCompileMemberOffset(IEMTB, Thrd.cCalls, 48);
|
---|
837 | AssertCompileMemberOffset(IEMTB, cbOpcodes, 52);
|
---|
838 | AssertCompileMemberSize(IEMTB, aRanges[0], 6);
|
---|
839 | AssertCompileSize(IEMTB, 128);
|
---|
840 | /** Pointer to a translation block. */
|
---|
841 | typedef IEMTB *PIEMTB;
|
---|
842 | /** Pointer to a const translation block. */
|
---|
843 | typedef IEMTB const *PCIEMTB;
|
---|
844 |
|
---|
845 | /** @name IEMBRANCHED_F_XXX - Branched indicator (IEMCPU::fTbBranched).
|
---|
846 | *
|
---|
847 | * These flags parallels IEM_CIMPL_F_BRANCH_XXX.
|
---|
848 | *
|
---|
849 | * @{ */
|
---|
850 | /** Value if no branching happened recently. */
|
---|
851 | #define IEMBRANCHED_F_NO UINT8_C(0x00)
|
---|
852 | /** Flag set if direct branch, clear if absolute or indirect. */
|
---|
853 | #define IEMBRANCHED_F_DIRECT UINT8_C(0x01)
|
---|
854 | /** Flag set if indirect branch, clear if direct or relative. */
|
---|
855 | #define IEMBRANCHED_F_INDIRECT UINT8_C(0x02)
|
---|
856 | /** Flag set if relative branch, clear if absolute or indirect. */
|
---|
857 | #define IEMBRANCHED_F_RELATIVE UINT8_C(0x04)
|
---|
858 | /** Flag set if conditional branch, clear if unconditional. */
|
---|
859 | #define IEMBRANCHED_F_CONDITIONAL UINT8_C(0x08)
|
---|
860 | /** Flag set if it's a far branch. */
|
---|
861 | #define IEMBRANCHED_F_FAR UINT8_C(0x10)
|
---|
862 | /** Flag set (by IEM_MC_REL_JMP_XXX) if it's a zero bytes relative jump. */
|
---|
863 | #define IEMBRANCHED_F_ZERO UINT8_C(0x20)
|
---|
864 | /** @} */
|
---|
865 |
|
---|
866 |
|
---|
867 | /**
|
---|
868 | * The per-CPU IEM state.
|
---|
869 | */
|
---|
870 | typedef struct IEMCPU
|
---|
871 | {
|
---|
872 | /** Info status code that needs to be propagated to the IEM caller.
|
---|
873 | * This cannot be passed internally, as it would complicate all success
|
---|
874 | * checks within the interpreter making the code larger and almost impossible
|
---|
875 | * to get right. Instead, we'll store status codes to pass on here. Each
|
---|
876 | * source of these codes will perform appropriate sanity checks. */
|
---|
877 | int32_t rcPassUp; /* 0x00 */
|
---|
878 | /** Execution flag, IEM_F_XXX. */
|
---|
879 | uint32_t fExec; /* 0x04 */
|
---|
880 |
|
---|
881 | /** @name Decoder state.
|
---|
882 | * @{ */
|
---|
883 | #ifndef IEM_WITH_OPAQUE_DECODER_STATE
|
---|
884 | # ifdef IEM_WITH_CODE_TLB
|
---|
885 | /** The offset of the next instruction byte. */
|
---|
886 | uint32_t offInstrNextByte; /* 0x08 */
|
---|
887 | /** The number of bytes available at pbInstrBuf for the current instruction.
|
---|
888 | * This takes the max opcode length into account so that doesn't need to be
|
---|
889 | * checked separately. */
|
---|
890 | uint32_t cbInstrBuf; /* 0x0c */
|
---|
891 | /** Pointer to the page containing RIP, user specified buffer or abOpcode.
|
---|
892 | * This can be NULL if the page isn't mappable for some reason, in which
|
---|
893 | * case we'll do fallback stuff.
|
---|
894 | *
|
---|
895 | * If we're executing an instruction from a user specified buffer,
|
---|
896 | * IEMExecOneWithPrefetchedByPC and friends, this is not necessarily a page
|
---|
897 | * aligned pointer but pointer to the user data.
|
---|
898 | *
|
---|
899 | * For instructions crossing pages, this will start on the first page and be
|
---|
900 | * advanced to the next page by the time we've decoded the instruction. This
|
---|
901 | * therefore precludes stuff like <tt>pbInstrBuf[offInstrNextByte + cbInstrBuf - cbCurInstr]</tt>
|
---|
902 | */
|
---|
903 | uint8_t const *pbInstrBuf; /* 0x10 */
|
---|
904 | # if ARCH_BITS == 32
|
---|
905 | uint32_t uInstrBufHigh; /** The high dword of the host context pbInstrBuf member. */
|
---|
906 | # endif
|
---|
907 | /** The program counter corresponding to pbInstrBuf.
|
---|
908 | * This is set to a non-canonical address when we need to invalidate it. */
|
---|
909 | uint64_t uInstrBufPc; /* 0x18 */
|
---|
910 | /** The guest physical address corresponding to pbInstrBuf. */
|
---|
911 | RTGCPHYS GCPhysInstrBuf; /* 0x20 */
|
---|
912 | /** The number of bytes available at pbInstrBuf in total (for IEMExecLots).
|
---|
913 | * This takes the CS segment limit into account. */
|
---|
914 | uint16_t cbInstrBufTotal; /* 0x28 */
|
---|
915 | /** Offset into pbInstrBuf of the first byte of the current instruction.
|
---|
916 | * Can be negative to efficiently handle cross page instructions. */
|
---|
917 | int16_t offCurInstrStart; /* 0x2a */
|
---|
918 |
|
---|
919 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
---|
920 | uint32_t fPrefixes; /* 0x2c */
|
---|
921 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
---|
922 | uint8_t uRexReg; /* 0x30 */
|
---|
923 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
---|
924 | * (REX.B << 3). */
|
---|
925 | uint8_t uRexB; /* 0x31 */
|
---|
926 | /** The extra REX SIB index field bit (REX.X << 3). */
|
---|
927 | uint8_t uRexIndex; /* 0x32 */
|
---|
928 |
|
---|
929 | /** The effective segment register (X86_SREG_XXX). */
|
---|
930 | uint8_t iEffSeg; /* 0x33 */
|
---|
931 |
|
---|
932 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
---|
933 | uint8_t offModRm; /* 0x34 */
|
---|
934 |
|
---|
935 | # ifdef IEM_WITH_CODE_TLB_AND_OPCODE_BUF
|
---|
936 | /** The current offset into abOpcode. */
|
---|
937 | uint8_t offOpcode; /* 0x35 */
|
---|
938 | # else
|
---|
939 | uint8_t bUnused; /* 0x35 */
|
---|
940 | # endif
|
---|
941 | # else /* !IEM_WITH_CODE_TLB */
|
---|
942 | /** The size of what has currently been fetched into abOpcode. */
|
---|
943 | uint8_t cbOpcode; /* 0x08 */
|
---|
944 | /** The current offset into abOpcode. */
|
---|
945 | uint8_t offOpcode; /* 0x09 */
|
---|
946 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
---|
947 | uint8_t offModRm; /* 0x0a */
|
---|
948 |
|
---|
949 | /** The effective segment register (X86_SREG_XXX). */
|
---|
950 | uint8_t iEffSeg; /* 0x0b */
|
---|
951 |
|
---|
952 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
---|
953 | uint32_t fPrefixes; /* 0x0c */
|
---|
954 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
---|
955 | uint8_t uRexReg; /* 0x10 */
|
---|
956 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
---|
957 | * (REX.B << 3). */
|
---|
958 | uint8_t uRexB; /* 0x11 */
|
---|
959 | /** The extra REX SIB index field bit (REX.X << 3). */
|
---|
960 | uint8_t uRexIndex; /* 0x12 */
|
---|
961 |
|
---|
962 | # endif /* !IEM_WITH_CODE_TLB */
|
---|
963 |
|
---|
964 | /** The effective operand mode. */
|
---|
965 | IEMMODE enmEffOpSize; /* 0x36, 0x13 */
|
---|
966 | /** The default addressing mode. */
|
---|
967 | IEMMODE enmDefAddrMode; /* 0x37, 0x14 */
|
---|
968 | /** The effective addressing mode. */
|
---|
969 | IEMMODE enmEffAddrMode; /* 0x38, 0x15 */
|
---|
970 | /** The default operand mode. */
|
---|
971 | IEMMODE enmDefOpSize; /* 0x39, 0x16 */
|
---|
972 |
|
---|
973 | /** Prefix index (VEX.pp) for two byte and three byte tables. */
|
---|
974 | uint8_t idxPrefix; /* 0x3a, 0x17 */
|
---|
975 | /** 3rd VEX/EVEX/XOP register.
|
---|
976 | * Please use IEM_GET_EFFECTIVE_VVVV to access. */
|
---|
977 | uint8_t uVex3rdReg; /* 0x3b, 0x18 */
|
---|
978 | /** The VEX/EVEX/XOP length field. */
|
---|
979 | uint8_t uVexLength; /* 0x3c, 0x19 */
|
---|
980 | /** Additional EVEX stuff. */
|
---|
981 | uint8_t fEvexStuff; /* 0x3d, 0x1a */
|
---|
982 |
|
---|
983 | # ifndef IEM_WITH_CODE_TLB
|
---|
984 | /** Explicit alignment padding. */
|
---|
985 | uint8_t abAlignment2a[1]; /* 0x1b */
|
---|
986 | # endif
|
---|
987 | /** The FPU opcode (FOP). */
|
---|
988 | uint16_t uFpuOpcode; /* 0x3e, 0x1c */
|
---|
989 | # ifndef IEM_WITH_CODE_TLB
|
---|
990 | /** Explicit alignment padding. */
|
---|
991 | uint8_t abAlignment2b[2]; /* 0x1e */
|
---|
992 | # endif
|
---|
993 |
|
---|
994 | /** The opcode bytes. */
|
---|
995 | uint8_t abOpcode[15]; /* 0x40, 0x20 */
|
---|
996 | /** Explicit alignment padding. */
|
---|
997 | # ifdef IEM_WITH_CODE_TLB
|
---|
998 | //uint8_t abAlignment2c[0x4f - 0x4f]; /* 0x4f */
|
---|
999 | # else
|
---|
1000 | uint8_t abAlignment2c[0x4f - 0x2f]; /* 0x2f */
|
---|
1001 | # endif
|
---|
1002 | #else /* IEM_WITH_OPAQUE_DECODER_STATE */
|
---|
1003 | uint8_t abOpaqueDecoder[0x4f - 0x8];
|
---|
1004 | #endif /* IEM_WITH_OPAQUE_DECODER_STATE */
|
---|
1005 | /** @} */
|
---|
1006 |
|
---|
1007 |
|
---|
1008 | /** The number of active guest memory mappings. */
|
---|
1009 | uint8_t cActiveMappings; /* 0x4f, 0x4f */
|
---|
1010 |
|
---|
1011 | /** Records for tracking guest memory mappings. */
|
---|
1012 | struct
|
---|
1013 | {
|
---|
1014 | /** The address of the mapped bytes. */
|
---|
1015 | R3R0PTRTYPE(void *) pv;
|
---|
1016 | /** The access flags (IEM_ACCESS_XXX).
|
---|
1017 | * IEM_ACCESS_INVALID if the entry is unused. */
|
---|
1018 | uint32_t fAccess;
|
---|
1019 | #if HC_ARCH_BITS == 64
|
---|
1020 | uint32_t u32Alignment4; /**< Alignment padding. */
|
---|
1021 | #endif
|
---|
1022 | } aMemMappings[3]; /* 0x50 LB 0x30 */
|
---|
1023 |
|
---|
1024 | /** Locking records for the mapped memory. */
|
---|
1025 | union
|
---|
1026 | {
|
---|
1027 | PGMPAGEMAPLOCK Lock;
|
---|
1028 | uint64_t au64Padding[2];
|
---|
1029 | } aMemMappingLocks[3]; /* 0x80 LB 0x30 */
|
---|
1030 |
|
---|
1031 | /** Bounce buffer info.
|
---|
1032 | * This runs in parallel to aMemMappings. */
|
---|
1033 | struct
|
---|
1034 | {
|
---|
1035 | /** The physical address of the first byte. */
|
---|
1036 | RTGCPHYS GCPhysFirst;
|
---|
1037 | /** The physical address of the second page. */
|
---|
1038 | RTGCPHYS GCPhysSecond;
|
---|
1039 | /** The number of bytes in the first page. */
|
---|
1040 | uint16_t cbFirst;
|
---|
1041 | /** The number of bytes in the second page. */
|
---|
1042 | uint16_t cbSecond;
|
---|
1043 | /** Whether it's unassigned memory. */
|
---|
1044 | bool fUnassigned;
|
---|
1045 | /** Explicit alignment padding. */
|
---|
1046 | bool afAlignment5[3];
|
---|
1047 | } aMemBbMappings[3]; /* 0xb0 LB 0x48 */
|
---|
1048 |
|
---|
1049 | /** The flags of the current exception / interrupt. */
|
---|
1050 | uint32_t fCurXcpt; /* 0xf8 */
|
---|
1051 | /** The current exception / interrupt. */
|
---|
1052 | uint8_t uCurXcpt; /* 0xfc */
|
---|
1053 | /** Exception / interrupt recursion depth. */
|
---|
1054 | int8_t cXcptRecursions; /* 0xfb */
|
---|
1055 |
|
---|
1056 | /** The next unused mapping index.
|
---|
1057 | * @todo try find room for this up with cActiveMappings. */
|
---|
1058 | uint8_t iNextMapping; /* 0xfd */
|
---|
1059 | uint8_t abAlignment7[1];
|
---|
1060 |
|
---|
1061 | /** Bounce buffer storage.
|
---|
1062 | * This runs in parallel to aMemMappings and aMemBbMappings. */
|
---|
1063 | struct
|
---|
1064 | {
|
---|
1065 | uint8_t ab[512];
|
---|
1066 | } aBounceBuffers[3]; /* 0x100 LB 0x600 */
|
---|
1067 |
|
---|
1068 |
|
---|
1069 | /** Pointer set jump buffer - ring-3 context. */
|
---|
1070 | R3PTRTYPE(jmp_buf *) pJmpBufR3;
|
---|
1071 | /** Pointer set jump buffer - ring-0 context. */
|
---|
1072 | R0PTRTYPE(jmp_buf *) pJmpBufR0;
|
---|
1073 |
|
---|
1074 | /** @todo Should move this near @a fCurXcpt later. */
|
---|
1075 | /** The CR2 for the current exception / interrupt. */
|
---|
1076 | uint64_t uCurXcptCr2;
|
---|
1077 | /** The error code for the current exception / interrupt. */
|
---|
1078 | uint32_t uCurXcptErr;
|
---|
1079 |
|
---|
1080 | /** @name Statistics
|
---|
1081 | * @{ */
|
---|
1082 | /** The number of instructions we've executed. */
|
---|
1083 | uint32_t cInstructions;
|
---|
1084 | /** The number of potential exits. */
|
---|
1085 | uint32_t cPotentialExits;
|
---|
1086 | /** The number of bytes data or stack written (mostly for IEMExecOneEx).
|
---|
1087 | * This may contain uncommitted writes. */
|
---|
1088 | uint32_t cbWritten;
|
---|
1089 | /** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
|
---|
1090 | uint32_t cRetInstrNotImplemented;
|
---|
1091 | /** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
|
---|
1092 | uint32_t cRetAspectNotImplemented;
|
---|
1093 | /** Counts informational statuses returned (other than VINF_SUCCESS). */
|
---|
1094 | uint32_t cRetInfStatuses;
|
---|
1095 | /** Counts other error statuses returned. */
|
---|
1096 | uint32_t cRetErrStatuses;
|
---|
1097 | /** Number of times rcPassUp has been used. */
|
---|
1098 | uint32_t cRetPassUpStatus;
|
---|
1099 | /** Number of times RZ left with instruction commit pending for ring-3. */
|
---|
1100 | uint32_t cPendingCommit;
|
---|
1101 | /** Number of long jumps. */
|
---|
1102 | uint32_t cLongJumps;
|
---|
1103 | /** @} */
|
---|
1104 |
|
---|
1105 | /** @name Target CPU information.
|
---|
1106 | * @{ */
|
---|
1107 | #if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
|
---|
1108 | /** The target CPU. */
|
---|
1109 | uint8_t uTargetCpu;
|
---|
1110 | #else
|
---|
1111 | uint8_t bTargetCpuPadding;
|
---|
1112 | #endif
|
---|
1113 | /** For selecting assembly works matching the target CPU EFLAGS behaviour, see
|
---|
1114 | * IEMTARGETCPU_EFL_BEHAVIOR_XXX for values, with the 1st entry for when no
|
---|
1115 | * native host support and the 2nd for when there is.
|
---|
1116 | *
|
---|
1117 | * The two values are typically indexed by a g_CpumHostFeatures bit.
|
---|
1118 | *
|
---|
1119 | * This is for instance used for the BSF & BSR instructions where AMD and
|
---|
1120 | * Intel CPUs produce different EFLAGS. */
|
---|
1121 | uint8_t aidxTargetCpuEflFlavour[2];
|
---|
1122 |
|
---|
1123 | /** The CPU vendor. */
|
---|
1124 | CPUMCPUVENDOR enmCpuVendor;
|
---|
1125 | /** @} */
|
---|
1126 |
|
---|
1127 | /** @name Host CPU information.
|
---|
1128 | * @{ */
|
---|
1129 | /** The CPU vendor. */
|
---|
1130 | CPUMCPUVENDOR enmHostCpuVendor;
|
---|
1131 | /** @} */
|
---|
1132 |
|
---|
1133 | /** Counts RDMSR \#GP(0) LogRel(). */
|
---|
1134 | uint8_t cLogRelRdMsr;
|
---|
1135 | /** Counts WRMSR \#GP(0) LogRel(). */
|
---|
1136 | uint8_t cLogRelWrMsr;
|
---|
1137 | /** Alignment padding. */
|
---|
1138 | uint8_t abAlignment9[46];
|
---|
1139 |
|
---|
1140 | /** @name Recompilation
|
---|
1141 | * @{ */
|
---|
1142 | /** Pointer to the current translation block.
|
---|
1143 | * This can either be one being executed or one being compiled. */
|
---|
1144 | R3PTRTYPE(PIEMTB) pCurTbR3;
|
---|
1145 | /** The PC (RIP) at the start of pCurTbR3/pCurTbR0.
|
---|
1146 | * The TBs are based on physical addresses, so this is needed to correleated
|
---|
1147 | * RIP to opcode bytes stored in the TB (AMD-V / VT-x). */
|
---|
1148 | uint64_t uCurTbStartPc;
|
---|
1149 | /** Statistics: Number of TB allocation calls. */
|
---|
1150 | uint64_t cTbAllocs;
|
---|
1151 | /** Statistics: Number of TB free calls. */
|
---|
1152 | uint64_t cTbFrees;
|
---|
1153 | /** Statistics: Number of TB lookup misses. */
|
---|
1154 | uint64_t cTbLookupMisses;
|
---|
1155 | /** Statistics: Number of TB lookup hits (debug only). */
|
---|
1156 | uint64_t cTbLookupHits;
|
---|
1157 | /** Number of TBs executed. */
|
---|
1158 | uint64_t cTbExec;
|
---|
1159 | /** Whether we need to check the opcode bytes for the current instruction.
|
---|
1160 | * This is set by a previous instruction if it modified memory or similar. */
|
---|
1161 | bool fTbCheckOpcodes;
|
---|
1162 | /** Indicates whether and how we just branched - IEMBRANCHED_F_XXX. */
|
---|
1163 | uint8_t fTbBranched;
|
---|
1164 | /** Set when GCPhysInstrBuf is updated because of a page crossing. */
|
---|
1165 | bool fTbCrossedPage;
|
---|
1166 | /** Whether to end the current TB. */
|
---|
1167 | bool fEndTb;
|
---|
1168 | /** Spaced reserved for recompiler data / alignment. */
|
---|
1169 | bool afRecompilerStuff1[4];
|
---|
1170 | /** Previous GCPhysInstrBuf value - only valid if fTbCrossedPage is set. */
|
---|
1171 | RTGCPHYS GCPhysInstrBufPrev;
|
---|
1172 | /** Copy of IEMCPU::GCPhysInstrBuf after decoding a branch instruction.
|
---|
1173 | * This is used together with fTbBranched and GCVirtTbBranchSrcBuf to determin
|
---|
1174 | * whether a branch instruction jumps to a new page or stays within the
|
---|
1175 | * current one. */
|
---|
1176 | RTGCPHYS GCPhysTbBranchSrcBuf;
|
---|
1177 | /** Copy of IEMCPU::uInstrBufPc after decoding a branch instruction. */
|
---|
1178 | uint64_t GCVirtTbBranchSrcBuf;
|
---|
1179 | /* Alignment. */
|
---|
1180 | uint64_t au64RecompilerStuff2[5];
|
---|
1181 | /** Threaded TB statistics: Number of instructions per TB. */
|
---|
1182 | STAMPROFILE StatTbThreadedInstr;
|
---|
1183 | /** Threaded TB statistics: Number of calls per TB. */
|
---|
1184 | STAMPROFILE StatTbThreadedCalls;
|
---|
1185 | /** @} */
|
---|
1186 |
|
---|
1187 | /** Data TLB.
|
---|
1188 | * @remarks Must be 64-byte aligned. */
|
---|
1189 | IEMTLB DataTlb;
|
---|
1190 | /** Instruction TLB.
|
---|
1191 | * @remarks Must be 64-byte aligned. */
|
---|
1192 | IEMTLB CodeTlb;
|
---|
1193 |
|
---|
1194 | /** Exception statistics. */
|
---|
1195 | STAMCOUNTER aStatXcpts[32];
|
---|
1196 | /** Interrupt statistics. */
|
---|
1197 | uint32_t aStatInts[256];
|
---|
1198 |
|
---|
1199 | #if defined(VBOX_WITH_STATISTICS) && !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
|
---|
1200 | /** Instruction statistics for ring-0/raw-mode. */
|
---|
1201 | IEMINSTRSTATS StatsRZ;
|
---|
1202 | /** Instruction statistics for ring-3. */
|
---|
1203 | IEMINSTRSTATS StatsR3;
|
---|
1204 | #endif
|
---|
1205 | } IEMCPU;
|
---|
1206 | AssertCompileMemberOffset(IEMCPU, cActiveMappings, 0x4f);
|
---|
1207 | AssertCompileMemberAlignment(IEMCPU, aMemMappings, 16);
|
---|
1208 | AssertCompileMemberAlignment(IEMCPU, aMemMappingLocks, 16);
|
---|
1209 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 64);
|
---|
1210 | AssertCompileMemberAlignment(IEMCPU, DataTlb, 64);
|
---|
1211 | AssertCompileMemberAlignment(IEMCPU, CodeTlb, 64);
|
---|
1212 |
|
---|
1213 | /** Pointer to the per-CPU IEM state. */
|
---|
1214 | typedef IEMCPU *PIEMCPU;
|
---|
1215 | /** Pointer to the const per-CPU IEM state. */
|
---|
1216 | typedef IEMCPU const *PCIEMCPU;
|
---|
1217 |
|
---|
1218 |
|
---|
1219 | /** @def IEM_GET_CTX
|
---|
1220 | * Gets the guest CPU context for the calling EMT.
|
---|
1221 | * @returns PCPUMCTX
|
---|
1222 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1223 | */
|
---|
1224 | #define IEM_GET_CTX(a_pVCpu) (&(a_pVCpu)->cpum.GstCtx)
|
---|
1225 |
|
---|
1226 | /** @def IEM_CTX_ASSERT
|
---|
1227 | * Asserts that the @a a_fExtrnMbz is present in the CPU context.
|
---|
1228 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1229 | * @param a_fExtrnMbz The mask of CPUMCTX_EXTRN_XXX flags that must be zero.
|
---|
1230 | */
|
---|
1231 | #define IEM_CTX_ASSERT(a_pVCpu, a_fExtrnMbz) AssertMsg(!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnMbz)), \
|
---|
1232 | ("fExtrn=%#RX64 fExtrnMbz=%#RX64\n", (a_pVCpu)->cpum.GstCtx.fExtrn, \
|
---|
1233 | (a_fExtrnMbz)))
|
---|
1234 |
|
---|
1235 | /** @def IEM_CTX_IMPORT_RET
|
---|
1236 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
1237 | *
|
---|
1238 | * Will call the keep to import the bits as needed.
|
---|
1239 | *
|
---|
1240 | * Returns on import failure.
|
---|
1241 | *
|
---|
1242 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1243 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
1244 | */
|
---|
1245 | #define IEM_CTX_IMPORT_RET(a_pVCpu, a_fExtrnImport) \
|
---|
1246 | do { \
|
---|
1247 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
1248 | { /* likely */ } \
|
---|
1249 | else \
|
---|
1250 | { \
|
---|
1251 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
1252 | AssertRCReturn(rcCtxImport, rcCtxImport); \
|
---|
1253 | } \
|
---|
1254 | } while (0)
|
---|
1255 |
|
---|
1256 | /** @def IEM_CTX_IMPORT_NORET
|
---|
1257 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
1258 | *
|
---|
1259 | * Will call the keep to import the bits as needed.
|
---|
1260 | *
|
---|
1261 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1262 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
1263 | */
|
---|
1264 | #define IEM_CTX_IMPORT_NORET(a_pVCpu, a_fExtrnImport) \
|
---|
1265 | do { \
|
---|
1266 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
1267 | { /* likely */ } \
|
---|
1268 | else \
|
---|
1269 | { \
|
---|
1270 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
1271 | AssertLogRelRC(rcCtxImport); \
|
---|
1272 | } \
|
---|
1273 | } while (0)
|
---|
1274 |
|
---|
1275 | /** @def IEM_CTX_IMPORT_JMP
|
---|
1276 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
---|
1277 | *
|
---|
1278 | * Will call the keep to import the bits as needed.
|
---|
1279 | *
|
---|
1280 | * Jumps on import failure.
|
---|
1281 | *
|
---|
1282 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1283 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
---|
1284 | */
|
---|
1285 | #define IEM_CTX_IMPORT_JMP(a_pVCpu, a_fExtrnImport) \
|
---|
1286 | do { \
|
---|
1287 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
---|
1288 | { /* likely */ } \
|
---|
1289 | else \
|
---|
1290 | { \
|
---|
1291 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
---|
1292 | AssertRCStmt(rcCtxImport, IEM_DO_LONGJMP(pVCpu, rcCtxImport)); \
|
---|
1293 | } \
|
---|
1294 | } while (0)
|
---|
1295 |
|
---|
1296 |
|
---|
1297 |
|
---|
1298 | /** @def IEM_GET_TARGET_CPU
|
---|
1299 | * Gets the current IEMTARGETCPU value.
|
---|
1300 | * @returns IEMTARGETCPU value.
|
---|
1301 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
1302 | */
|
---|
1303 | #if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
|
---|
1304 | # define IEM_GET_TARGET_CPU(a_pVCpu) (IEM_CFG_TARGET_CPU)
|
---|
1305 | #else
|
---|
1306 | # define IEM_GET_TARGET_CPU(a_pVCpu) ((a_pVCpu)->iem.s.uTargetCpu)
|
---|
1307 | #endif
|
---|
1308 |
|
---|
1309 | /** @def IEM_GET_INSTR_LEN
|
---|
1310 | * Gets the instruction length. */
|
---|
1311 | #ifdef IEM_WITH_CODE_TLB
|
---|
1312 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offInstrNextByte - (uint32_t)(int32_t)(a_pVCpu)->iem.s.offCurInstrStart)
|
---|
1313 | #else
|
---|
1314 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offOpcode)
|
---|
1315 | #endif
|
---|
1316 |
|
---|
1317 | /** @def IEM_TRY_SETJMP
|
---|
1318 | * Wrapper around setjmp / try, hiding all the ugly differences.
|
---|
1319 | *
|
---|
1320 | * @note Use with extreme care as this is a fragile macro.
|
---|
1321 | * @param a_pVCpu The cross context virtual CPU structure of the calling EMT.
|
---|
1322 | * @param a_rcTarget The variable that should receive the status code in case
|
---|
1323 | * of a longjmp/throw.
|
---|
1324 | */
|
---|
1325 | /** @def IEM_TRY_SETJMP_AGAIN
|
---|
1326 | * For when setjmp / try is used again in the same variable scope as a previous
|
---|
1327 | * IEM_TRY_SETJMP invocation.
|
---|
1328 | */
|
---|
1329 | /** @def IEM_CATCH_LONGJMP_BEGIN
|
---|
1330 | * Start wrapper for catch / setjmp-else.
|
---|
1331 | *
|
---|
1332 | * This will set up a scope.
|
---|
1333 | *
|
---|
1334 | * @note Use with extreme care as this is a fragile macro.
|
---|
1335 | * @param a_pVCpu The cross context virtual CPU structure of the calling EMT.
|
---|
1336 | * @param a_rcTarget The variable that should receive the status code in case
|
---|
1337 | * of a longjmp/throw.
|
---|
1338 | */
|
---|
1339 | /** @def IEM_CATCH_LONGJMP_END
|
---|
1340 | * End wrapper for catch / setjmp-else.
|
---|
1341 | *
|
---|
1342 | * This will close the scope set up by IEM_CATCH_LONGJMP_BEGIN and clean up the
|
---|
1343 | * state.
|
---|
1344 | *
|
---|
1345 | * @note Use with extreme care as this is a fragile macro.
|
---|
1346 | * @param a_pVCpu The cross context virtual CPU structure of the calling EMT.
|
---|
1347 | */
|
---|
1348 | #if defined(IEM_WITH_SETJMP) || defined(DOXYGEN_RUNNING)
|
---|
1349 | # ifdef IEM_WITH_THROW_CATCH
|
---|
1350 | # define IEM_TRY_SETJMP(a_pVCpu, a_rcTarget) \
|
---|
1351 | a_rcTarget = VINF_SUCCESS; \
|
---|
1352 | try
|
---|
1353 | # define IEM_TRY_SETJMP_AGAIN(a_pVCpu, a_rcTarget) \
|
---|
1354 | IEM_TRY_SETJMP(a_pVCpu, a_rcTarget)
|
---|
1355 | # define IEM_CATCH_LONGJMP_BEGIN(a_pVCpu, a_rcTarget) \
|
---|
1356 | catch (int rcThrown) \
|
---|
1357 | { \
|
---|
1358 | a_rcTarget = rcThrown
|
---|
1359 | # define IEM_CATCH_LONGJMP_END(a_pVCpu) \
|
---|
1360 | } \
|
---|
1361 | ((void)0)
|
---|
1362 | # else /* !IEM_WITH_THROW_CATCH */
|
---|
1363 | # define IEM_TRY_SETJMP(a_pVCpu, a_rcTarget) \
|
---|
1364 | jmp_buf JmpBuf; \
|
---|
1365 | jmp_buf * volatile pSavedJmpBuf = pVCpu->iem.s.CTX_SUFF(pJmpBuf); \
|
---|
1366 | pVCpu->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
|
---|
1367 | if ((rcStrict = setjmp(JmpBuf)) == 0)
|
---|
1368 | # define IEM_TRY_SETJMP_AGAIN(a_pVCpu, a_rcTarget) \
|
---|
1369 | pSavedJmpBuf = pVCpu->iem.s.CTX_SUFF(pJmpBuf); \
|
---|
1370 | pVCpu->iem.s.CTX_SUFF(pJmpBuf) = &JmpBuf; \
|
---|
1371 | if ((rcStrict = setjmp(JmpBuf)) == 0)
|
---|
1372 | # define IEM_CATCH_LONGJMP_BEGIN(a_pVCpu, a_rcTarget) \
|
---|
1373 | else \
|
---|
1374 | { \
|
---|
1375 | ((void)0)
|
---|
1376 | # define IEM_CATCH_LONGJMP_END(a_pVCpu) \
|
---|
1377 | } \
|
---|
1378 | (a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf) = pSavedJmpBuf
|
---|
1379 | # endif /* !IEM_WITH_THROW_CATCH */
|
---|
1380 | #endif /* IEM_WITH_SETJMP */
|
---|
1381 |
|
---|
1382 |
|
---|
1383 | /**
|
---|
1384 | * Shared per-VM IEM data.
|
---|
1385 | */
|
---|
1386 | typedef struct IEM
|
---|
1387 | {
|
---|
1388 | /** The VMX APIC-access page handler type. */
|
---|
1389 | PGMPHYSHANDLERTYPE hVmxApicAccessPage;
|
---|
1390 | #ifndef VBOX_WITHOUT_CPUID_HOST_CALL
|
---|
1391 | /** Set if the CPUID host call functionality is enabled. */
|
---|
1392 | bool fCpuIdHostCall;
|
---|
1393 | #endif
|
---|
1394 | } IEM;
|
---|
1395 |
|
---|
1396 |
|
---|
1397 |
|
---|
1398 | /** @name IEM_ACCESS_XXX - Access details.
|
---|
1399 | * @{ */
|
---|
1400 | #define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
|
---|
1401 | #define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
|
---|
1402 | #define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
|
---|
1403 | #define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
|
---|
1404 | #define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
|
---|
1405 | #define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
|
---|
1406 | #define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
|
---|
1407 | #define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
|
---|
1408 | #define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
|
---|
1409 | #define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
|
---|
1410 | /** The writes are partial, so if initialize the bounce buffer with the
|
---|
1411 | * orignal RAM content. */
|
---|
1412 | #define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
|
---|
1413 | /** Used in aMemMappings to indicate that the entry is bounce buffered. */
|
---|
1414 | #define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
|
---|
1415 | /** Bounce buffer with ring-3 write pending, first page. */
|
---|
1416 | #define IEM_ACCESS_PENDING_R3_WRITE_1ST UINT32_C(0x00000400)
|
---|
1417 | /** Bounce buffer with ring-3 write pending, second page. */
|
---|
1418 | #define IEM_ACCESS_PENDING_R3_WRITE_2ND UINT32_C(0x00000800)
|
---|
1419 | /** Not locked, accessed via the TLB. */
|
---|
1420 | #define IEM_ACCESS_NOT_LOCKED UINT32_C(0x00001000)
|
---|
1421 | /** Valid bit mask. */
|
---|
1422 | #define IEM_ACCESS_VALID_MASK UINT32_C(0x00001fff)
|
---|
1423 | /** Shift count for the TLB flags (upper word). */
|
---|
1424 | #define IEM_ACCESS_SHIFT_TLB_FLAGS 16
|
---|
1425 |
|
---|
1426 | /** Read+write data alias. */
|
---|
1427 | #define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
---|
1428 | /** Write data alias. */
|
---|
1429 | #define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
---|
1430 | /** Read data alias. */
|
---|
1431 | #define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA)
|
---|
1432 | /** Instruction fetch alias. */
|
---|
1433 | #define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_WHAT_CODE)
|
---|
1434 | /** Stack write alias. */
|
---|
1435 | #define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
---|
1436 | /** Stack read alias. */
|
---|
1437 | #define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_STACK)
|
---|
1438 | /** Stack read+write alias. */
|
---|
1439 | #define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
---|
1440 | /** Read system table alias. */
|
---|
1441 | #define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_SYS)
|
---|
1442 | /** Read+write system table alias. */
|
---|
1443 | #define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_SYS)
|
---|
1444 | /** @} */
|
---|
1445 |
|
---|
1446 | /** @name Prefix constants (IEMCPU::fPrefixes)
|
---|
1447 | * @{ */
|
---|
1448 | #define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /**< CS segment prefix (0x2e). */
|
---|
1449 | #define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /**< SS segment prefix (0x36). */
|
---|
1450 | #define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /**< DS segment prefix (0x3e). */
|
---|
1451 | #define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /**< ES segment prefix (0x26). */
|
---|
1452 | #define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /**< FS segment prefix (0x64). */
|
---|
1453 | #define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /**< GS segment prefix (0x65). */
|
---|
1454 | #define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
|
---|
1455 |
|
---|
1456 | #define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /**< Operand size prefix (0x66). */
|
---|
1457 | #define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /**< REX.W prefix (0x48-0x4f). */
|
---|
1458 | #define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /**< Address size prefix (0x67). */
|
---|
1459 |
|
---|
1460 | #define IEM_OP_PRF_LOCK RT_BIT_32(16) /**< Lock prefix (0xf0). */
|
---|
1461 | #define IEM_OP_PRF_REPNZ RT_BIT_32(17) /**< Repeat-not-zero prefix (0xf2). */
|
---|
1462 | #define IEM_OP_PRF_REPZ RT_BIT_32(18) /**< Repeat-if-zero prefix (0xf3). */
|
---|
1463 |
|
---|
1464 | #define IEM_OP_PRF_REX RT_BIT_32(24) /**< Any REX prefix (0x40-0x4f). */
|
---|
1465 | #define IEM_OP_PRF_REX_R RT_BIT_32(25) /**< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). */
|
---|
1466 | #define IEM_OP_PRF_REX_B RT_BIT_32(26) /**< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). */
|
---|
1467 | #define IEM_OP_PRF_REX_X RT_BIT_32(27) /**< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). */
|
---|
1468 | /** Mask with all the REX prefix flags.
|
---|
1469 | * This is generally for use when needing to undo the REX prefixes when they
|
---|
1470 | * are followed legacy prefixes and therefore does not immediately preceed
|
---|
1471 | * the first opcode byte.
|
---|
1472 | * For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
|
---|
1473 | #define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W )
|
---|
1474 |
|
---|
1475 | #define IEM_OP_PRF_VEX RT_BIT_32(28) /**< Indiciates VEX prefix. */
|
---|
1476 | #define IEM_OP_PRF_EVEX RT_BIT_32(29) /**< Indiciates EVEX prefix. */
|
---|
1477 | #define IEM_OP_PRF_XOP RT_BIT_32(30) /**< Indiciates XOP prefix. */
|
---|
1478 | /** @} */
|
---|
1479 |
|
---|
1480 | /** @name IEMOPFORM_XXX - Opcode forms
|
---|
1481 | * @note These are ORed together with IEMOPHINT_XXX.
|
---|
1482 | * @{ */
|
---|
1483 | /** ModR/M: reg, r/m */
|
---|
1484 | #define IEMOPFORM_RM 0
|
---|
1485 | /** ModR/M: reg, r/m (register) */
|
---|
1486 | #define IEMOPFORM_RM_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
---|
1487 | /** ModR/M: reg, r/m (memory) */
|
---|
1488 | #define IEMOPFORM_RM_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
---|
1489 | /** ModR/M: reg, r/m */
|
---|
1490 | #define IEMOPFORM_RMI 1
|
---|
1491 | /** ModR/M: reg, r/m (register) */
|
---|
1492 | #define IEMOPFORM_RMI_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
---|
1493 | /** ModR/M: reg, r/m (memory) */
|
---|
1494 | #define IEMOPFORM_RMI_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
---|
1495 | /** ModR/M: r/m, reg */
|
---|
1496 | #define IEMOPFORM_MR 2
|
---|
1497 | /** ModR/M: r/m (register), reg */
|
---|
1498 | #define IEMOPFORM_MR_REG (IEMOPFORM_MR | IEMOPFORM_MOD3)
|
---|
1499 | /** ModR/M: r/m (memory), reg */
|
---|
1500 | #define IEMOPFORM_MR_MEM (IEMOPFORM_MR | IEMOPFORM_NOT_MOD3)
|
---|
1501 | /** ModR/M: r/m, reg */
|
---|
1502 | #define IEMOPFORM_MRI 3
|
---|
1503 | /** ModR/M: r/m (register), reg */
|
---|
1504 | #define IEMOPFORM_MRI_REG (IEMOPFORM_MR | IEMOPFORM_MOD3)
|
---|
1505 | /** ModR/M: r/m (memory), reg */
|
---|
1506 | #define IEMOPFORM_MRI_MEM (IEMOPFORM_MR | IEMOPFORM_NOT_MOD3)
|
---|
1507 | /** ModR/M: r/m only */
|
---|
1508 | #define IEMOPFORM_M 4
|
---|
1509 | /** ModR/M: r/m only (register). */
|
---|
1510 | #define IEMOPFORM_M_REG (IEMOPFORM_M | IEMOPFORM_MOD3)
|
---|
1511 | /** ModR/M: r/m only (memory). */
|
---|
1512 | #define IEMOPFORM_M_MEM (IEMOPFORM_M | IEMOPFORM_NOT_MOD3)
|
---|
1513 | /** ModR/M: reg only */
|
---|
1514 | #define IEMOPFORM_R 5
|
---|
1515 |
|
---|
1516 | /** VEX+ModR/M: reg, r/m */
|
---|
1517 | #define IEMOPFORM_VEX_RM 8
|
---|
1518 | /** VEX+ModR/M: reg, r/m (register) */
|
---|
1519 | #define IEMOPFORM_VEX_RM_REG (IEMOPFORM_VEX_RM | IEMOPFORM_MOD3)
|
---|
1520 | /** VEX+ModR/M: reg, r/m (memory) */
|
---|
1521 | #define IEMOPFORM_VEX_RM_MEM (IEMOPFORM_VEX_RM | IEMOPFORM_NOT_MOD3)
|
---|
1522 | /** VEX+ModR/M: r/m, reg */
|
---|
1523 | #define IEMOPFORM_VEX_MR 9
|
---|
1524 | /** VEX+ModR/M: r/m (register), reg */
|
---|
1525 | #define IEMOPFORM_VEX_MR_REG (IEMOPFORM_VEX_MR | IEMOPFORM_MOD3)
|
---|
1526 | /** VEX+ModR/M: r/m (memory), reg */
|
---|
1527 | #define IEMOPFORM_VEX_MR_MEM (IEMOPFORM_VEX_MR | IEMOPFORM_NOT_MOD3)
|
---|
1528 | /** VEX+ModR/M: r/m only */
|
---|
1529 | #define IEMOPFORM_VEX_M 10
|
---|
1530 | /** VEX+ModR/M: r/m only (register). */
|
---|
1531 | #define IEMOPFORM_VEX_M_REG (IEMOPFORM_VEX_M | IEMOPFORM_MOD3)
|
---|
1532 | /** VEX+ModR/M: r/m only (memory). */
|
---|
1533 | #define IEMOPFORM_VEX_M_MEM (IEMOPFORM_VEX_M | IEMOPFORM_NOT_MOD3)
|
---|
1534 | /** VEX+ModR/M: reg only */
|
---|
1535 | #define IEMOPFORM_VEX_R 11
|
---|
1536 | /** VEX+ModR/M: reg, vvvv, r/m */
|
---|
1537 | #define IEMOPFORM_VEX_RVM 12
|
---|
1538 | /** VEX+ModR/M: reg, vvvv, r/m (register). */
|
---|
1539 | #define IEMOPFORM_VEX_RVM_REG (IEMOPFORM_VEX_RVM | IEMOPFORM_MOD3)
|
---|
1540 | /** VEX+ModR/M: reg, vvvv, r/m (memory). */
|
---|
1541 | #define IEMOPFORM_VEX_RVM_MEM (IEMOPFORM_VEX_RVM | IEMOPFORM_NOT_MOD3)
|
---|
1542 | /** VEX+ModR/M: reg, r/m, vvvv */
|
---|
1543 | #define IEMOPFORM_VEX_RMV 13
|
---|
1544 | /** VEX+ModR/M: reg, r/m, vvvv (register). */
|
---|
1545 | #define IEMOPFORM_VEX_RMV_REG (IEMOPFORM_VEX_RMV | IEMOPFORM_MOD3)
|
---|
1546 | /** VEX+ModR/M: reg, r/m, vvvv (memory). */
|
---|
1547 | #define IEMOPFORM_VEX_RMV_MEM (IEMOPFORM_VEX_RMV | IEMOPFORM_NOT_MOD3)
|
---|
1548 | /** VEX+ModR/M: reg, r/m, imm8 */
|
---|
1549 | #define IEMOPFORM_VEX_RMI 14
|
---|
1550 | /** VEX+ModR/M: reg, r/m, imm8 (register). */
|
---|
1551 | #define IEMOPFORM_VEX_RMI_REG (IEMOPFORM_VEX_RMI | IEMOPFORM_MOD3)
|
---|
1552 | /** VEX+ModR/M: reg, r/m, imm8 (memory). */
|
---|
1553 | #define IEMOPFORM_VEX_RMI_MEM (IEMOPFORM_VEX_RMI | IEMOPFORM_NOT_MOD3)
|
---|
1554 | /** VEX+ModR/M: r/m, vvvv, reg */
|
---|
1555 | #define IEMOPFORM_VEX_MVR 15
|
---|
1556 | /** VEX+ModR/M: r/m, vvvv, reg (register) */
|
---|
1557 | #define IEMOPFORM_VEX_MVR_REG (IEMOPFORM_VEX_MVR | IEMOPFORM_MOD3)
|
---|
1558 | /** VEX+ModR/M: r/m, vvvv, reg (memory) */
|
---|
1559 | #define IEMOPFORM_VEX_MVR_MEM (IEMOPFORM_VEX_MVR | IEMOPFORM_NOT_MOD3)
|
---|
1560 | /** VEX+ModR/M+/n: vvvv, r/m */
|
---|
1561 | #define IEMOPFORM_VEX_VM 16
|
---|
1562 | /** VEX+ModR/M+/n: vvvv, r/m (register) */
|
---|
1563 | #define IEMOPFORM_VEX_VM_REG (IEMOPFORM_VEX_VM | IEMOPFORM_MOD3)
|
---|
1564 | /** VEX+ModR/M+/n: vvvv, r/m (memory) */
|
---|
1565 | #define IEMOPFORM_VEX_VM_MEM (IEMOPFORM_VEX_VM | IEMOPFORM_NOT_MOD3)
|
---|
1566 |
|
---|
1567 | /** Fixed register instruction, no R/M. */
|
---|
1568 | #define IEMOPFORM_FIXED 32
|
---|
1569 |
|
---|
1570 | /** The r/m is a register. */
|
---|
1571 | #define IEMOPFORM_MOD3 RT_BIT_32(8)
|
---|
1572 | /** The r/m is a memory access. */
|
---|
1573 | #define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
|
---|
1574 | /** @} */
|
---|
1575 |
|
---|
1576 | /** @name IEMOPHINT_XXX - Additional Opcode Hints
|
---|
1577 | * @note These are ORed together with IEMOPFORM_XXX.
|
---|
1578 | * @{ */
|
---|
1579 | /** Ignores the operand size prefix (66h). */
|
---|
1580 | #define IEMOPHINT_IGNORES_OZ_PFX RT_BIT_32(10)
|
---|
1581 | /** Ignores REX.W (aka WIG). */
|
---|
1582 | #define IEMOPHINT_IGNORES_REXW RT_BIT_32(11)
|
---|
1583 | /** Both the operand size prefixes (66h + REX.W) are ignored. */
|
---|
1584 | #define IEMOPHINT_IGNORES_OP_SIZES (IEMOPHINT_IGNORES_OZ_PFX | IEMOPHINT_IGNORES_REXW)
|
---|
1585 | /** Allowed with the lock prefix. */
|
---|
1586 | #define IEMOPHINT_LOCK_ALLOWED RT_BIT_32(11)
|
---|
1587 | /** The VEX.L value is ignored (aka LIG). */
|
---|
1588 | #define IEMOPHINT_VEX_L_IGNORED RT_BIT_32(12)
|
---|
1589 | /** The VEX.L value must be zero (i.e. 128-bit width only). */
|
---|
1590 | #define IEMOPHINT_VEX_L_ZERO RT_BIT_32(13)
|
---|
1591 | /** The VEX.V value must be zero. */
|
---|
1592 | #define IEMOPHINT_VEX_V_ZERO RT_BIT_32(14)
|
---|
1593 |
|
---|
1594 | /** Hint to IEMAllInstructionPython.py that this macro should be skipped. */
|
---|
1595 | #define IEMOPHINT_SKIP_PYTHON RT_BIT_32(31)
|
---|
1596 | /** @} */
|
---|
1597 |
|
---|
1598 | /**
|
---|
1599 | * Possible hardware task switch sources.
|
---|
1600 | */
|
---|
1601 | typedef enum IEMTASKSWITCH
|
---|
1602 | {
|
---|
1603 | /** Task switch caused by an interrupt/exception. */
|
---|
1604 | IEMTASKSWITCH_INT_XCPT = 1,
|
---|
1605 | /** Task switch caused by a far CALL. */
|
---|
1606 | IEMTASKSWITCH_CALL,
|
---|
1607 | /** Task switch caused by a far JMP. */
|
---|
1608 | IEMTASKSWITCH_JUMP,
|
---|
1609 | /** Task switch caused by an IRET. */
|
---|
1610 | IEMTASKSWITCH_IRET
|
---|
1611 | } IEMTASKSWITCH;
|
---|
1612 | AssertCompileSize(IEMTASKSWITCH, 4);
|
---|
1613 |
|
---|
1614 | /**
|
---|
1615 | * Possible CrX load (write) sources.
|
---|
1616 | */
|
---|
1617 | typedef enum IEMACCESSCRX
|
---|
1618 | {
|
---|
1619 | /** CrX access caused by 'mov crX' instruction. */
|
---|
1620 | IEMACCESSCRX_MOV_CRX,
|
---|
1621 | /** CrX (CR0) write caused by 'lmsw' instruction. */
|
---|
1622 | IEMACCESSCRX_LMSW,
|
---|
1623 | /** CrX (CR0) write caused by 'clts' instruction. */
|
---|
1624 | IEMACCESSCRX_CLTS,
|
---|
1625 | /** CrX (CR0) read caused by 'smsw' instruction. */
|
---|
1626 | IEMACCESSCRX_SMSW
|
---|
1627 | } IEMACCESSCRX;
|
---|
1628 |
|
---|
1629 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
1630 | /** @name IEM_SLAT_FAIL_XXX - Second-level address translation failure information.
|
---|
1631 | *
|
---|
1632 | * These flags provide further context to SLAT page-walk failures that could not be
|
---|
1633 | * determined by PGM (e.g, PGM is not privy to memory access permissions).
|
---|
1634 | *
|
---|
1635 | * @{
|
---|
1636 | */
|
---|
1637 | /** Translating a nested-guest linear address failed accessing a nested-guest
|
---|
1638 | * physical address. */
|
---|
1639 | # define IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR RT_BIT_32(0)
|
---|
1640 | /** Translating a nested-guest linear address failed accessing a
|
---|
1641 | * paging-structure entry or updating accessed/dirty bits. */
|
---|
1642 | # define IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE RT_BIT_32(1)
|
---|
1643 | /** @} */
|
---|
1644 |
|
---|
1645 | DECLCALLBACK(FNPGMPHYSHANDLER) iemVmxApicAccessPageHandler;
|
---|
1646 | # ifndef IN_RING3
|
---|
1647 | DECLCALLBACK(FNPGMRZPHYSPFHANDLER) iemVmxApicAccessPagePfHandler;
|
---|
1648 | # endif
|
---|
1649 | #endif
|
---|
1650 |
|
---|
1651 | /**
|
---|
1652 | * Indicates to the verifier that the given flag set is undefined.
|
---|
1653 | *
|
---|
1654 | * Can be invoked again to add more flags.
|
---|
1655 | *
|
---|
1656 | * This is a NOOP if the verifier isn't compiled in.
|
---|
1657 | *
|
---|
1658 | * @note We're temporarily keeping this until code is converted to new
|
---|
1659 | * disassembler style opcode handling.
|
---|
1660 | */
|
---|
1661 | #define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
|
---|
1662 |
|
---|
1663 |
|
---|
1664 | /** @def IEM_DECL_IMPL_TYPE
|
---|
1665 | * For typedef'ing an instruction implementation function.
|
---|
1666 | *
|
---|
1667 | * @param a_RetType The return type.
|
---|
1668 | * @param a_Name The name of the type.
|
---|
1669 | * @param a_ArgList The argument list enclosed in parentheses.
|
---|
1670 | */
|
---|
1671 |
|
---|
1672 | /** @def IEM_DECL_IMPL_DEF
|
---|
1673 | * For defining an instruction implementation function.
|
---|
1674 | *
|
---|
1675 | * @param a_RetType The return type.
|
---|
1676 | * @param a_Name The name of the type.
|
---|
1677 | * @param a_ArgList The argument list enclosed in parentheses.
|
---|
1678 | */
|
---|
1679 |
|
---|
1680 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
---|
1681 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1682 | __attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
|
---|
1683 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1684 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
---|
1685 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1686 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
---|
1687 |
|
---|
1688 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
---|
1689 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1690 | a_RetType (__fastcall a_Name) a_ArgList
|
---|
1691 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1692 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
---|
1693 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1694 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
---|
1695 |
|
---|
1696 | #elif __cplusplus >= 201700 /* P0012R1 support */
|
---|
1697 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1698 | a_RetType (VBOXCALL a_Name) a_ArgList RT_NOEXCEPT
|
---|
1699 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1700 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
---|
1701 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1702 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
---|
1703 |
|
---|
1704 | #else
|
---|
1705 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
---|
1706 | a_RetType (VBOXCALL a_Name) a_ArgList
|
---|
1707 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
---|
1708 | a_RetType VBOXCALL a_Name a_ArgList
|
---|
1709 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
---|
1710 | a_RetType VBOXCALL a_Name a_ArgList
|
---|
1711 |
|
---|
1712 | #endif
|
---|
1713 |
|
---|
1714 | /** Defined in IEMAllAImplC.cpp but also used by IEMAllAImplA.asm. */
|
---|
1715 | RT_C_DECLS_BEGIN
|
---|
1716 | extern uint8_t const g_afParity[256];
|
---|
1717 | RT_C_DECLS_END
|
---|
1718 |
|
---|
1719 |
|
---|
1720 | /** @name Arithmetic assignment operations on bytes (binary).
|
---|
1721 | * @{ */
|
---|
1722 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t *pu8Dst, uint8_t u8Src, uint32_t *pEFlags));
|
---|
1723 | typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
|
---|
1724 | FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
|
---|
1725 | FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
|
---|
1726 | FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
|
---|
1727 | FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
|
---|
1728 | FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
|
---|
1729 | FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
|
---|
1730 | FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
|
---|
1731 | /** @} */
|
---|
1732 |
|
---|
1733 | /** @name Arithmetic assignment operations on words (binary).
|
---|
1734 | * @{ */
|
---|
1735 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pEFlags));
|
---|
1736 | typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
|
---|
1737 | FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
|
---|
1738 | FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
|
---|
1739 | FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
|
---|
1740 | FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
|
---|
1741 | FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
|
---|
1742 | FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
|
---|
1743 | FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
|
---|
1744 | /** @} */
|
---|
1745 |
|
---|
1746 | /** @name Arithmetic assignment operations on double words (binary).
|
---|
1747 | * @{ */
|
---|
1748 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t *pu32Dst, uint32_t u32Src, uint32_t *pEFlags));
|
---|
1749 | typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
|
---|
1750 | FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
|
---|
1751 | FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
|
---|
1752 | FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
|
---|
1753 | FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
|
---|
1754 | FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
|
---|
1755 | FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
|
---|
1756 | FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
|
---|
1757 | FNIEMAIMPLBINU32 iemAImpl_blsi_u32, iemAImpl_blsi_u32_fallback;
|
---|
1758 | FNIEMAIMPLBINU32 iemAImpl_blsr_u32, iemAImpl_blsr_u32_fallback;
|
---|
1759 | FNIEMAIMPLBINU32 iemAImpl_blsmsk_u32, iemAImpl_blsmsk_u32_fallback;
|
---|
1760 | /** @} */
|
---|
1761 |
|
---|
1762 | /** @name Arithmetic assignment operations on quad words (binary).
|
---|
1763 | * @{ */
|
---|
1764 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t *pu64Dst, uint64_t u64Src, uint32_t *pEFlags));
|
---|
1765 | typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
|
---|
1766 | FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
|
---|
1767 | FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
|
---|
1768 | FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
|
---|
1769 | FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
|
---|
1770 | FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
|
---|
1771 | FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
|
---|
1772 | FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
|
---|
1773 | FNIEMAIMPLBINU64 iemAImpl_blsi_u64, iemAImpl_blsi_u64_fallback;
|
---|
1774 | FNIEMAIMPLBINU64 iemAImpl_blsr_u64, iemAImpl_blsr_u64_fallback;
|
---|
1775 | FNIEMAIMPLBINU64 iemAImpl_blsmsk_u64, iemAImpl_blsmsk_u64_fallback;
|
---|
1776 | /** @} */
|
---|
1777 |
|
---|
1778 | /** @name Compare operations (thrown in with the binary ops).
|
---|
1779 | * @{ */
|
---|
1780 | FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
|
---|
1781 | FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
|
---|
1782 | FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
|
---|
1783 | FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
|
---|
1784 | /** @} */
|
---|
1785 |
|
---|
1786 | /** @name Test operations (thrown in with the binary ops).
|
---|
1787 | * @{ */
|
---|
1788 | FNIEMAIMPLBINU8 iemAImpl_test_u8;
|
---|
1789 | FNIEMAIMPLBINU16 iemAImpl_test_u16;
|
---|
1790 | FNIEMAIMPLBINU32 iemAImpl_test_u32;
|
---|
1791 | FNIEMAIMPLBINU64 iemAImpl_test_u64;
|
---|
1792 | /** @} */
|
---|
1793 |
|
---|
1794 | /** @name Bit operations operations (thrown in with the binary ops).
|
---|
1795 | * @{ */
|
---|
1796 | FNIEMAIMPLBINU16 iemAImpl_bt_u16;
|
---|
1797 | FNIEMAIMPLBINU32 iemAImpl_bt_u32;
|
---|
1798 | FNIEMAIMPLBINU64 iemAImpl_bt_u64;
|
---|
1799 | FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
|
---|
1800 | FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
|
---|
1801 | FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
|
---|
1802 | FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
|
---|
1803 | FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
|
---|
1804 | FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
|
---|
1805 | FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
|
---|
1806 | FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
|
---|
1807 | FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
|
---|
1808 | /** @} */
|
---|
1809 |
|
---|
1810 | /** @name Arithmetic three operand operations on double words (binary).
|
---|
1811 | * @{ */
|
---|
1812 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2, uint32_t *pEFlags));
|
---|
1813 | typedef FNIEMAIMPLBINVEXU32 *PFNIEMAIMPLBINVEXU32;
|
---|
1814 | FNIEMAIMPLBINVEXU32 iemAImpl_andn_u32, iemAImpl_andn_u32_fallback;
|
---|
1815 | FNIEMAIMPLBINVEXU32 iemAImpl_bextr_u32, iemAImpl_bextr_u32_fallback;
|
---|
1816 | FNIEMAIMPLBINVEXU32 iemAImpl_bzhi_u32, iemAImpl_bzhi_u32_fallback;
|
---|
1817 | /** @} */
|
---|
1818 |
|
---|
1819 | /** @name Arithmetic three operand operations on quad words (binary).
|
---|
1820 | * @{ */
|
---|
1821 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2, uint32_t *pEFlags));
|
---|
1822 | typedef FNIEMAIMPLBINVEXU64 *PFNIEMAIMPLBINVEXU64;
|
---|
1823 | FNIEMAIMPLBINVEXU64 iemAImpl_andn_u64, iemAImpl_andn_u64_fallback;
|
---|
1824 | FNIEMAIMPLBINVEXU64 iemAImpl_bextr_u64, iemAImpl_bextr_u64_fallback;
|
---|
1825 | FNIEMAIMPLBINVEXU64 iemAImpl_bzhi_u64, iemAImpl_bzhi_u64_fallback;
|
---|
1826 | /** @} */
|
---|
1827 |
|
---|
1828 | /** @name Arithmetic three operand operations on double words w/o EFLAGS (binary).
|
---|
1829 | * @{ */
|
---|
1830 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32NOEFL, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2));
|
---|
1831 | typedef FNIEMAIMPLBINVEXU32NOEFL *PFNIEMAIMPLBINVEXU32NOEFL;
|
---|
1832 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pdep_u32, iemAImpl_pdep_u32_fallback;
|
---|
1833 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pext_u32, iemAImpl_pext_u32_fallback;
|
---|
1834 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_sarx_u32, iemAImpl_sarx_u32_fallback;
|
---|
1835 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shlx_u32, iemAImpl_shlx_u32_fallback;
|
---|
1836 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shrx_u32, iemAImpl_shrx_u32_fallback;
|
---|
1837 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_rorx_u32;
|
---|
1838 | /** @} */
|
---|
1839 |
|
---|
1840 | /** @name Arithmetic three operand operations on quad words w/o EFLAGS (binary).
|
---|
1841 | * @{ */
|
---|
1842 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64NOEFL, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2));
|
---|
1843 | typedef FNIEMAIMPLBINVEXU64NOEFL *PFNIEMAIMPLBINVEXU64NOEFL;
|
---|
1844 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pdep_u64, iemAImpl_pdep_u64_fallback;
|
---|
1845 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pext_u64, iemAImpl_pext_u64_fallback;
|
---|
1846 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_sarx_u64, iemAImpl_sarx_u64_fallback;
|
---|
1847 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shlx_u64, iemAImpl_shlx_u64_fallback;
|
---|
1848 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shrx_u64, iemAImpl_shrx_u64_fallback;
|
---|
1849 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_rorx_u64;
|
---|
1850 | /** @} */
|
---|
1851 |
|
---|
1852 | /** @name MULX 32-bit and 64-bit.
|
---|
1853 | * @{ */
|
---|
1854 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU32, (uint32_t *puDst1, uint32_t *puDst2, uint32_t uSrc1, uint32_t uSrc2));
|
---|
1855 | typedef FNIEMAIMPLMULXVEXU32 *PFNIEMAIMPLMULXVEXU32;
|
---|
1856 | FNIEMAIMPLMULXVEXU32 iemAImpl_mulx_u32, iemAImpl_mulx_u32_fallback;
|
---|
1857 |
|
---|
1858 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU64, (uint64_t *puDst1, uint64_t *puDst2, uint64_t uSrc1, uint64_t uSrc2));
|
---|
1859 | typedef FNIEMAIMPLMULXVEXU64 *PFNIEMAIMPLMULXVEXU64;
|
---|
1860 | FNIEMAIMPLMULXVEXU64 iemAImpl_mulx_u64, iemAImpl_mulx_u64_fallback;
|
---|
1861 | /** @} */
|
---|
1862 |
|
---|
1863 |
|
---|
1864 | /** @name Exchange memory with register operations.
|
---|
1865 | * @{ */
|
---|
1866 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_locked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
---|
1867 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_locked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
---|
1868 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_locked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
---|
1869 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_locked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
---|
1870 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_unlocked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
---|
1871 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_unlocked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
---|
1872 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_unlocked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
---|
1873 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_unlocked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
---|
1874 | /** @} */
|
---|
1875 |
|
---|
1876 | /** @name Exchange and add operations.
|
---|
1877 | * @{ */
|
---|
1878 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
---|
1879 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
---|
1880 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
---|
1881 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
---|
1882 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
---|
1883 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
---|
1884 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
---|
1885 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
---|
1886 | /** @} */
|
---|
1887 |
|
---|
1888 | /** @name Compare and exchange.
|
---|
1889 | * @{ */
|
---|
1890 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
---|
1891 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
---|
1892 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
---|
1893 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
---|
1894 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
---|
1895 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
---|
1896 | #if ARCH_BITS == 32
|
---|
1897 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
---|
1898 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
---|
1899 | #else
|
---|
1900 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
---|
1901 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
---|
1902 | #endif
|
---|
1903 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
---|
1904 | uint32_t *pEFlags));
|
---|
1905 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
---|
1906 | uint32_t *pEFlags));
|
---|
1907 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
---|
1908 | uint32_t *pEFlags));
|
---|
1909 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
---|
1910 | uint32_t *pEFlags));
|
---|
1911 | #ifndef RT_ARCH_ARM64
|
---|
1912 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_fallback,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx,
|
---|
1913 | PRTUINT128U pu128RbxRcx, uint32_t *pEFlags));
|
---|
1914 | #endif
|
---|
1915 | /** @} */
|
---|
1916 |
|
---|
1917 | /** @name Memory ordering
|
---|
1918 | * @{ */
|
---|
1919 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
|
---|
1920 | typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
|
---|
1921 | IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
|
---|
1922 | IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
|
---|
1923 | IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
|
---|
1924 | #ifndef RT_ARCH_ARM64
|
---|
1925 | IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
|
---|
1926 | #endif
|
---|
1927 | /** @} */
|
---|
1928 |
|
---|
1929 | /** @name Double precision shifts
|
---|
1930 | * @{ */
|
---|
1931 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t *pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1932 | typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
|
---|
1933 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t *pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1934 | typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
|
---|
1935 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t *pEFlags));
|
---|
1936 | typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
|
---|
1937 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16, iemAImpl_shld_u16_amd, iemAImpl_shld_u16_intel;
|
---|
1938 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32, iemAImpl_shld_u32_amd, iemAImpl_shld_u32_intel;
|
---|
1939 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64, iemAImpl_shld_u64_amd, iemAImpl_shld_u64_intel;
|
---|
1940 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16, iemAImpl_shrd_u16_amd, iemAImpl_shrd_u16_intel;
|
---|
1941 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32, iemAImpl_shrd_u32_amd, iemAImpl_shrd_u32_intel;
|
---|
1942 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64, iemAImpl_shrd_u64_amd, iemAImpl_shrd_u64_intel;
|
---|
1943 | /** @} */
|
---|
1944 |
|
---|
1945 |
|
---|
1946 | /** @name Bit search operations (thrown in with the binary ops).
|
---|
1947 | * @{ */
|
---|
1948 | FNIEMAIMPLBINU16 iemAImpl_bsf_u16, iemAImpl_bsf_u16_amd, iemAImpl_bsf_u16_intel;
|
---|
1949 | FNIEMAIMPLBINU32 iemAImpl_bsf_u32, iemAImpl_bsf_u32_amd, iemAImpl_bsf_u32_intel;
|
---|
1950 | FNIEMAIMPLBINU64 iemAImpl_bsf_u64, iemAImpl_bsf_u64_amd, iemAImpl_bsf_u64_intel;
|
---|
1951 | FNIEMAIMPLBINU16 iemAImpl_bsr_u16, iemAImpl_bsr_u16_amd, iemAImpl_bsr_u16_intel;
|
---|
1952 | FNIEMAIMPLBINU32 iemAImpl_bsr_u32, iemAImpl_bsr_u32_amd, iemAImpl_bsr_u32_intel;
|
---|
1953 | FNIEMAIMPLBINU64 iemAImpl_bsr_u64, iemAImpl_bsr_u64_amd, iemAImpl_bsr_u64_intel;
|
---|
1954 | FNIEMAIMPLBINU16 iemAImpl_lzcnt_u16, iemAImpl_lzcnt_u16_amd, iemAImpl_lzcnt_u16_intel;
|
---|
1955 | FNIEMAIMPLBINU32 iemAImpl_lzcnt_u32, iemAImpl_lzcnt_u32_amd, iemAImpl_lzcnt_u32_intel;
|
---|
1956 | FNIEMAIMPLBINU64 iemAImpl_lzcnt_u64, iemAImpl_lzcnt_u64_amd, iemAImpl_lzcnt_u64_intel;
|
---|
1957 | FNIEMAIMPLBINU16 iemAImpl_tzcnt_u16, iemAImpl_tzcnt_u16_amd, iemAImpl_tzcnt_u16_intel;
|
---|
1958 | FNIEMAIMPLBINU32 iemAImpl_tzcnt_u32, iemAImpl_tzcnt_u32_amd, iemAImpl_tzcnt_u32_intel;
|
---|
1959 | FNIEMAIMPLBINU64 iemAImpl_tzcnt_u64, iemAImpl_tzcnt_u64_amd, iemAImpl_tzcnt_u64_intel;
|
---|
1960 | FNIEMAIMPLBINU16 iemAImpl_popcnt_u16, iemAImpl_popcnt_u16_fallback;
|
---|
1961 | FNIEMAIMPLBINU32 iemAImpl_popcnt_u32, iemAImpl_popcnt_u32_fallback;
|
---|
1962 | FNIEMAIMPLBINU64 iemAImpl_popcnt_u64, iemAImpl_popcnt_u64_fallback;
|
---|
1963 | /** @} */
|
---|
1964 |
|
---|
1965 | /** @name Signed multiplication operations (thrown in with the binary ops).
|
---|
1966 | * @{ */
|
---|
1967 | FNIEMAIMPLBINU16 iemAImpl_imul_two_u16, iemAImpl_imul_two_u16_amd, iemAImpl_imul_two_u16_intel;
|
---|
1968 | FNIEMAIMPLBINU32 iemAImpl_imul_two_u32, iemAImpl_imul_two_u32_amd, iemAImpl_imul_two_u32_intel;
|
---|
1969 | FNIEMAIMPLBINU64 iemAImpl_imul_two_u64, iemAImpl_imul_two_u64_amd, iemAImpl_imul_two_u64_intel;
|
---|
1970 | /** @} */
|
---|
1971 |
|
---|
1972 | /** @name Arithmetic assignment operations on bytes (unary).
|
---|
1973 | * @{ */
|
---|
1974 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t *pu8Dst, uint32_t *pEFlags));
|
---|
1975 | typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
|
---|
1976 | FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
|
---|
1977 | FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
|
---|
1978 | FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
|
---|
1979 | FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
|
---|
1980 | /** @} */
|
---|
1981 |
|
---|
1982 | /** @name Arithmetic assignment operations on words (unary).
|
---|
1983 | * @{ */
|
---|
1984 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t *pu16Dst, uint32_t *pEFlags));
|
---|
1985 | typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
|
---|
1986 | FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
|
---|
1987 | FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
|
---|
1988 | FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
|
---|
1989 | FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
|
---|
1990 | /** @} */
|
---|
1991 |
|
---|
1992 | /** @name Arithmetic assignment operations on double words (unary).
|
---|
1993 | * @{ */
|
---|
1994 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t *pu32Dst, uint32_t *pEFlags));
|
---|
1995 | typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
|
---|
1996 | FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
|
---|
1997 | FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
|
---|
1998 | FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
|
---|
1999 | FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
|
---|
2000 | /** @} */
|
---|
2001 |
|
---|
2002 | /** @name Arithmetic assignment operations on quad words (unary).
|
---|
2003 | * @{ */
|
---|
2004 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t *pu64Dst, uint32_t *pEFlags));
|
---|
2005 | typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
|
---|
2006 | FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
|
---|
2007 | FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
|
---|
2008 | FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
|
---|
2009 | FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
|
---|
2010 | /** @} */
|
---|
2011 |
|
---|
2012 |
|
---|
2013 | /** @name Shift operations on bytes (Group 2).
|
---|
2014 | * @{ */
|
---|
2015 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t *pu8Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
2016 | typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
|
---|
2017 | FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8, iemAImpl_rol_u8_amd, iemAImpl_rol_u8_intel;
|
---|
2018 | FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8, iemAImpl_ror_u8_amd, iemAImpl_ror_u8_intel;
|
---|
2019 | FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8, iemAImpl_rcl_u8_amd, iemAImpl_rcl_u8_intel;
|
---|
2020 | FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8, iemAImpl_rcr_u8_amd, iemAImpl_rcr_u8_intel;
|
---|
2021 | FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8, iemAImpl_shl_u8_amd, iemAImpl_shl_u8_intel;
|
---|
2022 | FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8, iemAImpl_shr_u8_amd, iemAImpl_shr_u8_intel;
|
---|
2023 | FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8, iemAImpl_sar_u8_amd, iemAImpl_sar_u8_intel;
|
---|
2024 | /** @} */
|
---|
2025 |
|
---|
2026 | /** @name Shift operations on words (Group 2).
|
---|
2027 | * @{ */
|
---|
2028 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t *pu16Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
2029 | typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
|
---|
2030 | FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16, iemAImpl_rol_u16_amd, iemAImpl_rol_u16_intel;
|
---|
2031 | FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16, iemAImpl_ror_u16_amd, iemAImpl_ror_u16_intel;
|
---|
2032 | FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16, iemAImpl_rcl_u16_amd, iemAImpl_rcl_u16_intel;
|
---|
2033 | FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16, iemAImpl_rcr_u16_amd, iemAImpl_rcr_u16_intel;
|
---|
2034 | FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16, iemAImpl_shl_u16_amd, iemAImpl_shl_u16_intel;
|
---|
2035 | FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16, iemAImpl_shr_u16_amd, iemAImpl_shr_u16_intel;
|
---|
2036 | FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16, iemAImpl_sar_u16_amd, iemAImpl_sar_u16_intel;
|
---|
2037 | /** @} */
|
---|
2038 |
|
---|
2039 | /** @name Shift operations on double words (Group 2).
|
---|
2040 | * @{ */
|
---|
2041 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t *pu32Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
2042 | typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
|
---|
2043 | FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32, iemAImpl_rol_u32_amd, iemAImpl_rol_u32_intel;
|
---|
2044 | FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32, iemAImpl_ror_u32_amd, iemAImpl_ror_u32_intel;
|
---|
2045 | FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32, iemAImpl_rcl_u32_amd, iemAImpl_rcl_u32_intel;
|
---|
2046 | FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32, iemAImpl_rcr_u32_amd, iemAImpl_rcr_u32_intel;
|
---|
2047 | FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32, iemAImpl_shl_u32_amd, iemAImpl_shl_u32_intel;
|
---|
2048 | FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32, iemAImpl_shr_u32_amd, iemAImpl_shr_u32_intel;
|
---|
2049 | FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32, iemAImpl_sar_u32_amd, iemAImpl_sar_u32_intel;
|
---|
2050 | /** @} */
|
---|
2051 |
|
---|
2052 | /** @name Shift operations on words (Group 2).
|
---|
2053 | * @{ */
|
---|
2054 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t *pu64Dst, uint8_t cShift, uint32_t *pEFlags));
|
---|
2055 | typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
|
---|
2056 | FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64, iemAImpl_rol_u64_amd, iemAImpl_rol_u64_intel;
|
---|
2057 | FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64, iemAImpl_ror_u64_amd, iemAImpl_ror_u64_intel;
|
---|
2058 | FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64, iemAImpl_rcl_u64_amd, iemAImpl_rcl_u64_intel;
|
---|
2059 | FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64, iemAImpl_rcr_u64_amd, iemAImpl_rcr_u64_intel;
|
---|
2060 | FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64, iemAImpl_shl_u64_amd, iemAImpl_shl_u64_intel;
|
---|
2061 | FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64, iemAImpl_shr_u64_amd, iemAImpl_shr_u64_intel;
|
---|
2062 | FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64, iemAImpl_sar_u64_amd, iemAImpl_sar_u64_intel;
|
---|
2063 | /** @} */
|
---|
2064 |
|
---|
2065 | /** @name Multiplication and division operations.
|
---|
2066 | * @{ */
|
---|
2067 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t *pu16AX, uint8_t u8FactorDivisor, uint32_t *pEFlags));
|
---|
2068 | typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
|
---|
2069 | FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_mul_u8_amd, iemAImpl_mul_u8_intel;
|
---|
2070 | FNIEMAIMPLMULDIVU8 iemAImpl_imul_u8, iemAImpl_imul_u8_amd, iemAImpl_imul_u8_intel;
|
---|
2071 | FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_div_u8_amd, iemAImpl_div_u8_intel;
|
---|
2072 | FNIEMAIMPLMULDIVU8 iemAImpl_idiv_u8, iemAImpl_idiv_u8_amd, iemAImpl_idiv_u8_intel;
|
---|
2073 |
|
---|
2074 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t *pu16AX, uint16_t *pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
|
---|
2075 | typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
|
---|
2076 | FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_mul_u16_amd, iemAImpl_mul_u16_intel;
|
---|
2077 | FNIEMAIMPLMULDIVU16 iemAImpl_imul_u16, iemAImpl_imul_u16_amd, iemAImpl_imul_u16_intel;
|
---|
2078 | FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_div_u16_amd, iemAImpl_div_u16_intel;
|
---|
2079 | FNIEMAIMPLMULDIVU16 iemAImpl_idiv_u16, iemAImpl_idiv_u16_amd, iemAImpl_idiv_u16_intel;
|
---|
2080 |
|
---|
2081 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t *pu32EAX, uint32_t *pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
|
---|
2082 | typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
|
---|
2083 | FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_mul_u32_amd, iemAImpl_mul_u32_intel;
|
---|
2084 | FNIEMAIMPLMULDIVU32 iemAImpl_imul_u32, iemAImpl_imul_u32_amd, iemAImpl_imul_u32_intel;
|
---|
2085 | FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_div_u32_amd, iemAImpl_div_u32_intel;
|
---|
2086 | FNIEMAIMPLMULDIVU32 iemAImpl_idiv_u32, iemAImpl_idiv_u32_amd, iemAImpl_idiv_u32_intel;
|
---|
2087 |
|
---|
2088 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
|
---|
2089 | typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
|
---|
2090 | FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_mul_u64_amd, iemAImpl_mul_u64_intel;
|
---|
2091 | FNIEMAIMPLMULDIVU64 iemAImpl_imul_u64, iemAImpl_imul_u64_amd, iemAImpl_imul_u64_intel;
|
---|
2092 | FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_div_u64_amd, iemAImpl_div_u64_intel;
|
---|
2093 | FNIEMAIMPLMULDIVU64 iemAImpl_idiv_u64, iemAImpl_idiv_u64_amd, iemAImpl_idiv_u64_intel;
|
---|
2094 | /** @} */
|
---|
2095 |
|
---|
2096 | /** @name Byte Swap.
|
---|
2097 | * @{ */
|
---|
2098 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
|
---|
2099 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
|
---|
2100 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
|
---|
2101 | /** @} */
|
---|
2102 |
|
---|
2103 | /** @name Misc.
|
---|
2104 | * @{ */
|
---|
2105 | FNIEMAIMPLBINU16 iemAImpl_arpl;
|
---|
2106 | /** @} */
|
---|
2107 |
|
---|
2108 | /** @name RDRAND and RDSEED
|
---|
2109 | * @{ */
|
---|
2110 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU16,(uint16_t *puDst, uint32_t *pEFlags));
|
---|
2111 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU32,(uint32_t *puDst, uint32_t *pEFlags));
|
---|
2112 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU64,(uint64_t *puDst, uint32_t *pEFlags));
|
---|
2113 | typedef FNIEMAIMPLRDRANDSEEDU16 *FNIEMAIMPLPRDRANDSEEDU16;
|
---|
2114 | typedef FNIEMAIMPLRDRANDSEEDU32 *FNIEMAIMPLPRDRANDSEEDU32;
|
---|
2115 | typedef FNIEMAIMPLRDRANDSEEDU64 *FNIEMAIMPLPRDRANDSEEDU64;
|
---|
2116 |
|
---|
2117 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdrand_u16, iemAImpl_rdrand_u16_fallback;
|
---|
2118 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdrand_u32, iemAImpl_rdrand_u32_fallback;
|
---|
2119 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdrand_u64, iemAImpl_rdrand_u64_fallback;
|
---|
2120 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdseed_u16, iemAImpl_rdseed_u16_fallback;
|
---|
2121 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdseed_u32, iemAImpl_rdseed_u32_fallback;
|
---|
2122 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdseed_u64, iemAImpl_rdseed_u64_fallback;
|
---|
2123 | /** @} */
|
---|
2124 |
|
---|
2125 | /** @name ADOX and ADCX
|
---|
2126 | * @{ */
|
---|
2127 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLADXU32,(uint32_t *puDst, uint32_t *pfEFlags, uint32_t uSrc));
|
---|
2128 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLADXU64,(uint64_t *puDst, uint32_t *pfEFlags, uint64_t uSrc));
|
---|
2129 | typedef FNIEMAIMPLADXU32 *PFNIEMAIMPLADXU32;
|
---|
2130 | typedef FNIEMAIMPLADXU64 *PFNIEMAIMPLADXU64;
|
---|
2131 |
|
---|
2132 | FNIEMAIMPLADXU32 iemAImpl_adcx_u32, iemAImpl_adcx_u32_fallback;
|
---|
2133 | FNIEMAIMPLADXU64 iemAImpl_adcx_u64, iemAImpl_adcx_u64_fallback;
|
---|
2134 | FNIEMAIMPLADXU32 iemAImpl_adox_u32, iemAImpl_adox_u32_fallback;
|
---|
2135 | FNIEMAIMPLADXU64 iemAImpl_adox_u64, iemAImpl_adox_u64_fallback;
|
---|
2136 | /** @} */
|
---|
2137 |
|
---|
2138 | /** @name FPU operations taking a 32-bit float argument
|
---|
2139 | * @{ */
|
---|
2140 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
2141 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
---|
2142 | typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
|
---|
2143 |
|
---|
2144 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
2145 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
---|
2146 | typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
|
---|
2147 |
|
---|
2148 | FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
|
---|
2149 | FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
|
---|
2150 | FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
|
---|
2151 | FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
|
---|
2152 | FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
|
---|
2153 | FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
|
---|
2154 | FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
|
---|
2155 |
|
---|
2156 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
|
---|
2157 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
2158 | PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
|
---|
2159 | /** @} */
|
---|
2160 |
|
---|
2161 | /** @name FPU operations taking a 64-bit float argument
|
---|
2162 | * @{ */
|
---|
2163 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
2164 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
---|
2165 | typedef FNIEMAIMPLFPUR64FSW *PFNIEMAIMPLFPUR64FSW;
|
---|
2166 |
|
---|
2167 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
2168 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
---|
2169 | typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
|
---|
2170 |
|
---|
2171 | FNIEMAIMPLFPUR64FSW iemAImpl_fcom_r80_by_r64;
|
---|
2172 | FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
|
---|
2173 | FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
|
---|
2174 | FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
|
---|
2175 | FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
|
---|
2176 | FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
|
---|
2177 | FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
|
---|
2178 |
|
---|
2179 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
|
---|
2180 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
2181 | PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
|
---|
2182 | /** @} */
|
---|
2183 |
|
---|
2184 | /** @name FPU operations taking a 80-bit float argument
|
---|
2185 | * @{ */
|
---|
2186 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
2187 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
2188 | typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
|
---|
2189 | FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
|
---|
2190 | FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
|
---|
2191 | FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
|
---|
2192 | FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
|
---|
2193 | FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
|
---|
2194 | FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
|
---|
2195 | FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
|
---|
2196 | FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
|
---|
2197 | FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
|
---|
2198 |
|
---|
2199 | FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80, iemAImpl_fpatan_r80_by_r80_amd, iemAImpl_fpatan_r80_by_r80_intel;
|
---|
2200 | FNIEMAIMPLFPUR80 iemAImpl_fyl2x_r80_by_r80, iemAImpl_fyl2x_r80_by_r80_amd, iemAImpl_fyl2x_r80_by_r80_intel;
|
---|
2201 | FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80, iemAImpl_fyl2xp1_r80_by_r80_amd, iemAImpl_fyl2xp1_r80_by_r80_intel;
|
---|
2202 |
|
---|
2203 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
2204 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
2205 | typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
|
---|
2206 | FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
|
---|
2207 | FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
|
---|
2208 |
|
---|
2209 | typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
|
---|
2210 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
---|
2211 | typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
|
---|
2212 | FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
|
---|
2213 | FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
|
---|
2214 |
|
---|
2215 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
---|
2216 | typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
|
---|
2217 | FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
|
---|
2218 | FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
|
---|
2219 | FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80, iemAImpl_f2xm1_r80_amd, iemAImpl_f2xm1_r80_intel;
|
---|
2220 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
|
---|
2221 | FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
|
---|
2222 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80, iemAImpl_fsin_r80_amd, iemAImpl_fsin_r80_intel;
|
---|
2223 | FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80, iemAImpl_fcos_r80_amd, iemAImpl_fcos_r80_intel;
|
---|
2224 |
|
---|
2225 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
|
---|
2226 | typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
|
---|
2227 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
|
---|
2228 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
|
---|
2229 |
|
---|
2230 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
|
---|
2231 | typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
|
---|
2232 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
|
---|
2233 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
|
---|
2234 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
|
---|
2235 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
|
---|
2236 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
|
---|
2237 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
|
---|
2238 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
|
---|
2239 |
|
---|
2240 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
|
---|
2241 | PCRTFLOAT80U pr80Val));
|
---|
2242 | typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
|
---|
2243 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80, iemAImpl_fptan_r80_r80_amd, iemAImpl_fptan_r80_r80_intel;
|
---|
2244 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
|
---|
2245 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80, iemAImpl_fsincos_r80_r80_amd, iemAImpl_fsincos_r80_r80_intel;
|
---|
2246 |
|
---|
2247 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
---|
2248 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
2249 | PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
|
---|
2250 |
|
---|
2251 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_d80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTPBCD80U pd80Val));
|
---|
2252 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_d80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
---|
2253 | PRTPBCD80U pd80Dst, PCRTFLOAT80U pr80Src));
|
---|
2254 |
|
---|
2255 | /** @} */
|
---|
2256 |
|
---|
2257 | /** @name FPU operations taking a 16-bit signed integer argument
|
---|
2258 | * @{ */
|
---|
2259 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
2260 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
---|
2261 | typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
|
---|
2262 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI16,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
2263 | int16_t *pi16Dst, PCRTFLOAT80U pr80Src));
|
---|
2264 | typedef FNIEMAIMPLFPUSTR80TOI16 *PFNIEMAIMPLFPUSTR80TOI16;
|
---|
2265 |
|
---|
2266 | FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
|
---|
2267 | FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
|
---|
2268 | FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
|
---|
2269 | FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
|
---|
2270 | FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
|
---|
2271 | FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
|
---|
2272 |
|
---|
2273 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
2274 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
---|
2275 | typedef FNIEMAIMPLFPUI16FSW *PFNIEMAIMPLFPUI16FSW;
|
---|
2276 | FNIEMAIMPLFPUI16FSW iemAImpl_ficom_r80_by_i16;
|
---|
2277 |
|
---|
2278 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
|
---|
2279 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fist_r80_to_i16;
|
---|
2280 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fistt_r80_to_i16, iemAImpl_fistt_r80_to_i16_amd, iemAImpl_fistt_r80_to_i16_intel;
|
---|
2281 | /** @} */
|
---|
2282 |
|
---|
2283 | /** @name FPU operations taking a 32-bit signed integer argument
|
---|
2284 | * @{ */
|
---|
2285 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
---|
2286 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
---|
2287 | typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
|
---|
2288 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI32,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
2289 | int32_t *pi32Dst, PCRTFLOAT80U pr80Src));
|
---|
2290 | typedef FNIEMAIMPLFPUSTR80TOI32 *PFNIEMAIMPLFPUSTR80TOI32;
|
---|
2291 |
|
---|
2292 | FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
|
---|
2293 | FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
|
---|
2294 | FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
|
---|
2295 | FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
|
---|
2296 | FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
|
---|
2297 | FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
|
---|
2298 |
|
---|
2299 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
---|
2300 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
---|
2301 | typedef FNIEMAIMPLFPUI32FSW *PFNIEMAIMPLFPUI32FSW;
|
---|
2302 | FNIEMAIMPLFPUI32FSW iemAImpl_ficom_r80_by_i32;
|
---|
2303 |
|
---|
2304 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
|
---|
2305 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fist_r80_to_i32;
|
---|
2306 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fistt_r80_to_i32;
|
---|
2307 | /** @} */
|
---|
2308 |
|
---|
2309 | /** @name FPU operations taking a 64-bit signed integer argument
|
---|
2310 | * @{ */
|
---|
2311 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI64,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
---|
2312 | int64_t *pi64Dst, PCRTFLOAT80U pr80Src));
|
---|
2313 | typedef FNIEMAIMPLFPUSTR80TOI64 *PFNIEMAIMPLFPUSTR80TOI64;
|
---|
2314 |
|
---|
2315 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
|
---|
2316 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fist_r80_to_i64;
|
---|
2317 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fistt_r80_to_i64;
|
---|
2318 | /** @} */
|
---|
2319 |
|
---|
2320 |
|
---|
2321 | /** Temporary type representing a 256-bit vector register. */
|
---|
2322 | typedef struct { uint64_t au64[4]; } IEMVMM256;
|
---|
2323 | /** Temporary type pointing to a 256-bit vector register. */
|
---|
2324 | typedef IEMVMM256 *PIEMVMM256;
|
---|
2325 | /** Temporary type pointing to a const 256-bit vector register. */
|
---|
2326 | typedef IEMVMM256 *PCIEMVMM256;
|
---|
2327 |
|
---|
2328 |
|
---|
2329 | /** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
|
---|
2330 | * @{ */
|
---|
2331 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc));
|
---|
2332 | typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
|
---|
2333 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
2334 | typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
|
---|
2335 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U128,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
|
---|
2336 | typedef FNIEMAIMPLMEDIAF3U128 *PFNIEMAIMPLMEDIAF3U128;
|
---|
2337 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U256,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
|
---|
2338 | typedef FNIEMAIMPLMEDIAF3U256 *PFNIEMAIMPLMEDIAF3U256;
|
---|
2339 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U64,(uint64_t *puDst, uint64_t const *puSrc));
|
---|
2340 | typedef FNIEMAIMPLMEDIAOPTF2U64 *PFNIEMAIMPLMEDIAOPTF2U64;
|
---|
2341 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128,(PRTUINT128U puDst, PCRTUINT128U puSrc));
|
---|
2342 | typedef FNIEMAIMPLMEDIAOPTF2U128 *PFNIEMAIMPLMEDIAOPTF2U128;
|
---|
2343 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
|
---|
2344 | typedef FNIEMAIMPLMEDIAOPTF3U128 *PFNIEMAIMPLMEDIAOPTF3U128;
|
---|
2345 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
|
---|
2346 | typedef FNIEMAIMPLMEDIAOPTF3U256 *PFNIEMAIMPLMEDIAOPTF3U256;
|
---|
2347 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U256,(PRTUINT256U puDst, PCRTUINT256U puSrc));
|
---|
2348 | typedef FNIEMAIMPLMEDIAOPTF2U256 *PFNIEMAIMPLMEDIAOPTF2U256;
|
---|
2349 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback;
|
---|
2350 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64;
|
---|
2351 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
|
---|
2352 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64;
|
---|
2353 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64;
|
---|
2354 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64;
|
---|
2355 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddd_u64;
|
---|
2356 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddq_u64;
|
---|
2357 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64;
|
---|
2358 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64;
|
---|
2359 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubd_u64;
|
---|
2360 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubq_u64;
|
---|
2361 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddwd_u64;
|
---|
2362 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64;
|
---|
2363 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminub_u64, iemAImpl_pmaxub_u64;
|
---|
2364 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64;
|
---|
2365 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback;
|
---|
2366 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback;
|
---|
2367 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback;
|
---|
2368 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback;
|
---|
2369 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback;
|
---|
2370 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback;
|
---|
2371 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddw_u64, iemAImpl_phaddw_u64_fallback;
|
---|
2372 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddd_u64, iemAImpl_phaddd_u64_fallback;
|
---|
2373 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubw_u64, iemAImpl_phsubw_u64_fallback;
|
---|
2374 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubd_u64, iemAImpl_phsubd_u64_fallback;
|
---|
2375 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddsw_u64, iemAImpl_phaddsw_u64_fallback;
|
---|
2376 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubsw_u64, iemAImpl_phsubsw_u64_fallback;
|
---|
2377 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddubsw_u64, iemAImpl_pmaddubsw_u64_fallback;
|
---|
2378 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmulhrsw_u64, iemAImpl_pmulhrsw_u64_fallback;
|
---|
2379 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmuludq_u64;
|
---|
2380 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64;
|
---|
2381 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64;
|
---|
2382 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllq_u64, iemAImpl_psrlq_u64;
|
---|
2383 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packsswb_u64, iemAImpl_packuswb_u64;
|
---|
2384 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packssdw_u64;
|
---|
2385 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmulhuw_u64;
|
---|
2386 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pavgb_u64, iemAImpl_pavgw_u64;
|
---|
2387 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psadbw_u64;
|
---|
2388 |
|
---|
2389 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback;
|
---|
2390 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128;
|
---|
2391 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
|
---|
2392 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback;
|
---|
2393 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128;
|
---|
2394 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback;
|
---|
2395 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128;
|
---|
2396 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128;
|
---|
2397 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddd_u128;
|
---|
2398 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddq_u128;
|
---|
2399 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128;
|
---|
2400 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128;
|
---|
2401 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubd_u128;
|
---|
2402 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubq_u128;
|
---|
2403 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmullw_u128, iemAImpl_pmullw_u128_fallback;
|
---|
2404 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhw_u128;
|
---|
2405 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback;
|
---|
2406 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddwd_u128;
|
---|
2407 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminub_u128;
|
---|
2408 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback;
|
---|
2409 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback;
|
---|
2410 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback;
|
---|
2411 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback;
|
---|
2412 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsw_u128, iemAImpl_pminsw_u128_fallback;
|
---|
2413 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxub_u128;
|
---|
2414 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback;
|
---|
2415 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback;
|
---|
2416 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback;
|
---|
2417 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsw_u128;
|
---|
2418 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback;
|
---|
2419 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback;
|
---|
2420 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback;
|
---|
2421 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback;
|
---|
2422 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback;
|
---|
2423 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback;
|
---|
2424 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback;
|
---|
2425 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback;
|
---|
2426 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback;
|
---|
2427 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback;
|
---|
2428 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback;
|
---|
2429 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback;
|
---|
2430 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback;
|
---|
2431 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback;
|
---|
2432 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback;
|
---|
2433 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmuludq_u128;
|
---|
2434 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128;
|
---|
2435 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128;
|
---|
2436 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllw_u128, iemAImpl_psrlw_u128, iemAImpl_psraw_u128;
|
---|
2437 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pslld_u128, iemAImpl_psrld_u128, iemAImpl_psrad_u128;
|
---|
2438 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllq_u128, iemAImpl_psrlq_u128;
|
---|
2439 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulhuw_u128;
|
---|
2440 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pavgb_u128, iemAImpl_pavgw_u128;
|
---|
2441 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psadbw_u128;
|
---|
2442 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmuldq_u128, iemAImpl_pmuldq_u128_fallback;
|
---|
2443 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpcklps_u128, iemAImpl_unpcklpd_u128;
|
---|
2444 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpckhps_u128, iemAImpl_unpckhpd_u128;
|
---|
2445 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phminposuw_u128, iemAImpl_phminposuw_u128_fallback;
|
---|
2446 |
|
---|
2447 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback;
|
---|
2448 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback;
|
---|
2449 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpandn_u128, iemAImpl_vpandn_u128_fallback;
|
---|
2450 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpor_u128, iemAImpl_vpor_u128_fallback;
|
---|
2451 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpxor_u128, iemAImpl_vpxor_u128_fallback;
|
---|
2452 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqb_u128, iemAImpl_vpcmpeqb_u128_fallback;
|
---|
2453 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback;
|
---|
2454 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback;
|
---|
2455 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback;
|
---|
2456 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback;
|
---|
2457 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback;
|
---|
2458 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback;
|
---|
2459 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback;
|
---|
2460 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddb_u128, iemAImpl_vpaddb_u128_fallback;
|
---|
2461 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddw_u128, iemAImpl_vpaddw_u128_fallback;
|
---|
2462 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddd_u128, iemAImpl_vpaddd_u128_fallback;
|
---|
2463 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddq_u128, iemAImpl_vpaddq_u128_fallback;
|
---|
2464 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubb_u128, iemAImpl_vpsubb_u128_fallback;
|
---|
2465 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubw_u128, iemAImpl_vpsubw_u128_fallback;
|
---|
2466 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubd_u128, iemAImpl_vpsubd_u128_fallback;
|
---|
2467 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubq_u128, iemAImpl_vpsubq_u128_fallback;
|
---|
2468 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminub_u128, iemAImpl_vpminub_u128_fallback;
|
---|
2469 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminuw_u128, iemAImpl_vpminuw_u128_fallback;
|
---|
2470 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminud_u128, iemAImpl_vpminud_u128_fallback;
|
---|
2471 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsb_u128, iemAImpl_vpminsb_u128_fallback;
|
---|
2472 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsw_u128, iemAImpl_vpminsw_u128_fallback;
|
---|
2473 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsd_u128, iemAImpl_vpminsd_u128_fallback;
|
---|
2474 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxub_u128, iemAImpl_vpmaxub_u128_fallback;
|
---|
2475 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxuw_u128, iemAImpl_vpmaxuw_u128_fallback;
|
---|
2476 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxud_u128, iemAImpl_vpmaxud_u128_fallback;
|
---|
2477 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsb_u128, iemAImpl_vpmaxsb_u128_fallback;
|
---|
2478 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsw_u128, iemAImpl_vpmaxsw_u128_fallback;
|
---|
2479 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsd_u128, iemAImpl_vpmaxsd_u128_fallback;
|
---|
2480 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpacksswb_u128, iemAImpl_vpacksswb_u128_fallback;
|
---|
2481 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackssdw_u128, iemAImpl_vpackssdw_u128_fallback;
|
---|
2482 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackuswb_u128, iemAImpl_vpackuswb_u128_fallback;
|
---|
2483 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackusdw_u128, iemAImpl_vpackusdw_u128_fallback;
|
---|
2484 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmullw_u128, iemAImpl_vpmullw_u128_fallback;
|
---|
2485 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulld_u128, iemAImpl_vpmulld_u128_fallback;
|
---|
2486 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhw_u128, iemAImpl_vpmulhw_u128_fallback;
|
---|
2487 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhuw_u128, iemAImpl_vpmulhuw_u128_fallback;
|
---|
2488 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgb_u128, iemAImpl_vpavgb_u128_fallback;
|
---|
2489 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgw_u128, iemAImpl_vpavgw_u128_fallback;
|
---|
2490 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignb_u128, iemAImpl_vpsignb_u128_fallback;
|
---|
2491 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignw_u128, iemAImpl_vpsignw_u128_fallback;
|
---|
2492 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignd_u128, iemAImpl_vpsignd_u128_fallback;
|
---|
2493 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddw_u128, iemAImpl_vphaddw_u128_fallback;
|
---|
2494 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddd_u128, iemAImpl_vphaddd_u128_fallback;
|
---|
2495 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubw_u128, iemAImpl_vphsubw_u128_fallback;
|
---|
2496 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubd_u128, iemAImpl_vphsubd_u128_fallback;
|
---|
2497 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddsw_u128, iemAImpl_vphaddsw_u128_fallback;
|
---|
2498 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubsw_u128, iemAImpl_vphsubsw_u128_fallback;
|
---|
2499 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaddubsw_u128, iemAImpl_vpmaddubsw_u128_fallback;
|
---|
2500 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhrsw_u128, iemAImpl_vpmulhrsw_u128_fallback;
|
---|
2501 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsadbw_u128, iemAImpl_vpsadbw_u128_fallback;
|
---|
2502 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuldq_u128, iemAImpl_vpmuldq_u128_fallback;
|
---|
2503 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuludq_u128, iemAImpl_vpmuludq_u128_fallback;
|
---|
2504 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubsb_u128, iemAImpl_vpsubsb_u128_fallback;
|
---|
2505 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubsw_u128, iemAImpl_vpsubsw_u128_fallback;
|
---|
2506 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubusb_u128, iemAImpl_vpsubusb_u128_fallback;
|
---|
2507 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsubusw_u128, iemAImpl_vpsubusw_u128_fallback;
|
---|
2508 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddusb_u128, iemAImpl_vpaddusb_u128_fallback;
|
---|
2509 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddusw_u128, iemAImpl_vpaddusw_u128_fallback;
|
---|
2510 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddsb_u128, iemAImpl_vpaddsb_u128_fallback;
|
---|
2511 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpaddsw_u128, iemAImpl_vpaddsw_u128_fallback;
|
---|
2512 |
|
---|
2513 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsb_u128, iemAImpl_vpabsb_u128_fallback;
|
---|
2514 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsw_u128, iemAImpl_vpabsd_u128_fallback;
|
---|
2515 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsd_u128, iemAImpl_vpabsw_u128_fallback;
|
---|
2516 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vphminposuw_u128, iemAImpl_vphminposuw_u128_fallback;
|
---|
2517 |
|
---|
2518 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback;
|
---|
2519 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback;
|
---|
2520 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpandn_u256, iemAImpl_vpandn_u256_fallback;
|
---|
2521 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpor_u256, iemAImpl_vpor_u256_fallback;
|
---|
2522 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpxor_u256, iemAImpl_vpxor_u256_fallback;
|
---|
2523 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqb_u256, iemAImpl_vpcmpeqb_u256_fallback;
|
---|
2524 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback;
|
---|
2525 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback;
|
---|
2526 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback;
|
---|
2527 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback;
|
---|
2528 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback;
|
---|
2529 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback;
|
---|
2530 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback;
|
---|
2531 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddb_u256, iemAImpl_vpaddb_u256_fallback;
|
---|
2532 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddw_u256, iemAImpl_vpaddw_u256_fallback;
|
---|
2533 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddd_u256, iemAImpl_vpaddd_u256_fallback;
|
---|
2534 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddq_u256, iemAImpl_vpaddq_u256_fallback;
|
---|
2535 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubb_u256, iemAImpl_vpsubb_u256_fallback;
|
---|
2536 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubw_u256, iemAImpl_vpsubw_u256_fallback;
|
---|
2537 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubd_u256, iemAImpl_vpsubd_u256_fallback;
|
---|
2538 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubq_u256, iemAImpl_vpsubq_u256_fallback;
|
---|
2539 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminub_u256, iemAImpl_vpminub_u256_fallback;
|
---|
2540 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminuw_u256, iemAImpl_vpminuw_u256_fallback;
|
---|
2541 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminud_u256, iemAImpl_vpminud_u256_fallback;
|
---|
2542 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsb_u256, iemAImpl_vpminsb_u256_fallback;
|
---|
2543 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsw_u256, iemAImpl_vpminsw_u256_fallback;
|
---|
2544 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsd_u256, iemAImpl_vpminsd_u256_fallback;
|
---|
2545 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxub_u256, iemAImpl_vpmaxub_u256_fallback;
|
---|
2546 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxuw_u256, iemAImpl_vpmaxuw_u256_fallback;
|
---|
2547 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxud_u256, iemAImpl_vpmaxud_u256_fallback;
|
---|
2548 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsb_u256, iemAImpl_vpmaxsb_u256_fallback;
|
---|
2549 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsw_u256, iemAImpl_vpmaxsw_u256_fallback;
|
---|
2550 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsd_u256, iemAImpl_vpmaxsd_u256_fallback;
|
---|
2551 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpacksswb_u256, iemAImpl_vpacksswb_u256_fallback;
|
---|
2552 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackssdw_u256, iemAImpl_vpackssdw_u256_fallback;
|
---|
2553 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackuswb_u256, iemAImpl_vpackuswb_u256_fallback;
|
---|
2554 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackusdw_u256, iemAImpl_vpackusdw_u256_fallback;
|
---|
2555 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmullw_u256, iemAImpl_vpmullw_u256_fallback;
|
---|
2556 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulld_u256, iemAImpl_vpmulld_u256_fallback;
|
---|
2557 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhw_u256, iemAImpl_vpmulhw_u256_fallback;
|
---|
2558 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhuw_u256, iemAImpl_vpmulhuw_u256_fallback;
|
---|
2559 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgb_u256, iemAImpl_vpavgb_u256_fallback;
|
---|
2560 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgw_u256, iemAImpl_vpavgw_u256_fallback;
|
---|
2561 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignb_u256, iemAImpl_vpsignb_u256_fallback;
|
---|
2562 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignw_u256, iemAImpl_vpsignw_u256_fallback;
|
---|
2563 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignd_u256, iemAImpl_vpsignd_u256_fallback;
|
---|
2564 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddw_u256, iemAImpl_vphaddw_u256_fallback;
|
---|
2565 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddd_u256, iemAImpl_vphaddd_u256_fallback;
|
---|
2566 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubw_u256, iemAImpl_vphsubw_u256_fallback;
|
---|
2567 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubd_u256, iemAImpl_vphsubd_u256_fallback;
|
---|
2568 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddsw_u256, iemAImpl_vphaddsw_u256_fallback;
|
---|
2569 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubsw_u256, iemAImpl_vphsubsw_u256_fallback;
|
---|
2570 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaddubsw_u256, iemAImpl_vpmaddubsw_u256_fallback;
|
---|
2571 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhrsw_u256, iemAImpl_vpmulhrsw_u256_fallback;
|
---|
2572 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsadbw_u256, iemAImpl_vpsadbw_u256_fallback;
|
---|
2573 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuldq_u256, iemAImpl_vpmuldq_u256_fallback;
|
---|
2574 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuludq_u256, iemAImpl_vpmuludq_u256_fallback;
|
---|
2575 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubsb_u256, iemAImpl_vpsubsb_u256_fallback;
|
---|
2576 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubsw_u256, iemAImpl_vpsubsw_u256_fallback;
|
---|
2577 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubusb_u256, iemAImpl_vpsubusb_u256_fallback;
|
---|
2578 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsubusw_u256, iemAImpl_vpsubusw_u256_fallback;
|
---|
2579 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddusb_u256, iemAImpl_vpaddusb_u256_fallback;
|
---|
2580 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddusw_u256, iemAImpl_vpaddusw_u256_fallback;
|
---|
2581 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddsb_u256, iemAImpl_vpaddsb_u256_fallback;
|
---|
2582 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpaddsw_u256, iemAImpl_vpaddsw_u256_fallback;
|
---|
2583 |
|
---|
2584 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsb_u256, iemAImpl_vpabsb_u256_fallback;
|
---|
2585 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsw_u256, iemAImpl_vpabsw_u256_fallback;
|
---|
2586 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsd_u256, iemAImpl_vpabsd_u256_fallback;
|
---|
2587 | /** @} */
|
---|
2588 |
|
---|
2589 | /** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
|
---|
2590 | * @{ */
|
---|
2591 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
|
---|
2592 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
|
---|
2593 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpcklbw_u128, iemAImpl_vpunpcklbw_u128_fallback,
|
---|
2594 | iemAImpl_vpunpcklwd_u128, iemAImpl_vpunpcklwd_u128_fallback,
|
---|
2595 | iemAImpl_vpunpckldq_u128, iemAImpl_vpunpckldq_u128_fallback,
|
---|
2596 | iemAImpl_vpunpcklqdq_u128, iemAImpl_vpunpcklqdq_u128_fallback,
|
---|
2597 | iemAImpl_vunpcklps_u128, iemAImpl_vunpcklps_u128_fallback,
|
---|
2598 | iemAImpl_vunpcklpd_u128, iemAImpl_vunpcklpd_u128_fallback,
|
---|
2599 | iemAImpl_vunpckhps_u128, iemAImpl_vunpckhps_u128_fallback,
|
---|
2600 | iemAImpl_vunpckhpd_u128, iemAImpl_vunpckhpd_u128_fallback;
|
---|
2601 |
|
---|
2602 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpcklbw_u256, iemAImpl_vpunpcklbw_u256_fallback,
|
---|
2603 | iemAImpl_vpunpcklwd_u256, iemAImpl_vpunpcklwd_u256_fallback,
|
---|
2604 | iemAImpl_vpunpckldq_u256, iemAImpl_vpunpckldq_u256_fallback,
|
---|
2605 | iemAImpl_vpunpcklqdq_u256, iemAImpl_vpunpcklqdq_u256_fallback,
|
---|
2606 | iemAImpl_vunpcklps_u256, iemAImpl_vunpcklps_u256_fallback,
|
---|
2607 | iemAImpl_vunpcklpd_u256, iemAImpl_vunpcklpd_u256_fallback,
|
---|
2608 | iemAImpl_vunpckhps_u256, iemAImpl_vunpckhps_u256_fallback,
|
---|
2609 | iemAImpl_vunpckhpd_u256, iemAImpl_vunpckhpd_u256_fallback;
|
---|
2610 | /** @} */
|
---|
2611 |
|
---|
2612 | /** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
|
---|
2613 | * @{ */
|
---|
2614 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
|
---|
2615 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
|
---|
2616 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpckhbw_u128, iemAImpl_vpunpckhbw_u128_fallback,
|
---|
2617 | iemAImpl_vpunpckhwd_u128, iemAImpl_vpunpckhwd_u128_fallback,
|
---|
2618 | iemAImpl_vpunpckhdq_u128, iemAImpl_vpunpckhdq_u128_fallback,
|
---|
2619 | iemAImpl_vpunpckhqdq_u128, iemAImpl_vpunpckhqdq_u128_fallback;
|
---|
2620 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpckhbw_u256, iemAImpl_vpunpckhbw_u256_fallback,
|
---|
2621 | iemAImpl_vpunpckhwd_u256, iemAImpl_vpunpckhwd_u256_fallback,
|
---|
2622 | iemAImpl_vpunpckhdq_u256, iemAImpl_vpunpckhdq_u256_fallback,
|
---|
2623 | iemAImpl_vpunpckhqdq_u256, iemAImpl_vpunpckhqdq_u256_fallback;
|
---|
2624 | /** @} */
|
---|
2625 |
|
---|
2626 | /** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
|
---|
2627 | * @{ */
|
---|
2628 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2629 | typedef FNIEMAIMPLMEDIAPSHUFU128 *PFNIEMAIMPLMEDIAPSHUFU128;
|
---|
2630 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU256,(PRTUINT256U puDst, PCRTUINT256U puSrc, uint8_t bEvil));
|
---|
2631 | typedef FNIEMAIMPLMEDIAPSHUFU256 *PFNIEMAIMPLMEDIAPSHUFU256;
|
---|
2632 | IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw_u64,(uint64_t *puDst, uint64_t const *puSrc, uint8_t bEvil));
|
---|
2633 | FNIEMAIMPLMEDIAPSHUFU128 iemAImpl_pshufhw_u128, iemAImpl_pshuflw_u128, iemAImpl_pshufd_u128;
|
---|
2634 | #ifndef IEM_WITHOUT_ASSEMBLY
|
---|
2635 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256, iemAImpl_vpshuflw_u256, iemAImpl_vpshufd_u256;
|
---|
2636 | #endif
|
---|
2637 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256_fallback, iemAImpl_vpshuflw_u256_fallback, iemAImpl_vpshufd_u256_fallback;
|
---|
2638 | /** @} */
|
---|
2639 |
|
---|
2640 | /** @name Media (SSE/MMX/AVX) operation: Shift Immediate Stuff (evil)
|
---|
2641 | * @{ */
|
---|
2642 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU64,(uint64_t *puDst, uint8_t bShift));
|
---|
2643 | typedef FNIEMAIMPLMEDIAPSHIFTU64 *PFNIEMAIMPLMEDIAPSHIFTU64;
|
---|
2644 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU128,(PRTUINT128U puDst, uint8_t bShift));
|
---|
2645 | typedef FNIEMAIMPLMEDIAPSHIFTU128 *PFNIEMAIMPLMEDIAPSHIFTU128;
|
---|
2646 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU256,(PRTUINT256U puDst, uint8_t bShift));
|
---|
2647 | typedef FNIEMAIMPLMEDIAPSHIFTU256 *PFNIEMAIMPLMEDIAPSHIFTU256;
|
---|
2648 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psllw_imm_u64, iemAImpl_pslld_imm_u64, iemAImpl_psllq_imm_u64;
|
---|
2649 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psrlw_imm_u64, iemAImpl_psrld_imm_u64, iemAImpl_psrlq_imm_u64;
|
---|
2650 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psraw_imm_u64, iemAImpl_psrad_imm_u64;
|
---|
2651 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psllw_imm_u128, iemAImpl_pslld_imm_u128, iemAImpl_psllq_imm_u128;
|
---|
2652 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psrlw_imm_u128, iemAImpl_psrld_imm_u128, iemAImpl_psrlq_imm_u128;
|
---|
2653 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psraw_imm_u128, iemAImpl_psrad_imm_u128;
|
---|
2654 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_pslldq_imm_u128, iemAImpl_psrldq_imm_u128;
|
---|
2655 | /** @} */
|
---|
2656 |
|
---|
2657 | /** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
|
---|
2658 | * @{ */
|
---|
2659 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(uint64_t *pu64Dst, uint64_t const *puSrc));
|
---|
2660 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(uint64_t *pu64Dst, PCRTUINT128U puSrc));
|
---|
2661 | #ifndef IEM_WITHOUT_ASSEMBLY
|
---|
2662 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
---|
2663 | #endif
|
---|
2664 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256_fallback,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
---|
2665 | /** @} */
|
---|
2666 |
|
---|
2667 | /** @name Media (SSE/MMX/AVX) operations: Variable Blend Packed Bytes/R32/R64.
|
---|
2668 | * @{ */
|
---|
2669 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puMask));
|
---|
2670 | typedef FNIEMAIMPLBLENDU128 *PFNIEMAIMPLBLENDU128;
|
---|
2671 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, PCRTUINT128U puMask));
|
---|
2672 | typedef FNIEMAIMPLAVXBLENDU128 *PFNIEMAIMPLAVXBLENDU128;
|
---|
2673 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, PCRTUINT256U puMask));
|
---|
2674 | typedef FNIEMAIMPLAVXBLENDU256 *PFNIEMAIMPLAVXBLENDU256;
|
---|
2675 |
|
---|
2676 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128;
|
---|
2677 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128_fallback;
|
---|
2678 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128;
|
---|
2679 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128_fallback;
|
---|
2680 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256;
|
---|
2681 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256_fallback;
|
---|
2682 |
|
---|
2683 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128;
|
---|
2684 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128_fallback;
|
---|
2685 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128;
|
---|
2686 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128_fallback;
|
---|
2687 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256;
|
---|
2688 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256_fallback;
|
---|
2689 |
|
---|
2690 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128;
|
---|
2691 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128_fallback;
|
---|
2692 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128;
|
---|
2693 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128_fallback;
|
---|
2694 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256;
|
---|
2695 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256_fallback;
|
---|
2696 | /** @} */
|
---|
2697 |
|
---|
2698 |
|
---|
2699 | /** @name Media (SSE/MMX/AVX) operation: Sort this later
|
---|
2700 | * @{ */
|
---|
2701 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2702 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2703 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2704 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2705 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
---|
2706 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
---|
2707 |
|
---|
2708 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2709 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2710 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2711 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2712 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2713 |
|
---|
2714 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2715 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2716 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2717 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2718 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2719 |
|
---|
2720 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2721 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2722 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2723 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2724 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2725 |
|
---|
2726 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2727 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2728 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2729 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2730 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2731 |
|
---|
2732 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2733 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2734 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2735 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2736 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2737 |
|
---|
2738 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2739 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2740 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2741 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2742 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2743 |
|
---|
2744 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2745 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2746 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2747 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2748 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2749 |
|
---|
2750 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2751 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2752 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2753 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2754 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2755 |
|
---|
2756 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2757 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2758 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
---|
2759 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2760 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2761 |
|
---|
2762 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2763 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2764 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2765 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2766 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2767 |
|
---|
2768 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2769 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2770 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
---|
2771 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2772 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2773 |
|
---|
2774 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2775 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2776 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
---|
2777 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2778 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
---|
2779 |
|
---|
2780 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2781 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2782 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2783 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2784 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2785 |
|
---|
2786 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2787 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2788 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2789 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2790 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2791 |
|
---|
2792 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2793 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64_fallback,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2794 |
|
---|
2795 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u64,(uint64_t *pu64Dst, uint16_t u16Src, uint8_t bEvil));
|
---|
2796 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u128,(PRTUINT128U puDst, uint16_t u16Src, uint8_t bEvil));
|
---|
2797 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
---|
2798 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
---|
2799 |
|
---|
2800 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u64,(uint16_t *pu16Dst, uint64_t u64Src, uint8_t bEvil));
|
---|
2801 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2802 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2803 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128_fallback,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2804 |
|
---|
2805 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2806 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2807 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2808 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2809 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2810 |
|
---|
2811 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2812 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2813 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
---|
2814 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2815 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
---|
2816 |
|
---|
2817 |
|
---|
2818 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
---|
2819 | typedef FNIEMAIMPLMEDIAOPTF2U128IMM8 *PFNIEMAIMPLMEDIAOPTF2U128IMM8;
|
---|
2820 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
---|
2821 | typedef FNIEMAIMPLMEDIAOPTF3U128IMM8 *PFNIEMAIMPLMEDIAOPTF3U128IMM8;
|
---|
2822 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256IMM8,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
---|
2823 | typedef FNIEMAIMPLMEDIAOPTF3U256IMM8 *PFNIEMAIMPLMEDIAOPTF3U256IMM8;
|
---|
2824 |
|
---|
2825 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_palignr_u128, iemAImpl_palignr_u128_fallback;
|
---|
2826 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pblendw_u128, iemAImpl_pblendw_u128_fallback;
|
---|
2827 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendps_u128, iemAImpl_blendps_u128_fallback;
|
---|
2828 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendpd_u128, iemAImpl_blendpd_u128_fallback;
|
---|
2829 |
|
---|
2830 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpalignr_u128, iemAImpl_vpalignr_u128_fallback;
|
---|
2831 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpblendw_u128, iemAImpl_vpblendw_u128_fallback;
|
---|
2832 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendps_u128, iemAImpl_vblendps_u128_fallback;
|
---|
2833 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendpd_u128, iemAImpl_vblendpd_u128_fallback;
|
---|
2834 |
|
---|
2835 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpalignr_u256, iemAImpl_vpalignr_u256_fallback;
|
---|
2836 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpblendw_u256, iemAImpl_vpblendw_u256_fallback;
|
---|
2837 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendps_u256, iemAImpl_vblendps_u256_fallback;
|
---|
2838 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendpd_u256, iemAImpl_vblendpd_u256_fallback;
|
---|
2839 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vperm2i128_u256, iemAImpl_vperm2i128_u256_fallback;
|
---|
2840 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vperm2f128_u256, iemAImpl_vperm2f128_u256_fallback;
|
---|
2841 |
|
---|
2842 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesimc_u128, iemAImpl_aesimc_u128_fallback;
|
---|
2843 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenc_u128, iemAImpl_aesenc_u128_fallback;
|
---|
2844 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenclast_u128, iemAImpl_aesenclast_u128_fallback;
|
---|
2845 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdec_u128, iemAImpl_aesdec_u128_fallback;
|
---|
2846 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdeclast_u128, iemAImpl_aesdeclast_u128_fallback;
|
---|
2847 |
|
---|
2848 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesimc_u128, iemAImpl_vaesimc_u128_fallback;
|
---|
2849 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenc_u128, iemAImpl_vaesenc_u128_fallback;
|
---|
2850 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenclast_u128, iemAImpl_vaesenclast_u128_fallback;
|
---|
2851 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdec_u128, iemAImpl_vaesdec_u128_fallback;
|
---|
2852 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdeclast_u128, iemAImpl_vaesdeclast_u128_fallback;
|
---|
2853 |
|
---|
2854 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_aeskeygenassist_u128, iemAImpl_aeskeygenassist_u128_fallback;
|
---|
2855 |
|
---|
2856 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vaeskeygenassist_u128, iemAImpl_vaeskeygenassist_u128_fallback;
|
---|
2857 |
|
---|
2858 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1nexte_u128, iemAImpl_sha1nexte_u128_fallback;
|
---|
2859 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1msg1_u128, iemAImpl_sha1msg1_u128_fallback;
|
---|
2860 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1msg2_u128, iemAImpl_sha1msg2_u128_fallback;
|
---|
2861 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha256msg1_u128, iemAImpl_sha256msg1_u128_fallback;
|
---|
2862 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha256msg2_u128, iemAImpl_sha256msg2_u128_fallback;
|
---|
2863 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_sha1rnds4_u128, iemAImpl_sha1rnds4_u128_fallback;
|
---|
2864 | IEM_DECL_IMPL_DEF(void, iemAImpl_sha256rnds2_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puXmm0Constants));
|
---|
2865 | IEM_DECL_IMPL_DEF(void, iemAImpl_sha256rnds2_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puXmm0Constants));
|
---|
2866 |
|
---|
2867 | typedef struct IEMPCMPISTRXSRC
|
---|
2868 | {
|
---|
2869 | RTUINT128U uSrc1;
|
---|
2870 | RTUINT128U uSrc2;
|
---|
2871 | } IEMPCMPISTRXSRC;
|
---|
2872 | typedef IEMPCMPISTRXSRC *PIEMPCMPISTRXSRC;
|
---|
2873 | typedef const IEMPCMPISTRXSRC *PCIEMPCMPISTRXSRC;
|
---|
2874 |
|
---|
2875 | typedef struct IEMPCMPESTRXSRC
|
---|
2876 | {
|
---|
2877 | RTUINT128U uSrc1;
|
---|
2878 | RTUINT128U uSrc2;
|
---|
2879 | uint64_t u64Rax;
|
---|
2880 | uint64_t u64Rdx;
|
---|
2881 | } IEMPCMPESTRXSRC;
|
---|
2882 | typedef IEMPCMPESTRXSRC *PIEMPCMPESTRXSRC;
|
---|
2883 | typedef const IEMPCMPESTRXSRC *PCIEMPCMPESTRXSRC;
|
---|
2884 |
|
---|
2885 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPISTRIU128IMM8,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRXSRC pSrc, uint8_t bEvil));
|
---|
2886 | typedef FNIEMAIMPLPCMPISTRIU128IMM8 *PFNIEMAIMPLPCMPISTRIU128IMM8;
|
---|
2887 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPESTRIU128IMM8,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPESTRXSRC pSrc, uint8_t bEvil));
|
---|
2888 | typedef FNIEMAIMPLPCMPESTRIU128IMM8 *PFNIEMAIMPLPCMPESTRIU128IMM8;
|
---|
2889 |
|
---|
2890 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPISTRMU128IMM8,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPISTRXSRC pSrc, uint8_t bEvil));
|
---|
2891 | typedef FNIEMAIMPLPCMPISTRMU128IMM8 *PFNIEMAIMPLPCMPISTRMU128IMM8;
|
---|
2892 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPESTRMU128IMM8,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPESTRXSRC pSrc, uint8_t bEvil));
|
---|
2893 | typedef FNIEMAIMPLPCMPESTRMU128IMM8 *PFNIEMAIMPLPCMPESTRMU128IMM8;
|
---|
2894 |
|
---|
2895 | FNIEMAIMPLPCMPISTRIU128IMM8 iemAImpl_pcmpistri_u128, iemAImpl_pcmpistri_u128_fallback;
|
---|
2896 | FNIEMAIMPLPCMPESTRIU128IMM8 iemAImpl_pcmpestri_u128, iemAImpl_pcmpestri_u128_fallback;
|
---|
2897 | FNIEMAIMPLPCMPISTRMU128IMM8 iemAImpl_pcmpistrm_u128, iemAImpl_pcmpistrm_u128_fallback;
|
---|
2898 | FNIEMAIMPLPCMPESTRMU128IMM8 iemAImpl_pcmpestrm_u128, iemAImpl_pcmpestrm_u128_fallback;
|
---|
2899 |
|
---|
2900 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pclmulqdq_u128, iemAImpl_pclmulqdq_u128_fallback;
|
---|
2901 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpclmulqdq_u128, iemAImpl_vpclmulqdq_u128_fallback;
|
---|
2902 |
|
---|
2903 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_mpsadbw_u128, iemAImpl_mpsadbw_u128_fallback;
|
---|
2904 | /** @} */
|
---|
2905 |
|
---|
2906 | /** @name Media Odds and Ends
|
---|
2907 | * @{ */
|
---|
2908 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U8,(uint32_t *puDst, uint8_t uSrc));
|
---|
2909 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U16,(uint32_t *puDst, uint16_t uSrc));
|
---|
2910 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U32,(uint32_t *puDst, uint32_t uSrc));
|
---|
2911 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U64,(uint32_t *puDst, uint64_t uSrc));
|
---|
2912 | FNIEMAIMPLCR32U8 iemAImpl_crc32_u8, iemAImpl_crc32_u8_fallback;
|
---|
2913 | FNIEMAIMPLCR32U16 iemAImpl_crc32_u16, iemAImpl_crc32_u16_fallback;
|
---|
2914 | FNIEMAIMPLCR32U32 iemAImpl_crc32_u32, iemAImpl_crc32_u32_fallback;
|
---|
2915 | FNIEMAIMPLCR32U64 iemAImpl_crc32_u64, iemAImpl_crc32_u64_fallback;
|
---|
2916 |
|
---|
2917 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL128,(PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint32_t *pEFlags));
|
---|
2918 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL256,(PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint32_t *pEFlags));
|
---|
2919 | FNIEMAIMPLF2EFL128 iemAImpl_ptest_u128;
|
---|
2920 | FNIEMAIMPLF2EFL256 iemAImpl_vptest_u256, iemAImpl_vptest_u256_fallback;
|
---|
2921 |
|
---|
2922 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
---|
2923 | typedef FNIEMAIMPLSSEF2I32U64 *PFNIEMAIMPLSSEF2I32U64;
|
---|
2924 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
---|
2925 | typedef FNIEMAIMPLSSEF2I64U64 *PFNIEMAIMPLSSEF2I64U64;
|
---|
2926 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
---|
2927 | typedef FNIEMAIMPLSSEF2I32U32 *PFNIEMAIMPLSSEF2I32U32;
|
---|
2928 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
---|
2929 | typedef FNIEMAIMPLSSEF2I64U32 *PFNIEMAIMPLSSEF2I64U32;
|
---|
2930 |
|
---|
2931 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvttsd2si_i32_r64;
|
---|
2932 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvtsd2si_i32_r64;
|
---|
2933 |
|
---|
2934 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvttsd2si_i64_r64;
|
---|
2935 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvtsd2si_i64_r64;
|
---|
2936 |
|
---|
2937 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvttss2si_i32_r32;
|
---|
2938 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvtss2si_i32_r32;
|
---|
2939 |
|
---|
2940 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvttss2si_i64_r32;
|
---|
2941 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvtss2si_i64_r32;
|
---|
2942 |
|
---|
2943 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int32_t *pi32Src));
|
---|
2944 | typedef FNIEMAIMPLSSEF2R32I32 *PFNIEMAIMPLSSEF2R32I32;
|
---|
2945 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int64_t *pi64Src));
|
---|
2946 | typedef FNIEMAIMPLSSEF2R32I64 *PFNIEMAIMPLSSEF2R32I64;
|
---|
2947 |
|
---|
2948 | FNIEMAIMPLSSEF2R32I32 iemAImpl_cvtsi2ss_r32_i32;
|
---|
2949 | FNIEMAIMPLSSEF2R32I64 iemAImpl_cvtsi2ss_r32_i64;
|
---|
2950 |
|
---|
2951 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int32_t *pi32Src));
|
---|
2952 | typedef FNIEMAIMPLSSEF2R64I32 *PFNIEMAIMPLSSEF2R64I32;
|
---|
2953 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int64_t *pi64Src));
|
---|
2954 | typedef FNIEMAIMPLSSEF2R64I64 *PFNIEMAIMPLSSEF2R64I64;
|
---|
2955 |
|
---|
2956 | FNIEMAIMPLSSEF2R64I32 iemAImpl_cvtsi2sd_r64_i32;
|
---|
2957 | FNIEMAIMPLSSEF2R64I64 iemAImpl_cvtsi2sd_r64_i64;
|
---|
2958 |
|
---|
2959 |
|
---|
2960 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFLMXCSR128,(uint32_t *pfMxcsr, uint32_t *pfEFlags, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
2961 | typedef FNIEMAIMPLF2EFLMXCSR128 *PFNIEMAIMPLF2EFLMXCSR128;
|
---|
2962 |
|
---|
2963 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomiss_u128;
|
---|
2964 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomiss_u128, iemAImpl_vucomiss_u128_fallback;
|
---|
2965 |
|
---|
2966 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomisd_u128;
|
---|
2967 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomisd_u128, iemAImpl_vucomisd_u128_fallback;
|
---|
2968 |
|
---|
2969 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comiss_u128;
|
---|
2970 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomiss_u128, iemAImpl_vcomiss_u128_fallback;
|
---|
2971 |
|
---|
2972 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comisd_u128;
|
---|
2973 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomisd_u128, iemAImpl_vcomisd_u128_fallback;
|
---|
2974 |
|
---|
2975 |
|
---|
2976 | typedef struct IEMMEDIAF2XMMSRC
|
---|
2977 | {
|
---|
2978 | X86XMMREG uSrc1;
|
---|
2979 | X86XMMREG uSrc2;
|
---|
2980 | } IEMMEDIAF2XMMSRC;
|
---|
2981 | typedef IEMMEDIAF2XMMSRC *PIEMMEDIAF2XMMSRC;
|
---|
2982 | typedef const IEMMEDIAF2XMMSRC *PCIEMMEDIAF2XMMSRC;
|
---|
2983 |
|
---|
2984 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRF2XMMIMM8,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC puSrc, uint8_t bEvil));
|
---|
2985 | typedef FNIEMAIMPLMXCSRF2XMMIMM8 *PFNIEMAIMPLMXCSRF2XMMIMM8;
|
---|
2986 |
|
---|
2987 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpps_u128;
|
---|
2988 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmppd_u128;
|
---|
2989 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpss_u128;
|
---|
2990 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpsd_u128;
|
---|
2991 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundss_u128;
|
---|
2992 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundsd_u128;
|
---|
2993 |
|
---|
2994 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundps_u128, iemAImpl_roundps_u128_fallback;
|
---|
2995 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundpd_u128, iemAImpl_roundpd_u128_fallback;
|
---|
2996 |
|
---|
2997 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_dpps_u128, iemAImpl_dpps_u128_fallback;
|
---|
2998 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_dppd_u128, iemAImpl_dppd_u128_fallback;
|
---|
2999 |
|
---|
3000 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U128,(uint32_t *pfMxcsr, uint64_t *pu64Dst, PCX86XMMREG pSrc));
|
---|
3001 | typedef FNIEMAIMPLMXCSRU64U128 *PFNIEMAIMPLMXCSRU64U128;
|
---|
3002 |
|
---|
3003 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvtpd2pi_u128;
|
---|
3004 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvttpd2pi_u128;
|
---|
3005 |
|
---|
3006 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU128U64,(uint32_t *pfMxcsr, PX86XMMREG pDst, uint64_t u64Src));
|
---|
3007 | typedef FNIEMAIMPLMXCSRU128U64 *PFNIEMAIMPLMXCSRU128U64;
|
---|
3008 |
|
---|
3009 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2ps_u128;
|
---|
3010 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2pd_u128;
|
---|
3011 |
|
---|
3012 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U64,(uint32_t *pfMxcsr, uint64_t *pu64Dst, uint64_t u64Src));
|
---|
3013 | typedef FNIEMAIMPLMXCSRU64U64 *PFNIEMAIMPLMXCSRU64U64;
|
---|
3014 |
|
---|
3015 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvtps2pi_u128;
|
---|
3016 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvttps2pi_u128;
|
---|
3017 |
|
---|
3018 | /** @} */
|
---|
3019 |
|
---|
3020 |
|
---|
3021 | /** @name Function tables.
|
---|
3022 | * @{
|
---|
3023 | */
|
---|
3024 |
|
---|
3025 | /**
|
---|
3026 | * Function table for a binary operator providing implementation based on
|
---|
3027 | * operand size.
|
---|
3028 | */
|
---|
3029 | typedef struct IEMOPBINSIZES
|
---|
3030 | {
|
---|
3031 | PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
|
---|
3032 | PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
|
---|
3033 | PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
|
---|
3034 | PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
|
---|
3035 | } IEMOPBINSIZES;
|
---|
3036 | /** Pointer to a binary operator function table. */
|
---|
3037 | typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
|
---|
3038 |
|
---|
3039 |
|
---|
3040 | /**
|
---|
3041 | * Function table for a unary operator providing implementation based on
|
---|
3042 | * operand size.
|
---|
3043 | */
|
---|
3044 | typedef struct IEMOPUNARYSIZES
|
---|
3045 | {
|
---|
3046 | PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
|
---|
3047 | PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
|
---|
3048 | PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
|
---|
3049 | PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
|
---|
3050 | } IEMOPUNARYSIZES;
|
---|
3051 | /** Pointer to a unary operator function table. */
|
---|
3052 | typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
|
---|
3053 |
|
---|
3054 |
|
---|
3055 | /**
|
---|
3056 | * Function table for a shift operator providing implementation based on
|
---|
3057 | * operand size.
|
---|
3058 | */
|
---|
3059 | typedef struct IEMOPSHIFTSIZES
|
---|
3060 | {
|
---|
3061 | PFNIEMAIMPLSHIFTU8 pfnNormalU8;
|
---|
3062 | PFNIEMAIMPLSHIFTU16 pfnNormalU16;
|
---|
3063 | PFNIEMAIMPLSHIFTU32 pfnNormalU32;
|
---|
3064 | PFNIEMAIMPLSHIFTU64 pfnNormalU64;
|
---|
3065 | } IEMOPSHIFTSIZES;
|
---|
3066 | /** Pointer to a shift operator function table. */
|
---|
3067 | typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
|
---|
3068 |
|
---|
3069 |
|
---|
3070 | /**
|
---|
3071 | * Function table for a multiplication or division operation.
|
---|
3072 | */
|
---|
3073 | typedef struct IEMOPMULDIVSIZES
|
---|
3074 | {
|
---|
3075 | PFNIEMAIMPLMULDIVU8 pfnU8;
|
---|
3076 | PFNIEMAIMPLMULDIVU16 pfnU16;
|
---|
3077 | PFNIEMAIMPLMULDIVU32 pfnU32;
|
---|
3078 | PFNIEMAIMPLMULDIVU64 pfnU64;
|
---|
3079 | } IEMOPMULDIVSIZES;
|
---|
3080 | /** Pointer to a multiplication or division operation function table. */
|
---|
3081 | typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
|
---|
3082 |
|
---|
3083 |
|
---|
3084 | /**
|
---|
3085 | * Function table for a double precision shift operator providing implementation
|
---|
3086 | * based on operand size.
|
---|
3087 | */
|
---|
3088 | typedef struct IEMOPSHIFTDBLSIZES
|
---|
3089 | {
|
---|
3090 | PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
|
---|
3091 | PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
|
---|
3092 | PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
|
---|
3093 | } IEMOPSHIFTDBLSIZES;
|
---|
3094 | /** Pointer to a double precision shift function table. */
|
---|
3095 | typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
|
---|
3096 |
|
---|
3097 |
|
---|
3098 | /**
|
---|
3099 | * Function table for media instruction taking two full sized media source
|
---|
3100 | * registers and one full sized destination register (AVX).
|
---|
3101 | */
|
---|
3102 | typedef struct IEMOPMEDIAF3
|
---|
3103 | {
|
---|
3104 | PFNIEMAIMPLMEDIAF3U128 pfnU128;
|
---|
3105 | PFNIEMAIMPLMEDIAF3U256 pfnU256;
|
---|
3106 | } IEMOPMEDIAF3;
|
---|
3107 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
3108 | typedef IEMOPMEDIAF3 const *PCIEMOPMEDIAF3;
|
---|
3109 |
|
---|
3110 | /** @def IEMOPMEDIAF3_INIT_VARS_EX
|
---|
3111 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
3112 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
3113 | * functions are only used once and the function table need not be public. */
|
---|
3114 | #ifndef TST_IEM_CHECK_MC
|
---|
3115 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
3116 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3117 | static IEMOPMEDIAF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
3118 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3119 | # else
|
---|
3120 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3121 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3122 | # endif
|
---|
3123 | #else
|
---|
3124 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
3125 | #endif
|
---|
3126 | /** @def IEMOPMEDIAF3_INIT_VARS
|
---|
3127 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
3128 | * @sa IEMOPMEDIAF3_INIT_VARS_EX */
|
---|
3129 | #define IEMOPMEDIAF3_INIT_VARS(a_InstrNm) \
|
---|
3130 | IEMOPMEDIAF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
3131 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
3132 |
|
---|
3133 | /**
|
---|
3134 | * Function table for media instruction taking two full sized media source
|
---|
3135 | * registers and one full sized destination register, but no additional state
|
---|
3136 | * (AVX).
|
---|
3137 | */
|
---|
3138 | typedef struct IEMOPMEDIAOPTF3
|
---|
3139 | {
|
---|
3140 | PFNIEMAIMPLMEDIAOPTF3U128 pfnU128;
|
---|
3141 | PFNIEMAIMPLMEDIAOPTF3U256 pfnU256;
|
---|
3142 | } IEMOPMEDIAOPTF3;
|
---|
3143 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
3144 | typedef IEMOPMEDIAOPTF3 const *PCIEMOPMEDIAOPTF3;
|
---|
3145 |
|
---|
3146 | /** @def IEMOPMEDIAOPTF3_INIT_VARS_EX
|
---|
3147 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
3148 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
3149 | * functions are only used once and the function table need not be public. */
|
---|
3150 | #ifndef TST_IEM_CHECK_MC
|
---|
3151 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
3152 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3153 | static IEMOPMEDIAOPTF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
3154 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3155 | # else
|
---|
3156 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3157 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3158 | # endif
|
---|
3159 | #else
|
---|
3160 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
3161 | #endif
|
---|
3162 | /** @def IEMOPMEDIAOPTF3_INIT_VARS
|
---|
3163 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
3164 | * @sa IEMOPMEDIAOPTF3_INIT_VARS_EX */
|
---|
3165 | #define IEMOPMEDIAOPTF3_INIT_VARS(a_InstrNm) \
|
---|
3166 | IEMOPMEDIAOPTF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
3167 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
3168 |
|
---|
3169 | /**
|
---|
3170 | * Function table for media instruction taking one full sized media source
|
---|
3171 | * registers and one full sized destination register, but no additional state
|
---|
3172 | * (AVX).
|
---|
3173 | */
|
---|
3174 | typedef struct IEMOPMEDIAOPTF2
|
---|
3175 | {
|
---|
3176 | PFNIEMAIMPLMEDIAOPTF2U128 pfnU128;
|
---|
3177 | PFNIEMAIMPLMEDIAOPTF2U256 pfnU256;
|
---|
3178 | } IEMOPMEDIAOPTF2;
|
---|
3179 | /** Pointer to a media operation function table for 2 full sized ops (AVX). */
|
---|
3180 | typedef IEMOPMEDIAOPTF2 const *PCIEMOPMEDIAOPTF2;
|
---|
3181 |
|
---|
3182 | /** @def IEMOPMEDIAOPTF2_INIT_VARS_EX
|
---|
3183 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
3184 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
3185 | * functions are only used once and the function table need not be public. */
|
---|
3186 | #ifndef TST_IEM_CHECK_MC
|
---|
3187 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
3188 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3189 | static IEMOPMEDIAOPTF2 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
3190 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3191 | # else
|
---|
3192 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3193 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3194 | # endif
|
---|
3195 | #else
|
---|
3196 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
3197 | #endif
|
---|
3198 | /** @def IEMOPMEDIAOPTF2_INIT_VARS
|
---|
3199 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
3200 | * @sa IEMOPMEDIAOPTF2_INIT_VARS_EX */
|
---|
3201 | #define IEMOPMEDIAOPTF2_INIT_VARS(a_InstrNm) \
|
---|
3202 | IEMOPMEDIAOPTF2_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
3203 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
3204 |
|
---|
3205 | /**
|
---|
3206 | * Function table for media instruction taking two full sized media source
|
---|
3207 | * registers and one full sized destination register and an 8-bit immediate, but no additional state
|
---|
3208 | * (AVX).
|
---|
3209 | */
|
---|
3210 | typedef struct IEMOPMEDIAOPTF3IMM8
|
---|
3211 | {
|
---|
3212 | PFNIEMAIMPLMEDIAOPTF3U128IMM8 pfnU128;
|
---|
3213 | PFNIEMAIMPLMEDIAOPTF3U256IMM8 pfnU256;
|
---|
3214 | } IEMOPMEDIAOPTF3IMM8;
|
---|
3215 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
---|
3216 | typedef IEMOPMEDIAOPTF3IMM8 const *PCIEMOPMEDIAOPTF3IMM8;
|
---|
3217 |
|
---|
3218 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX
|
---|
3219 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
3220 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
3221 | * functions are only used once and the function table need not be public. */
|
---|
3222 | #ifndef TST_IEM_CHECK_MC
|
---|
3223 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
3224 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3225 | static IEMOPMEDIAOPTF3IMM8 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
3226 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3227 | # else
|
---|
3228 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3229 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3230 | # endif
|
---|
3231 | #else
|
---|
3232 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
3233 | #endif
|
---|
3234 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS
|
---|
3235 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
3236 | * @sa IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX */
|
---|
3237 | #define IEMOPMEDIAOPTF3IMM8_INIT_VARS(a_InstrNm) \
|
---|
3238 | IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
3239 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
3240 | /** @} */
|
---|
3241 |
|
---|
3242 |
|
---|
3243 | /**
|
---|
3244 | * Function table for blend type instruction taking three full sized media source
|
---|
3245 | * registers and one full sized destination register, but no additional state
|
---|
3246 | * (AVX).
|
---|
3247 | */
|
---|
3248 | typedef struct IEMOPBLENDOP
|
---|
3249 | {
|
---|
3250 | PFNIEMAIMPLAVXBLENDU128 pfnU128;
|
---|
3251 | PFNIEMAIMPLAVXBLENDU256 pfnU256;
|
---|
3252 | } IEMOPBLENDOP;
|
---|
3253 | /** Pointer to a media operation function table for 4 full sized ops (AVX). */
|
---|
3254 | typedef IEMOPBLENDOP const *PCIEMOPBLENDOP;
|
---|
3255 |
|
---|
3256 | /** @def IEMOPBLENDOP_INIT_VARS_EX
|
---|
3257 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
---|
3258 | * given functions as initializers. For use in AVX functions where a pair of
|
---|
3259 | * functions are only used once and the function table need not be public. */
|
---|
3260 | #ifndef TST_IEM_CHECK_MC
|
---|
3261 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
---|
3262 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3263 | static IEMOPBLENDOP const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
---|
3264 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3265 | # else
|
---|
3266 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
---|
3267 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
---|
3268 | # endif
|
---|
3269 | #else
|
---|
3270 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
---|
3271 | #endif
|
---|
3272 | /** @def IEMOPBLENDOP_INIT_VARS
|
---|
3273 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
---|
3274 | * @sa IEMOPBLENDOP_INIT_VARS_EX */
|
---|
3275 | #define IEMOPBLENDOP_INIT_VARS(a_InstrNm) \
|
---|
3276 | IEMOPBLENDOP_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
---|
3277 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
---|
3278 |
|
---|
3279 |
|
---|
3280 | /** @name SSE/AVX single/double precision floating point operations.
|
---|
3281 | * @{ */
|
---|
3282 | /**
|
---|
3283 | * A SSE result.
|
---|
3284 | */
|
---|
3285 | typedef struct IEMSSERESULT
|
---|
3286 | {
|
---|
3287 | /** The output value. */
|
---|
3288 | X86XMMREG uResult;
|
---|
3289 | /** The output status. */
|
---|
3290 | uint32_t MXCSR;
|
---|
3291 | } IEMSSERESULT;
|
---|
3292 | AssertCompileMemberOffset(IEMSSERESULT, MXCSR, 128 / 8);
|
---|
3293 | /** Pointer to a SSE result. */
|
---|
3294 | typedef IEMSSERESULT *PIEMSSERESULT;
|
---|
3295 | /** Pointer to a const SSE result. */
|
---|
3296 | typedef IEMSSERESULT const *PCIEMSSERESULT;
|
---|
3297 |
|
---|
3298 |
|
---|
3299 | /**
|
---|
3300 | * A AVX128 result.
|
---|
3301 | */
|
---|
3302 | typedef struct IEMAVX128RESULT
|
---|
3303 | {
|
---|
3304 | /** The output value. */
|
---|
3305 | X86XMMREG uResult;
|
---|
3306 | /** The output status. */
|
---|
3307 | uint32_t MXCSR;
|
---|
3308 | } IEMAVX128RESULT;
|
---|
3309 | AssertCompileMemberOffset(IEMAVX128RESULT, MXCSR, 128 / 8);
|
---|
3310 | /** Pointer to a AVX128 result. */
|
---|
3311 | typedef IEMAVX128RESULT *PIEMAVX128RESULT;
|
---|
3312 | /** Pointer to a const AVX128 result. */
|
---|
3313 | typedef IEMAVX128RESULT const *PCIEMAVX128RESULT;
|
---|
3314 |
|
---|
3315 |
|
---|
3316 | /**
|
---|
3317 | * A AVX256 result.
|
---|
3318 | */
|
---|
3319 | typedef struct IEMAVX256RESULT
|
---|
3320 | {
|
---|
3321 | /** The output value. */
|
---|
3322 | X86YMMREG uResult;
|
---|
3323 | /** The output status. */
|
---|
3324 | uint32_t MXCSR;
|
---|
3325 | } IEMAVX256RESULT;
|
---|
3326 | AssertCompileMemberOffset(IEMAVX256RESULT, MXCSR, 256 / 8);
|
---|
3327 | /** Pointer to a AVX256 result. */
|
---|
3328 | typedef IEMAVX256RESULT *PIEMAVX256RESULT;
|
---|
3329 | /** Pointer to a const AVX256 result. */
|
---|
3330 | typedef IEMAVX256RESULT const *PCIEMAVX256RESULT;
|
---|
3331 |
|
---|
3332 |
|
---|
3333 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
3334 | typedef FNIEMAIMPLFPSSEF2U128 *PFNIEMAIMPLFPSSEF2U128;
|
---|
3335 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R32,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
---|
3336 | typedef FNIEMAIMPLFPSSEF2U128R32 *PFNIEMAIMPLFPSSEF2U128R32;
|
---|
3337 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R64,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
---|
3338 | typedef FNIEMAIMPLFPSSEF2U128R64 *PFNIEMAIMPLFPSSEF2U128R64;
|
---|
3339 |
|
---|
3340 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
---|
3341 | typedef FNIEMAIMPLFPAVXF3U128 *PFNIEMAIMPLFPAVXF3U128;
|
---|
3342 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R32,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
---|
3343 | typedef FNIEMAIMPLFPAVXF3U128R32 *PFNIEMAIMPLFPAVXF3U128R32;
|
---|
3344 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R64,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
---|
3345 | typedef FNIEMAIMPLFPAVXF3U128R64 *PFNIEMAIMPLFPAVXF3U128R64;
|
---|
3346 |
|
---|
3347 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U256,(PX86XSAVEAREA pExtState, PIEMAVX256RESULT pResult, PCX86YMMREG puSrc1, PCX86YMMREG puSrc2));
|
---|
3348 | typedef FNIEMAIMPLFPAVXF3U256 *PFNIEMAIMPLFPAVXF3U256;
|
---|
3349 |
|
---|
3350 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addps_u128;
|
---|
3351 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addpd_u128;
|
---|
3352 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulps_u128;
|
---|
3353 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulpd_u128;
|
---|
3354 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subps_u128;
|
---|
3355 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subpd_u128;
|
---|
3356 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minps_u128;
|
---|
3357 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minpd_u128;
|
---|
3358 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divps_u128;
|
---|
3359 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divpd_u128;
|
---|
3360 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxps_u128;
|
---|
3361 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxpd_u128;
|
---|
3362 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddps_u128;
|
---|
3363 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddpd_u128;
|
---|
3364 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubps_u128;
|
---|
3365 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubpd_u128;
|
---|
3366 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtps_u128;
|
---|
3367 | FNIEMAIMPLFPSSEF2U128 iemAImpl_rsqrtps_u128;
|
---|
3368 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtpd_u128;
|
---|
3369 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubps_u128;
|
---|
3370 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubpd_u128;
|
---|
3371 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2ps_u128;
|
---|
3372 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2pd_u128;
|
---|
3373 |
|
---|
3374 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2ps_u128;
|
---|
3375 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2dq_u128;
|
---|
3376 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttps2dq_u128;
|
---|
3377 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttpd2dq_u128;
|
---|
3378 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2pd_u128;
|
---|
3379 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2dq_u128;
|
---|
3380 |
|
---|
3381 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_addss_u128_r32;
|
---|
3382 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_addsd_u128_r64;
|
---|
3383 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_mulss_u128_r32;
|
---|
3384 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_mulsd_u128_r64;
|
---|
3385 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_subss_u128_r32;
|
---|
3386 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_subsd_u128_r64;
|
---|
3387 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_minss_u128_r32;
|
---|
3388 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_minsd_u128_r64;
|
---|
3389 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_divss_u128_r32;
|
---|
3390 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_divsd_u128_r64;
|
---|
3391 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_maxss_u128_r32;
|
---|
3392 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_maxsd_u128_r64;
|
---|
3393 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_cvtss2sd_u128_r32;
|
---|
3394 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_cvtsd2ss_u128_r64;
|
---|
3395 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_sqrtss_u128_r32;
|
---|
3396 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_sqrtsd_u128_r64;
|
---|
3397 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_rsqrtss_u128_r32;
|
---|
3398 |
|
---|
3399 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddps_u128, iemAImpl_vaddps_u128_fallback;
|
---|
3400 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddpd_u128, iemAImpl_vaddpd_u128_fallback;
|
---|
3401 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulps_u128, iemAImpl_vmulps_u128_fallback;
|
---|
3402 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulpd_u128, iemAImpl_vmulpd_u128_fallback;
|
---|
3403 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubps_u128, iemAImpl_vsubps_u128_fallback;
|
---|
3404 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubpd_u128, iemAImpl_vsubpd_u128_fallback;
|
---|
3405 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminps_u128, iemAImpl_vminps_u128_fallback;
|
---|
3406 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminpd_u128, iemAImpl_vminpd_u128_fallback;
|
---|
3407 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivps_u128, iemAImpl_vdivps_u128_fallback;
|
---|
3408 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivpd_u128, iemAImpl_vdivpd_u128_fallback;
|
---|
3409 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxps_u128, iemAImpl_vmaxps_u128_fallback;
|
---|
3410 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxpd_u128, iemAImpl_vmaxpd_u128_fallback;
|
---|
3411 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddps_u128, iemAImpl_vhaddps_u128_fallback;
|
---|
3412 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddpd_u128, iemAImpl_vhaddpd_u128_fallback;
|
---|
3413 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubps_u128, iemAImpl_vhsubps_u128_fallback;
|
---|
3414 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubpd_u128, iemAImpl_vhsubpd_u128_fallback;
|
---|
3415 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtps_u128, iemAImpl_vsqrtps_u128_fallback;
|
---|
3416 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtpd_u128, iemAImpl_vsqrtpd_u128_fallback;
|
---|
3417 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubps_u128, iemAImpl_vaddsubps_u128_fallback;
|
---|
3418 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubpd_u128, iemAImpl_vaddsubpd_u128_fallback;
|
---|
3419 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtpd2ps_u128, iemAImpl_vcvtpd2ps_u128_fallback;
|
---|
3420 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtps2pd_u128, iemAImpl_vcvtps2pd_u128_fallback;
|
---|
3421 |
|
---|
3422 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vaddss_u128_r32, iemAImpl_vaddss_u128_r32_fallback;
|
---|
3423 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vaddsd_u128_r64, iemAImpl_vaddsd_u128_r64_fallback;
|
---|
3424 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmulss_u128_r32, iemAImpl_vmulss_u128_r32_fallback;
|
---|
3425 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmulsd_u128_r64, iemAImpl_vmulsd_u128_r64_fallback;
|
---|
3426 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsubss_u128_r32, iemAImpl_vsubss_u128_r32_fallback;
|
---|
3427 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsubsd_u128_r64, iemAImpl_vsubsd_u128_r64_fallback;
|
---|
3428 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vminss_u128_r32, iemAImpl_vminss_u128_r32_fallback;
|
---|
3429 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vminsd_u128_r64, iemAImpl_vminsd_u128_r64_fallback;
|
---|
3430 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vdivss_u128_r32, iemAImpl_vdivss_u128_r32_fallback;
|
---|
3431 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vdivsd_u128_r64, iemAImpl_vdivsd_u128_r64_fallback;
|
---|
3432 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmaxss_u128_r32, iemAImpl_vmaxss_u128_r32_fallback;
|
---|
3433 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmaxsd_u128_r64, iemAImpl_vmaxsd_u128_r64_fallback;
|
---|
3434 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsqrtss_u128_r32, iemAImpl_vsqrtss_u128_r32_fallback;
|
---|
3435 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsqrtsd_u128_r64, iemAImpl_vsqrtsd_u128_r64_fallback;
|
---|
3436 |
|
---|
3437 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddps_u256, iemAImpl_vaddps_u256_fallback;
|
---|
3438 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddpd_u256, iemAImpl_vaddpd_u256_fallback;
|
---|
3439 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulps_u256, iemAImpl_vmulps_u256_fallback;
|
---|
3440 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulpd_u256, iemAImpl_vmulpd_u256_fallback;
|
---|
3441 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubps_u256, iemAImpl_vsubps_u256_fallback;
|
---|
3442 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubpd_u256, iemAImpl_vsubpd_u256_fallback;
|
---|
3443 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminps_u256, iemAImpl_vminps_u256_fallback;
|
---|
3444 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminpd_u256, iemAImpl_vminpd_u256_fallback;
|
---|
3445 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivps_u256, iemAImpl_vdivps_u256_fallback;
|
---|
3446 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivpd_u256, iemAImpl_vdivpd_u256_fallback;
|
---|
3447 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxps_u256, iemAImpl_vmaxps_u256_fallback;
|
---|
3448 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxpd_u256, iemAImpl_vmaxpd_u256_fallback;
|
---|
3449 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddps_u256, iemAImpl_vhaddps_u256_fallback;
|
---|
3450 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddpd_u256, iemAImpl_vhaddpd_u256_fallback;
|
---|
3451 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubps_u256, iemAImpl_vhsubps_u256_fallback;
|
---|
3452 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubpd_u256, iemAImpl_vhsubpd_u256_fallback;
|
---|
3453 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubps_u256, iemAImpl_vhaddsubps_u256_fallback;
|
---|
3454 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubpd_u256, iemAImpl_vhaddsubpd_u256_fallback;
|
---|
3455 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtpd2ps_u256, iemAImpl_vcvtpd2ps_u256_fallback;
|
---|
3456 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtps2pd_u256, iemAImpl_vcvtps2pd_u256_fallback;
|
---|
3457 | /** @} */
|
---|
3458 |
|
---|
3459 | /** @name C instruction implementations for anything slightly complicated.
|
---|
3460 | * @{ */
|
---|
3461 |
|
---|
3462 | /**
|
---|
3463 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3464 | * no extra arguments.
|
---|
3465 | *
|
---|
3466 | * @param a_Name The name of the type.
|
---|
3467 | */
|
---|
3468 | # define IEM_CIMPL_DECL_TYPE_0(a_Name) \
|
---|
3469 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
3470 | /**
|
---|
3471 | * For defining a C instruction implementation function taking no extra
|
---|
3472 | * arguments.
|
---|
3473 | *
|
---|
3474 | * @param a_Name The name of the function
|
---|
3475 | */
|
---|
3476 | # define IEM_CIMPL_DEF_0(a_Name) \
|
---|
3477 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
3478 | /**
|
---|
3479 | * Prototype version of IEM_CIMPL_DEF_0.
|
---|
3480 | */
|
---|
3481 | # define IEM_CIMPL_PROTO_0(a_Name) \
|
---|
3482 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
---|
3483 | /**
|
---|
3484 | * For calling a C instruction implementation function taking no extra
|
---|
3485 | * arguments.
|
---|
3486 | *
|
---|
3487 | * This special call macro adds default arguments to the call and allow us to
|
---|
3488 | * change these later.
|
---|
3489 | *
|
---|
3490 | * @param a_fn The name of the function.
|
---|
3491 | */
|
---|
3492 | # define IEM_CIMPL_CALL_0(a_fn) a_fn(pVCpu, cbInstr)
|
---|
3493 |
|
---|
3494 | /** Type for a C instruction implementation function taking no extra
|
---|
3495 | * arguments. */
|
---|
3496 | typedef IEM_CIMPL_DECL_TYPE_0(FNIEMCIMPL0);
|
---|
3497 | /** Function pointer type for a C instruction implementation function taking
|
---|
3498 | * no extra arguments. */
|
---|
3499 | typedef FNIEMCIMPL0 *PFNIEMCIMPL0;
|
---|
3500 |
|
---|
3501 | /**
|
---|
3502 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3503 | * one extra argument.
|
---|
3504 | *
|
---|
3505 | * @param a_Name The name of the type.
|
---|
3506 | * @param a_Type0 The argument type.
|
---|
3507 | * @param a_Arg0 The argument name.
|
---|
3508 | */
|
---|
3509 | # define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
|
---|
3510 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
3511 | /**
|
---|
3512 | * For defining a C instruction implementation function taking one extra
|
---|
3513 | * argument.
|
---|
3514 | *
|
---|
3515 | * @param a_Name The name of the function
|
---|
3516 | * @param a_Type0 The argument type.
|
---|
3517 | * @param a_Arg0 The argument name.
|
---|
3518 | */
|
---|
3519 | # define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
|
---|
3520 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
3521 | /**
|
---|
3522 | * Prototype version of IEM_CIMPL_DEF_1.
|
---|
3523 | */
|
---|
3524 | # define IEM_CIMPL_PROTO_1(a_Name, a_Type0, a_Arg0) \
|
---|
3525 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
---|
3526 | /**
|
---|
3527 | * For calling a C instruction implementation function taking one extra
|
---|
3528 | * argument.
|
---|
3529 | *
|
---|
3530 | * This special call macro adds default arguments to the call and allow us to
|
---|
3531 | * change these later.
|
---|
3532 | *
|
---|
3533 | * @param a_fn The name of the function.
|
---|
3534 | * @param a0 The name of the 1st argument.
|
---|
3535 | */
|
---|
3536 | # define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pVCpu, cbInstr, (a0))
|
---|
3537 |
|
---|
3538 | /**
|
---|
3539 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3540 | * two extra arguments.
|
---|
3541 | *
|
---|
3542 | * @param a_Name The name of the type.
|
---|
3543 | * @param a_Type0 The type of the 1st argument
|
---|
3544 | * @param a_Arg0 The name of the 1st argument.
|
---|
3545 | * @param a_Type1 The type of the 2nd argument.
|
---|
3546 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3547 | */
|
---|
3548 | # define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
3549 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
3550 | /**
|
---|
3551 | * For defining a C instruction implementation function taking two extra
|
---|
3552 | * arguments.
|
---|
3553 | *
|
---|
3554 | * @param a_Name The name of the function.
|
---|
3555 | * @param a_Type0 The type of the 1st argument
|
---|
3556 | * @param a_Arg0 The name of the 1st argument.
|
---|
3557 | * @param a_Type1 The type of the 2nd argument.
|
---|
3558 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3559 | */
|
---|
3560 | # define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
3561 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
3562 | /**
|
---|
3563 | * Prototype version of IEM_CIMPL_DEF_2.
|
---|
3564 | */
|
---|
3565 | # define IEM_CIMPL_PROTO_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
---|
3566 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
---|
3567 | /**
|
---|
3568 | * For calling a C instruction implementation function taking two extra
|
---|
3569 | * arguments.
|
---|
3570 | *
|
---|
3571 | * This special call macro adds default arguments to the call and allow us to
|
---|
3572 | * change these later.
|
---|
3573 | *
|
---|
3574 | * @param a_fn The name of the function.
|
---|
3575 | * @param a0 The name of the 1st argument.
|
---|
3576 | * @param a1 The name of the 2nd argument.
|
---|
3577 | */
|
---|
3578 | # define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pVCpu, cbInstr, (a0), (a1))
|
---|
3579 |
|
---|
3580 | /**
|
---|
3581 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3582 | * three extra arguments.
|
---|
3583 | *
|
---|
3584 | * @param a_Name The name of the type.
|
---|
3585 | * @param a_Type0 The type of the 1st argument
|
---|
3586 | * @param a_Arg0 The name of the 1st argument.
|
---|
3587 | * @param a_Type1 The type of the 2nd argument.
|
---|
3588 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3589 | * @param a_Type2 The type of the 3rd argument.
|
---|
3590 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3591 | */
|
---|
3592 | # define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
3593 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
3594 | /**
|
---|
3595 | * For defining a C instruction implementation function taking three extra
|
---|
3596 | * arguments.
|
---|
3597 | *
|
---|
3598 | * @param a_Name The name of the function.
|
---|
3599 | * @param a_Type0 The type of the 1st argument
|
---|
3600 | * @param a_Arg0 The name of the 1st argument.
|
---|
3601 | * @param a_Type1 The type of the 2nd argument.
|
---|
3602 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3603 | * @param a_Type2 The type of the 3rd argument.
|
---|
3604 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3605 | */
|
---|
3606 | # define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
3607 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
3608 | /**
|
---|
3609 | * Prototype version of IEM_CIMPL_DEF_3.
|
---|
3610 | */
|
---|
3611 | # define IEM_CIMPL_PROTO_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
---|
3612 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
---|
3613 | /**
|
---|
3614 | * For calling a C instruction implementation function taking three extra
|
---|
3615 | * arguments.
|
---|
3616 | *
|
---|
3617 | * This special call macro adds default arguments to the call and allow us to
|
---|
3618 | * change these later.
|
---|
3619 | *
|
---|
3620 | * @param a_fn The name of the function.
|
---|
3621 | * @param a0 The name of the 1st argument.
|
---|
3622 | * @param a1 The name of the 2nd argument.
|
---|
3623 | * @param a2 The name of the 3rd argument.
|
---|
3624 | */
|
---|
3625 | # define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pVCpu, cbInstr, (a0), (a1), (a2))
|
---|
3626 |
|
---|
3627 |
|
---|
3628 | /**
|
---|
3629 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3630 | * four extra arguments.
|
---|
3631 | *
|
---|
3632 | * @param a_Name The name of the type.
|
---|
3633 | * @param a_Type0 The type of the 1st argument
|
---|
3634 | * @param a_Arg0 The name of the 1st argument.
|
---|
3635 | * @param a_Type1 The type of the 2nd argument.
|
---|
3636 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3637 | * @param a_Type2 The type of the 3rd argument.
|
---|
3638 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3639 | * @param a_Type3 The type of the 4th argument.
|
---|
3640 | * @param a_Arg3 The name of the 4th argument.
|
---|
3641 | */
|
---|
3642 | # define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3643 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3644 | /**
|
---|
3645 | * For defining a C instruction implementation function taking four extra
|
---|
3646 | * arguments.
|
---|
3647 | *
|
---|
3648 | * @param a_Name The name of the function.
|
---|
3649 | * @param a_Type0 The type of the 1st argument
|
---|
3650 | * @param a_Arg0 The name of the 1st argument.
|
---|
3651 | * @param a_Type1 The type of the 2nd argument.
|
---|
3652 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3653 | * @param a_Type2 The type of the 3rd argument.
|
---|
3654 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3655 | * @param a_Type3 The type of the 4th argument.
|
---|
3656 | * @param a_Arg3 The name of the 4th argument.
|
---|
3657 | */
|
---|
3658 | # define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3659 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3660 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3661 | /**
|
---|
3662 | * Prototype version of IEM_CIMPL_DEF_4.
|
---|
3663 | */
|
---|
3664 | # define IEM_CIMPL_PROTO_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
---|
3665 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3666 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
---|
3667 | /**
|
---|
3668 | * For calling a C instruction implementation function taking four extra
|
---|
3669 | * arguments.
|
---|
3670 | *
|
---|
3671 | * This special call macro adds default arguments to the call and allow us to
|
---|
3672 | * change these later.
|
---|
3673 | *
|
---|
3674 | * @param a_fn The name of the function.
|
---|
3675 | * @param a0 The name of the 1st argument.
|
---|
3676 | * @param a1 The name of the 2nd argument.
|
---|
3677 | * @param a2 The name of the 3rd argument.
|
---|
3678 | * @param a3 The name of the 4th argument.
|
---|
3679 | */
|
---|
3680 | # define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3))
|
---|
3681 |
|
---|
3682 |
|
---|
3683 | /**
|
---|
3684 | * For typedef'ing or declaring a C instruction implementation function taking
|
---|
3685 | * five extra arguments.
|
---|
3686 | *
|
---|
3687 | * @param a_Name The name of the type.
|
---|
3688 | * @param a_Type0 The type of the 1st argument
|
---|
3689 | * @param a_Arg0 The name of the 1st argument.
|
---|
3690 | * @param a_Type1 The type of the 2nd argument.
|
---|
3691 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3692 | * @param a_Type2 The type of the 3rd argument.
|
---|
3693 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3694 | * @param a_Type3 The type of the 4th argument.
|
---|
3695 | * @param a_Arg3 The name of the 4th argument.
|
---|
3696 | * @param a_Type4 The type of the 5th argument.
|
---|
3697 | * @param a_Arg4 The name of the 5th argument.
|
---|
3698 | */
|
---|
3699 | # define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3700 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, \
|
---|
3701 | a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
|
---|
3702 | a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3703 | /**
|
---|
3704 | * For defining a C instruction implementation function taking five extra
|
---|
3705 | * arguments.
|
---|
3706 | *
|
---|
3707 | * @param a_Name The name of the function.
|
---|
3708 | * @param a_Type0 The type of the 1st argument
|
---|
3709 | * @param a_Arg0 The name of the 1st argument.
|
---|
3710 | * @param a_Type1 The type of the 2nd argument.
|
---|
3711 | * @param a_Arg1 The name of the 2nd argument.
|
---|
3712 | * @param a_Type2 The type of the 3rd argument.
|
---|
3713 | * @param a_Arg2 The name of the 3rd argument.
|
---|
3714 | * @param a_Type3 The type of the 4th argument.
|
---|
3715 | * @param a_Arg3 The name of the 4th argument.
|
---|
3716 | * @param a_Type4 The type of the 5th argument.
|
---|
3717 | * @param a_Arg4 The name of the 5th argument.
|
---|
3718 | */
|
---|
3719 | # define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3720 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3721 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3722 | /**
|
---|
3723 | * Prototype version of IEM_CIMPL_DEF_5.
|
---|
3724 | */
|
---|
3725 | # define IEM_CIMPL_PROTO_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
---|
3726 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
---|
3727 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
---|
3728 | /**
|
---|
3729 | * For calling a C instruction implementation function taking five extra
|
---|
3730 | * arguments.
|
---|
3731 | *
|
---|
3732 | * This special call macro adds default arguments to the call and allow us to
|
---|
3733 | * change these later.
|
---|
3734 | *
|
---|
3735 | * @param a_fn The name of the function.
|
---|
3736 | * @param a0 The name of the 1st argument.
|
---|
3737 | * @param a1 The name of the 2nd argument.
|
---|
3738 | * @param a2 The name of the 3rd argument.
|
---|
3739 | * @param a3 The name of the 4th argument.
|
---|
3740 | * @param a4 The name of the 5th argument.
|
---|
3741 | */
|
---|
3742 | # define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
|
---|
3743 |
|
---|
3744 | /** @} */
|
---|
3745 |
|
---|
3746 |
|
---|
3747 | /** @name Opcode Decoder Function Types.
|
---|
3748 | * @{ */
|
---|
3749 |
|
---|
3750 | /** @typedef PFNIEMOP
|
---|
3751 | * Pointer to an opcode decoder function.
|
---|
3752 | */
|
---|
3753 |
|
---|
3754 | /** @def FNIEMOP_DEF
|
---|
3755 | * Define an opcode decoder function.
|
---|
3756 | *
|
---|
3757 | * We're using macors for this so that adding and removing parameters as well as
|
---|
3758 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL
|
---|
3759 | *
|
---|
3760 | * @param a_Name The function name.
|
---|
3761 | */
|
---|
3762 |
|
---|
3763 | /** @typedef PFNIEMOPRM
|
---|
3764 | * Pointer to an opcode decoder function with RM byte.
|
---|
3765 | */
|
---|
3766 |
|
---|
3767 | /** @def FNIEMOPRM_DEF
|
---|
3768 | * Define an opcode decoder function with RM byte.
|
---|
3769 | *
|
---|
3770 | * We're using macors for this so that adding and removing parameters as well as
|
---|
3771 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL_1
|
---|
3772 | *
|
---|
3773 | * @param a_Name The function name.
|
---|
3774 | */
|
---|
3775 |
|
---|
3776 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
---|
3777 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3778 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3779 | # define FNIEMOP_DEF(a_Name) \
|
---|
3780 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu)
|
---|
3781 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3782 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
---|
3783 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3784 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
---|
3785 |
|
---|
3786 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
---|
3787 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3788 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3789 | # define FNIEMOP_DEF(a_Name) \
|
---|
3790 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3791 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3792 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3793 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3794 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3795 |
|
---|
3796 | #elif defined(__GNUC__) && !defined(IEM_WITH_THROW_CATCH)
|
---|
3797 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3798 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3799 | # define FNIEMOP_DEF(a_Name) \
|
---|
3800 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu)
|
---|
3801 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3802 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
---|
3803 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3804 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
---|
3805 |
|
---|
3806 | #else
|
---|
3807 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
---|
3808 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
---|
3809 | # define FNIEMOP_DEF(a_Name) \
|
---|
3810 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3811 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
---|
3812 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3813 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
---|
3814 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
3815 |
|
---|
3816 | #endif
|
---|
3817 | #define FNIEMOPRM_DEF(a_Name) FNIEMOP_DEF_1(a_Name, uint8_t, bRm)
|
---|
3818 |
|
---|
3819 | /**
|
---|
3820 | * Call an opcode decoder function.
|
---|
3821 | *
|
---|
3822 | * We're using macors for this so that adding and removing parameters can be
|
---|
3823 | * done as we please. See FNIEMOP_DEF.
|
---|
3824 | */
|
---|
3825 | #define FNIEMOP_CALL(a_pfn) (a_pfn)(pVCpu)
|
---|
3826 |
|
---|
3827 | /**
|
---|
3828 | * Call a common opcode decoder function taking one extra argument.
|
---|
3829 | *
|
---|
3830 | * We're using macors for this so that adding and removing parameters can be
|
---|
3831 | * done as we please. See FNIEMOP_DEF_1.
|
---|
3832 | */
|
---|
3833 | #define FNIEMOP_CALL_1(a_pfn, a0) (a_pfn)(pVCpu, a0)
|
---|
3834 |
|
---|
3835 | /**
|
---|
3836 | * Call a common opcode decoder function taking one extra argument.
|
---|
3837 | *
|
---|
3838 | * We're using macors for this so that adding and removing parameters can be
|
---|
3839 | * done as we please. See FNIEMOP_DEF_1.
|
---|
3840 | */
|
---|
3841 | #define FNIEMOP_CALL_2(a_pfn, a0, a1) (a_pfn)(pVCpu, a0, a1)
|
---|
3842 | /** @} */
|
---|
3843 |
|
---|
3844 |
|
---|
3845 | /** @name Misc Helpers
|
---|
3846 | * @{ */
|
---|
3847 |
|
---|
3848 | /** Used to shut up GCC warnings about variables that 'may be used uninitialized'
|
---|
3849 | * due to GCC lacking knowledge about the value range of a switch. */
|
---|
3850 | #if RT_CPLUSPLUS_PREREQ(202000)
|
---|
3851 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: [[unlikely]] AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
---|
3852 | #else
|
---|
3853 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
---|
3854 | #endif
|
---|
3855 |
|
---|
3856 | /** Variant of IEM_NOT_REACHED_DEFAULT_CASE_RET that returns a custom value. */
|
---|
3857 | #if RT_CPLUSPLUS_PREREQ(202000)
|
---|
3858 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: [[unlikely]] AssertFailedReturn(a_RetValue)
|
---|
3859 | #else
|
---|
3860 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: AssertFailedReturn(a_RetValue)
|
---|
3861 | #endif
|
---|
3862 |
|
---|
3863 | /**
|
---|
3864 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
---|
3865 | * occation.
|
---|
3866 | */
|
---|
3867 | #ifdef LOG_ENABLED
|
---|
3868 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
---|
3869 | do { \
|
---|
3870 | /*Log*/ LogAlways(("%s: returning IEM_RETURN_ASPECT_NOT_IMPLEMENTED (line %d)\n", __FUNCTION__, __LINE__)); \
|
---|
3871 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
---|
3872 | } while (0)
|
---|
3873 | #else
|
---|
3874 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
---|
3875 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
---|
3876 | #endif
|
---|
3877 |
|
---|
3878 | /**
|
---|
3879 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
---|
3880 | * occation using the supplied logger statement.
|
---|
3881 | *
|
---|
3882 | * @param a_LoggerArgs What to log on failure.
|
---|
3883 | */
|
---|
3884 | #ifdef LOG_ENABLED
|
---|
3885 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
---|
3886 | do { \
|
---|
3887 | LogAlways((LOG_FN_FMT ": ", __PRETTY_FUNCTION__)); LogAlways(a_LoggerArgs); \
|
---|
3888 | /*LogFunc(a_LoggerArgs);*/ \
|
---|
3889 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
---|
3890 | } while (0)
|
---|
3891 | #else
|
---|
3892 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
---|
3893 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
---|
3894 | #endif
|
---|
3895 |
|
---|
3896 | /**
|
---|
3897 | * Gets the CPU mode (from fExec) as a IEMMODE value.
|
---|
3898 | *
|
---|
3899 | * @returns IEMMODE
|
---|
3900 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3901 | */
|
---|
3902 | #define IEM_GET_CPU_MODE(a_pVCpu) ((a_pVCpu)->iem.s.fExec & IEM_F_MODE_CPUMODE_MASK)
|
---|
3903 |
|
---|
3904 | /**
|
---|
3905 | * Check if we're currently executing in real or virtual 8086 mode.
|
---|
3906 | *
|
---|
3907 | * @returns @c true if it is, @c false if not.
|
---|
3908 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3909 | */
|
---|
3910 | #define IEM_IS_REAL_OR_V86_MODE(a_pVCpu) (( ((a_pVCpu)->iem.s.fExec ^ IEM_F_MODE_X86_PROT_MASK) \
|
---|
3911 | & (IEM_F_MODE_X86_V86_MASK | IEM_F_MODE_X86_PROT_MASK)) != 0)
|
---|
3912 |
|
---|
3913 | /**
|
---|
3914 | * Check if we're currently executing in virtual 8086 mode.
|
---|
3915 | *
|
---|
3916 | * @returns @c true if it is, @c false if not.
|
---|
3917 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3918 | */
|
---|
3919 | #define IEM_IS_V86_MODE(a_pVCpu) (((a_pVCpu)->iem.s.fExec & IEM_F_MODE_X86_V86_MASK) != 0)
|
---|
3920 |
|
---|
3921 | /**
|
---|
3922 | * Check if we're currently executing in long mode.
|
---|
3923 | *
|
---|
3924 | * @returns @c true if it is, @c false if not.
|
---|
3925 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3926 | */
|
---|
3927 | #define IEM_IS_LONG_MODE(a_pVCpu) (CPUMIsGuestInLongModeEx(IEM_GET_CTX(a_pVCpu)))
|
---|
3928 |
|
---|
3929 | /**
|
---|
3930 | * Check if we're currently executing in a 16-bit code segment.
|
---|
3931 | *
|
---|
3932 | * @returns @c true if it is, @c false if not.
|
---|
3933 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3934 | */
|
---|
3935 | #define IEM_IS_16BIT_CODE(a_pVCpu) (IEM_GET_CPU_MODE(a_pVCpu) == IEMMODE_16BIT)
|
---|
3936 |
|
---|
3937 | /**
|
---|
3938 | * Check if we're currently executing in a 32-bit code segment.
|
---|
3939 | *
|
---|
3940 | * @returns @c true if it is, @c false if not.
|
---|
3941 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3942 | */
|
---|
3943 | #define IEM_IS_32BIT_CODE(a_pVCpu) (IEM_GET_CPU_MODE(a_pVCpu) == IEMMODE_32BIT)
|
---|
3944 |
|
---|
3945 | /**
|
---|
3946 | * Check if we're currently executing in a 64-bit code segment.
|
---|
3947 | *
|
---|
3948 | * @returns @c true if it is, @c false if not.
|
---|
3949 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3950 | */
|
---|
3951 | #define IEM_IS_64BIT_CODE(a_pVCpu) (IEM_GET_CPU_MODE(a_pVCpu) == IEMMODE_64BIT)
|
---|
3952 |
|
---|
3953 | /**
|
---|
3954 | * Check if we're currently executing in real mode.
|
---|
3955 | *
|
---|
3956 | * @returns @c true if it is, @c false if not.
|
---|
3957 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3958 | */
|
---|
3959 | #define IEM_IS_REAL_MODE(a_pVCpu) (!((a_pVCpu)->iem.s.fExec & IEM_F_MODE_X86_PROT_MASK))
|
---|
3960 |
|
---|
3961 | /**
|
---|
3962 | * Gets the current protection level (CPL).
|
---|
3963 | *
|
---|
3964 | * @returns 0..3
|
---|
3965 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3966 | */
|
---|
3967 | #define IEM_GET_CPL(a_pVCpu) (((a_pVCpu)->iem.s.fExec >> IEM_F_X86_CPL_SHIFT) & IEM_F_X86_CPL_SMASK)
|
---|
3968 |
|
---|
3969 | /**
|
---|
3970 | * Sets the current protection level (CPL).
|
---|
3971 | *
|
---|
3972 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3973 | */
|
---|
3974 | #define IEM_SET_CPL(a_pVCpu, a_uCpl) \
|
---|
3975 | do { (a_pVCpu)->iem.s.fExec = ((a_pVCpu)->iem.s.fExec & ~IEM_F_X86_CPL_MASK) | ((a_uCpl) << IEM_F_X86_CPL_SHIFT); } while (0)
|
---|
3976 |
|
---|
3977 | /**
|
---|
3978 | * Returns a (const) pointer to the CPUMFEATURES for the guest CPU.
|
---|
3979 | * @returns PCCPUMFEATURES
|
---|
3980 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3981 | */
|
---|
3982 | #define IEM_GET_GUEST_CPU_FEATURES(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->cpum.ro.GuestFeatures))
|
---|
3983 |
|
---|
3984 | /**
|
---|
3985 | * Returns a (const) pointer to the CPUMFEATURES for the host CPU.
|
---|
3986 | * @returns PCCPUMFEATURES
|
---|
3987 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
3988 | */
|
---|
3989 | #define IEM_GET_HOST_CPU_FEATURES(a_pVCpu) (&g_CpumHostFeatures.s)
|
---|
3990 |
|
---|
3991 | /**
|
---|
3992 | * Evaluates to true if we're presenting an Intel CPU to the guest.
|
---|
3993 | */
|
---|
3994 | #define IEM_IS_GUEST_CPU_INTEL(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL )
|
---|
3995 |
|
---|
3996 | /**
|
---|
3997 | * Evaluates to true if we're presenting an AMD CPU to the guest.
|
---|
3998 | */
|
---|
3999 | #define IEM_IS_GUEST_CPU_AMD(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_AMD || (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_HYGON )
|
---|
4000 |
|
---|
4001 | /**
|
---|
4002 | * Check if the address is canonical.
|
---|
4003 | */
|
---|
4004 | #define IEM_IS_CANONICAL(a_u64Addr) X86_IS_CANONICAL(a_u64Addr)
|
---|
4005 |
|
---|
4006 | /** Checks if the ModR/M byte is in register mode or not. */
|
---|
4007 | #define IEM_IS_MODRM_REG_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT) )
|
---|
4008 | /** Checks if the ModR/M byte is in memory mode or not. */
|
---|
4009 | #define IEM_IS_MODRM_MEM_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT) )
|
---|
4010 |
|
---|
4011 | /**
|
---|
4012 | * Gets the register (reg) part of a ModR/M encoding, with REX.R added in.
|
---|
4013 | *
|
---|
4014 | * For use during decoding.
|
---|
4015 | */
|
---|
4016 | #define IEM_GET_MODRM_REG(a_pVCpu, a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | (a_pVCpu)->iem.s.uRexReg )
|
---|
4017 | /**
|
---|
4018 | * Gets the r/m part of a ModR/M encoding as a register index, with REX.B added in.
|
---|
4019 | *
|
---|
4020 | * For use during decoding.
|
---|
4021 | */
|
---|
4022 | #define IEM_GET_MODRM_RM(a_pVCpu, a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) | (a_pVCpu)->iem.s.uRexB )
|
---|
4023 |
|
---|
4024 | /**
|
---|
4025 | * Gets the register (reg) part of a ModR/M encoding, without REX.R.
|
---|
4026 | *
|
---|
4027 | * For use during decoding.
|
---|
4028 | */
|
---|
4029 | #define IEM_GET_MODRM_REG_8(a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) )
|
---|
4030 | /**
|
---|
4031 | * Gets the r/m part of a ModR/M encoding as a register index, without REX.B.
|
---|
4032 | *
|
---|
4033 | * For use during decoding.
|
---|
4034 | */
|
---|
4035 | #define IEM_GET_MODRM_RM_8(a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) )
|
---|
4036 |
|
---|
4037 | /**
|
---|
4038 | * Gets the register (reg) part of a ModR/M encoding as an extended 8-bit
|
---|
4039 | * register index, with REX.R added in.
|
---|
4040 | *
|
---|
4041 | * For use during decoding.
|
---|
4042 | *
|
---|
4043 | * @see iemGRegRefU8Ex, iemGRegFetchU8Ex, iemGRegStoreU8Ex
|
---|
4044 | */
|
---|
4045 | #define IEM_GET_MODRM_REG_EX8(a_pVCpu, a_bRm) \
|
---|
4046 | ( (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REX) \
|
---|
4047 | || !((a_bRm) & (4 << X86_MODRM_REG_SHIFT)) /* IEM_GET_MODRM_REG(pVCpu, a_bRm) < 4 */ \
|
---|
4048 | ? IEM_GET_MODRM_REG(pVCpu, a_bRm) : (((a_bRm) >> X86_MODRM_REG_SHIFT) & 3) | 16)
|
---|
4049 | /**
|
---|
4050 | * Gets the r/m part of a ModR/M encoding as an extended 8-bit register index,
|
---|
4051 | * with REX.B added in.
|
---|
4052 | *
|
---|
4053 | * For use during decoding.
|
---|
4054 | *
|
---|
4055 | * @see iemGRegRefU8Ex, iemGRegFetchU8Ex, iemGRegStoreU8Ex
|
---|
4056 | */
|
---|
4057 | #define IEM_GET_MODRM_RM_EX8(a_pVCpu, a_bRm) \
|
---|
4058 | ( (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REX) \
|
---|
4059 | || !((a_bRm) & 4) /* IEM_GET_MODRM_RM(pVCpu, a_bRm) < 4 */ \
|
---|
4060 | ? IEM_GET_MODRM_RM(pVCpu, a_bRm) : ((a_bRm) & 3) | 16)
|
---|
4061 |
|
---|
4062 | /**
|
---|
4063 | * Combines the prefix REX and ModR/M byte for passing to
|
---|
4064 | * iemOpHlpCalcRmEffAddrThreadedAddr64().
|
---|
4065 | *
|
---|
4066 | * @returns The ModRM byte but with bit 3 set to REX.B and bit 4 to REX.X.
|
---|
4067 | * The two bits are part of the REG sub-field, which isn't needed in
|
---|
4068 | * iemOpHlpCalcRmEffAddrThreadedAddr64().
|
---|
4069 | *
|
---|
4070 | * For use during decoding/recompiling.
|
---|
4071 | */
|
---|
4072 | #define IEM_GET_MODRM_EX(a_pVCpu, a_bRm) \
|
---|
4073 | ( ((a_bRm) & ~X86_MODRM_REG_MASK) \
|
---|
4074 | | (uint8_t)( (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X)) >> (26 - 3) ) )
|
---|
4075 | AssertCompile(IEM_OP_PRF_REX_B == RT_BIT_32(26));
|
---|
4076 | AssertCompile(IEM_OP_PRF_REX_X == RT_BIT_32(27));
|
---|
4077 |
|
---|
4078 | /**
|
---|
4079 | * Gets the effective VEX.VVVV value.
|
---|
4080 | *
|
---|
4081 | * The 4th bit is ignored if not 64-bit code.
|
---|
4082 | * @returns effective V-register value.
|
---|
4083 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
---|
4084 | */
|
---|
4085 | #define IEM_GET_EFFECTIVE_VVVV(a_pVCpu) \
|
---|
4086 | (IEM_IS_64BIT_CODE(a_pVCpu) ? (a_pVCpu)->iem.s.uVex3rdReg : (a_pVCpu)->iem.s.uVex3rdReg & 7)
|
---|
4087 |
|
---|
4088 |
|
---|
4089 | /**
|
---|
4090 | * Checks if we're executing inside an AMD-V or VT-x guest.
|
---|
4091 | */
|
---|
4092 | #if defined(VBOX_WITH_NESTED_HWVIRT_VMX) || defined(VBOX_WITH_NESTED_HWVIRT_SVM)
|
---|
4093 | # define IEM_IS_IN_GUEST(a_pVCpu) RT_BOOL((a_pVCpu)->iem.s.fExec & IEM_F_X86_CTX_IN_GUEST)
|
---|
4094 | #else
|
---|
4095 | # define IEM_IS_IN_GUEST(a_pVCpu) false
|
---|
4096 | #endif
|
---|
4097 |
|
---|
4098 |
|
---|
4099 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
4100 |
|
---|
4101 | /**
|
---|
4102 | * Check if the guest has entered VMX root operation.
|
---|
4103 | */
|
---|
4104 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (CPUMIsGuestInVmxRootMode(IEM_GET_CTX(a_pVCpu)))
|
---|
4105 |
|
---|
4106 | /**
|
---|
4107 | * Check if the guest has entered VMX non-root operation.
|
---|
4108 | */
|
---|
4109 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) ( ((a_pVCpu)->iem.s.fExec & (IEM_F_X86_CTX_VMX | IEM_F_X86_CTX_IN_GUEST)) \
|
---|
4110 | == (IEM_F_X86_CTX_VMX | IEM_F_X86_CTX_IN_GUEST) )
|
---|
4111 |
|
---|
4112 | /**
|
---|
4113 | * Check if the nested-guest has the given Pin-based VM-execution control set.
|
---|
4114 | */
|
---|
4115 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_PinCtl) (CPUMIsGuestVmxPinCtlsSet(IEM_GET_CTX(a_pVCpu), (a_PinCtl)))
|
---|
4116 |
|
---|
4117 | /**
|
---|
4118 | * Check if the nested-guest has the given Processor-based VM-execution control set.
|
---|
4119 | */
|
---|
4120 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_ProcCtl) (CPUMIsGuestVmxProcCtlsSet(IEM_GET_CTX(a_pVCpu), (a_ProcCtl)))
|
---|
4121 |
|
---|
4122 | /**
|
---|
4123 | * Check if the nested-guest has the given Secondary Processor-based VM-execution
|
---|
4124 | * control set.
|
---|
4125 | */
|
---|
4126 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_ProcCtl2) (CPUMIsGuestVmxProcCtls2Set(IEM_GET_CTX(a_pVCpu), (a_ProcCtl2)))
|
---|
4127 |
|
---|
4128 | /** Gets the guest-physical address of the shadows VMCS for the given VCPU. */
|
---|
4129 | # define IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysShadowVmcs)
|
---|
4130 |
|
---|
4131 | /** Whether a shadow VMCS is present for the given VCPU. */
|
---|
4132 | # define IEM_VMX_HAS_SHADOW_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
---|
4133 |
|
---|
4134 | /** Gets the VMXON region pointer. */
|
---|
4135 | # define IEM_VMX_GET_VMXON_PTR(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmxon)
|
---|
4136 |
|
---|
4137 | /** Gets the guest-physical address of the current VMCS for the given VCPU. */
|
---|
4138 | # define IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs)
|
---|
4139 |
|
---|
4140 | /** Whether a current VMCS is present for the given VCPU. */
|
---|
4141 | # define IEM_VMX_HAS_CURRENT_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
---|
4142 |
|
---|
4143 | /** Assigns the guest-physical address of the current VMCS for the given VCPU. */
|
---|
4144 | # define IEM_VMX_SET_CURRENT_VMCS(a_pVCpu, a_GCPhysVmcs) \
|
---|
4145 | do \
|
---|
4146 | { \
|
---|
4147 | Assert((a_GCPhysVmcs) != NIL_RTGCPHYS); \
|
---|
4148 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = (a_GCPhysVmcs); \
|
---|
4149 | } while (0)
|
---|
4150 |
|
---|
4151 | /** Clears any current VMCS for the given VCPU. */
|
---|
4152 | # define IEM_VMX_CLEAR_CURRENT_VMCS(a_pVCpu) \
|
---|
4153 | do \
|
---|
4154 | { \
|
---|
4155 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = NIL_RTGCPHYS; \
|
---|
4156 | } while (0)
|
---|
4157 |
|
---|
4158 | /**
|
---|
4159 | * Invokes the VMX VM-exit handler for an instruction intercept.
|
---|
4160 | */
|
---|
4161 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) \
|
---|
4162 | do { return iemVmxVmexitInstr((a_pVCpu), (a_uExitReason), (a_cbInstr)); } while (0)
|
---|
4163 |
|
---|
4164 | /**
|
---|
4165 | * Invokes the VMX VM-exit handler for an instruction intercept where the
|
---|
4166 | * instruction provides additional VM-exit information.
|
---|
4167 | */
|
---|
4168 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) \
|
---|
4169 | do { return iemVmxVmexitInstrNeedsInfo((a_pVCpu), (a_uExitReason), (a_uInstrId), (a_cbInstr)); } while (0)
|
---|
4170 |
|
---|
4171 | /**
|
---|
4172 | * Invokes the VMX VM-exit handler for a task switch.
|
---|
4173 | */
|
---|
4174 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) \
|
---|
4175 | do { return iemVmxVmexitTaskSwitch((a_pVCpu), (a_enmTaskSwitch), (a_SelNewTss), (a_cbInstr)); } while (0)
|
---|
4176 |
|
---|
4177 | /**
|
---|
4178 | * Invokes the VMX VM-exit handler for MWAIT.
|
---|
4179 | */
|
---|
4180 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) \
|
---|
4181 | do { return iemVmxVmexitInstrMwait((a_pVCpu), (a_fMonitorArmed), (a_cbInstr)); } while (0)
|
---|
4182 |
|
---|
4183 | /**
|
---|
4184 | * Invokes the VMX VM-exit handler for EPT faults.
|
---|
4185 | */
|
---|
4186 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) \
|
---|
4187 | do { return iemVmxVmexitEpt(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr); } while (0)
|
---|
4188 |
|
---|
4189 | /**
|
---|
4190 | * Invokes the VMX VM-exit handler.
|
---|
4191 | */
|
---|
4192 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) \
|
---|
4193 | do { return iemVmxVmexit((a_pVCpu), (a_uExitReason), (a_uExitQual)); } while (0)
|
---|
4194 |
|
---|
4195 | #else
|
---|
4196 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (false)
|
---|
4197 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) (false)
|
---|
4198 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
---|
4199 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
---|
4200 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_cbInstr) (false)
|
---|
4201 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4202 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4203 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4204 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4205 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4206 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) do { return VERR_VMX_IPE_1; } while (0)
|
---|
4207 |
|
---|
4208 | #endif
|
---|
4209 |
|
---|
4210 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
---|
4211 | /**
|
---|
4212 | * Checks if we're executing a guest using AMD-V.
|
---|
4213 | */
|
---|
4214 | # define IEM_SVM_IS_IN_GUEST(a_pVCpu) ( (a_pVCpu->iem.s.fExec & (IEM_F_X86_CTX_SVM | IEM_F_X86_CTX_IN_GUEST)) \
|
---|
4215 | == (IEM_F_X86_CTX_SVM | IEM_F_X86_CTX_IN_GUEST))
|
---|
4216 | /**
|
---|
4217 | * Check if an SVM control/instruction intercept is set.
|
---|
4218 | */
|
---|
4219 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) \
|
---|
4220 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmCtrlInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_Intercept)))
|
---|
4221 |
|
---|
4222 | /**
|
---|
4223 | * Check if an SVM read CRx intercept is set.
|
---|
4224 | */
|
---|
4225 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
---|
4226 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmReadCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
---|
4227 |
|
---|
4228 | /**
|
---|
4229 | * Check if an SVM write CRx intercept is set.
|
---|
4230 | */
|
---|
4231 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
---|
4232 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmWriteCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
---|
4233 |
|
---|
4234 | /**
|
---|
4235 | * Check if an SVM read DRx intercept is set.
|
---|
4236 | */
|
---|
4237 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
---|
4238 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmReadDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
---|
4239 |
|
---|
4240 | /**
|
---|
4241 | * Check if an SVM write DRx intercept is set.
|
---|
4242 | */
|
---|
4243 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
---|
4244 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmWriteDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
---|
4245 |
|
---|
4246 | /**
|
---|
4247 | * Check if an SVM exception intercept is set.
|
---|
4248 | */
|
---|
4249 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) \
|
---|
4250 | (IEM_SVM_IS_IN_GUEST(a_pVCpu) && CPUMIsGuestSvmXcptInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uVector)))
|
---|
4251 |
|
---|
4252 | /**
|
---|
4253 | * Invokes the SVM \#VMEXIT handler for the nested-guest.
|
---|
4254 | */
|
---|
4255 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \
|
---|
4256 | do { return iemSvmVmexit((a_pVCpu), (a_uExitCode), (a_uExitInfo1), (a_uExitInfo2)); } while (0)
|
---|
4257 |
|
---|
4258 | /**
|
---|
4259 | * Invokes the 'MOV CRx' SVM \#VMEXIT handler after constructing the
|
---|
4260 | * corresponding decode assist information.
|
---|
4261 | */
|
---|
4262 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) \
|
---|
4263 | do \
|
---|
4264 | { \
|
---|
4265 | uint64_t uExitInfo1; \
|
---|
4266 | if ( IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmDecodeAssists \
|
---|
4267 | && (a_enmAccessCrX) == IEMACCESSCRX_MOV_CRX) \
|
---|
4268 | uExitInfo1 = SVM_EXIT1_MOV_CRX_MASK | ((a_iGReg) & 7); \
|
---|
4269 | else \
|
---|
4270 | uExitInfo1 = 0; \
|
---|
4271 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, uExitInfo1, 0); \
|
---|
4272 | } while (0)
|
---|
4273 |
|
---|
4274 | /** Check and handles SVM nested-guest instruction intercept and updates
|
---|
4275 | * NRIP if needed.
|
---|
4276 | */
|
---|
4277 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, a_uExitInfo1, a_uExitInfo2, a_cbInstr) \
|
---|
4278 | do \
|
---|
4279 | { \
|
---|
4280 | if (IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept)) \
|
---|
4281 | { \
|
---|
4282 | IEM_SVM_UPDATE_NRIP(a_pVCpu, a_cbInstr); \
|
---|
4283 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2); \
|
---|
4284 | } \
|
---|
4285 | } while (0)
|
---|
4286 |
|
---|
4287 | /** Checks and handles SVM nested-guest CR0 read intercept. */
|
---|
4288 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2, a_cbInstr) \
|
---|
4289 | do \
|
---|
4290 | { \
|
---|
4291 | if (!IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, 0)) \
|
---|
4292 | { /* probably likely */ } \
|
---|
4293 | else \
|
---|
4294 | { \
|
---|
4295 | IEM_SVM_UPDATE_NRIP(a_pVCpu, a_cbInstr); \
|
---|
4296 | IEM_SVM_VMEXIT_RET(a_pVCpu, SVM_EXIT_READ_CR0, a_uExitInfo1, a_uExitInfo2); \
|
---|
4297 | } \
|
---|
4298 | } while (0)
|
---|
4299 |
|
---|
4300 | /**
|
---|
4301 | * Updates the NextRIP (NRI) field in the nested-guest VMCB.
|
---|
4302 | */
|
---|
4303 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu, a_cbInstr) \
|
---|
4304 | do { \
|
---|
4305 | if (IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmNextRipSave) \
|
---|
4306 | CPUMGuestSvmUpdateNRip(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_cbInstr)); \
|
---|
4307 | } while (0)
|
---|
4308 |
|
---|
4309 | #else
|
---|
4310 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) (false)
|
---|
4311 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
---|
4312 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
---|
4313 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
---|
4314 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
---|
4315 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) (false)
|
---|
4316 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) do { return VERR_SVM_IPE_1; } while (0)
|
---|
4317 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) do { return VERR_SVM_IPE_1; } while (0)
|
---|
4318 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, \
|
---|
4319 | a_uExitInfo1, a_uExitInfo2, a_cbInstr) do { } while (0)
|
---|
4320 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2, a_cbInstr) do { } while (0)
|
---|
4321 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu, a_cbInstr) do { } while (0)
|
---|
4322 |
|
---|
4323 | #endif
|
---|
4324 |
|
---|
4325 | /** @} */
|
---|
4326 |
|
---|
4327 | uint32_t iemCalcExecDbgFlagsSlow(PVMCPUCC pVCpu);
|
---|
4328 | VBOXSTRICTRC iemExecInjectPendingTrap(PVMCPUCC pVCpu);
|
---|
4329 |
|
---|
4330 |
|
---|
4331 | /**
|
---|
4332 | * Selector descriptor table entry as fetched by iemMemFetchSelDesc.
|
---|
4333 | */
|
---|
4334 | typedef union IEMSELDESC
|
---|
4335 | {
|
---|
4336 | /** The legacy view. */
|
---|
4337 | X86DESC Legacy;
|
---|
4338 | /** The long mode view. */
|
---|
4339 | X86DESC64 Long;
|
---|
4340 | } IEMSELDESC;
|
---|
4341 | /** Pointer to a selector descriptor table entry. */
|
---|
4342 | typedef IEMSELDESC *PIEMSELDESC;
|
---|
4343 |
|
---|
4344 | /** @name Raising Exceptions.
|
---|
4345 | * @{ */
|
---|
4346 | VBOXSTRICTRC iemTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, uint32_t uNextEip, uint32_t fFlags,
|
---|
4347 | uint16_t uErr, uint64_t uCr2, RTSEL SelTSS, PIEMSELDESC pNewDescTSS) RT_NOEXCEPT;
|
---|
4348 |
|
---|
4349 | VBOXSTRICTRC iemRaiseXcptOrInt(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector, uint32_t fFlags,
|
---|
4350 | uint16_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
---|
4351 | #ifdef IEM_WITH_SETJMP
|
---|
4352 | DECL_NO_RETURN(void) iemRaiseXcptOrIntJmp(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector,
|
---|
4353 | uint32_t fFlags, uint16_t uErr, uint64_t uCr2) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4354 | #endif
|
---|
4355 | VBOXSTRICTRC iemRaiseDivideError(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4356 | VBOXSTRICTRC iemRaiseDebugException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4357 | VBOXSTRICTRC iemRaiseBoundRangeExceeded(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4358 | VBOXSTRICTRC iemRaiseUndefinedOpcode(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4359 | VBOXSTRICTRC iemRaiseDeviceNotAvailable(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4360 | VBOXSTRICTRC iemRaiseTaskSwitchFaultWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
4361 | VBOXSTRICTRC iemRaiseTaskSwitchFaultCurrentTSS(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4362 | VBOXSTRICTRC iemRaiseTaskSwitchFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4363 | VBOXSTRICTRC iemRaiseTaskSwitchFaultBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
4364 | /*VBOXSTRICTRC iemRaiseSelectorNotPresent(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;*/
|
---|
4365 | VBOXSTRICTRC iemRaiseSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
4366 | VBOXSTRICTRC iemRaiseSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
4367 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
4368 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
4369 | VBOXSTRICTRC iemRaiseGeneralProtectionFault(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
---|
4370 | VBOXSTRICTRC iemRaiseGeneralProtectionFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4371 | #ifdef IEM_WITH_SETJMP
|
---|
4372 | DECL_NO_RETURN(void) iemRaiseGeneralProtectionFault0Jmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4373 | #endif
|
---|
4374 | VBOXSTRICTRC iemRaiseGeneralProtectionFaultBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
---|
4375 | VBOXSTRICTRC iemRaiseNotCanonical(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4376 | VBOXSTRICTRC iemRaiseSelectorBounds(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4377 | #ifdef IEM_WITH_SETJMP
|
---|
4378 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4379 | #endif
|
---|
4380 | VBOXSTRICTRC iemRaiseSelectorBoundsBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
---|
4381 | #ifdef IEM_WITH_SETJMP
|
---|
4382 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsBySelectorJmp(PVMCPUCC pVCpu, RTSEL Sel) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4383 | #endif
|
---|
4384 | VBOXSTRICTRC iemRaiseSelectorInvalidAccess(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4385 | #ifdef IEM_WITH_SETJMP
|
---|
4386 | DECL_NO_RETURN(void) iemRaiseSelectorInvalidAccessJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4387 | #endif
|
---|
4388 | VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) RT_NOEXCEPT;
|
---|
4389 | #ifdef IEM_WITH_SETJMP
|
---|
4390 | DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4391 | #endif
|
---|
4392 | VBOXSTRICTRC iemRaiseMathFault(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4393 | VBOXSTRICTRC iemRaiseAlignmentCheckException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4394 | #ifdef IEM_WITH_SETJMP
|
---|
4395 | DECL_NO_RETURN(void) iemRaiseAlignmentCheckExceptionJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4396 | #endif
|
---|
4397 | VBOXSTRICTRC iemRaiseSimdFpException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4398 |
|
---|
4399 | void iemLogSyscallProtModeInt(PVMCPUCC pVCpu, uint8_t u8Vector, uint8_t cbInstr);
|
---|
4400 |
|
---|
4401 | IEM_CIMPL_DEF_0(iemCImplRaiseDivideError);
|
---|
4402 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidLockPrefix);
|
---|
4403 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidOpcode);
|
---|
4404 |
|
---|
4405 | /**
|
---|
4406 | * Macro for calling iemCImplRaiseDivideError().
|
---|
4407 | *
|
---|
4408 | * This is for things that will _always_ decode to an \#DE, taking the
|
---|
4409 | * recompiler into consideration and everything.
|
---|
4410 | *
|
---|
4411 | * @return Strict VBox status code.
|
---|
4412 | */
|
---|
4413 | #define IEMOP_RAISE_DIVIDE_ERROR_RET() IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_XCPT, iemCImplRaiseDivideError)
|
---|
4414 |
|
---|
4415 | /**
|
---|
4416 | * Macro for calling iemCImplRaiseInvalidLockPrefix().
|
---|
4417 | *
|
---|
4418 | * This is for things that will _always_ decode to an \#UD, taking the
|
---|
4419 | * recompiler into consideration and everything.
|
---|
4420 | *
|
---|
4421 | * @return Strict VBox status code.
|
---|
4422 | */
|
---|
4423 | #define IEMOP_RAISE_INVALID_LOCK_PREFIX_RET() IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_XCPT, iemCImplRaiseInvalidLockPrefix)
|
---|
4424 |
|
---|
4425 | /**
|
---|
4426 | * Macro for calling iemCImplRaiseInvalidOpcode() for decode/static \#UDs.
|
---|
4427 | *
|
---|
4428 | * This is for things that will _always_ decode to an \#UD, taking the
|
---|
4429 | * recompiler into consideration and everything.
|
---|
4430 | *
|
---|
4431 | * @return Strict VBox status code.
|
---|
4432 | */
|
---|
4433 | #define IEMOP_RAISE_INVALID_OPCODE_RET() IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_XCPT, iemCImplRaiseInvalidOpcode)
|
---|
4434 |
|
---|
4435 | /**
|
---|
4436 | * Macro for calling iemCImplRaiseInvalidOpcode() for runtime-style \#UDs.
|
---|
4437 | *
|
---|
4438 | * Using this macro means you've got _buggy_ _code_ and are doing things that
|
---|
4439 | * belongs exclusively in IEMAllCImpl.cpp during decoding.
|
---|
4440 | *
|
---|
4441 | * @return Strict VBox status code.
|
---|
4442 | * @see IEMOP_RAISE_INVALID_OPCODE_RET
|
---|
4443 | */
|
---|
4444 | #define IEMOP_RAISE_INVALID_OPCODE_RUNTIME_RET() IEM_MC_DEFER_TO_CIMPL_0_RET(IEM_CIMPL_F_XCPT, iemCImplRaiseInvalidOpcode)
|
---|
4445 |
|
---|
4446 | /** @} */
|
---|
4447 |
|
---|
4448 | /** @name Register Access.
|
---|
4449 | * @{ */
|
---|
4450 | VBOXSTRICTRC iemRegRipRelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr,
|
---|
4451 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
---|
4452 | VBOXSTRICTRC iemRegRipRelativeJumpS16AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int16_t offNextInstr) RT_NOEXCEPT;
|
---|
4453 | VBOXSTRICTRC iemRegRipRelativeJumpS32AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int32_t offNextInstr,
|
---|
4454 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
---|
4455 | VBOXSTRICTRC iemRegRipJumpU16AndFinishClearningRF(PVMCPUCC pVCpu, uint16_t uNewRip) RT_NOEXCEPT;
|
---|
4456 | VBOXSTRICTRC iemRegRipJumpU32AndFinishClearningRF(PVMCPUCC pVCpu, uint32_t uNewRip) RT_NOEXCEPT;
|
---|
4457 | VBOXSTRICTRC iemRegRipJumpU64AndFinishClearningRF(PVMCPUCC pVCpu, uint64_t uNewRip) RT_NOEXCEPT;
|
---|
4458 | /** @} */
|
---|
4459 |
|
---|
4460 | /** @name FPU access and helpers.
|
---|
4461 | * @{ */
|
---|
4462 | void iemFpuPushResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4463 | void iemFpuPushResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4464 | void iemFpuPushResultTwo(PVMCPUCC pVCpu, PIEMFPURESULTTWO pResult, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4465 | void iemFpuStoreResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4466 | void iemFpuStoreResultThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4467 | void iemFpuStoreResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
---|
4468 | uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4469 | void iemFpuStoreResultWithMemOpThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
---|
4470 | uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4471 | void iemFpuUpdateOpcodeAndIp(PVMCPUCC pVCpu, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4472 | void iemFpuUpdateFSW(PVMCPUCC pVCpu, uint16_t u16FSW, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4473 | void iemFpuUpdateFSWThenPop(PVMCPUCC pVCpu, uint16_t u16FSW, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4474 | void iemFpuUpdateFSWWithMemOp(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4475 | void iemFpuUpdateFSWThenPopPop(PVMCPUCC pVCpu, uint16_t u16FSW, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4476 | void iemFpuUpdateFSWWithMemOpThenPop(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4477 | void iemFpuStackUnderflow(PVMCPUCC pVCpu, uint8_t iStReg, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4478 | void iemFpuStackUnderflowWithMemOp(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4479 | void iemFpuStackUnderflowThenPop(PVMCPUCC pVCpu, uint8_t iStReg, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4480 | void iemFpuStackUnderflowWithMemOpThenPop(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4481 | void iemFpuStackUnderflowThenPopPop(PVMCPUCC pVCpu, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4482 | void iemFpuStackPushUnderflow(PVMCPUCC pVCpu, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4483 | void iemFpuStackPushUnderflowTwo(PVMCPUCC pVCpu, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4484 | void iemFpuStackPushOverflow(PVMCPUCC pVCpu, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4485 | void iemFpuStackPushOverflowWithMemOp(PVMCPUCC pVCpu, uint8_t iEffSeg, RTGCPTR GCPtrEff, uint16_t uFpuOpcode) RT_NOEXCEPT;
|
---|
4486 | /** @} */
|
---|
4487 |
|
---|
4488 | /** @name SSE+AVX SIMD access and helpers.
|
---|
4489 | * @{ */
|
---|
4490 | void iemSseStoreResult(PVMCPUCC pVCpu, PCIEMSSERESULT pResult, uint8_t iXmmReg) RT_NOEXCEPT;
|
---|
4491 | void iemSseUpdateMxcsr(PVMCPUCC pVCpu, uint32_t fMxcsr) RT_NOEXCEPT;
|
---|
4492 | /** @} */
|
---|
4493 |
|
---|
4494 | /** @name Memory access.
|
---|
4495 | * @{ */
|
---|
4496 |
|
---|
4497 | /** Report a \#GP instead of \#AC and do not restrict to ring-3 */
|
---|
4498 | #define IEM_MEMMAP_F_ALIGN_GP RT_BIT_32(16)
|
---|
4499 | /** SSE access that should report a \#GP instead of \#AC, unless MXCSR.MM=1
|
---|
4500 | * when it works like normal \#AC. Always used with IEM_MEMMAP_F_ALIGN_GP. */
|
---|
4501 | #define IEM_MEMMAP_F_ALIGN_SSE RT_BIT_32(17)
|
---|
4502 | /** If \#AC is applicable, raise it. Always used with IEM_MEMMAP_F_ALIGN_GP.
|
---|
4503 | * Users include FXSAVE & FXRSTOR. */
|
---|
4504 | #define IEM_MEMMAP_F_ALIGN_GP_OR_AC RT_BIT_32(18)
|
---|
4505 |
|
---|
4506 | VBOXSTRICTRC iemMemMap(PVMCPUCC pVCpu, void **ppvMem, size_t cbMem, uint8_t iSegReg, RTGCPTR GCPtrMem,
|
---|
4507 | uint32_t fAccess, uint32_t uAlignCtl) RT_NOEXCEPT;
|
---|
4508 | VBOXSTRICTRC iemMemCommitAndUnmap(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4509 | #ifndef IN_RING3
|
---|
4510 | VBOXSTRICTRC iemMemCommitAndUnmapPostponeTroubleToR3(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4511 | #endif
|
---|
4512 | void iemMemRollback(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4513 | VBOXSTRICTRC iemMemApplySegment(PVMCPUCC pVCpu, uint32_t fAccess, uint8_t iSegReg, size_t cbMem, PRTGCPTR pGCPtrMem) RT_NOEXCEPT;
|
---|
4514 | VBOXSTRICTRC iemMemMarkSelDescAccessed(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
---|
4515 | VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t cbAccess, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT;
|
---|
4516 |
|
---|
4517 | void iemOpcodeFlushLight(PVMCPUCC pVCpu, uint8_t cbInstr);
|
---|
4518 | void iemOpcodeFlushHeavy(PVMCPUCC pVCpu, uint8_t cbInstr);
|
---|
4519 | #ifdef IEM_WITH_CODE_TLB
|
---|
4520 | void iemOpcodeFetchBytesJmp(PVMCPUCC pVCpu, size_t cbDst, void *pvDst) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4521 | #else
|
---|
4522 | VBOXSTRICTRC iemOpcodeFetchMoreBytes(PVMCPUCC pVCpu, size_t cbMin) RT_NOEXCEPT;
|
---|
4523 | #endif
|
---|
4524 | #ifdef IEM_WITH_SETJMP
|
---|
4525 | uint8_t iemOpcodeGetNextU8SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4526 | uint16_t iemOpcodeGetNextU16SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4527 | uint32_t iemOpcodeGetNextU32SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4528 | uint64_t iemOpcodeGetNextU64SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4529 | #else
|
---|
4530 | VBOXSTRICTRC iemOpcodeGetNextU8Slow(PVMCPUCC pVCpu, uint8_t *pb) RT_NOEXCEPT;
|
---|
4531 | VBOXSTRICTRC iemOpcodeGetNextS8SxU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
---|
4532 | VBOXSTRICTRC iemOpcodeGetNextS8SxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
4533 | VBOXSTRICTRC iemOpcodeGetNextS8SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
4534 | VBOXSTRICTRC iemOpcodeGetNextU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
---|
4535 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
4536 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
4537 | VBOXSTRICTRC iemOpcodeGetNextU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
---|
4538 | VBOXSTRICTRC iemOpcodeGetNextU32ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
4539 | VBOXSTRICTRC iemOpcodeGetNextS32SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
4540 | VBOXSTRICTRC iemOpcodeGetNextU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
---|
4541 | #endif
|
---|
4542 |
|
---|
4543 | VBOXSTRICTRC iemMemFetchDataU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4544 | VBOXSTRICTRC iemMemFetchDataU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4545 | VBOXSTRICTRC iemMemFetchDataU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4546 | VBOXSTRICTRC iemMemFetchDataU32_ZX_U64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4547 | VBOXSTRICTRC iemMemFetchDataU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4548 | VBOXSTRICTRC iemMemFetchDataU64AlignedU128(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4549 | VBOXSTRICTRC iemMemFetchDataR80(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4550 | VBOXSTRICTRC iemMemFetchDataD80(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4551 | VBOXSTRICTRC iemMemFetchDataU128(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4552 | VBOXSTRICTRC iemMemFetchDataU128AlignedSse(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4553 | VBOXSTRICTRC iemMemFetchDataU256(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4554 | VBOXSTRICTRC iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4555 | VBOXSTRICTRC iemMemFetchDataXdtr(PVMCPUCC pVCpu, uint16_t *pcbLimit, PRTGCPTR pGCPtrBase, uint8_t iSegReg,
|
---|
4556 | RTGCPTR GCPtrMem, IEMMODE enmOpSize) RT_NOEXCEPT;
|
---|
4557 | #ifdef IEM_WITH_SETJMP
|
---|
4558 | uint8_t iemMemFetchDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4559 | uint16_t iemMemFetchDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4560 | uint32_t iemMemFetchDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4561 | uint64_t iemMemFetchDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4562 | uint64_t iemMemFetchDataU64AlignedU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4563 | void iemMemFetchDataR80Jmp(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4564 | void iemMemFetchDataD80Jmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4565 | void iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4566 | void iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4567 | void iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4568 | void iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4569 | #endif
|
---|
4570 |
|
---|
4571 | VBOXSTRICTRC iemMemFetchSysU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4572 | VBOXSTRICTRC iemMemFetchSysU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4573 | VBOXSTRICTRC iemMemFetchSysU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4574 | VBOXSTRICTRC iemMemFetchSysU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4575 | VBOXSTRICTRC iemMemFetchSelDesc(PVMCPUCC pVCpu, PIEMSELDESC pDesc, uint16_t uSel, uint8_t uXcpt) RT_NOEXCEPT;
|
---|
4576 |
|
---|
4577 | VBOXSTRICTRC iemMemStoreDataU8(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) RT_NOEXCEPT;
|
---|
4578 | VBOXSTRICTRC iemMemStoreDataU16(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) RT_NOEXCEPT;
|
---|
4579 | VBOXSTRICTRC iemMemStoreDataU32(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) RT_NOEXCEPT;
|
---|
4580 | VBOXSTRICTRC iemMemStoreDataU64(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) RT_NOEXCEPT;
|
---|
4581 | VBOXSTRICTRC iemMemStoreDataU128(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
4582 | VBOXSTRICTRC iemMemStoreDataU128AlignedSse(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
---|
4583 | VBOXSTRICTRC iemMemStoreDataU256(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
4584 | VBOXSTRICTRC iemMemStoreDataU256AlignedAvx(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
---|
4585 | VBOXSTRICTRC iemMemStoreDataXdtr(PVMCPUCC pVCpu, uint16_t cbLimit, RTGCPTR GCPtrBase, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
---|
4586 | #ifdef IEM_WITH_SETJMP
|
---|
4587 | void iemMemStoreDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4588 | void iemMemStoreDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4589 | void iemMemStoreDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4590 | void iemMemStoreDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4591 | void iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4592 | void iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4593 | void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4594 | void iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
---|
4595 | #endif
|
---|
4596 |
|
---|
4597 | VBOXSTRICTRC iemMemStackPushBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
---|
4598 | void **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
---|
4599 | VBOXSTRICTRC iemMemStackPushCommitSpecial(PVMCPUCC pVCpu, void *pvMem, uint64_t uNewRsp) RT_NOEXCEPT;
|
---|
4600 | VBOXSTRICTRC iemMemStackPushU16(PVMCPUCC pVCpu, uint16_t u16Value) RT_NOEXCEPT;
|
---|
4601 | VBOXSTRICTRC iemMemStackPushU32(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
---|
4602 | VBOXSTRICTRC iemMemStackPushU64(PVMCPUCC pVCpu, uint64_t u64Value) RT_NOEXCEPT;
|
---|
4603 | VBOXSTRICTRC iemMemStackPushU16Ex(PVMCPUCC pVCpu, uint16_t u16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4604 | VBOXSTRICTRC iemMemStackPushU32Ex(PVMCPUCC pVCpu, uint32_t u32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4605 | VBOXSTRICTRC iemMemStackPushU64Ex(PVMCPUCC pVCpu, uint64_t u64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4606 | VBOXSTRICTRC iemMemStackPushU32SReg(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
---|
4607 | VBOXSTRICTRC iemMemStackPopBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
---|
4608 | void const **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
---|
4609 | VBOXSTRICTRC iemMemStackPopContinueSpecial(PVMCPUCC pVCpu, size_t off, size_t cbMem,
|
---|
4610 | void const **ppvMem, uint64_t uCurNewRsp) RT_NOEXCEPT;
|
---|
4611 | VBOXSTRICTRC iemMemStackPopDoneSpecial(PVMCPUCC pVCpu, void const *pvMem) RT_NOEXCEPT;
|
---|
4612 | VBOXSTRICTRC iemMemStackPopU16(PVMCPUCC pVCpu, uint16_t *pu16Value) RT_NOEXCEPT;
|
---|
4613 | VBOXSTRICTRC iemMemStackPopU32(PVMCPUCC pVCpu, uint32_t *pu32Value) RT_NOEXCEPT;
|
---|
4614 | VBOXSTRICTRC iemMemStackPopU64(PVMCPUCC pVCpu, uint64_t *pu64Value) RT_NOEXCEPT;
|
---|
4615 | VBOXSTRICTRC iemMemStackPopU16Ex(PVMCPUCC pVCpu, uint16_t *pu16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4616 | VBOXSTRICTRC iemMemStackPopU32Ex(PVMCPUCC pVCpu, uint32_t *pu32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4617 | VBOXSTRICTRC iemMemStackPopU64Ex(PVMCPUCC pVCpu, uint64_t *pu64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
---|
4618 | /** @} */
|
---|
4619 |
|
---|
4620 | /** @name IEMAllCImpl.cpp
|
---|
4621 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/'
|
---|
4622 | * @{ */
|
---|
4623 | IEM_CIMPL_PROTO_2(iemCImpl_pop_mem16, uint16_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4624 | IEM_CIMPL_PROTO_2(iemCImpl_pop_mem32, uint16_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4625 | IEM_CIMPL_PROTO_2(iemCImpl_pop_mem64, uint16_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4626 | IEM_CIMPL_PROTO_0(iemCImpl_popa_16);
|
---|
4627 | IEM_CIMPL_PROTO_0(iemCImpl_popa_32);
|
---|
4628 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_16);
|
---|
4629 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_32);
|
---|
4630 | IEM_CIMPL_PROTO_1(iemCImpl_pushf, IEMMODE, enmEffOpSize);
|
---|
4631 | IEM_CIMPL_PROTO_1(iemCImpl_popf, IEMMODE, enmEffOpSize);
|
---|
4632 | IEM_CIMPL_PROTO_1(iemCImpl_call_16, uint16_t, uNewPC);
|
---|
4633 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_16, int16_t, offDisp);
|
---|
4634 | IEM_CIMPL_PROTO_1(iemCImpl_call_32, uint32_t, uNewPC);
|
---|
4635 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_32, int32_t, offDisp);
|
---|
4636 | IEM_CIMPL_PROTO_1(iemCImpl_call_64, uint64_t, uNewPC);
|
---|
4637 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_64, int64_t, offDisp);
|
---|
4638 | IEM_CIMPL_PROTO_3(iemCImpl_FarJmp, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
---|
4639 | IEM_CIMPL_PROTO_3(iemCImpl_callf, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
---|
4640 | typedef IEM_CIMPL_DECL_TYPE_3(FNIEMCIMPLFARBRANCH, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
---|
4641 | typedef FNIEMCIMPLFARBRANCH *PFNIEMCIMPLFARBRANCH;
|
---|
4642 | IEM_CIMPL_PROTO_2(iemCImpl_retf, IEMMODE, enmEffOpSize, uint16_t, cbPop);
|
---|
4643 | IEM_CIMPL_PROTO_0(iemCImpl_retn_16);
|
---|
4644 | IEM_CIMPL_PROTO_0(iemCImpl_retn_32);
|
---|
4645 | IEM_CIMPL_PROTO_0(iemCImpl_retn_64);
|
---|
4646 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_16, uint16_t, cbPop);
|
---|
4647 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_32, uint16_t, cbPop);
|
---|
4648 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_64, uint16_t, cbPop);
|
---|
4649 | IEM_CIMPL_PROTO_3(iemCImpl_enter, IEMMODE, enmEffOpSize, uint16_t, cbFrame, uint8_t, cParameters);
|
---|
4650 | IEM_CIMPL_PROTO_1(iemCImpl_leave, IEMMODE, enmEffOpSize);
|
---|
4651 | IEM_CIMPL_PROTO_2(iemCImpl_int, uint8_t, u8Int, IEMINT, enmInt);
|
---|
4652 | IEM_CIMPL_PROTO_1(iemCImpl_iret_real_v8086, IEMMODE, enmEffOpSize);
|
---|
4653 | IEM_CIMPL_PROTO_4(iemCImpl_iret_prot_v8086, uint32_t, uNewEip, uint16_t, uNewCs, uint32_t, uNewFlags, uint64_t, uNewRsp);
|
---|
4654 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot_NestedTask, IEMMODE, enmEffOpSize);
|
---|
4655 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot, IEMMODE, enmEffOpSize);
|
---|
4656 | IEM_CIMPL_PROTO_1(iemCImpl_iret_64bit, IEMMODE, enmEffOpSize);
|
---|
4657 | IEM_CIMPL_PROTO_1(iemCImpl_iret, IEMMODE, enmEffOpSize);
|
---|
4658 | IEM_CIMPL_PROTO_0(iemCImpl_loadall286);
|
---|
4659 | IEM_CIMPL_PROTO_0(iemCImpl_syscall);
|
---|
4660 | IEM_CIMPL_PROTO_1(iemCImpl_sysret, IEMMODE, enmEffOpSize);
|
---|
4661 | IEM_CIMPL_PROTO_0(iemCImpl_sysenter);
|
---|
4662 | IEM_CIMPL_PROTO_1(iemCImpl_sysexit, IEMMODE, enmEffOpSize);
|
---|
4663 | IEM_CIMPL_PROTO_2(iemCImpl_LoadSReg, uint8_t, iSegReg, uint16_t, uSel);
|
---|
4664 | IEM_CIMPL_PROTO_2(iemCImpl_load_SReg, uint8_t, iSegReg, uint16_t, uSel);
|
---|
4665 | IEM_CIMPL_PROTO_2(iemCImpl_pop_Sreg, uint8_t, iSegReg, IEMMODE, enmEffOpSize);
|
---|
4666 | IEM_CIMPL_PROTO_5(iemCImpl_load_SReg_Greg, uint16_t, uSel, uint64_t, offSeg, uint8_t, iSegReg, uint8_t, iGReg, IEMMODE, enmEffOpSize);
|
---|
4667 | IEM_CIMPL_PROTO_2(iemCImpl_VerX, uint16_t, uSel, bool, fWrite);
|
---|
4668 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u64, uint64_t *, pu64Dst, uint16_t, uSel, bool, fIsLar);
|
---|
4669 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u16, uint16_t *, pu16Dst, uint16_t, uSel, bool, fIsLar);
|
---|
4670 | IEM_CIMPL_PROTO_3(iemCImpl_lgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
---|
4671 | IEM_CIMPL_PROTO_2(iemCImpl_sgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4672 | IEM_CIMPL_PROTO_3(iemCImpl_lidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
---|
4673 | IEM_CIMPL_PROTO_2(iemCImpl_sidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4674 | IEM_CIMPL_PROTO_1(iemCImpl_lldt, uint16_t, uNewLdt);
|
---|
4675 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
4676 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4677 | IEM_CIMPL_PROTO_1(iemCImpl_ltr, uint16_t, uNewTr);
|
---|
4678 | IEM_CIMPL_PROTO_2(iemCImpl_str_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
4679 | IEM_CIMPL_PROTO_2(iemCImpl_str_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4680 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Cd, uint8_t, iGReg, uint8_t, iCrReg);
|
---|
4681 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
---|
4682 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4683 | IEM_CIMPL_PROTO_4(iemCImpl_load_CrX, uint8_t, iCrReg, uint64_t, uNewCrX, IEMACCESSCRX, enmAccessCrX, uint8_t, iGReg);
|
---|
4684 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Cd_Rd, uint8_t, iCrReg, uint8_t, iGReg);
|
---|
4685 | IEM_CIMPL_PROTO_2(iemCImpl_lmsw, uint16_t, u16NewMsw, RTGCPTR, GCPtrEffDst);
|
---|
4686 | IEM_CIMPL_PROTO_0(iemCImpl_clts);
|
---|
4687 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Dd, uint8_t, iGReg, uint8_t, iDrReg);
|
---|
4688 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Dd_Rd, uint8_t, iDrReg, uint8_t, iGReg);
|
---|
4689 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Td, uint8_t, iGReg, uint8_t, iTrReg);
|
---|
4690 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Td_Rd, uint8_t, iTrReg, uint8_t, iGReg);
|
---|
4691 | IEM_CIMPL_PROTO_1(iemCImpl_invlpg, RTGCPTR, GCPtrPage);
|
---|
4692 | IEM_CIMPL_PROTO_3(iemCImpl_invpcid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvpcidDesc, uint64_t, uInvpcidType);
|
---|
4693 | IEM_CIMPL_PROTO_0(iemCImpl_invd);
|
---|
4694 | IEM_CIMPL_PROTO_0(iemCImpl_wbinvd);
|
---|
4695 | IEM_CIMPL_PROTO_0(iemCImpl_rsm);
|
---|
4696 | IEM_CIMPL_PROTO_0(iemCImpl_rdtsc);
|
---|
4697 | IEM_CIMPL_PROTO_0(iemCImpl_rdtscp);
|
---|
4698 | IEM_CIMPL_PROTO_0(iemCImpl_rdpmc);
|
---|
4699 | IEM_CIMPL_PROTO_0(iemCImpl_rdmsr);
|
---|
4700 | IEM_CIMPL_PROTO_0(iemCImpl_wrmsr);
|
---|
4701 | IEM_CIMPL_PROTO_3(iemCImpl_in, uint16_t, u16Port, uint8_t, cbReg, uint8_t, bImmAndEffAddrMode);
|
---|
4702 | IEM_CIMPL_PROTO_2(iemCImpl_in_eAX_DX, uint8_t, cbReg, IEMMODE, enmEffAddrMode);
|
---|
4703 | IEM_CIMPL_PROTO_3(iemCImpl_out, uint16_t, u16Port, uint8_t, cbReg, uint8_t, bImmAndEffAddrMode);
|
---|
4704 | IEM_CIMPL_PROTO_2(iemCImpl_out_DX_eAX, uint8_t, cbReg, IEMMODE, enmEffAddrMode);
|
---|
4705 | IEM_CIMPL_PROTO_0(iemCImpl_cli);
|
---|
4706 | IEM_CIMPL_PROTO_0(iemCImpl_sti);
|
---|
4707 | IEM_CIMPL_PROTO_0(iemCImpl_hlt);
|
---|
4708 | IEM_CIMPL_PROTO_1(iemCImpl_monitor, uint8_t, iEffSeg);
|
---|
4709 | IEM_CIMPL_PROTO_0(iemCImpl_mwait);
|
---|
4710 | IEM_CIMPL_PROTO_0(iemCImpl_swapgs);
|
---|
4711 | IEM_CIMPL_PROTO_0(iemCImpl_cpuid);
|
---|
4712 | IEM_CIMPL_PROTO_1(iemCImpl_aad, uint8_t, bImm);
|
---|
4713 | IEM_CIMPL_PROTO_1(iemCImpl_aam, uint8_t, bImm);
|
---|
4714 | IEM_CIMPL_PROTO_0(iemCImpl_daa);
|
---|
4715 | IEM_CIMPL_PROTO_0(iemCImpl_das);
|
---|
4716 | IEM_CIMPL_PROTO_0(iemCImpl_aaa);
|
---|
4717 | IEM_CIMPL_PROTO_0(iemCImpl_aas);
|
---|
4718 | IEM_CIMPL_PROTO_3(iemCImpl_bound_16, int16_t, idxArray, int16_t, idxLowerBound, int16_t, idxUpperBound);
|
---|
4719 | IEM_CIMPL_PROTO_3(iemCImpl_bound_32, int32_t, idxArray, int32_t, idxLowerBound, int32_t, idxUpperBound);
|
---|
4720 | IEM_CIMPL_PROTO_0(iemCImpl_xgetbv);
|
---|
4721 | IEM_CIMPL_PROTO_0(iemCImpl_xsetbv);
|
---|
4722 | IEM_CIMPL_PROTO_4(iemCImpl_cmpxchg16b_fallback_rendezvous, PRTUINT128U, pu128Dst, PRTUINT128U, pu128RaxRdx,
|
---|
4723 | PRTUINT128U, pu128RbxRcx, uint32_t *, pEFlags);
|
---|
4724 | IEM_CIMPL_PROTO_2(iemCImpl_clflush_clflushopt, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4725 | IEM_CIMPL_PROTO_1(iemCImpl_finit, bool, fCheckXcpts);
|
---|
4726 | IEM_CIMPL_PROTO_3(iemCImpl_fxsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4727 | IEM_CIMPL_PROTO_3(iemCImpl_fxrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4728 | IEM_CIMPL_PROTO_3(iemCImpl_xsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4729 | IEM_CIMPL_PROTO_3(iemCImpl_xrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
---|
4730 | IEM_CIMPL_PROTO_2(iemCImpl_stmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4731 | IEM_CIMPL_PROTO_2(iemCImpl_vstmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4732 | IEM_CIMPL_PROTO_2(iemCImpl_ldmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
---|
4733 | IEM_CIMPL_PROTO_3(iemCImpl_fnstenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4734 | IEM_CIMPL_PROTO_3(iemCImpl_fnsave, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
---|
4735 | IEM_CIMPL_PROTO_3(iemCImpl_fldenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
---|
4736 | IEM_CIMPL_PROTO_3(iemCImpl_frstor, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
---|
4737 | IEM_CIMPL_PROTO_1(iemCImpl_fldcw, uint16_t, u16Fcw);
|
---|
4738 | IEM_CIMPL_PROTO_2(iemCImpl_fxch_underflow, uint8_t, iStReg, uint16_t, uFpuOpcode);
|
---|
4739 | IEM_CIMPL_PROTO_3(iemCImpl_fcomi_fucomi, uint8_t, iStReg, PFNIEMAIMPLFPUR80EFL, pfnAImpl, uint32_t, uPopAndFpuOpcode);
|
---|
4740 | /** @} */
|
---|
4741 |
|
---|
4742 | /** @name IEMAllCImplStrInstr.cpp.h
|
---|
4743 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/' -e 's/RT_CONCAT4(//' \
|
---|
4744 | * -e 's/,ADDR_SIZE)/64/g' -e 's/,OP_SIZE,/64/g' -e 's/,OP_rAX,/rax/g' IEMAllCImplStrInstr.cpp.h
|
---|
4745 | * @{ */
|
---|
4746 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr16, uint8_t, iEffSeg);
|
---|
4747 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr16, uint8_t, iEffSeg);
|
---|
4748 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m16);
|
---|
4749 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m16);
|
---|
4750 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr16, uint8_t, iEffSeg);
|
---|
4751 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m16);
|
---|
4752 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m16, int8_t, iEffSeg);
|
---|
4753 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr16, bool, fIoChecked);
|
---|
4754 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr16, bool, fIoChecked);
|
---|
4755 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4756 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4757 |
|
---|
4758 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr16, uint8_t, iEffSeg);
|
---|
4759 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr16, uint8_t, iEffSeg);
|
---|
4760 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m16);
|
---|
4761 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m16);
|
---|
4762 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr16, uint8_t, iEffSeg);
|
---|
4763 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m16);
|
---|
4764 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m16, int8_t, iEffSeg);
|
---|
4765 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr16, bool, fIoChecked);
|
---|
4766 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr16, bool, fIoChecked);
|
---|
4767 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4768 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4769 |
|
---|
4770 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr16, uint8_t, iEffSeg);
|
---|
4771 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr16, uint8_t, iEffSeg);
|
---|
4772 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m16);
|
---|
4773 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m16);
|
---|
4774 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr16, uint8_t, iEffSeg);
|
---|
4775 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m16);
|
---|
4776 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m16, int8_t, iEffSeg);
|
---|
4777 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr16, bool, fIoChecked);
|
---|
4778 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr16, bool, fIoChecked);
|
---|
4779 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4780 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4781 |
|
---|
4782 |
|
---|
4783 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr32, uint8_t, iEffSeg);
|
---|
4784 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr32, uint8_t, iEffSeg);
|
---|
4785 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m32);
|
---|
4786 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m32);
|
---|
4787 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr32, uint8_t, iEffSeg);
|
---|
4788 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m32);
|
---|
4789 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m32, int8_t, iEffSeg);
|
---|
4790 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr32, bool, fIoChecked);
|
---|
4791 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr32, bool, fIoChecked);
|
---|
4792 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4793 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4794 |
|
---|
4795 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr32, uint8_t, iEffSeg);
|
---|
4796 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr32, uint8_t, iEffSeg);
|
---|
4797 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m32);
|
---|
4798 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m32);
|
---|
4799 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr32, uint8_t, iEffSeg);
|
---|
4800 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m32);
|
---|
4801 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m32, int8_t, iEffSeg);
|
---|
4802 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr32, bool, fIoChecked);
|
---|
4803 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr32, bool, fIoChecked);
|
---|
4804 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4805 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4806 |
|
---|
4807 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr32, uint8_t, iEffSeg);
|
---|
4808 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr32, uint8_t, iEffSeg);
|
---|
4809 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m32);
|
---|
4810 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m32);
|
---|
4811 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr32, uint8_t, iEffSeg);
|
---|
4812 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m32);
|
---|
4813 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m32, int8_t, iEffSeg);
|
---|
4814 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr32, bool, fIoChecked);
|
---|
4815 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr32, bool, fIoChecked);
|
---|
4816 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4817 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4818 |
|
---|
4819 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr32, uint8_t, iEffSeg);
|
---|
4820 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr32, uint8_t, iEffSeg);
|
---|
4821 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m32);
|
---|
4822 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m32);
|
---|
4823 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr32, uint8_t, iEffSeg);
|
---|
4824 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m32);
|
---|
4825 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m32, int8_t, iEffSeg);
|
---|
4826 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr32, bool, fIoChecked);
|
---|
4827 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr32, bool, fIoChecked);
|
---|
4828 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4829 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4830 |
|
---|
4831 |
|
---|
4832 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr64, uint8_t, iEffSeg);
|
---|
4833 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr64, uint8_t, iEffSeg);
|
---|
4834 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m64);
|
---|
4835 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m64);
|
---|
4836 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr64, uint8_t, iEffSeg);
|
---|
4837 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m64);
|
---|
4838 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m64, int8_t, iEffSeg);
|
---|
4839 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr64, bool, fIoChecked);
|
---|
4840 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr64, bool, fIoChecked);
|
---|
4841 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4842 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4843 |
|
---|
4844 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr64, uint8_t, iEffSeg);
|
---|
4845 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr64, uint8_t, iEffSeg);
|
---|
4846 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m64);
|
---|
4847 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m64);
|
---|
4848 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr64, uint8_t, iEffSeg);
|
---|
4849 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m64);
|
---|
4850 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m64, int8_t, iEffSeg);
|
---|
4851 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr64, bool, fIoChecked);
|
---|
4852 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr64, bool, fIoChecked);
|
---|
4853 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4854 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4855 |
|
---|
4856 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr64, uint8_t, iEffSeg);
|
---|
4857 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr64, uint8_t, iEffSeg);
|
---|
4858 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m64);
|
---|
4859 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m64);
|
---|
4860 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr64, uint8_t, iEffSeg);
|
---|
4861 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m64);
|
---|
4862 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m64, int8_t, iEffSeg);
|
---|
4863 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr64, bool, fIoChecked);
|
---|
4864 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr64, bool, fIoChecked);
|
---|
4865 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4866 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4867 |
|
---|
4868 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr64, uint8_t, iEffSeg);
|
---|
4869 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr64, uint8_t, iEffSeg);
|
---|
4870 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m64);
|
---|
4871 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m64);
|
---|
4872 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr64, uint8_t, iEffSeg);
|
---|
4873 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m64);
|
---|
4874 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m64, int8_t, iEffSeg);
|
---|
4875 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr64, bool, fIoChecked);
|
---|
4876 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr64, bool, fIoChecked);
|
---|
4877 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4878 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
---|
4879 | /** @} */
|
---|
4880 |
|
---|
4881 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
---|
4882 | VBOXSTRICTRC iemVmxVmexit(PVMCPUCC pVCpu, uint32_t uExitReason, uint64_t u64ExitQual) RT_NOEXCEPT;
|
---|
4883 | VBOXSTRICTRC iemVmxVmexitInstr(PVMCPUCC pVCpu, uint32_t uExitReason, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4884 | VBOXSTRICTRC iemVmxVmexitInstrNeedsInfo(PVMCPUCC pVCpu, uint32_t uExitReason, VMXINSTRID uInstrId, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4885 | VBOXSTRICTRC iemVmxVmexitTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, RTSEL SelNewTss, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4886 | VBOXSTRICTRC iemVmxVmexitEvent(PVMCPUCC pVCpu, uint8_t uVector, uint32_t fFlags, uint32_t uErrCode, uint64_t uCr2, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4887 | VBOXSTRICTRC iemVmxVmexitEventDoubleFault(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4888 | VBOXSTRICTRC iemVmxVmexitEpt(PVMCPUCC pVCpu, PPGMPTWALK pWalk, uint32_t fAccess, uint32_t fSlatFail, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4889 | VBOXSTRICTRC iemVmxVmexitPreemptTimer(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4890 | VBOXSTRICTRC iemVmxVmexitInstrMwait(PVMCPUCC pVCpu, bool fMonitorHwArmed, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4891 | VBOXSTRICTRC iemVmxVmexitInstrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port,
|
---|
4892 | bool fImm, uint8_t cbAccess, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4893 | VBOXSTRICTRC iemVmxVmexitInstrStrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port, uint8_t cbAccess,
|
---|
4894 | bool fRep, VMXEXITINSTRINFO ExitInstrInfo, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4895 | VBOXSTRICTRC iemVmxVmexitInstrMovDrX(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint8_t iDrReg, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4896 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4897 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4898 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr3(PVMCPUCC pVCpu, uint64_t uNewCr3, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4899 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr3(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4900 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr0Cr4(PVMCPUCC pVCpu, uint8_t iCrReg, uint64_t *puNewCrX, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4901 | VBOXSTRICTRC iemVmxVmexitInstrClts(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4902 | VBOXSTRICTRC iemVmxVmexitInstrLmsw(PVMCPUCC pVCpu, uint32_t uGuestCr0, uint16_t *pu16NewMsw,
|
---|
4903 | RTGCPTR GCPtrEffDst, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4904 | VBOXSTRICTRC iemVmxVmexitInstrInvlpg(PVMCPUCC pVCpu, RTGCPTR GCPtrPage, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4905 | VBOXSTRICTRC iemVmxApicWriteEmulation(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
---|
4906 | VBOXSTRICTRC iemVmxVirtApicAccessUnused(PVMCPUCC pVCpu, PRTGCPHYS pGCPhysAccess, size_t cbAccess, uint32_t fAccess) RT_NOEXCEPT;
|
---|
4907 | uint32_t iemVmxVirtApicReadRaw32(PVMCPUCC pVCpu, uint16_t offReg) RT_NOEXCEPT;
|
---|
4908 | void iemVmxVirtApicWriteRaw32(PVMCPUCC pVCpu, uint16_t offReg, uint32_t uReg) RT_NOEXCEPT;
|
---|
4909 | VBOXSTRICTRC iemVmxInvvpid(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t iEffSeg, RTGCPTR GCPtrInvvpidDesc,
|
---|
4910 | uint64_t u64InvvpidType, PCVMXVEXITINFO pExitInfo) RT_NOEXCEPT;
|
---|
4911 | bool iemVmxIsRdmsrWrmsrInterceptSet(PCVMCPU pVCpu, uint32_t uExitReason, uint32_t idMsr) RT_NOEXCEPT;
|
---|
4912 | IEM_CIMPL_PROTO_0(iemCImpl_vmxoff);
|
---|
4913 | IEM_CIMPL_PROTO_2(iemCImpl_vmxon, uint8_t, iEffSeg, RTGCPTR, GCPtrVmxon);
|
---|
4914 | IEM_CIMPL_PROTO_0(iemCImpl_vmlaunch);
|
---|
4915 | IEM_CIMPL_PROTO_0(iemCImpl_vmresume);
|
---|
4916 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrld, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4917 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrst, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4918 | IEM_CIMPL_PROTO_2(iemCImpl_vmclear, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
---|
4919 | IEM_CIMPL_PROTO_2(iemCImpl_vmwrite_reg, uint64_t, u64Val, uint64_t, u64VmcsField);
|
---|
4920 | IEM_CIMPL_PROTO_3(iemCImpl_vmwrite_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrVal, uint32_t, u64VmcsField);
|
---|
4921 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg64, uint64_t *, pu64Dst, uint64_t, u64VmcsField);
|
---|
4922 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg32, uint64_t *, pu32Dst, uint32_t, u32VmcsField);
|
---|
4923 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg64, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u64VmcsField);
|
---|
4924 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg32, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u32VmcsField);
|
---|
4925 | IEM_CIMPL_PROTO_3(iemCImpl_invvpid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvvpidDesc, uint64_t, uInvvpidType);
|
---|
4926 | IEM_CIMPL_PROTO_3(iemCImpl_invept, uint8_t, iEffSeg, RTGCPTR, GCPtrInveptDesc, uint64_t, uInveptType);
|
---|
4927 | IEM_CIMPL_PROTO_0(iemCImpl_vmx_pause);
|
---|
4928 | #endif
|
---|
4929 |
|
---|
4930 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
---|
4931 | VBOXSTRICTRC iemSvmVmexit(PVMCPUCC pVCpu, uint64_t uExitCode, uint64_t uExitInfo1, uint64_t uExitInfo2) RT_NOEXCEPT;
|
---|
4932 | VBOXSTRICTRC iemHandleSvmEventIntercept(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector, uint32_t fFlags, uint32_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
---|
4933 | VBOXSTRICTRC iemSvmHandleIOIntercept(PVMCPUCC pVCpu, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg,
|
---|
4934 | uint8_t cAddrSizeBits, uint8_t iEffSeg, bool fRep, bool fStrIo, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4935 | VBOXSTRICTRC iemSvmHandleMsrIntercept(PVMCPUCC pVCpu, uint32_t idMsr, bool fWrite, uint8_t cbInstr) RT_NOEXCEPT;
|
---|
4936 | IEM_CIMPL_PROTO_0(iemCImpl_vmrun);
|
---|
4937 | IEM_CIMPL_PROTO_0(iemCImpl_vmload);
|
---|
4938 | IEM_CIMPL_PROTO_0(iemCImpl_vmsave);
|
---|
4939 | IEM_CIMPL_PROTO_0(iemCImpl_clgi);
|
---|
4940 | IEM_CIMPL_PROTO_0(iemCImpl_stgi);
|
---|
4941 | IEM_CIMPL_PROTO_0(iemCImpl_invlpga);
|
---|
4942 | IEM_CIMPL_PROTO_0(iemCImpl_skinit);
|
---|
4943 | IEM_CIMPL_PROTO_0(iemCImpl_svm_pause);
|
---|
4944 | #endif
|
---|
4945 |
|
---|
4946 | IEM_CIMPL_PROTO_0(iemCImpl_vmcall); /* vmx */
|
---|
4947 | IEM_CIMPL_PROTO_0(iemCImpl_vmmcall); /* svm */
|
---|
4948 | IEM_CIMPL_PROTO_1(iemCImpl_Hypercall, uint16_t, uDisOpcode); /* both */
|
---|
4949 |
|
---|
4950 | extern const PFNIEMOP g_apfnIemInterpretOnlyOneByteMap[256];
|
---|
4951 | extern const PFNIEMOP g_apfnIemInterpretOnlyTwoByteMap[1024];
|
---|
4952 | extern const PFNIEMOP g_apfnIemInterpretOnlyThreeByte0f3a[1024];
|
---|
4953 | extern const PFNIEMOP g_apfnIemInterpretOnlyThreeByte0f38[1024];
|
---|
4954 | extern const PFNIEMOP g_apfnIemInterpretOnlyVecMap1[1024];
|
---|
4955 | extern const PFNIEMOP g_apfnIemInterpretOnlyVecMap2[1024];
|
---|
4956 | extern const PFNIEMOP g_apfnIemInterpretOnlyVecMap3[1024];
|
---|
4957 |
|
---|
4958 | /*
|
---|
4959 | * Recompiler related stuff.
|
---|
4960 | */
|
---|
4961 | extern const PFNIEMOP g_apfnIemThreadedRecompilerOneByteMap[256];
|
---|
4962 | extern const PFNIEMOP g_apfnIemThreadedRecompilerTwoByteMap[1024];
|
---|
4963 | extern const PFNIEMOP g_apfnIemThreadedRecompilerThreeByte0f3a[1024];
|
---|
4964 | extern const PFNIEMOP g_apfnIemThreadedRecompilerThreeByte0f38[1024];
|
---|
4965 | extern const PFNIEMOP g_apfnIemThreadedRecompilerVecMap1[1024];
|
---|
4966 | extern const PFNIEMOP g_apfnIemThreadedRecompilerVecMap2[1024];
|
---|
4967 | extern const PFNIEMOP g_apfnIemThreadedRecompilerVecMap3[1024];
|
---|
4968 |
|
---|
4969 | void iemThreadedTbObsolete(PVMCPUCC pVCpu, PIEMTB pTb);
|
---|
4970 |
|
---|
4971 | /** @todo FNIEMTHREADEDFUNC and friends may need more work... */
|
---|
4972 | #if defined(__GNUC__) && !defined(IEM_WITH_THROW_CATCH)
|
---|
4973 | typedef VBOXSTRICTRC __attribute__((__nothrow__)) FNIEMRECOMP(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2);
|
---|
4974 | typedef FNIEMTHREADEDFUNC *PFNIEMTHREADEDFUNC;
|
---|
4975 | # define IEM_DECL_IEMTHREADEDFUNC_DEF(a_Name) \
|
---|
4976 | VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2)
|
---|
4977 | # define IEM_DECL_IEMTHREADEDFUNC_PROTO(a_Name) \
|
---|
4978 | VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2)
|
---|
4979 |
|
---|
4980 | #else
|
---|
4981 | typedef VBOXSTRICTRC (FNIEMTHREADEDFUNC)(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2);
|
---|
4982 | typedef FNIEMTHREADEDFUNC *PFNIEMTHREADEDFUNC;
|
---|
4983 | # define IEM_DECL_IEMTHREADEDFUNC_DEF(a_Name) \
|
---|
4984 | VBOXSTRICTRC a_Name(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
4985 | # define IEM_DECL_IEMTHREADEDFUNC_PROTO(a_Name) \
|
---|
4986 | VBOXSTRICTRC a_Name(PVMCPU pVCpu, uint64_t uParam0, uint64_t uParam1, uint64_t uParam2) IEM_NOEXCEPT_MAY_LONGJMP
|
---|
4987 | #endif
|
---|
4988 |
|
---|
4989 |
|
---|
4990 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_DeferToCImpl0);
|
---|
4991 |
|
---|
4992 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckMode);
|
---|
4993 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLim);
|
---|
4994 |
|
---|
4995 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndOpcodes);
|
---|
4996 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckOpcodes);
|
---|
4997 |
|
---|
4998 | /* Branching: */
|
---|
4999 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndPcAndOpcodes);
|
---|
5000 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckPcAndOpcodes);
|
---|
5001 |
|
---|
5002 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndOpcodesLoadingTlb);
|
---|
5003 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckOpcodesLoadingTlb);
|
---|
5004 |
|
---|
5005 | /* Natural page crossing: */
|
---|
5006 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndOpcodesAcrossPageLoadingTlb);
|
---|
5007 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckOpcodesAcrossPageLoadingTlb);
|
---|
5008 |
|
---|
5009 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndOpcodesOnNextPageLoadingTlb);
|
---|
5010 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckOpcodesOnNextPageLoadingTlb);
|
---|
5011 |
|
---|
5012 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckCsLimAndOpcodesOnNewPageLoadingTlb);
|
---|
5013 | IEM_DECL_IEMTHREADEDFUNC_PROTO(iemThreadedFunc_BltIn_CheckOpcodesOnNewPageLoadingTlb);
|
---|
5014 |
|
---|
5015 | bool iemThreadedCompileBeginEmitCallsComplications(PVMCPUCC pVCpu, PIEMTB pTb);
|
---|
5016 |
|
---|
5017 |
|
---|
5018 | /** @} */
|
---|
5019 |
|
---|
5020 | RT_C_DECLS_END
|
---|
5021 |
|
---|
5022 | #endif /* !VMM_INCLUDED_SRC_include_IEMInternal_h */
|
---|
5023 |
|
---|