IEMInternal.h@ 40077

Last change on this file since 40077 was 40077, checked in by vboxsync, 13 years ago
Implemented fld, currently sans #D exceptions.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 40.2 KB

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1	/* $Id: IEMInternal.h 40077 2012-02-11 02:49:12Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* A FPU result.
74	*/
75	typedef struct IEMFPURESULT
76	{
77	/** The output value. */
78	RTFLOAT80U r80Result;
79	/** The output status. */
80	uint16_t FSW;
81	} IEMFPURESULT;
82	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
83	/** Pointer to a FPU result. */
84	typedef IEMFPURESULT *PIEMFPURESULT;
85	/** Pointer to a const FPU result. */
86	typedef IEMFPURESULT const *PCIEMFPURESULT;
87
88
89	#ifdef IEM_VERIFICATION_MODE
90
91	/**
92	* Verification event type.
93	*/
94	typedef enum IEMVERIFYEVENT
95	{
96	IEMVERIFYEVENT_INVALID = 0,
97	IEMVERIFYEVENT_IOPORT_READ,
98	IEMVERIFYEVENT_IOPORT_WRITE,
99	IEMVERIFYEVENT_RAM_WRITE,
100	IEMVERIFYEVENT_RAM_READ
101	} IEMVERIFYEVENT;
102
103	/** Checks if the event type is a RAM read or write. */
104	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
105
106	/**
107	* Verification event record.
108	*/
109	typedef struct IEMVERIFYEVTREC
110	{
111	/** Pointer to the next record in the list. */
112	struct IEMVERIFYEVTREC *pNext;
113	/** The event type. */
114	IEMVERIFYEVENT enmEvent;
115	/** The event data. */
116	union
117	{
118	/** IEMVERIFYEVENT_IOPORT_READ */
119	struct
120	{
121	RTIOPORT Port;
122	uint32_t cbValue;
123	} IOPortRead;
124
125	/** IEMVERIFYEVENT_IOPORT_WRITE */
126	struct
127	{
128	RTIOPORT Port;
129	uint32_t cbValue;
130	uint32_t u32Value;
131	} IOPortWrite;
132
133	/** IEMVERIFYEVENT_RAM_READ */
134	struct
135	{
136	RTGCPHYS GCPhys;
137	uint32_t cb;
138	} RamRead;
139
140	/** IEMVERIFYEVENT_RAM_WRITE */
141	struct
142	{
143	RTGCPHYS GCPhys;
144	uint32_t cb;
145	uint8_t ab[32];
146	} RamWrite;
147	} u;
148	} IEMVERIFYEVTREC;
149	/** Pointer to an IEM event verification records. */
150	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
151
152	#endif /* IEM_VERIFICATION_MODE */
153
154
155	/**
156	* The per-CPU IEM state.
157	*/
158	typedef struct IEMCPU
159	{
160	/** Pointer to the CPU context - ring-3 contex. */
161	R3PTRTYPE(PCPUMCTX) pCtxR3;
162	/** Pointer to the CPU context - ring-0 contex. */
163	R0PTRTYPE(PCPUMCTX) pCtxR0;
164	/** Pointer to the CPU context - raw-mode contex. */
165	RCPTRTYPE(PCPUMCTX) pCtxRC;
166
167	/** Offset of the VMCPU structure relative to this structure (negative). */
168	int32_t offVMCpu;
169	/** Offset of the VM structure relative to this structure (negative). */
170	int32_t offVM;
171
172	/** Whether to bypass access handlers or not. */
173	bool fByPassHandlers;
174	/** Explicit alignment padding. */
175	bool afAlignment0[3];
176
177	/** The flags of the current exception / interrupt. */
178	uint32_t fCurXcpt;
179	/** The current exception / interrupt. */
180	uint8_t uCurXcpt;
181	/** Exception / interrupt recursion depth. */
182	int8_t cXcptRecursions;
183	/** Explicit alignment padding. */
184	bool afAlignment1[5];
185	/** The CPL. */
186	uint8_t uCpl;
187	/** The current CPU execution mode (CS). */
188	IEMMODE enmCpuMode;
189
190	/** @name Statistics
191	* @{ */
192	/** The number of instructions we've executed. */
193	uint32_t cInstructions;
194	/** The number of potential exits. */
195	uint32_t cPotentialExits;
196	#ifdef IEM_VERIFICATION_MODE
197	/** The Number of I/O port reads that has been performed. */
198	uint32_t cIOReads;
199	/** The Number of I/O port writes that has been performed. */
200	uint32_t cIOWrites;
201	/** Set if no comparison to REM is currently performed.
202	* This is used to skip past really slow bits. */
203	bool fNoRem;
204	/** Indicates that RAX and RDX differences should be ignored since RDTSC
205	* and RDTSCP are timing sensitive. */
206	bool fIgnoreRaxRdx;
207	bool afAlignment2[2];
208	/** Mask of undefined eflags.
209	* The verifier will any difference in these flags. */
210	uint32_t fUndefinedEFlags;
211	/** The physical address corresponding to abOpcodes[0]. */
212	RTGCPHYS GCPhysOpcodes;
213	#endif
214	/** @} */
215
216	/** @name Decoder state.
217	* @{ */
218
219	/** The default addressing mode . */
220	IEMMODE enmDefAddrMode;
221	/** The effective addressing mode . */
222	IEMMODE enmEffAddrMode;
223	/** The default operand mode . */
224	IEMMODE enmDefOpSize;
225	/** The effective operand mode . */
226	IEMMODE enmEffOpSize;
227
228	/** The prefix mask (IEM_OP_PRF_XXX). */
229	uint32_t fPrefixes;
230	/** The extra REX ModR/M register field bit (REX.R << 3). */
231	uint8_t uRexReg;
232	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
233	* (REX.B << 3). */
234	uint8_t uRexB;
235	/** The extra REX SIB index field bit (REX.X << 3). */
236	uint8_t uRexIndex;
237	/** The effective segment register (X86_SREG_XXX). */
238	uint8_t iEffSeg;
239
240	/** The current offset into abOpcodes. */
241	uint8_t offOpcode;
242	/** The size of what has currently been fetched into abOpcodes. */
243	uint8_t cbOpcode;
244	/** The opcode bytes. */
245	uint8_t abOpcode[15];
246
247	/** @}*/
248
249	/** Alignment padding for aMemMappings. */
250	uint8_t abAlignment2[5];
251
252	/** The number of active guest memory mappings. */
253	uint8_t cActiveMappings;
254	/** The next unused mapping index. */
255	uint8_t iNextMapping;
256	/** Records for tracking guest memory mappings. */
257	struct
258	{
259	/** The address of the mapped bytes. */
260	void *pv;
261	#if defined(IN_RC) && HC_ARCH_BITS == 64
262	uint32_t u32Alignment3; /*< Alignment padding. /
263	#endif
264	/** The access flags (IEM_ACCESS_XXX).
265	* IEM_ACCESS_INVALID if the entry is unused. */
266	uint32_t fAccess;
267	#if HC_ARCH_BITS == 64
268	uint32_t u32Alignment4; /*< Alignment padding. /
269	#endif
270	} aMemMappings[3];
271
272	/** Bounce buffer info.
273	* This runs in parallel to aMemMappings. */
274	struct
275	{
276	/** The physical address of the first byte. */
277	RTGCPHYS GCPhysFirst;
278	/** The physical address of the second page. */
279	RTGCPHYS GCPhysSecond;
280	/** The number of bytes in the first page. */
281	uint16_t cbFirst;
282	/** The number of bytes in the second page. */
283	uint16_t cbSecond;
284	/** Whether it's unassigned memory. */
285	bool fUnassigned;
286	/** Explicit alignment padding. */
287	bool afAlignment5[3];
288	} aMemBbMappings[3];
289
290	/** Bounce buffer storage.
291	* This runs in parallel to aMemMappings and aMemBbMappings. */
292	struct
293	{
294	uint8_t ab[512];
295	} aBounceBuffers[3];
296
297	#ifdef IEM_VERIFICATION_MODE
298	/** The event verification records for what IEM did (LIFO). */
299	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
300	/** Insertion point for pIemEvtRecHead. */
301	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
302	/** The event verification records for what the other party did (FIFO). */
303	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
304	/** Insertion point for pOtherEvtRecHead. */
305	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
306	/** List of free event records. */
307	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
308	#endif
309	} IEMCPU;
310	/** Pointer to the per-CPU IEM state. */
311	typedef IEMCPU *PIEMCPU;
312
313	/** Converts a IEMCPU pointer to a VMCPU pointer.
314	* @returns VMCPU pointer.
315	* @param a_pIemCpu The IEM per CPU instance data.
316	*/
317	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
318
319	/** Converts a IEMCPU pointer to a VM pointer.
320	* @returns VM pointer.
321	* @param a_pIemCpu The IEM per CPU instance data.
322	*/
323	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
324
325	/** @name IEM_ACCESS_XXX - Access details.
326	* @{ */
327	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
328	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
329	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
330	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
331	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
332	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
333	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
334	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
335	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
336	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
337	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
338	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000100)
339	/** Read+write data alias. */
340	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
341	/** Write data alias. */
342	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
343	/** Read data alias. */
344	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
345	/** Instruction fetch alias. */
346	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
347	/** Stack write alias. */
348	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
349	/** Stack read alias. */
350	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
351	/** Stack read+write alias. */
352	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
353	/** Read system table alias. */
354	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
355	/** Read+write system table alias. */
356	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
357	/** @} */
358
359	/** @name Prefix constants (IEMCPU::fPrefixes)
360	* @{ */
361	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
362	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
363	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
364	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
365	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
366	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
367	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
368
369	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
370	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
371	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
372
373	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
374	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
375	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
376
377	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
378	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
379	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
380	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
381	/** @} */
382
383	/**
384	* Tests if verification mode is enabled.
385	*
386	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
387	* should therefore cause the compiler to eliminate the verification branch
388	* of an if statement. */
389	#ifdef IEM_VERIFICATION_MODE
390	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
391	#else
392	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
393	#endif
394
395	/**
396	* Indicates to the verifier that the given flag set is undefined.
397	*
398	* Can be invoked again to add more flags.
399	*
400	* This is a NOOP if the verifier isn't compiled in.
401	*/
402	#ifdef IEM_VERIFICATION_MODE
403	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
404	#else
405	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
406	#endif
407
408
409	/** @def IEM_DECL_IMPL_TYPE
410	* For typedef'ing an instruction implementation function.
411	*
412	* @param a_RetType The return type.
413	* @param a_Name The name of the type.
414	* @param a_ArgList The argument list enclosed in parentheses.
415	*/
416
417	/** @def IEM_DECL_IMPL_DEF
418	* For defining an instruction implementation function.
419	*
420	* @param a_RetType The return type.
421	* @param a_Name The name of the type.
422	* @param a_ArgList The argument list enclosed in parentheses.
423	*/
424
425	#if defined(__GNUC__) && defined(RT_ARCH_X86)
426	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
427	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
428	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
429	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
430
431	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
432	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
433	a_RetType (__fastcall a_Name) a_ArgList
434	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
435	a_RetType __fastcall a_Name a_ArgList
436
437	#else
438	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
439	a_RetType (VBOXCALL a_Name) a_ArgList
440	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
441	a_RetType VBOXCALL a_Name a_ArgList
442
443	#endif
444
445	/** @name Arithmetic assignment operations on bytes (binary).
446	* @{ */
447	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
448	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
449	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
450	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
451	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
452	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
453	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
454	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
455	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
456	/** @} */
457
458	/** @name Arithmetic assignment operations on words (binary).
459	* @{ */
460	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
461	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
462	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
463	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
464	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
465	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
466	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
467	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
468	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
469	/** @} */
470
471	/** @name Arithmetic assignment operations on double words (binary).
472	* @{ */
473	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
474	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
475	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
476	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
477	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
478	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
479	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
480	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
481	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
482	/** @} */
483
484	/** @name Arithmetic assignment operations on quad words (binary).
485	* @{ */
486	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
487	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
488	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
489	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
490	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
491	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
492	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
493	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
494	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
495	/** @} */
496
497	/** @name Compare operations (thrown in with the binary ops).
498	* @{ */
499	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
500	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
501	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
502	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
503	/** @} */
504
505	/** @name Test operations (thrown in with the binary ops).
506	* @{ */
507	FNIEMAIMPLBINU8 iemAImpl_test_u8;
508	FNIEMAIMPLBINU16 iemAImpl_test_u16;
509	FNIEMAIMPLBINU32 iemAImpl_test_u32;
510	FNIEMAIMPLBINU64 iemAImpl_test_u64;
511	/** @} */
512
513	/** @name Bit operations operations (thrown in with the binary ops).
514	* @{ */
515	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
516	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
517	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
518	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
519	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
520	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
521	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
522	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
523	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
524	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
525	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
526	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
527	/** @} */
528
529	/** @name Exchange memory with register operations.
530	* @{ */
531	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
532	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
533	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
534	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
535	/** @} */
536
537	/** @name Exchange and add operations.
538	* @{ */
539	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
540	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
541	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
542	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
543	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
544	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
545	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
546	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
547	/** @} */
548
549	/** @name Double precision shifts
550	* @{ */
551	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
552	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
553	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
554	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
555	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
556	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
557	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
558	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
559	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
560	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
561	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
562	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
563	/** @} */
564
565
566	/** @name Bit search operations (thrown in with the binary ops).
567	* @{ */
568	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
569	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
570	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
571	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
572	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
573	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
574	/** @} */
575
576	/** @name Signed multiplication operations (thrown in with the binary ops).
577	* @{ */
578	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
579	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
580	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
581	/** @} */
582
583	/** @name Arithmetic assignment operations on bytes (unary).
584	* @{ */
585	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
586	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
587	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
588	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
589	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
590	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
591	/** @} */
592
593	/** @name Arithmetic assignment operations on words (unary).
594	* @{ */
595	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
596	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
597	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
598	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
599	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
600	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
601	/** @} */
602
603	/** @name Arithmetic assignment operations on double words (unary).
604	* @{ */
605	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
606	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
607	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
608	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
609	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
610	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
611	/** @} */
612
613	/** @name Arithmetic assignment operations on quad words (unary).
614	* @{ */
615	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
616	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
617	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
618	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
619	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
620	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
621	/** @} */
622
623
624	/** @name Shift operations on bytes (Group 2).
625	* @{ */
626	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
627	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
628	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
629	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
630	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
631	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
632	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
633	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
634	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
635	/** @} */
636
637	/** @name Shift operations on words (Group 2).
638	* @{ */
639	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
640	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
641	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
642	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
643	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
644	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
645	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
646	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
647	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
648	/** @} */
649
650	/** @name Shift operations on double words (Group 2).
651	* @{ */
652	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
653	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
654	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
655	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
656	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
657	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
658	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
659	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
660	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
661	/** @} */
662
663	/** @name Shift operations on words (Group 2).
664	* @{ */
665	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
666	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
667	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
668	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
669	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
670	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
671	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
672	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
673	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
674	/** @} */
675
676	/** @name Multiplication and division operations.
677	* @{ */
678	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
679	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
680	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
681	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
682
683	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
684	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
685	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
686	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
687
688	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
689	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
690	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
691	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
692
693	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
694	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
695	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
696	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
697	/** @} */
698
699	/** @name Byte Swap.
700	* @{ */
701	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
702	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
703	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
704	/** @} */
705
706
707	/** @name FPU operations taking a 32-bit float argument
708	* @{ */
709	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, RTFLOAT32U r32Val));
710	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
711	FNIEMAIMPLFPUR32 iemAImpl_fpu_r32_to_r80;
712	/** @} */
713
714
715	/** @name Function tables.
716	* @{
717	*/
718
719	/**
720	* Function table for a binary operator providing implementation based on
721	* operand size.
722	*/
723	typedef struct IEMOPBINSIZES
724	{
725	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
726	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
727	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
728	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
729	} IEMOPBINSIZES;
730	/** Pointer to a binary operator function table. */
731	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
732
733
734	/**
735	* Function table for a unary operator providing implementation based on
736	* operand size.
737	*/
738	typedef struct IEMOPUNARYSIZES
739	{
740	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
741	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
742	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
743	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
744	} IEMOPUNARYSIZES;
745	/** Pointer to a unary operator function table. */
746	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
747
748
749	/**
750	* Function table for a shift operator providing implementation based on
751	* operand size.
752	*/
753	typedef struct IEMOPSHIFTSIZES
754	{
755	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
756	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
757	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
758	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
759	} IEMOPSHIFTSIZES;
760	/** Pointer to a shift operator function table. */
761	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
762
763
764	/**
765	* Function table for a multiplication or division operation.
766	*/
767	typedef struct IEMOPMULDIVSIZES
768	{
769	PFNIEMAIMPLMULDIVU8 pfnU8;
770	PFNIEMAIMPLMULDIVU16 pfnU16;
771	PFNIEMAIMPLMULDIVU32 pfnU32;
772	PFNIEMAIMPLMULDIVU64 pfnU64;
773	} IEMOPMULDIVSIZES;
774	/** Pointer to a multiplication or division operation function table. */
775	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
776
777
778	/**
779	* Function table for a double precision shift operator providing implementation
780	* based on operand size.
781	*/
782	typedef struct IEMOPSHIFTDBLSIZES
783	{
784	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
785	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
786	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
787	} IEMOPSHIFTDBLSIZES;
788	/** Pointer to a double precision shift function table. */
789	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
790
791
792	/** @} */
793
794
795	/** @name C instruction implementations for anything slightly complicated.
796	* @{ */
797
798	/**
799	* For typedef'ing or declaring a C instruction implementation function taking
800	* no extra arguments.
801	*
802	* @param a_Name The name of the type.
803	*/
804	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
805	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
806	/**
807	* For defining a C instruction implementation function taking no extra
808	* arguments.
809	*
810	* @param a_Name The name of the function
811	*/
812	# define IEM_CIMPL_DEF_0(a_Name) \
813	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
814	/**
815	* For calling a C instruction implementation function taking no extra
816	* arguments.
817	*
818	* This special call macro adds default arguments to the call and allow us to
819	* change these later.
820	*
821	* @param a_fn The name of the function.
822	*/
823	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
824
825	/**
826	* For typedef'ing or declaring a C instruction implementation function taking
827	* one extra argument.
828	*
829	* @param a_Name The name of the type.
830	* @param a_Type0 The argument type.
831	* @param a_Arg0 The argument name.
832	*/
833	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
834	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
835	/**
836	* For defining a C instruction implementation function taking one extra
837	* argument.
838	*
839	* @param a_Name The name of the function
840	* @param a_Type0 The argument type.
841	* @param a_Arg0 The argument name.
842	*/
843	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
844	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
845	/**
846	* For calling a C instruction implementation function taking one extra
847	* argument.
848	*
849	* This special call macro adds default arguments to the call and allow us to
850	* change these later.
851	*
852	* @param a_fn The name of the function.
853	* @param a0 The name of the 1st argument.
854	*/
855	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
856
857	/**
858	* For typedef'ing or declaring a C instruction implementation function taking
859	* two extra arguments.
860	*
861	* @param a_Name The name of the type.
862	* @param a_Type0 The type of the 1st argument
863	* @param a_Arg0 The name of the 1st argument.
864	* @param a_Type1 The type of the 2nd argument.
865	* @param a_Arg1 The name of the 2nd argument.
866	*/
867	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
868	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
869	/**
870	* For defining a C instruction implementation function taking two extra
871	* arguments.
872	*
873	* @param a_Name The name of the function.
874	* @param a_Type0 The type of the 1st argument
875	* @param a_Arg0 The name of the 1st argument.
876	* @param a_Type1 The type of the 2nd argument.
877	* @param a_Arg1 The name of the 2nd argument.
878	*/
879	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
880	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
881	/**
882	* For calling a C instruction implementation function taking two extra
883	* arguments.
884	*
885	* This special call macro adds default arguments to the call and allow us to
886	* change these later.
887	*
888	* @param a_fn The name of the function.
889	* @param a0 The name of the 1st argument.
890	* @param a1 The name of the 2nd argument.
891	*/
892	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
893
894	/**
895	* For typedef'ing or declaring a C instruction implementation function taking
896	* three extra arguments.
897	*
898	* @param a_Name The name of the type.
899	* @param a_Type0 The type of the 1st argument
900	* @param a_Arg0 The name of the 1st argument.
901	* @param a_Type1 The type of the 2nd argument.
902	* @param a_Arg1 The name of the 2nd argument.
903	* @param a_Type2 The type of the 3rd argument.
904	* @param a_Arg2 The name of the 3rd argument.
905	*/
906	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
907	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
908	/**
909	* For defining a C instruction implementation function taking three extra
910	* arguments.
911	*
912	* @param a_Name The name of the function.
913	* @param a_Type0 The type of the 1st argument
914	* @param a_Arg0 The name of the 1st argument.
915	* @param a_Type1 The type of the 2nd argument.
916	* @param a_Arg1 The name of the 2nd argument.
917	* @param a_Type2 The type of the 3rd argument.
918	* @param a_Arg2 The name of the 3rd argument.
919	*/
920	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
921	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
922	/**
923	* For calling a C instruction implementation function taking three extra
924	* arguments.
925	*
926	* This special call macro adds default arguments to the call and allow us to
927	* change these later.
928	*
929	* @param a_fn The name of the function.
930	* @param a0 The name of the 1st argument.
931	* @param a1 The name of the 2nd argument.
932	* @param a2 The name of the 3rd argument.
933	*/
934	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
935
936
937	/**
938	* For typedef'ing or declaring a C instruction implementation function taking
939	* four extra arguments.
940	*
941	* @param a_Name The name of the type.
942	* @param a_Type0 The type of the 1st argument
943	* @param a_Arg0 The name of the 1st argument.
944	* @param a_Type1 The type of the 2nd argument.
945	* @param a_Arg1 The name of the 2nd argument.
946	* @param a_Type2 The type of the 3rd argument.
947	* @param a_Arg2 The name of the 3rd argument.
948	* @param a_Type3 The type of the 4th argument.
949	* @param a_Arg3 The name of the 4th argument.
950	*/
951	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
952	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
953	/**
954	* For defining a C instruction implementation function taking four extra
955	* arguments.
956	*
957	* @param a_Name The name of the function.
958	* @param a_Type0 The type of the 1st argument
959	* @param a_Arg0 The name of the 1st argument.
960	* @param a_Type1 The type of the 2nd argument.
961	* @param a_Arg1 The name of the 2nd argument.
962	* @param a_Type2 The type of the 3rd argument.
963	* @param a_Arg2 The name of the 3rd argument.
964	* @param a_Type3 The type of the 4th argument.
965	* @param a_Arg3 The name of the 4th argument.
966	*/
967	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, aArg3) \
968	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
969	/**
970	* For calling a C instruction implementation function taking four extra
971	* arguments.
972	*
973	* This special call macro adds default arguments to the call and allow us to
974	* change these later.
975	*
976	* @param a_fn The name of the function.
977	* @param a0 The name of the 1st argument.
978	* @param a1 The name of the 2nd argument.
979	* @param a2 The name of the 3rd argument.
980	* @param a3 The name of the 4th argument.
981	*/
982	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
983
984
985	/**
986	* For typedef'ing or declaring a C instruction implementation function taking
987	* five extra arguments.
988	*
989	* @param a_Name The name of the type.
990	* @param a_Type0 The type of the 1st argument
991	* @param a_Arg0 The name of the 1st argument.
992	* @param a_Type1 The type of the 2nd argument.
993	* @param a_Arg1 The name of the 2nd argument.
994	* @param a_Type2 The type of the 3rd argument.
995	* @param a_Arg2 The name of the 3rd argument.
996	* @param a_Type3 The type of the 4th argument.
997	* @param a_Arg3 The name of the 4th argument.
998	* @param a_Type4 The type of the 5th argument.
999	* @param a_Arg4 The name of the 5th argument.
1000	*/
1001	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1002	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1003	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1004	a_Type3 a_Arg3, a_Type4 a_Arg4))
1005	/**
1006	* For defining a C instruction implementation function taking five extra
1007	* arguments.
1008	*
1009	* @param a_Name The name of the function.
1010	* @param a_Type0 The type of the 1st argument
1011	* @param a_Arg0 The name of the 1st argument.
1012	* @param a_Type1 The type of the 2nd argument.
1013	* @param a_Arg1 The name of the 2nd argument.
1014	* @param a_Type2 The type of the 3rd argument.
1015	* @param a_Arg2 The name of the 3rd argument.
1016	* @param a_Type3 The type of the 4th argument.
1017	* @param a_Arg3 The name of the 4th argument.
1018	* @param a_Type4 The type of the 5th argument.
1019	* @param a_Arg4 The name of the 5th argument.
1020	*/
1021	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1022	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1023	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1024	a_Type3 a_Arg3, a_Type4 a_Arg4))
1025	/**
1026	* For calling a C instruction implementation function taking five extra
1027	* arguments.
1028	*
1029	* This special call macro adds default arguments to the call and allow us to
1030	* change these later.
1031	*
1032	* @param a_fn The name of the function.
1033	* @param a0 The name of the 1st argument.
1034	* @param a1 The name of the 2nd argument.
1035	* @param a2 The name of the 3rd argument.
1036	* @param a3 The name of the 4th argument.
1037	* @param a4 The name of the 5th argument.
1038	*/
1039	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1040
1041	/** @} */
1042
1043
1044	/** @} */
1045
1046	RT_C_DECLS_END
1047
1048	#endif
1049

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 40077

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