IEMInternal.h@ 42656

Last change on this file since 42656 was 42633, checked in by vboxsync, 13 years ago
IEM: Implemented CMPXCHG8B. Fixed PGMPhysIemGCPhys2Ptr so that it doesn't return informational status returns, only VINF_SUCCESS and errors.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 53.3 KB

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1	/* $Id: IEMInternal.h 42633 2012-08-06 17:22:56Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* Branch types.
74	*/
75	typedef enum IEMBRANCH
76	{
77	IEMBRANCH_JUMP = 1,
78	IEMBRANCH_CALL,
79	IEMBRANCH_TRAP,
80	IEMBRANCH_SOFTWARE_INT,
81	IEMBRANCH_HARDWARE_INT
82	} IEMBRANCH;
83	AssertCompileSize(IEMBRANCH, 4);
84
85
86	/**
87	* A FPU result.
88	*/
89	typedef struct IEMFPURESULT
90	{
91	/** The output value. */
92	RTFLOAT80U r80Result;
93	/** The output status. */
94	uint16_t FSW;
95	} IEMFPURESULT;
96	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
97	/** Pointer to a FPU result. */
98	typedef IEMFPURESULT *PIEMFPURESULT;
99	/** Pointer to a const FPU result. */
100	typedef IEMFPURESULT const *PCIEMFPURESULT;
101
102
103	/**
104	* A FPU result consisting of two output values and FSW.
105	*/
106	typedef struct IEMFPURESULTTWO
107	{
108	/** The first output value. */
109	RTFLOAT80U r80Result1;
110	/** The output status. */
111	uint16_t FSW;
112	/** The second output value. */
113	RTFLOAT80U r80Result2;
114	} IEMFPURESULTTWO;
115	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
116	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
117	/** Pointer to a FPU result consisting of two output values and FSW. */
118	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
119	/** Pointer to a const FPU result consisting of two output values and FSW. */
120	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
121
122
123	#ifdef IEM_VERIFICATION_MODE
124
125	/**
126	* Verification event type.
127	*/
128	typedef enum IEMVERIFYEVENT
129	{
130	IEMVERIFYEVENT_INVALID = 0,
131	IEMVERIFYEVENT_IOPORT_READ,
132	IEMVERIFYEVENT_IOPORT_WRITE,
133	IEMVERIFYEVENT_RAM_WRITE,
134	IEMVERIFYEVENT_RAM_READ
135	} IEMVERIFYEVENT;
136
137	/** Checks if the event type is a RAM read or write. */
138	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
139
140	/**
141	* Verification event record.
142	*/
143	typedef struct IEMVERIFYEVTREC
144	{
145	/** Pointer to the next record in the list. */
146	struct IEMVERIFYEVTREC *pNext;
147	/** The event type. */
148	IEMVERIFYEVENT enmEvent;
149	/** The event data. */
150	union
151	{
152	/** IEMVERIFYEVENT_IOPORT_READ */
153	struct
154	{
155	RTIOPORT Port;
156	uint32_t cbValue;
157	} IOPortRead;
158
159	/** IEMVERIFYEVENT_IOPORT_WRITE */
160	struct
161	{
162	RTIOPORT Port;
163	uint32_t cbValue;
164	uint32_t u32Value;
165	} IOPortWrite;
166
167	/** IEMVERIFYEVENT_RAM_READ */
168	struct
169	{
170	RTGCPHYS GCPhys;
171	uint32_t cb;
172	} RamRead;
173
174	/** IEMVERIFYEVENT_RAM_WRITE */
175	struct
176	{
177	RTGCPHYS GCPhys;
178	uint32_t cb;
179	uint8_t ab[512];
180	} RamWrite;
181	} u;
182	} IEMVERIFYEVTREC;
183	/** Pointer to an IEM event verification records. */
184	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
185
186	#endif /* IEM_VERIFICATION_MODE */
187
188
189	/**
190	* The per-CPU IEM state.
191	*/
192	typedef struct IEMCPU
193	{
194	/** Pointer to the CPU context - ring-3 contex. */
195	R3PTRTYPE(PCPUMCTX) pCtxR3;
196	/** Pointer to the CPU context - ring-0 contex. */
197	R0PTRTYPE(PCPUMCTX) pCtxR0;
198	/** Pointer to the CPU context - raw-mode contex. */
199	RCPTRTYPE(PCPUMCTX) pCtxRC;
200
201	/** Offset of the VMCPU structure relative to this structure (negative). */
202	int32_t offVMCpu;
203	/** Offset of the VM structure relative to this structure (negative). */
204	int32_t offVM;
205
206	/** Whether to bypass access handlers or not. */
207	bool fByPassHandlers;
208	/** Explicit alignment padding. */
209	bool afAlignment0[3];
210
211	/** The flags of the current exception / interrupt. */
212	uint32_t fCurXcpt;
213	/** The current exception / interrupt. */
214	uint8_t uCurXcpt;
215	/** Exception / interrupt recursion depth. */
216	int8_t cXcptRecursions;
217	/** Explicit alignment padding. */
218	bool afAlignment1[1];
219	/** The CPL. */
220	uint8_t uCpl;
221	/** The current CPU execution mode (CS). */
222	IEMMODE enmCpuMode;
223	/** Info status code that needs to be propagated to the IEM caller.
224	* This cannot be passed internally, as it would complicate all success
225	* checks within the interpreter making the code larger and almost impossible
226	* to get right. Instead, we'll store status codes to pass on here. Each
227	* source of these codes will perform appropriate sanity checks. */
228	int32_t rcPassUp;
229
230	/** @name Statistics
231	* @{ */
232	/** The number of instructions we've executed. */
233	uint32_t cInstructions;
234	/** The number of potential exits. */
235	uint32_t cPotentialExits;
236	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
237	* This may contain uncommitted writes. */
238	uint32_t cbWritten;
239	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
240	uint32_t cRetInstrNotImplemented;
241	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
242	uint32_t cRetAspectNotImplemented;
243	/** Counts informational statuses returned (other than VINF_SUCCESS). */
244	uint32_t cRetInfStatuses;
245	/** Counts other error statuses returned. */
246	uint32_t cRetErrStatuses;
247	/** Number of times rcPassUp has been used. */
248	uint32_t cRetPassUpStatus;
249	#ifdef IEM_VERIFICATION_MODE
250	/** The Number of I/O port reads that has been performed. */
251	uint32_t cIOReads;
252	/** The Number of I/O port writes that has been performed. */
253	uint32_t cIOWrites;
254	/** Set if no comparison to REM is currently performed.
255	* This is used to skip past really slow bits. */
256	bool fNoRem;
257	/** Indicates that RAX and RDX differences should be ignored since RDTSC
258	* and RDTSCP are timing sensitive. */
259	bool fIgnoreRaxRdx;
260	/** Indicates that a MOVS instruction with overlapping source and destination
261	* was executed, causing the memory write records to be incorrrect. */
262	bool fOverlappingMovs;
263	bool afAlignment2[1+4];
264	/** Mask of undefined eflags.
265	* The verifier will any difference in these flags. */
266	uint32_t fUndefinedEFlags;
267	/** The CS of the instruction being interpreted. */
268	RTSEL uOldCs;
269	/** The RIP of the instruction being interpreted. */
270	uint64_t uOldRip;
271	/** The physical address corresponding to abOpcodes[0]. */
272	RTGCPHYS GCPhysOpcodes;
273	#endif
274	/** @} */
275
276	/** @name Decoder state.
277	* @{ */
278
279	/** The default addressing mode . */
280	IEMMODE enmDefAddrMode;
281	/** The effective addressing mode . */
282	IEMMODE enmEffAddrMode;
283	/** The default operand mode . */
284	IEMMODE enmDefOpSize;
285	/** The effective operand mode . */
286	IEMMODE enmEffOpSize;
287
288	/** The prefix mask (IEM_OP_PRF_XXX). */
289	uint32_t fPrefixes;
290	/** The extra REX ModR/M register field bit (REX.R << 3). */
291	uint8_t uRexReg;
292	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
293	* (REX.B << 3). */
294	uint8_t uRexB;
295	/** The extra REX SIB index field bit (REX.X << 3). */
296	uint8_t uRexIndex;
297	/** The effective segment register (X86_SREG_XXX). */
298	uint8_t iEffSeg;
299
300	/** The current offset into abOpcodes. */
301	uint8_t offOpcode;
302	/** The size of what has currently been fetched into abOpcodes. */
303	uint8_t cbOpcode;
304	/** The opcode bytes. */
305	uint8_t abOpcode[15];
306	/** Offset into abOpcodes where the FPU instruction starts.
307	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
308	* instruction result is committed. */
309	uint8_t offFpuOpcode;
310
311	/** @}*/
312
313	/** Alignment padding for aMemMappings. */
314	uint8_t abAlignment2[4];
315
316	/** The number of active guest memory mappings. */
317	uint8_t cActiveMappings;
318	/** The next unused mapping index. */
319	uint8_t iNextMapping;
320	/** Records for tracking guest memory mappings. */
321	struct
322	{
323	/** The address of the mapped bytes. */
324	void *pv;
325	#if defined(IN_RC) && HC_ARCH_BITS == 64
326	uint32_t u32Alignment3; /*< Alignment padding. /
327	#endif
328	/** The access flags (IEM_ACCESS_XXX).
329	* IEM_ACCESS_INVALID if the entry is unused. */
330	uint32_t fAccess;
331	#if HC_ARCH_BITS == 64
332	uint32_t u32Alignment4; /*< Alignment padding. /
333	#endif
334	} aMemMappings[3];
335
336	/** Locking records for the mapped memory. */
337	union
338	{
339	PGMPAGEMAPLOCK Lock;
340	uint64_t au64Padding[2];
341	} aMemMappingLocks[3];
342
343	/** Bounce buffer info.
344	* This runs in parallel to aMemMappings. */
345	struct
346	{
347	/** The physical address of the first byte. */
348	RTGCPHYS GCPhysFirst;
349	/** The physical address of the second page. */
350	RTGCPHYS GCPhysSecond;
351	/** The number of bytes in the first page. */
352	uint16_t cbFirst;
353	/** The number of bytes in the second page. */
354	uint16_t cbSecond;
355	/** Whether it's unassigned memory. */
356	bool fUnassigned;
357	/** Explicit alignment padding. */
358	bool afAlignment5[3];
359	} aMemBbMappings[3];
360
361	/** Bounce buffer storage.
362	* This runs in parallel to aMemMappings and aMemBbMappings. */
363	struct
364	{
365	uint8_t ab[512];
366	} aBounceBuffers[3];
367
368	#ifdef IEM_VERIFICATION_MODE
369	/** The event verification records for what IEM did (LIFO). */
370	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
371	/** Insertion point for pIemEvtRecHead. */
372	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
373	/** The event verification records for what the other party did (FIFO). */
374	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
375	/** Insertion point for pOtherEvtRecHead. */
376	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
377	/** List of free event records. */
378	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
379	#endif
380	} IEMCPU;
381	/** Pointer to the per-CPU IEM state. */
382	typedef IEMCPU *PIEMCPU;
383
384	/** Converts a IEMCPU pointer to a VMCPU pointer.
385	* @returns VMCPU pointer.
386	* @param a_pIemCpu The IEM per CPU instance data.
387	*/
388	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
389
390	/** Converts a IEMCPU pointer to a VM pointer.
391	* @returns VM pointer.
392	* @param a_pIemCpu The IEM per CPU instance data.
393	*/
394	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
395
396	/** @name IEM_ACCESS_XXX - Access details.
397	* @{ */
398	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
399	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
400	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
401	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
402	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
403	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
404	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
405	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
406	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
407	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
408	/** The writes are partial, so if initialize the bounce buffer with the
409	* orignal RAM content. */
410	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
411	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
412	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
413	/** Read+write data alias. */
414	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
415	/** Write data alias. */
416	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
417	/** Read data alias. */
418	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
419	/** Instruction fetch alias. */
420	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
421	/** Stack write alias. */
422	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
423	/** Stack read alias. */
424	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
425	/** Stack read+write alias. */
426	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
427	/** Read system table alias. */
428	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
429	/** Read+write system table alias. */
430	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
431	/** @} */
432
433	/** @name Prefix constants (IEMCPU::fPrefixes)
434	* @{ */
435	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
436	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
437	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
438	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
439	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
440	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
441	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
442
443	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
444	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
445	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
446
447	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
448	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
449	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
450
451	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
452	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
453	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
454	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
455	/** @} */
456
457	/**
458	* Tests if verification mode is enabled.
459	*
460	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
461	* should therefore cause the compiler to eliminate the verification branch
462	* of an if statement. */
463	#ifdef IEM_VERIFICATION_MODE
464	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
465	#else
466	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
467	#endif
468
469	/**
470	* Indicates to the verifier that the given flag set is undefined.
471	*
472	* Can be invoked again to add more flags.
473	*
474	* This is a NOOP if the verifier isn't compiled in.
475	*/
476	#ifdef IEM_VERIFICATION_MODE
477	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
478	#else
479	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
480	#endif
481
482
483	/** @def IEM_DECL_IMPL_TYPE
484	* For typedef'ing an instruction implementation function.
485	*
486	* @param a_RetType The return type.
487	* @param a_Name The name of the type.
488	* @param a_ArgList The argument list enclosed in parentheses.
489	*/
490
491	/** @def IEM_DECL_IMPL_DEF
492	* For defining an instruction implementation function.
493	*
494	* @param a_RetType The return type.
495	* @param a_Name The name of the type.
496	* @param a_ArgList The argument list enclosed in parentheses.
497	*/
498
499	#if defined(__GNUC__) && defined(RT_ARCH_X86)
500	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
501	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
502	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
503	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
504
505	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
506	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
507	a_RetType (__fastcall a_Name) a_ArgList
508	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
509	a_RetType __fastcall a_Name a_ArgList
510
511	#else
512	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
513	a_RetType (VBOXCALL a_Name) a_ArgList
514	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
515	a_RetType VBOXCALL a_Name a_ArgList
516
517	#endif
518
519	/** @name Arithmetic assignment operations on bytes (binary).
520	* @{ */
521	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
522	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
523	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
524	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
525	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
526	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
527	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
528	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
529	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
530	/** @} */
531
532	/** @name Arithmetic assignment operations on words (binary).
533	* @{ */
534	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
535	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
536	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
537	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
538	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
539	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
540	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
541	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
542	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
543	/** @} */
544
545	/** @name Arithmetic assignment operations on double words (binary).
546	* @{ */
547	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
548	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
549	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
550	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
551	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
552	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
553	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
554	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
555	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
556	/** @} */
557
558	/** @name Arithmetic assignment operations on quad words (binary).
559	* @{ */
560	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
561	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
562	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
563	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
564	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
565	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
566	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
567	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
568	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
569	/** @} */
570
571	/** @name Compare operations (thrown in with the binary ops).
572	* @{ */
573	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
574	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
575	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
576	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
577	/** @} */
578
579	/** @name Test operations (thrown in with the binary ops).
580	* @{ */
581	FNIEMAIMPLBINU8 iemAImpl_test_u8;
582	FNIEMAIMPLBINU16 iemAImpl_test_u16;
583	FNIEMAIMPLBINU32 iemAImpl_test_u32;
584	FNIEMAIMPLBINU64 iemAImpl_test_u64;
585	/** @} */
586
587	/** @name Bit operations operations (thrown in with the binary ops).
588	* @{ */
589	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
590	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
591	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
592	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
593	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
594	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
595	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
596	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
597	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
598	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
599	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
600	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
601	/** @} */
602
603	/** @name Exchange memory with register operations.
604	* @{ */
605	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
606	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
607	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
608	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
609	/** @} */
610
611	/** @name Exchange and add operations.
612	* @{ */
613	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
614	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
615	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
616	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
617	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
618	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
619	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
620	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
621	/** @} */
622
623	/** @name Compare and exchange.
624	* @{ */
625	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
626	uint32_t *pEFlags));
627	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
628	uint32_t *pEFlags));
629	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
630	uint32_t *pEFlags));
631	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
632	uint32_t *pEFlags));
633	/** @} */
634
635	/** @name Double precision shifts
636	* @{ */
637	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
638	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
639	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
640	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
641	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
642	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
643	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
644	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
645	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
646	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
647	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
648	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
649	/** @} */
650
651
652	/** @name Bit search operations (thrown in with the binary ops).
653	* @{ */
654	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
655	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
656	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
657	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
658	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
659	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
660	/** @} */
661
662	/** @name Signed multiplication operations (thrown in with the binary ops).
663	* @{ */
664	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
665	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
666	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
667	/** @} */
668
669	/** @name Arithmetic assignment operations on bytes (unary).
670	* @{ */
671	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
672	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
673	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
674	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
675	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
676	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
677	/** @} */
678
679	/** @name Arithmetic assignment operations on words (unary).
680	* @{ */
681	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
682	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
683	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
684	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
685	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
686	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
687	/** @} */
688
689	/** @name Arithmetic assignment operations on double words (unary).
690	* @{ */
691	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
692	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
693	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
694	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
695	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
696	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
697	/** @} */
698
699	/** @name Arithmetic assignment operations on quad words (unary).
700	* @{ */
701	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
702	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
703	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
704	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
705	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
706	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
707	/** @} */
708
709
710	/** @name Shift operations on bytes (Group 2).
711	* @{ */
712	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
713	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
714	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
715	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
716	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
717	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
718	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
719	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
720	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
721	/** @} */
722
723	/** @name Shift operations on words (Group 2).
724	* @{ */
725	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
726	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
727	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
728	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
729	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
730	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
731	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
732	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
733	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
734	/** @} */
735
736	/** @name Shift operations on double words (Group 2).
737	* @{ */
738	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
739	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
740	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
741	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
742	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
743	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
744	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
745	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
746	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
747	/** @} */
748
749	/** @name Shift operations on words (Group 2).
750	* @{ */
751	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
752	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
753	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
754	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
755	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
756	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
757	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
758	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
759	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
760	/** @} */
761
762	/** @name Multiplication and division operations.
763	* @{ */
764	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
765	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
766	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
767	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
768
769	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
770	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
771	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
772	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
773
774	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
775	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
776	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
777	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
778
779	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
780	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
781	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
782	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
783	/** @} */
784
785	/** @name Byte Swap.
786	* @{ */
787	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
788	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
789	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
790	/** @} */
791
792
793	/** @name FPU operations taking a 32-bit float argument
794	* @{ */
795	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
796	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
797	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
798
799	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
800	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
801	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
802
803	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
804	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
805	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
806	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
807	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
808	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
809	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
810
811	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
812	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
813	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
814	/** @} */
815
816	/** @name FPU operations taking a 64-bit float argument
817	* @{ */
818	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
819	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
820	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
821
822	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
823	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
824	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
825	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
826	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
827	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
828
829	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
830	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
831	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
832	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
833	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
834	/** @} */
835
836	/** @name FPU operations taking a 80-bit float argument
837	* @{ */
838	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
839	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
840	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
841	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
842	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
843	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
844	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
845	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
846	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
847	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
848	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
849	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
850
851	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
852	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
853
854	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
855	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
856	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
857	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
858	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
859
860	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
861	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
862	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
863	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
864	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
865
866	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
867	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
868	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
869	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
870	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
871	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
872	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
873	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
874	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
875	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
876
877	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
878	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
879	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
880	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
881
882	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
883	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
884	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
885	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
886	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
887	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
888	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
889	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
890	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
891
892	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
893	PCRTFLOAT80U pr80Val));
894	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
895	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
896	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
897	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
898
899	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
900	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
901	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
902
903	/** @} */
904
905	/** @name FPU operations taking a 16-bit signed integer argument
906	* @{ */
907	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
908	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
909	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
910
911	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
912	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
913	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
914	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
915	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
916	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
917
918	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
919	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
920
921	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
922	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
923	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
924	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
925	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
926	/** @} */
927
928	/** @name FPU operations taking a 32-bit signed integer argument
929	* @{ */
930	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
931	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
932	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
933
934	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
935	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
936	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
937	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
938	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
939	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
940
941	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
942	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
943
944	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
945	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
946	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
947	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
948	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
949	/** @} */
950
951	/** @name FPU operations taking a 64-bit signed integer argument
952	* @{ */
953	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
954	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
955	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
956
957	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
958	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
959	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
960	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
961	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
962	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
963
964	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
965	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
966
967	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
968	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
969	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
970	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
971	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
972	/** @} */
973
974
975	/** @name Function tables.
976	* @{
977	*/
978
979	/**
980	* Function table for a binary operator providing implementation based on
981	* operand size.
982	*/
983	typedef struct IEMOPBINSIZES
984	{
985	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
986	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
987	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
988	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
989	} IEMOPBINSIZES;
990	/** Pointer to a binary operator function table. */
991	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
992
993
994	/**
995	* Function table for a unary operator providing implementation based on
996	* operand size.
997	*/
998	typedef struct IEMOPUNARYSIZES
999	{
1000	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1001	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1002	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1003	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1004	} IEMOPUNARYSIZES;
1005	/** Pointer to a unary operator function table. */
1006	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1007
1008
1009	/**
1010	* Function table for a shift operator providing implementation based on
1011	* operand size.
1012	*/
1013	typedef struct IEMOPSHIFTSIZES
1014	{
1015	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1016	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1017	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1018	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1019	} IEMOPSHIFTSIZES;
1020	/** Pointer to a shift operator function table. */
1021	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1022
1023
1024	/**
1025	* Function table for a multiplication or division operation.
1026	*/
1027	typedef struct IEMOPMULDIVSIZES
1028	{
1029	PFNIEMAIMPLMULDIVU8 pfnU8;
1030	PFNIEMAIMPLMULDIVU16 pfnU16;
1031	PFNIEMAIMPLMULDIVU32 pfnU32;
1032	PFNIEMAIMPLMULDIVU64 pfnU64;
1033	} IEMOPMULDIVSIZES;
1034	/** Pointer to a multiplication or division operation function table. */
1035	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1036
1037
1038	/**
1039	* Function table for a double precision shift operator providing implementation
1040	* based on operand size.
1041	*/
1042	typedef struct IEMOPSHIFTDBLSIZES
1043	{
1044	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1045	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1046	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1047	} IEMOPSHIFTDBLSIZES;
1048	/** Pointer to a double precision shift function table. */
1049	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1050
1051
1052	/** @} */
1053
1054
1055	/** @name C instruction implementations for anything slightly complicated.
1056	* @{ */
1057
1058	/**
1059	* For typedef'ing or declaring a C instruction implementation function taking
1060	* no extra arguments.
1061	*
1062	* @param a_Name The name of the type.
1063	*/
1064	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1065	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1066	/**
1067	* For defining a C instruction implementation function taking no extra
1068	* arguments.
1069	*
1070	* @param a_Name The name of the function
1071	*/
1072	# define IEM_CIMPL_DEF_0(a_Name) \
1073	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1074	/**
1075	* For calling a C instruction implementation function taking no extra
1076	* arguments.
1077	*
1078	* This special call macro adds default arguments to the call and allow us to
1079	* change these later.
1080	*
1081	* @param a_fn The name of the function.
1082	*/
1083	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1084
1085	/**
1086	* For typedef'ing or declaring a C instruction implementation function taking
1087	* one extra argument.
1088	*
1089	* @param a_Name The name of the type.
1090	* @param a_Type0 The argument type.
1091	* @param a_Arg0 The argument name.
1092	*/
1093	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1094	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1095	/**
1096	* For defining a C instruction implementation function taking one extra
1097	* argument.
1098	*
1099	* @param a_Name The name of the function
1100	* @param a_Type0 The argument type.
1101	* @param a_Arg0 The argument name.
1102	*/
1103	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1104	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1105	/**
1106	* For calling a C instruction implementation function taking one extra
1107	* argument.
1108	*
1109	* This special call macro adds default arguments to the call and allow us to
1110	* change these later.
1111	*
1112	* @param a_fn The name of the function.
1113	* @param a0 The name of the 1st argument.
1114	*/
1115	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1116
1117	/**
1118	* For typedef'ing or declaring a C instruction implementation function taking
1119	* two extra arguments.
1120	*
1121	* @param a_Name The name of the type.
1122	* @param a_Type0 The type of the 1st argument
1123	* @param a_Arg0 The name of the 1st argument.
1124	* @param a_Type1 The type of the 2nd argument.
1125	* @param a_Arg1 The name of the 2nd argument.
1126	*/
1127	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1128	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1129	/**
1130	* For defining a C instruction implementation function taking two extra
1131	* arguments.
1132	*
1133	* @param a_Name The name of the function.
1134	* @param a_Type0 The type of the 1st argument
1135	* @param a_Arg0 The name of the 1st argument.
1136	* @param a_Type1 The type of the 2nd argument.
1137	* @param a_Arg1 The name of the 2nd argument.
1138	*/
1139	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1140	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1141	/**
1142	* For calling a C instruction implementation function taking two extra
1143	* arguments.
1144	*
1145	* This special call macro adds default arguments to the call and allow us to
1146	* change these later.
1147	*
1148	* @param a_fn The name of the function.
1149	* @param a0 The name of the 1st argument.
1150	* @param a1 The name of the 2nd argument.
1151	*/
1152	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1153
1154	/**
1155	* For typedef'ing or declaring a C instruction implementation function taking
1156	* three extra arguments.
1157	*
1158	* @param a_Name The name of the type.
1159	* @param a_Type0 The type of the 1st argument
1160	* @param a_Arg0 The name of the 1st argument.
1161	* @param a_Type1 The type of the 2nd argument.
1162	* @param a_Arg1 The name of the 2nd argument.
1163	* @param a_Type2 The type of the 3rd argument.
1164	* @param a_Arg2 The name of the 3rd argument.
1165	*/
1166	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1167	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1168	/**
1169	* For defining a C instruction implementation function taking three extra
1170	* arguments.
1171	*
1172	* @param a_Name The name of the function.
1173	* @param a_Type0 The type of the 1st argument
1174	* @param a_Arg0 The name of the 1st argument.
1175	* @param a_Type1 The type of the 2nd argument.
1176	* @param a_Arg1 The name of the 2nd argument.
1177	* @param a_Type2 The type of the 3rd argument.
1178	* @param a_Arg2 The name of the 3rd argument.
1179	*/
1180	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1181	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1182	/**
1183	* For calling a C instruction implementation function taking three extra
1184	* arguments.
1185	*
1186	* This special call macro adds default arguments to the call and allow us to
1187	* change these later.
1188	*
1189	* @param a_fn The name of the function.
1190	* @param a0 The name of the 1st argument.
1191	* @param a1 The name of the 2nd argument.
1192	* @param a2 The name of the 3rd argument.
1193	*/
1194	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1195
1196
1197	/**
1198	* For typedef'ing or declaring a C instruction implementation function taking
1199	* four extra arguments.
1200	*
1201	* @param a_Name The name of the type.
1202	* @param a_Type0 The type of the 1st argument
1203	* @param a_Arg0 The name of the 1st argument.
1204	* @param a_Type1 The type of the 2nd argument.
1205	* @param a_Arg1 The name of the 2nd argument.
1206	* @param a_Type2 The type of the 3rd argument.
1207	* @param a_Arg2 The name of the 3rd argument.
1208	* @param a_Type3 The type of the 4th argument.
1209	* @param a_Arg3 The name of the 4th argument.
1210	*/
1211	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1212	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1213	/**
1214	* For defining a C instruction implementation function taking four extra
1215	* arguments.
1216	*
1217	* @param a_Name The name of the function.
1218	* @param a_Type0 The type of the 1st argument
1219	* @param a_Arg0 The name of the 1st argument.
1220	* @param a_Type1 The type of the 2nd argument.
1221	* @param a_Arg1 The name of the 2nd argument.
1222	* @param a_Type2 The type of the 3rd argument.
1223	* @param a_Arg2 The name of the 3rd argument.
1224	* @param a_Type3 The type of the 4th argument.
1225	* @param a_Arg3 The name of the 4th argument.
1226	*/
1227	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1228	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1229	a_Type2 a_Arg2, a_Type3 a_Arg3))
1230	/**
1231	* For calling a C instruction implementation function taking four extra
1232	* arguments.
1233	*
1234	* This special call macro adds default arguments to the call and allow us to
1235	* change these later.
1236	*
1237	* @param a_fn The name of the function.
1238	* @param a0 The name of the 1st argument.
1239	* @param a1 The name of the 2nd argument.
1240	* @param a2 The name of the 3rd argument.
1241	* @param a3 The name of the 4th argument.
1242	*/
1243	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1244
1245
1246	/**
1247	* For typedef'ing or declaring a C instruction implementation function taking
1248	* five extra arguments.
1249	*
1250	* @param a_Name The name of the type.
1251	* @param a_Type0 The type of the 1st argument
1252	* @param a_Arg0 The name of the 1st argument.
1253	* @param a_Type1 The type of the 2nd argument.
1254	* @param a_Arg1 The name of the 2nd argument.
1255	* @param a_Type2 The type of the 3rd argument.
1256	* @param a_Arg2 The name of the 3rd argument.
1257	* @param a_Type3 The type of the 4th argument.
1258	* @param a_Arg3 The name of the 4th argument.
1259	* @param a_Type4 The type of the 5th argument.
1260	* @param a_Arg4 The name of the 5th argument.
1261	*/
1262	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1263	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1264	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1265	a_Type3 a_Arg3, a_Type4 a_Arg4))
1266	/**
1267	* For defining a C instruction implementation function taking five extra
1268	* arguments.
1269	*
1270	* @param a_Name The name of the function.
1271	* @param a_Type0 The type of the 1st argument
1272	* @param a_Arg0 The name of the 1st argument.
1273	* @param a_Type1 The type of the 2nd argument.
1274	* @param a_Arg1 The name of the 2nd argument.
1275	* @param a_Type2 The type of the 3rd argument.
1276	* @param a_Arg2 The name of the 3rd argument.
1277	* @param a_Type3 The type of the 4th argument.
1278	* @param a_Arg3 The name of the 4th argument.
1279	* @param a_Type4 The type of the 5th argument.
1280	* @param a_Arg4 The name of the 5th argument.
1281	*/
1282	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1283	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1284	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1285	a_Type3 a_Arg3, a_Type4 a_Arg4))
1286	/**
1287	* For calling a C instruction implementation function taking five extra
1288	* arguments.
1289	*
1290	* This special call macro adds default arguments to the call and allow us to
1291	* change these later.
1292	*
1293	* @param a_fn The name of the function.
1294	* @param a0 The name of the 1st argument.
1295	* @param a1 The name of the 2nd argument.
1296	* @param a2 The name of the 3rd argument.
1297	* @param a3 The name of the 4th argument.
1298	* @param a4 The name of the 5th argument.
1299	*/
1300	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1301
1302	/** @} */
1303
1304
1305	/** @} */
1306
1307	RT_C_DECLS_END
1308
1309	#endif
1310

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 42656

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