IEMInternal.h@ 42777

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IEM and EM: debugging/hacking.
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1	/* $Id: IEMInternal.h 42777 2012-08-11 20:23:48Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35	/** @def IEM_VERIFICATION_MODE_FULL
36	* Shorthand for:
37	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
38	*/
39	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
40	# define IEM_VERIFICATION_MODE_FULL
41	#endif
42
43
44	/** Finish and move to types.h */
45	typedef union
46	{
47	uint32_t u32;
48	} RTFLOAT32U;
49	typedef RTFLOAT32U *PRTFLOAT32U;
50	typedef RTFLOAT32U const *PCRTFLOAT32U;
51
52
53	/**
54	* Operand or addressing mode.
55	*/
56	typedef enum IEMMODE
57	{
58	IEMMODE_16BIT = 0,
59	IEMMODE_32BIT,
60	IEMMODE_64BIT
61	} IEMMODE;
62	AssertCompileSize(IEMMODE, 4);
63
64	/**
65	* Extended operand mode that includes a representation of 8-bit.
66	*
67	* This is used for packing down modes when invoking some C instruction
68	* implementations.
69	*/
70	typedef enum IEMMODEX
71	{
72	IEMMODEX_16BIT = IEMMODE_16BIT,
73	IEMMODEX_32BIT = IEMMODE_32BIT,
74	IEMMODEX_64BIT = IEMMODE_64BIT,
75	IEMMODEX_8BIT
76	} IEMMODEX;
77	AssertCompileSize(IEMMODEX, 4);
78
79
80	/**
81	* Branch types.
82	*/
83	typedef enum IEMBRANCH
84	{
85	IEMBRANCH_JUMP = 1,
86	IEMBRANCH_CALL,
87	IEMBRANCH_TRAP,
88	IEMBRANCH_SOFTWARE_INT,
89	IEMBRANCH_HARDWARE_INT
90	} IEMBRANCH;
91	AssertCompileSize(IEMBRANCH, 4);
92
93
94	/**
95	* A FPU result.
96	*/
97	typedef struct IEMFPURESULT
98	{
99	/** The output value. */
100	RTFLOAT80U r80Result;
101	/** The output status. */
102	uint16_t FSW;
103	} IEMFPURESULT;
104	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
105	/** Pointer to a FPU result. */
106	typedef IEMFPURESULT *PIEMFPURESULT;
107	/** Pointer to a const FPU result. */
108	typedef IEMFPURESULT const *PCIEMFPURESULT;
109
110
111	/**
112	* A FPU result consisting of two output values and FSW.
113	*/
114	typedef struct IEMFPURESULTTWO
115	{
116	/** The first output value. */
117	RTFLOAT80U r80Result1;
118	/** The output status. */
119	uint16_t FSW;
120	/** The second output value. */
121	RTFLOAT80U r80Result2;
122	} IEMFPURESULTTWO;
123	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
124	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
125	/** Pointer to a FPU result consisting of two output values and FSW. */
126	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
127	/** Pointer to a const FPU result consisting of two output values and FSW. */
128	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
129
130
131	#ifdef IEM_VERIFICATION_MODE_FULL
132
133	/**
134	* Verification event type.
135	*/
136	typedef enum IEMVERIFYEVENT
137	{
138	IEMVERIFYEVENT_INVALID = 0,
139	IEMVERIFYEVENT_IOPORT_READ,
140	IEMVERIFYEVENT_IOPORT_WRITE,
141	IEMVERIFYEVENT_RAM_WRITE,
142	IEMVERIFYEVENT_RAM_READ
143	} IEMVERIFYEVENT;
144
145	/** Checks if the event type is a RAM read or write. */
146	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
147
148	/**
149	* Verification event record.
150	*/
151	typedef struct IEMVERIFYEVTREC
152	{
153	/** Pointer to the next record in the list. */
154	struct IEMVERIFYEVTREC *pNext;
155	/** The event type. */
156	IEMVERIFYEVENT enmEvent;
157	/** The event data. */
158	union
159	{
160	/** IEMVERIFYEVENT_IOPORT_READ */
161	struct
162	{
163	RTIOPORT Port;
164	uint32_t cbValue;
165	} IOPortRead;
166
167	/** IEMVERIFYEVENT_IOPORT_WRITE */
168	struct
169	{
170	RTIOPORT Port;
171	uint32_t cbValue;
172	uint32_t u32Value;
173	} IOPortWrite;
174
175	/** IEMVERIFYEVENT_RAM_READ */
176	struct
177	{
178	RTGCPHYS GCPhys;
179	uint32_t cb;
180	} RamRead;
181
182	/** IEMVERIFYEVENT_RAM_WRITE */
183	struct
184	{
185	RTGCPHYS GCPhys;
186	uint32_t cb;
187	uint8_t ab[512];
188	} RamWrite;
189	} u;
190	} IEMVERIFYEVTREC;
191	/** Pointer to an IEM event verification records. */
192	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
193
194	#endif /* IEM_VERIFICATION_MODE_FULL */
195
196
197	/**
198	* The per-CPU IEM state.
199	*/
200	typedef struct IEMCPU
201	{
202	/** Pointer to the CPU context - ring-3 contex. */
203	R3PTRTYPE(PCPUMCTX) pCtxR3;
204	/** Pointer to the CPU context - ring-0 contex. */
205	R0PTRTYPE(PCPUMCTX) pCtxR0;
206	/** Pointer to the CPU context - raw-mode contex. */
207	RCPTRTYPE(PCPUMCTX) pCtxRC;
208
209	/** Offset of the VMCPU structure relative to this structure (negative). */
210	int32_t offVMCpu;
211	/** Offset of the VM structure relative to this structure (negative). */
212	int32_t offVM;
213
214	/** Whether to bypass access handlers or not. */
215	bool fBypassHandlers;
216	/** Explicit alignment padding. */
217	bool afAlignment0[3];
218
219	/** The flags of the current exception / interrupt. */
220	uint32_t fCurXcpt;
221	/** The current exception / interrupt. */
222	uint8_t uCurXcpt;
223	/** Exception / interrupt recursion depth. */
224	int8_t cXcptRecursions;
225	/** Explicit alignment padding. */
226	bool afAlignment1[1];
227	/** The CPL. */
228	uint8_t uCpl;
229	/** The current CPU execution mode (CS). */
230	IEMMODE enmCpuMode;
231	/** Info status code that needs to be propagated to the IEM caller.
232	* This cannot be passed internally, as it would complicate all success
233	* checks within the interpreter making the code larger and almost impossible
234	* to get right. Instead, we'll store status codes to pass on here. Each
235	* source of these codes will perform appropriate sanity checks. */
236	int32_t rcPassUp;
237
238	/** @name Statistics
239	* @{ */
240	/** The number of instructions we've executed. */
241	uint32_t cInstructions;
242	/** The number of potential exits. */
243	uint32_t cPotentialExits;
244	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
245	* This may contain uncommitted writes. */
246	uint32_t cbWritten;
247	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
248	uint32_t cRetInstrNotImplemented;
249	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
250	uint32_t cRetAspectNotImplemented;
251	/** Counts informational statuses returned (other than VINF_SUCCESS). */
252	uint32_t cRetInfStatuses;
253	/** Counts other error statuses returned. */
254	uint32_t cRetErrStatuses;
255	/** Number of times rcPassUp has been used. */
256	uint32_t cRetPassUpStatus;
257	#ifdef IEM_VERIFICATION_MODE_FULL
258	/** The Number of I/O port reads that has been performed. */
259	uint32_t cIOReads;
260	/** The Number of I/O port writes that has been performed. */
261	uint32_t cIOWrites;
262	/** Set if no comparison to REM is currently performed.
263	* This is used to skip past really slow bits. */
264	bool fNoRem;
265	/** Indicates that RAX and RDX differences should be ignored since RDTSC
266	* and RDTSCP are timing sensitive. */
267	bool fIgnoreRaxRdx;
268	/** Indicates that a MOVS instruction with overlapping source and destination
269	* was executed, causing the memory write records to be incorrrect. */
270	bool fOverlappingMovs;
271	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
272	* CPUM doesn't yet reflect. */
273	uint8_t uInjectCpl;
274	bool afAlignment2[4];
275	/** Mask of undefined eflags.
276	* The verifier will any difference in these flags. */
277	uint32_t fUndefinedEFlags;
278	/** The CS of the instruction being interpreted. */
279	RTSEL uOldCs;
280	/** The RIP of the instruction being interpreted. */
281	uint64_t uOldRip;
282	/** The physical address corresponding to abOpcodes[0]. */
283	RTGCPHYS GCPhysOpcodes;
284	#endif
285	/** @} */
286
287	/** @name Decoder state.
288	* @{ */
289
290	/** The default addressing mode . */
291	IEMMODE enmDefAddrMode;
292	/** The effective addressing mode . */
293	IEMMODE enmEffAddrMode;
294	/** The default operand mode . */
295	IEMMODE enmDefOpSize;
296	/** The effective operand mode . */
297	IEMMODE enmEffOpSize;
298
299	/** The prefix mask (IEM_OP_PRF_XXX). */
300	uint32_t fPrefixes;
301	/** The extra REX ModR/M register field bit (REX.R << 3). */
302	uint8_t uRexReg;
303	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
304	* (REX.B << 3). */
305	uint8_t uRexB;
306	/** The extra REX SIB index field bit (REX.X << 3). */
307	uint8_t uRexIndex;
308	/** The effective segment register (X86_SREG_XXX). */
309	uint8_t iEffSeg;
310
311	/** The current offset into abOpcodes. */
312	uint8_t offOpcode;
313	/** The size of what has currently been fetched into abOpcodes. */
314	uint8_t cbOpcode;
315	/** The opcode bytes. */
316	uint8_t abOpcode[15];
317	/** Offset into abOpcodes where the FPU instruction starts.
318	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
319	* instruction result is committed. */
320	uint8_t offFpuOpcode;
321
322	/** @}*/
323
324	/** Alignment padding for aMemMappings. */
325	uint8_t abAlignment2[4];
326
327	/** The number of active guest memory mappings. */
328	uint8_t cActiveMappings;
329	/** The next unused mapping index. */
330	uint8_t iNextMapping;
331	/** Records for tracking guest memory mappings. */
332	struct
333	{
334	/** The address of the mapped bytes. */
335	void *pv;
336	#if defined(IN_RC) && HC_ARCH_BITS == 64
337	uint32_t u32Alignment3; /*< Alignment padding. /
338	#endif
339	/** The access flags (IEM_ACCESS_XXX).
340	* IEM_ACCESS_INVALID if the entry is unused. */
341	uint32_t fAccess;
342	#if HC_ARCH_BITS == 64
343	uint32_t u32Alignment4; /*< Alignment padding. /
344	#endif
345	} aMemMappings[3];
346
347	/** Locking records for the mapped memory. */
348	union
349	{
350	PGMPAGEMAPLOCK Lock;
351	uint64_t au64Padding[2];
352	} aMemMappingLocks[3];
353
354	/** Bounce buffer info.
355	* This runs in parallel to aMemMappings. */
356	struct
357	{
358	/** The physical address of the first byte. */
359	RTGCPHYS GCPhysFirst;
360	/** The physical address of the second page. */
361	RTGCPHYS GCPhysSecond;
362	/** The number of bytes in the first page. */
363	uint16_t cbFirst;
364	/** The number of bytes in the second page. */
365	uint16_t cbSecond;
366	/** Whether it's unassigned memory. */
367	bool fUnassigned;
368	/** Explicit alignment padding. */
369	bool afAlignment5[3];
370	} aMemBbMappings[3];
371
372	/** Bounce buffer storage.
373	* This runs in parallel to aMemMappings and aMemBbMappings. */
374	struct
375	{
376	uint8_t ab[512];
377	} aBounceBuffers[3];
378
379	#ifdef IEM_VERIFICATION_MODE_FULL
380	/** The event verification records for what IEM did (LIFO). */
381	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
382	/** Insertion point for pIemEvtRecHead. */
383	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
384	/** The event verification records for what the other party did (FIFO). */
385	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
386	/** Insertion point for pOtherEvtRecHead. */
387	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
388	/** List of free event records. */
389	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
390	#endif
391	} IEMCPU;
392	/** Pointer to the per-CPU IEM state. */
393	typedef IEMCPU *PIEMCPU;
394
395	/** Converts a IEMCPU pointer to a VMCPU pointer.
396	* @returns VMCPU pointer.
397	* @param a_pIemCpu The IEM per CPU instance data.
398	*/
399	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
400
401	/** Converts a IEMCPU pointer to a VM pointer.
402	* @returns VM pointer.
403	* @param a_pIemCpu The IEM per CPU instance data.
404	*/
405	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
406
407	/** @name IEM_ACCESS_XXX - Access details.
408	* @{ */
409	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
410	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
411	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
412	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
413	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
414	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
415	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
416	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
417	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
418	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
419	/** The writes are partial, so if initialize the bounce buffer with the
420	* orignal RAM content. */
421	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
422	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
423	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
424	/** Read+write data alias. */
425	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
426	/** Write data alias. */
427	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
428	/** Read data alias. */
429	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
430	/** Instruction fetch alias. */
431	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
432	/** Stack write alias. */
433	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
434	/** Stack read alias. */
435	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
436	/** Stack read+write alias. */
437	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
438	/** Read system table alias. */
439	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
440	/** Read+write system table alias. */
441	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
442	/** @} */
443
444	/** @name Prefix constants (IEMCPU::fPrefixes)
445	* @{ */
446	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
447	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
448	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
449	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
450	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
451	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
452	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
453
454	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
455	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
456	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
457
458	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
459	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
460	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
461
462	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
463	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
464	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
465	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
466	/** @} */
467
468	/**
469	* Tests if verification mode is enabled.
470	*
471	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
472	* should therefore cause the compiler to eliminate the verification branch
473	* of an if statement. */
474	#ifdef IEM_VERIFICATION_MODE_FULL
475	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
476	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
477	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
478	#else
479	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
480	#endif
481
482	/** @def IEM_VERIFICATION_MODE
483	* Indicates that one of the verfication modes are enabled.
484	*/
485	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
486	# define IEM_VERIFICATION_MODE
487	#endif
488
489	/**
490	* Indicates to the verifier that the given flag set is undefined.
491	*
492	* Can be invoked again to add more flags.
493	*
494	* This is a NOOP if the verifier isn't compiled in.
495	*/
496	#ifdef IEM_VERIFICATION_MODE_FULL
497	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
498	#else
499	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
500	#endif
501
502
503	/** @def IEM_DECL_IMPL_TYPE
504	* For typedef'ing an instruction implementation function.
505	*
506	* @param a_RetType The return type.
507	* @param a_Name The name of the type.
508	* @param a_ArgList The argument list enclosed in parentheses.
509	*/
510
511	/** @def IEM_DECL_IMPL_DEF
512	* For defining an instruction implementation function.
513	*
514	* @param a_RetType The return type.
515	* @param a_Name The name of the type.
516	* @param a_ArgList The argument list enclosed in parentheses.
517	*/
518
519	#if defined(__GNUC__) && defined(RT_ARCH_X86)
520	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
521	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
522	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
523	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
524
525	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
526	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
527	a_RetType (__fastcall a_Name) a_ArgList
528	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
529	a_RetType __fastcall a_Name a_ArgList
530
531	#else
532	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
533	a_RetType (VBOXCALL a_Name) a_ArgList
534	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
535	a_RetType VBOXCALL a_Name a_ArgList
536
537	#endif
538
539	/** @name Arithmetic assignment operations on bytes (binary).
540	* @{ */
541	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
542	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
543	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
544	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
545	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
546	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
547	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
548	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
549	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
550	/** @} */
551
552	/** @name Arithmetic assignment operations on words (binary).
553	* @{ */
554	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
555	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
556	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
557	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
558	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
559	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
560	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
561	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
562	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
563	/** @} */
564
565	/** @name Arithmetic assignment operations on double words (binary).
566	* @{ */
567	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
568	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
569	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
570	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
571	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
572	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
573	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
574	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
575	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
576	/** @} */
577
578	/** @name Arithmetic assignment operations on quad words (binary).
579	* @{ */
580	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
581	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
582	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
583	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
584	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
585	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
586	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
587	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
588	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
589	/** @} */
590
591	/** @name Compare operations (thrown in with the binary ops).
592	* @{ */
593	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
594	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
595	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
596	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
597	/** @} */
598
599	/** @name Test operations (thrown in with the binary ops).
600	* @{ */
601	FNIEMAIMPLBINU8 iemAImpl_test_u8;
602	FNIEMAIMPLBINU16 iemAImpl_test_u16;
603	FNIEMAIMPLBINU32 iemAImpl_test_u32;
604	FNIEMAIMPLBINU64 iemAImpl_test_u64;
605	/** @} */
606
607	/** @name Bit operations operations (thrown in with the binary ops).
608	* @{ */
609	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
610	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
611	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
612	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
613	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
614	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
615	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
616	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
617	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
618	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
619	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
620	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
621	/** @} */
622
623	/** @name Exchange memory with register operations.
624	* @{ */
625	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
626	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
627	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
628	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
629	/** @} */
630
631	/** @name Exchange and add operations.
632	* @{ */
633	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
634	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
635	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
636	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
637	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
638	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
639	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
640	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
641	/** @} */
642
643	/** @name Compare and exchange.
644	* @{ */
645	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
646	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
647	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
648	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
649	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
650	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
651	#ifdef RT_ARCH_X86
652	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
653	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
654	#else
655	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
656	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
657	#endif
658	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
659	uint32_t *pEFlags));
660	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
661	uint32_t *pEFlags));
662	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
663	uint32_t *pEFlags));
664	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
665	uint32_t *pEFlags));
666	/** @} */
667
668	/** @name Double precision shifts
669	* @{ */
670	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
671	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
672	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
673	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
674	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
675	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
676	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
677	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
678	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
679	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
680	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
681	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
682	/** @} */
683
684
685	/** @name Bit search operations (thrown in with the binary ops).
686	* @{ */
687	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
688	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
689	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
690	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
691	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
692	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
693	/** @} */
694
695	/** @name Signed multiplication operations (thrown in with the binary ops).
696	* @{ */
697	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
698	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
699	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
700	/** @} */
701
702	/** @name Arithmetic assignment operations on bytes (unary).
703	* @{ */
704	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
705	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
706	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
707	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
708	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
709	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
710	/** @} */
711
712	/** @name Arithmetic assignment operations on words (unary).
713	* @{ */
714	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
715	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
716	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
717	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
718	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
719	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
720	/** @} */
721
722	/** @name Arithmetic assignment operations on double words (unary).
723	* @{ */
724	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
725	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
726	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
727	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
728	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
729	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
730	/** @} */
731
732	/** @name Arithmetic assignment operations on quad words (unary).
733	* @{ */
734	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
735	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
736	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
737	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
738	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
739	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
740	/** @} */
741
742
743	/** @name Shift operations on bytes (Group 2).
744	* @{ */
745	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
746	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
747	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
748	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
749	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
750	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
751	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
752	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
753	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
754	/** @} */
755
756	/** @name Shift operations on words (Group 2).
757	* @{ */
758	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
759	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
760	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
761	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
762	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
763	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
764	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
765	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
766	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
767	/** @} */
768
769	/** @name Shift operations on double words (Group 2).
770	* @{ */
771	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
772	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
773	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
774	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
775	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
776	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
777	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
778	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
779	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
780	/** @} */
781
782	/** @name Shift operations on words (Group 2).
783	* @{ */
784	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
785	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
786	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
787	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
788	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
789	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
790	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
791	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
792	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
793	/** @} */
794
795	/** @name Multiplication and division operations.
796	* @{ */
797	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
798	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
799	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
800	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
801
802	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
803	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
804	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
805	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
806
807	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
808	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
809	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
810	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
811
812	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
813	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
814	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
815	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
816	/** @} */
817
818	/** @name Byte Swap.
819	* @{ */
820	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
821	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
822	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
823	/** @} */
824
825
826	/** @name FPU operations taking a 32-bit float argument
827	* @{ */
828	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
829	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
830	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
831
832	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
833	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
834	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
835
836	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
837	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
838	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
839	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
840	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
841	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
842	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
843
844	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
845	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
846	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
847	/** @} */
848
849	/** @name FPU operations taking a 64-bit float argument
850	* @{ */
851	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
852	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
853	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
854
855	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
856	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
857	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
858	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
859	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
860	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
861
862	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
863	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
864	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
865	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
866	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
867	/** @} */
868
869	/** @name FPU operations taking a 80-bit float argument
870	* @{ */
871	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
872	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
873	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
874	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
875	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
876	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
877	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
878	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
879	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
880	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
881	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
882	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
883
884	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
885	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
886
887	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
888	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
889	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
890	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
891	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
892
893	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
894	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
895	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
896	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
897	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
898
899	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
900	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
901	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
902	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
903	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
904	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
905	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
906	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
907	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
908	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
909
910	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
911	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
912	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
913	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
914
915	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
916	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
917	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
918	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
919	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
920	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
921	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
922	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
923	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
924
925	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
926	PCRTFLOAT80U pr80Val));
927	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
928	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
929	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
930	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
931
932	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
933	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
934	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
935
936	/** @} */
937
938	/** @name FPU operations taking a 16-bit signed integer argument
939	* @{ */
940	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
941	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
942	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
943
944	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
945	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
946	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
947	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
948	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
949	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
950
951	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
952	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
953
954	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
955	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
956	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
957	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
958	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
959	/** @} */
960
961	/** @name FPU operations taking a 32-bit signed integer argument
962	* @{ */
963	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
964	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
965	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
966
967	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
968	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
969	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
970	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
971	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
972	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
973
974	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
975	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
976
977	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
978	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
979	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
980	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
981	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
982	/** @} */
983
984	/** @name FPU operations taking a 64-bit signed integer argument
985	* @{ */
986	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
987	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
988	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
989
990	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
991	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
992	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
993	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
994	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
995	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
996
997	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
998	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
999
1000	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1001	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1002	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1003	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1004	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1005	/** @} */
1006
1007
1008	/** @name Function tables.
1009	* @{
1010	*/
1011
1012	/**
1013	* Function table for a binary operator providing implementation based on
1014	* operand size.
1015	*/
1016	typedef struct IEMOPBINSIZES
1017	{
1018	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1019	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1020	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1021	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1022	} IEMOPBINSIZES;
1023	/** Pointer to a binary operator function table. */
1024	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1025
1026
1027	/**
1028	* Function table for a unary operator providing implementation based on
1029	* operand size.
1030	*/
1031	typedef struct IEMOPUNARYSIZES
1032	{
1033	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1034	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1035	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1036	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1037	} IEMOPUNARYSIZES;
1038	/** Pointer to a unary operator function table. */
1039	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1040
1041
1042	/**
1043	* Function table for a shift operator providing implementation based on
1044	* operand size.
1045	*/
1046	typedef struct IEMOPSHIFTSIZES
1047	{
1048	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1049	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1050	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1051	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1052	} IEMOPSHIFTSIZES;
1053	/** Pointer to a shift operator function table. */
1054	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1055
1056
1057	/**
1058	* Function table for a multiplication or division operation.
1059	*/
1060	typedef struct IEMOPMULDIVSIZES
1061	{
1062	PFNIEMAIMPLMULDIVU8 pfnU8;
1063	PFNIEMAIMPLMULDIVU16 pfnU16;
1064	PFNIEMAIMPLMULDIVU32 pfnU32;
1065	PFNIEMAIMPLMULDIVU64 pfnU64;
1066	} IEMOPMULDIVSIZES;
1067	/** Pointer to a multiplication or division operation function table. */
1068	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1069
1070
1071	/**
1072	* Function table for a double precision shift operator providing implementation
1073	* based on operand size.
1074	*/
1075	typedef struct IEMOPSHIFTDBLSIZES
1076	{
1077	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1078	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1079	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1080	} IEMOPSHIFTDBLSIZES;
1081	/** Pointer to a double precision shift function table. */
1082	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1083
1084
1085	/** @} */
1086
1087
1088	/** @name C instruction implementations for anything slightly complicated.
1089	* @{ */
1090
1091	/**
1092	* For typedef'ing or declaring a C instruction implementation function taking
1093	* no extra arguments.
1094	*
1095	* @param a_Name The name of the type.
1096	*/
1097	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1098	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1099	/**
1100	* For defining a C instruction implementation function taking no extra
1101	* arguments.
1102	*
1103	* @param a_Name The name of the function
1104	*/
1105	# define IEM_CIMPL_DEF_0(a_Name) \
1106	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1107	/**
1108	* For calling a C instruction implementation function taking no extra
1109	* arguments.
1110	*
1111	* This special call macro adds default arguments to the call and allow us to
1112	* change these later.
1113	*
1114	* @param a_fn The name of the function.
1115	*/
1116	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1117
1118	/**
1119	* For typedef'ing or declaring a C instruction implementation function taking
1120	* one extra argument.
1121	*
1122	* @param a_Name The name of the type.
1123	* @param a_Type0 The argument type.
1124	* @param a_Arg0 The argument name.
1125	*/
1126	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1127	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1128	/**
1129	* For defining a C instruction implementation function taking one extra
1130	* argument.
1131	*
1132	* @param a_Name The name of the function
1133	* @param a_Type0 The argument type.
1134	* @param a_Arg0 The argument name.
1135	*/
1136	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1137	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1138	/**
1139	* For calling a C instruction implementation function taking one extra
1140	* argument.
1141	*
1142	* This special call macro adds default arguments to the call and allow us to
1143	* change these later.
1144	*
1145	* @param a_fn The name of the function.
1146	* @param a0 The name of the 1st argument.
1147	*/
1148	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1149
1150	/**
1151	* For typedef'ing or declaring a C instruction implementation function taking
1152	* two extra arguments.
1153	*
1154	* @param a_Name The name of the type.
1155	* @param a_Type0 The type of the 1st argument
1156	* @param a_Arg0 The name of the 1st argument.
1157	* @param a_Type1 The type of the 2nd argument.
1158	* @param a_Arg1 The name of the 2nd argument.
1159	*/
1160	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1161	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1162	/**
1163	* For defining a C instruction implementation function taking two extra
1164	* arguments.
1165	*
1166	* @param a_Name The name of the function.
1167	* @param a_Type0 The type of the 1st argument
1168	* @param a_Arg0 The name of the 1st argument.
1169	* @param a_Type1 The type of the 2nd argument.
1170	* @param a_Arg1 The name of the 2nd argument.
1171	*/
1172	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1173	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1174	/**
1175	* For calling a C instruction implementation function taking two extra
1176	* arguments.
1177	*
1178	* This special call macro adds default arguments to the call and allow us to
1179	* change these later.
1180	*
1181	* @param a_fn The name of the function.
1182	* @param a0 The name of the 1st argument.
1183	* @param a1 The name of the 2nd argument.
1184	*/
1185	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1186
1187	/**
1188	* For typedef'ing or declaring a C instruction implementation function taking
1189	* three extra arguments.
1190	*
1191	* @param a_Name The name of the type.
1192	* @param a_Type0 The type of the 1st argument
1193	* @param a_Arg0 The name of the 1st argument.
1194	* @param a_Type1 The type of the 2nd argument.
1195	* @param a_Arg1 The name of the 2nd argument.
1196	* @param a_Type2 The type of the 3rd argument.
1197	* @param a_Arg2 The name of the 3rd argument.
1198	*/
1199	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1200	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1201	/**
1202	* For defining a C instruction implementation function taking three extra
1203	* arguments.
1204	*
1205	* @param a_Name The name of the function.
1206	* @param a_Type0 The type of the 1st argument
1207	* @param a_Arg0 The name of the 1st argument.
1208	* @param a_Type1 The type of the 2nd argument.
1209	* @param a_Arg1 The name of the 2nd argument.
1210	* @param a_Type2 The type of the 3rd argument.
1211	* @param a_Arg2 The name of the 3rd argument.
1212	*/
1213	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1214	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1215	/**
1216	* For calling a C instruction implementation function taking three extra
1217	* arguments.
1218	*
1219	* This special call macro adds default arguments to the call and allow us to
1220	* change these later.
1221	*
1222	* @param a_fn The name of the function.
1223	* @param a0 The name of the 1st argument.
1224	* @param a1 The name of the 2nd argument.
1225	* @param a2 The name of the 3rd argument.
1226	*/
1227	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1228
1229
1230	/**
1231	* For typedef'ing or declaring a C instruction implementation function taking
1232	* four extra arguments.
1233	*
1234	* @param a_Name The name of the type.
1235	* @param a_Type0 The type of the 1st argument
1236	* @param a_Arg0 The name of the 1st argument.
1237	* @param a_Type1 The type of the 2nd argument.
1238	* @param a_Arg1 The name of the 2nd argument.
1239	* @param a_Type2 The type of the 3rd argument.
1240	* @param a_Arg2 The name of the 3rd argument.
1241	* @param a_Type3 The type of the 4th argument.
1242	* @param a_Arg3 The name of the 4th argument.
1243	*/
1244	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1245	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1246	/**
1247	* For defining a C instruction implementation function taking four extra
1248	* arguments.
1249	*
1250	* @param a_Name The name of the function.
1251	* @param a_Type0 The type of the 1st argument
1252	* @param a_Arg0 The name of the 1st argument.
1253	* @param a_Type1 The type of the 2nd argument.
1254	* @param a_Arg1 The name of the 2nd argument.
1255	* @param a_Type2 The type of the 3rd argument.
1256	* @param a_Arg2 The name of the 3rd argument.
1257	* @param a_Type3 The type of the 4th argument.
1258	* @param a_Arg3 The name of the 4th argument.
1259	*/
1260	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1261	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1262	a_Type2 a_Arg2, a_Type3 a_Arg3))
1263	/**
1264	* For calling a C instruction implementation function taking four extra
1265	* arguments.
1266	*
1267	* This special call macro adds default arguments to the call and allow us to
1268	* change these later.
1269	*
1270	* @param a_fn The name of the function.
1271	* @param a0 The name of the 1st argument.
1272	* @param a1 The name of the 2nd argument.
1273	* @param a2 The name of the 3rd argument.
1274	* @param a3 The name of the 4th argument.
1275	*/
1276	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1277
1278
1279	/**
1280	* For typedef'ing or declaring a C instruction implementation function taking
1281	* five extra arguments.
1282	*
1283	* @param a_Name The name of the type.
1284	* @param a_Type0 The type of the 1st argument
1285	* @param a_Arg0 The name of the 1st argument.
1286	* @param a_Type1 The type of the 2nd argument.
1287	* @param a_Arg1 The name of the 2nd argument.
1288	* @param a_Type2 The type of the 3rd argument.
1289	* @param a_Arg2 The name of the 3rd argument.
1290	* @param a_Type3 The type of the 4th argument.
1291	* @param a_Arg3 The name of the 4th argument.
1292	* @param a_Type4 The type of the 5th argument.
1293	* @param a_Arg4 The name of the 5th argument.
1294	*/
1295	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1296	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1297	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1298	a_Type3 a_Arg3, a_Type4 a_Arg4))
1299	/**
1300	* For defining a C instruction implementation function taking five extra
1301	* arguments.
1302	*
1303	* @param a_Name The name of the function.
1304	* @param a_Type0 The type of the 1st argument
1305	* @param a_Arg0 The name of the 1st argument.
1306	* @param a_Type1 The type of the 2nd argument.
1307	* @param a_Arg1 The name of the 2nd argument.
1308	* @param a_Type2 The type of the 3rd argument.
1309	* @param a_Arg2 The name of the 3rd argument.
1310	* @param a_Type3 The type of the 4th argument.
1311	* @param a_Arg3 The name of the 4th argument.
1312	* @param a_Type4 The type of the 5th argument.
1313	* @param a_Arg4 The name of the 5th argument.
1314	*/
1315	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1316	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1317	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1318	a_Type3 a_Arg3, a_Type4 a_Arg4))
1319	/**
1320	* For calling a C instruction implementation function taking five extra
1321	* arguments.
1322	*
1323	* This special call macro adds default arguments to the call and allow us to
1324	* change these later.
1325	*
1326	* @param a_fn The name of the function.
1327	* @param a0 The name of the 1st argument.
1328	* @param a1 The name of the 2nd argument.
1329	* @param a2 The name of the 3rd argument.
1330	* @param a3 The name of the 4th argument.
1331	* @param a4 The name of the 5th argument.
1332	*/
1333	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1334
1335	/** @} */
1336
1337
1338	/** @} */
1339
1340	RT_C_DECLS_END
1341
1342	#endif
1343

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 42777

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