IEMInternal.h@ 44355

Last change on this file since 44355 was 42778, checked in by vboxsync, 12 years ago
IEM: CR4 and CR3 fixes. Debugging hacks.
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1	/* $Id: IEMInternal.h 42778 2012-08-11 22:47:03Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35	/** @def IEM_VERIFICATION_MODE_FULL
36	* Shorthand for:
37	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
38	*/
39	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
40	# define IEM_VERIFICATION_MODE_FULL
41	#endif
42
43
44	/** Finish and move to types.h */
45	typedef union
46	{
47	uint32_t u32;
48	} RTFLOAT32U;
49	typedef RTFLOAT32U *PRTFLOAT32U;
50	typedef RTFLOAT32U const *PCRTFLOAT32U;
51
52
53	/**
54	* Operand or addressing mode.
55	*/
56	typedef enum IEMMODE
57	{
58	IEMMODE_16BIT = 0,
59	IEMMODE_32BIT,
60	IEMMODE_64BIT
61	} IEMMODE;
62	AssertCompileSize(IEMMODE, 4);
63
64	/**
65	* Extended operand mode that includes a representation of 8-bit.
66	*
67	* This is used for packing down modes when invoking some C instruction
68	* implementations.
69	*/
70	typedef enum IEMMODEX
71	{
72	IEMMODEX_16BIT = IEMMODE_16BIT,
73	IEMMODEX_32BIT = IEMMODE_32BIT,
74	IEMMODEX_64BIT = IEMMODE_64BIT,
75	IEMMODEX_8BIT
76	} IEMMODEX;
77	AssertCompileSize(IEMMODEX, 4);
78
79
80	/**
81	* Branch types.
82	*/
83	typedef enum IEMBRANCH
84	{
85	IEMBRANCH_JUMP = 1,
86	IEMBRANCH_CALL,
87	IEMBRANCH_TRAP,
88	IEMBRANCH_SOFTWARE_INT,
89	IEMBRANCH_HARDWARE_INT
90	} IEMBRANCH;
91	AssertCompileSize(IEMBRANCH, 4);
92
93
94	/**
95	* A FPU result.
96	*/
97	typedef struct IEMFPURESULT
98	{
99	/** The output value. */
100	RTFLOAT80U r80Result;
101	/** The output status. */
102	uint16_t FSW;
103	} IEMFPURESULT;
104	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
105	/** Pointer to a FPU result. */
106	typedef IEMFPURESULT *PIEMFPURESULT;
107	/** Pointer to a const FPU result. */
108	typedef IEMFPURESULT const *PCIEMFPURESULT;
109
110
111	/**
112	* A FPU result consisting of two output values and FSW.
113	*/
114	typedef struct IEMFPURESULTTWO
115	{
116	/** The first output value. */
117	RTFLOAT80U r80Result1;
118	/** The output status. */
119	uint16_t FSW;
120	/** The second output value. */
121	RTFLOAT80U r80Result2;
122	} IEMFPURESULTTWO;
123	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
124	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
125	/** Pointer to a FPU result consisting of two output values and FSW. */
126	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
127	/** Pointer to a const FPU result consisting of two output values and FSW. */
128	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
129
130
131	#ifdef IEM_VERIFICATION_MODE_FULL
132
133	/**
134	* Verification event type.
135	*/
136	typedef enum IEMVERIFYEVENT
137	{
138	IEMVERIFYEVENT_INVALID = 0,
139	IEMVERIFYEVENT_IOPORT_READ,
140	IEMVERIFYEVENT_IOPORT_WRITE,
141	IEMVERIFYEVENT_RAM_WRITE,
142	IEMVERIFYEVENT_RAM_READ
143	} IEMVERIFYEVENT;
144
145	/** Checks if the event type is a RAM read or write. */
146	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
147
148	/**
149	* Verification event record.
150	*/
151	typedef struct IEMVERIFYEVTREC
152	{
153	/** Pointer to the next record in the list. */
154	struct IEMVERIFYEVTREC *pNext;
155	/** The event type. */
156	IEMVERIFYEVENT enmEvent;
157	/** The event data. */
158	union
159	{
160	/** IEMVERIFYEVENT_IOPORT_READ */
161	struct
162	{
163	RTIOPORT Port;
164	uint32_t cbValue;
165	} IOPortRead;
166
167	/** IEMVERIFYEVENT_IOPORT_WRITE */
168	struct
169	{
170	RTIOPORT Port;
171	uint32_t cbValue;
172	uint32_t u32Value;
173	} IOPortWrite;
174
175	/** IEMVERIFYEVENT_RAM_READ */
176	struct
177	{
178	RTGCPHYS GCPhys;
179	uint32_t cb;
180	} RamRead;
181
182	/** IEMVERIFYEVENT_RAM_WRITE */
183	struct
184	{
185	RTGCPHYS GCPhys;
186	uint32_t cb;
187	uint8_t ab[512];
188	} RamWrite;
189	} u;
190	} IEMVERIFYEVTREC;
191	/** Pointer to an IEM event verification records. */
192	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
193
194	#endif /* IEM_VERIFICATION_MODE_FULL */
195
196
197	/**
198	* The per-CPU IEM state.
199	*/
200	typedef struct IEMCPU
201	{
202	/** Pointer to the CPU context - ring-3 contex. */
203	R3PTRTYPE(PCPUMCTX) pCtxR3;
204	/** Pointer to the CPU context - ring-0 contex. */
205	R0PTRTYPE(PCPUMCTX) pCtxR0;
206	/** Pointer to the CPU context - raw-mode contex. */
207	RCPTRTYPE(PCPUMCTX) pCtxRC;
208
209	/** Offset of the VMCPU structure relative to this structure (negative). */
210	int32_t offVMCpu;
211	/** Offset of the VM structure relative to this structure (negative). */
212	int32_t offVM;
213
214	/** Whether to bypass access handlers or not. */
215	bool fBypassHandlers;
216	/** Explicit alignment padding. */
217	bool afAlignment0[3];
218
219	/** The flags of the current exception / interrupt. */
220	uint32_t fCurXcpt;
221	/** The current exception / interrupt. */
222	uint8_t uCurXcpt;
223	/** Exception / interrupt recursion depth. */
224	int8_t cXcptRecursions;
225	/** Explicit alignment padding. */
226	bool afAlignment1[1];
227	/** The CPL. */
228	uint8_t uCpl;
229	/** The current CPU execution mode (CS). */
230	IEMMODE enmCpuMode;
231	/** Info status code that needs to be propagated to the IEM caller.
232	* This cannot be passed internally, as it would complicate all success
233	* checks within the interpreter making the code larger and almost impossible
234	* to get right. Instead, we'll store status codes to pass on here. Each
235	* source of these codes will perform appropriate sanity checks. */
236	int32_t rcPassUp;
237
238	/** @name Statistics
239	* @{ */
240	/** The number of instructions we've executed. */
241	uint32_t cInstructions;
242	/** The number of potential exits. */
243	uint32_t cPotentialExits;
244	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
245	* This may contain uncommitted writes. */
246	uint32_t cbWritten;
247	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
248	uint32_t cRetInstrNotImplemented;
249	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
250	uint32_t cRetAspectNotImplemented;
251	/** Counts informational statuses returned (other than VINF_SUCCESS). */
252	uint32_t cRetInfStatuses;
253	/** Counts other error statuses returned. */
254	uint32_t cRetErrStatuses;
255	/** Number of times rcPassUp has been used. */
256	uint32_t cRetPassUpStatus;
257	#ifdef IEM_VERIFICATION_MODE_FULL
258	/** The Number of I/O port reads that has been performed. */
259	uint32_t cIOReads;
260	/** The Number of I/O port writes that has been performed. */
261	uint32_t cIOWrites;
262	/** Set if no comparison to REM is currently performed.
263	* This is used to skip past really slow bits. */
264	bool fNoRem;
265	/** Indicates that RAX and RDX differences should be ignored since RDTSC
266	* and RDTSCP are timing sensitive. */
267	bool fIgnoreRaxRdx;
268	/** Indicates that a MOVS instruction with overlapping source and destination
269	* was executed, causing the memory write records to be incorrrect. */
270	bool fOverlappingMovs;
271	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
272	* CPUM doesn't yet reflect. */
273	uint8_t uInjectCpl;
274	bool afAlignment2[4];
275	/** Mask of undefined eflags.
276	* The verifier will any difference in these flags. */
277	uint32_t fUndefinedEFlags;
278	/** The CS of the instruction being interpreted. */
279	RTSEL uOldCs;
280	/** The RIP of the instruction being interpreted. */
281	uint64_t uOldRip;
282	/** The physical address corresponding to abOpcodes[0]. */
283	RTGCPHYS GCPhysOpcodes;
284	#endif
285	/** @} */
286
287	/** @name Decoder state.
288	* @{ */
289
290	/** The default addressing mode . */
291	IEMMODE enmDefAddrMode;
292	/** The effective addressing mode . */
293	IEMMODE enmEffAddrMode;
294	/** The default operand mode . */
295	IEMMODE enmDefOpSize;
296	/** The effective operand mode . */
297	IEMMODE enmEffOpSize;
298
299	/** The prefix mask (IEM_OP_PRF_XXX). */
300	uint32_t fPrefixes;
301	/** The extra REX ModR/M register field bit (REX.R << 3). */
302	uint8_t uRexReg;
303	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
304	* (REX.B << 3). */
305	uint8_t uRexB;
306	/** The extra REX SIB index field bit (REX.X << 3). */
307	uint8_t uRexIndex;
308	/** The effective segment register (X86_SREG_XXX). */
309	uint8_t iEffSeg;
310
311	/** The current offset into abOpcodes. */
312	uint8_t offOpcode;
313	/** The size of what has currently been fetched into abOpcodes. */
314	uint8_t cbOpcode;
315	/** The opcode bytes. */
316	uint8_t abOpcode[15];
317	/** Offset into abOpcodes where the FPU instruction starts.
318	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
319	* instruction result is committed. */
320	uint8_t offFpuOpcode;
321
322	/** @}*/
323
324	/** Alignment padding for aMemMappings. */
325	uint8_t abAlignment2[4];
326
327	/** The number of active guest memory mappings. */
328	uint8_t cActiveMappings;
329	/** The next unused mapping index. */
330	uint8_t iNextMapping;
331	/** Records for tracking guest memory mappings. */
332	struct
333	{
334	/** The address of the mapped bytes. */
335	void *pv;
336	#if defined(IN_RC) && HC_ARCH_BITS == 64
337	uint32_t u32Alignment3; /*< Alignment padding. /
338	#endif
339	/** The access flags (IEM_ACCESS_XXX).
340	* IEM_ACCESS_INVALID if the entry is unused. */
341	uint32_t fAccess;
342	#if HC_ARCH_BITS == 64
343	uint32_t u32Alignment4; /*< Alignment padding. /
344	#endif
345	} aMemMappings[3];
346
347	/** Locking records for the mapped memory. */
348	union
349	{
350	PGMPAGEMAPLOCK Lock;
351	uint64_t au64Padding[2];
352	} aMemMappingLocks[3];
353
354	/** Bounce buffer info.
355	* This runs in parallel to aMemMappings. */
356	struct
357	{
358	/** The physical address of the first byte. */
359	RTGCPHYS GCPhysFirst;
360	/** The physical address of the second page. */
361	RTGCPHYS GCPhysSecond;
362	/** The number of bytes in the first page. */
363	uint16_t cbFirst;
364	/** The number of bytes in the second page. */
365	uint16_t cbSecond;
366	/** Whether it's unassigned memory. */
367	bool fUnassigned;
368	/** Explicit alignment padding. */
369	bool afAlignment5[3];
370	} aMemBbMappings[3];
371
372	/** Bounce buffer storage.
373	* This runs in parallel to aMemMappings and aMemBbMappings. */
374	struct
375	{
376	uint8_t ab[512];
377	} aBounceBuffers[3];
378
379	#ifdef IEM_VERIFICATION_MODE_FULL
380	/** The event verification records for what IEM did (LIFO). */
381	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
382	/** Insertion point for pIemEvtRecHead. */
383	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
384	/** The event verification records for what the other party did (FIFO). */
385	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
386	/** Insertion point for pOtherEvtRecHead. */
387	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
388	/** List of free event records. */
389	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
390	#endif
391	} IEMCPU;
392	/** Pointer to the per-CPU IEM state. */
393	typedef IEMCPU *PIEMCPU;
394
395	/** Converts a IEMCPU pointer to a VMCPU pointer.
396	* @returns VMCPU pointer.
397	* @param a_pIemCpu The IEM per CPU instance data.
398	*/
399	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
400
401	/** Converts a IEMCPU pointer to a VM pointer.
402	* @returns VM pointer.
403	* @param a_pIemCpu The IEM per CPU instance data.
404	*/
405	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
406
407	/** @name IEM_ACCESS_XXX - Access details.
408	* @{ */
409	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
410	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
411	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
412	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
413	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
414	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
415	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
416	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
417	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
418	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
419	/** The writes are partial, so if initialize the bounce buffer with the
420	* orignal RAM content. */
421	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
422	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
423	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
424	/** Read+write data alias. */
425	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
426	/** Write data alias. */
427	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
428	/** Read data alias. */
429	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
430	/** Instruction fetch alias. */
431	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
432	/** Stack write alias. */
433	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
434	/** Stack read alias. */
435	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
436	/** Stack read+write alias. */
437	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
438	/** Read system table alias. */
439	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
440	/** Read+write system table alias. */
441	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
442	/** @} */
443
444	/** @name Prefix constants (IEMCPU::fPrefixes)
445	* @{ */
446	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
447	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
448	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
449	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
450	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
451	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
452	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
453
454	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
455	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
456	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
457
458	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
459	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
460	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
461
462	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
463	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
464	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
465	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
466	/** @} */
467
468	/**
469	* Tests if verification mode is enabled.
470	*
471	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
472	* should therefore cause the compiler to eliminate the verification branch
473	* of an if statement. */
474	#ifdef IEM_VERIFICATION_MODE_FULL
475	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
476	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
477	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
478	#else
479	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
480	#endif
481
482	/**
483	* Tests if full verification mode is enabled.
484	*
485	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
486	* should therefore cause the compiler to eliminate the verification branch
487	* of an if statement. */
488	#ifdef IEM_VERIFICATION_MODE_FULL
489	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
490	#else
491	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
492	#endif
493
494	/** @def IEM_VERIFICATION_MODE
495	* Indicates that one of the verfication modes are enabled.
496	*/
497	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
498	# define IEM_VERIFICATION_MODE
499	#endif
500
501	/**
502	* Indicates to the verifier that the given flag set is undefined.
503	*
504	* Can be invoked again to add more flags.
505	*
506	* This is a NOOP if the verifier isn't compiled in.
507	*/
508	#ifdef IEM_VERIFICATION_MODE_FULL
509	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
510	#else
511	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
512	#endif
513
514
515	/** @def IEM_DECL_IMPL_TYPE
516	* For typedef'ing an instruction implementation function.
517	*
518	* @param a_RetType The return type.
519	* @param a_Name The name of the type.
520	* @param a_ArgList The argument list enclosed in parentheses.
521	*/
522
523	/** @def IEM_DECL_IMPL_DEF
524	* For defining an instruction implementation function.
525	*
526	* @param a_RetType The return type.
527	* @param a_Name The name of the type.
528	* @param a_ArgList The argument list enclosed in parentheses.
529	*/
530
531	#if defined(__GNUC__) && defined(RT_ARCH_X86)
532	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
533	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
534	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
535	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
536
537	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
538	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
539	a_RetType (__fastcall a_Name) a_ArgList
540	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
541	a_RetType __fastcall a_Name a_ArgList
542
543	#else
544	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
545	a_RetType (VBOXCALL a_Name) a_ArgList
546	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
547	a_RetType VBOXCALL a_Name a_ArgList
548
549	#endif
550
551	/** @name Arithmetic assignment operations on bytes (binary).
552	* @{ */
553	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
554	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
555	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
556	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
557	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
558	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
559	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
560	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
561	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
562	/** @} */
563
564	/** @name Arithmetic assignment operations on words (binary).
565	* @{ */
566	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
567	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
568	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
569	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
570	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
571	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
572	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
573	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
574	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
575	/** @} */
576
577	/** @name Arithmetic assignment operations on double words (binary).
578	* @{ */
579	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
580	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
581	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
582	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
583	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
584	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
585	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
586	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
587	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
588	/** @} */
589
590	/** @name Arithmetic assignment operations on quad words (binary).
591	* @{ */
592	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
593	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
594	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
595	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
596	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
597	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
598	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
599	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
600	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
601	/** @} */
602
603	/** @name Compare operations (thrown in with the binary ops).
604	* @{ */
605	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
606	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
607	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
608	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
609	/** @} */
610
611	/** @name Test operations (thrown in with the binary ops).
612	* @{ */
613	FNIEMAIMPLBINU8 iemAImpl_test_u8;
614	FNIEMAIMPLBINU16 iemAImpl_test_u16;
615	FNIEMAIMPLBINU32 iemAImpl_test_u32;
616	FNIEMAIMPLBINU64 iemAImpl_test_u64;
617	/** @} */
618
619	/** @name Bit operations operations (thrown in with the binary ops).
620	* @{ */
621	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
622	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
623	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
624	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
625	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
626	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
627	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
628	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
629	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
630	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
631	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
632	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
633	/** @} */
634
635	/** @name Exchange memory with register operations.
636	* @{ */
637	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
638	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
639	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
640	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
641	/** @} */
642
643	/** @name Exchange and add operations.
644	* @{ */
645	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
646	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
647	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
648	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
649	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
650	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
651	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
652	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
653	/** @} */
654
655	/** @name Compare and exchange.
656	* @{ */
657	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
658	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
659	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
660	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
661	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
662	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
663	#ifdef RT_ARCH_X86
664	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
665	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
666	#else
667	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
668	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
669	#endif
670	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
671	uint32_t *pEFlags));
672	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
673	uint32_t *pEFlags));
674	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
675	uint32_t *pEFlags));
676	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
677	uint32_t *pEFlags));
678	/** @} */
679
680	/** @name Double precision shifts
681	* @{ */
682	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
683	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
684	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
685	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
686	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
687	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
688	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
689	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
690	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
691	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
692	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
693	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
694	/** @} */
695
696
697	/** @name Bit search operations (thrown in with the binary ops).
698	* @{ */
699	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
700	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
701	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
702	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
703	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
704	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
705	/** @} */
706
707	/** @name Signed multiplication operations (thrown in with the binary ops).
708	* @{ */
709	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
710	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
711	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
712	/** @} */
713
714	/** @name Arithmetic assignment operations on bytes (unary).
715	* @{ */
716	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
717	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
718	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
719	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
720	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
721	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
722	/** @} */
723
724	/** @name Arithmetic assignment operations on words (unary).
725	* @{ */
726	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
727	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
728	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
729	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
730	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
731	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
732	/** @} */
733
734	/** @name Arithmetic assignment operations on double words (unary).
735	* @{ */
736	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
737	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
738	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
739	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
740	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
741	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
742	/** @} */
743
744	/** @name Arithmetic assignment operations on quad words (unary).
745	* @{ */
746	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
747	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
748	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
749	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
750	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
751	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
752	/** @} */
753
754
755	/** @name Shift operations on bytes (Group 2).
756	* @{ */
757	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
758	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
759	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
760	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
761	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
762	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
763	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
764	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
765	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
766	/** @} */
767
768	/** @name Shift operations on words (Group 2).
769	* @{ */
770	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
771	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
772	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
773	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
774	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
775	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
776	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
777	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
778	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
779	/** @} */
780
781	/** @name Shift operations on double words (Group 2).
782	* @{ */
783	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
784	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
785	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
786	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
787	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
788	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
789	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
790	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
791	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
792	/** @} */
793
794	/** @name Shift operations on words (Group 2).
795	* @{ */
796	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
797	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
798	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
799	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
800	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
801	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
802	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
803	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
804	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
805	/** @} */
806
807	/** @name Multiplication and division operations.
808	* @{ */
809	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
810	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
811	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
812	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
813
814	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
815	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
816	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
817	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
818
819	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
820	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
821	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
822	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
823
824	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
825	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
826	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
827	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
828	/** @} */
829
830	/** @name Byte Swap.
831	* @{ */
832	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
833	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
834	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
835	/** @} */
836
837
838	/** @name FPU operations taking a 32-bit float argument
839	* @{ */
840	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
841	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
842	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
843
844	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
845	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
846	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
847
848	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
849	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
850	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
851	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
852	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
853	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
854	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
855
856	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
857	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
858	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
859	/** @} */
860
861	/** @name FPU operations taking a 64-bit float argument
862	* @{ */
863	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
864	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
865	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
866
867	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
868	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
869	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
870	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
871	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
872	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
873
874	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
875	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
876	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
877	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
878	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
879	/** @} */
880
881	/** @name FPU operations taking a 80-bit float argument
882	* @{ */
883	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
884	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
885	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
886	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
887	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
888	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
889	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
890	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
891	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
892	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
893	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
894	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
895
896	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
897	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
898
899	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
900	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
901	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
902	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
903	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
904
905	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
906	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
907	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
908	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
909	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
910
911	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
912	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
913	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
914	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
915	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
916	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
917	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
918	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
919	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
920	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
921
922	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
923	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
924	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
925	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
926
927	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
928	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
929	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
930	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
931	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
932	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
933	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
934	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
935	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
936
937	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
938	PCRTFLOAT80U pr80Val));
939	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
940	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
941	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
942	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
943
944	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
945	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
946	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
947
948	/** @} */
949
950	/** @name FPU operations taking a 16-bit signed integer argument
951	* @{ */
952	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
953	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
954	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
955
956	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
957	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
958	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
959	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
960	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
961	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
962
963	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
964	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
965
966	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
967	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
968	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
969	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
970	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
971	/** @} */
972
973	/** @name FPU operations taking a 32-bit signed integer argument
974	* @{ */
975	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
976	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
977	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
978
979	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
980	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
981	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
982	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
983	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
984	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
985
986	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
987	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
988
989	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
990	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
991	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
992	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
993	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
994	/** @} */
995
996	/** @name FPU operations taking a 64-bit signed integer argument
997	* @{ */
998	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
999	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1000	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1001
1002	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1003	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1004	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1005	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1006	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1007	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1008
1009	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1010	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1011
1012	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1013	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1014	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1015	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1016	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1017	/** @} */
1018
1019
1020	/** @name Function tables.
1021	* @{
1022	*/
1023
1024	/**
1025	* Function table for a binary operator providing implementation based on
1026	* operand size.
1027	*/
1028	typedef struct IEMOPBINSIZES
1029	{
1030	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1031	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1032	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1033	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1034	} IEMOPBINSIZES;
1035	/** Pointer to a binary operator function table. */
1036	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1037
1038
1039	/**
1040	* Function table for a unary operator providing implementation based on
1041	* operand size.
1042	*/
1043	typedef struct IEMOPUNARYSIZES
1044	{
1045	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1046	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1047	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1048	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1049	} IEMOPUNARYSIZES;
1050	/** Pointer to a unary operator function table. */
1051	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1052
1053
1054	/**
1055	* Function table for a shift operator providing implementation based on
1056	* operand size.
1057	*/
1058	typedef struct IEMOPSHIFTSIZES
1059	{
1060	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1061	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1062	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1063	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1064	} IEMOPSHIFTSIZES;
1065	/** Pointer to a shift operator function table. */
1066	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1067
1068
1069	/**
1070	* Function table for a multiplication or division operation.
1071	*/
1072	typedef struct IEMOPMULDIVSIZES
1073	{
1074	PFNIEMAIMPLMULDIVU8 pfnU8;
1075	PFNIEMAIMPLMULDIVU16 pfnU16;
1076	PFNIEMAIMPLMULDIVU32 pfnU32;
1077	PFNIEMAIMPLMULDIVU64 pfnU64;
1078	} IEMOPMULDIVSIZES;
1079	/** Pointer to a multiplication or division operation function table. */
1080	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1081
1082
1083	/**
1084	* Function table for a double precision shift operator providing implementation
1085	* based on operand size.
1086	*/
1087	typedef struct IEMOPSHIFTDBLSIZES
1088	{
1089	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1090	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1091	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1092	} IEMOPSHIFTDBLSIZES;
1093	/** Pointer to a double precision shift function table. */
1094	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1095
1096
1097	/** @} */
1098
1099
1100	/** @name C instruction implementations for anything slightly complicated.
1101	* @{ */
1102
1103	/**
1104	* For typedef'ing or declaring a C instruction implementation function taking
1105	* no extra arguments.
1106	*
1107	* @param a_Name The name of the type.
1108	*/
1109	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1110	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1111	/**
1112	* For defining a C instruction implementation function taking no extra
1113	* arguments.
1114	*
1115	* @param a_Name The name of the function
1116	*/
1117	# define IEM_CIMPL_DEF_0(a_Name) \
1118	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1119	/**
1120	* For calling a C instruction implementation function taking no extra
1121	* arguments.
1122	*
1123	* This special call macro adds default arguments to the call and allow us to
1124	* change these later.
1125	*
1126	* @param a_fn The name of the function.
1127	*/
1128	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1129
1130	/**
1131	* For typedef'ing or declaring a C instruction implementation function taking
1132	* one extra argument.
1133	*
1134	* @param a_Name The name of the type.
1135	* @param a_Type0 The argument type.
1136	* @param a_Arg0 The argument name.
1137	*/
1138	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1139	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1140	/**
1141	* For defining a C instruction implementation function taking one extra
1142	* argument.
1143	*
1144	* @param a_Name The name of the function
1145	* @param a_Type0 The argument type.
1146	* @param a_Arg0 The argument name.
1147	*/
1148	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1149	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1150	/**
1151	* For calling a C instruction implementation function taking one extra
1152	* argument.
1153	*
1154	* This special call macro adds default arguments to the call and allow us to
1155	* change these later.
1156	*
1157	* @param a_fn The name of the function.
1158	* @param a0 The name of the 1st argument.
1159	*/
1160	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1161
1162	/**
1163	* For typedef'ing or declaring a C instruction implementation function taking
1164	* two extra arguments.
1165	*
1166	* @param a_Name The name of the type.
1167	* @param a_Type0 The type of the 1st argument
1168	* @param a_Arg0 The name of the 1st argument.
1169	* @param a_Type1 The type of the 2nd argument.
1170	* @param a_Arg1 The name of the 2nd argument.
1171	*/
1172	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1173	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1174	/**
1175	* For defining a C instruction implementation function taking two extra
1176	* arguments.
1177	*
1178	* @param a_Name The name of the function.
1179	* @param a_Type0 The type of the 1st argument
1180	* @param a_Arg0 The name of the 1st argument.
1181	* @param a_Type1 The type of the 2nd argument.
1182	* @param a_Arg1 The name of the 2nd argument.
1183	*/
1184	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1185	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1186	/**
1187	* For calling a C instruction implementation function taking two extra
1188	* arguments.
1189	*
1190	* This special call macro adds default arguments to the call and allow us to
1191	* change these later.
1192	*
1193	* @param a_fn The name of the function.
1194	* @param a0 The name of the 1st argument.
1195	* @param a1 The name of the 2nd argument.
1196	*/
1197	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1198
1199	/**
1200	* For typedef'ing or declaring a C instruction implementation function taking
1201	* three extra arguments.
1202	*
1203	* @param a_Name The name of the type.
1204	* @param a_Type0 The type of the 1st argument
1205	* @param a_Arg0 The name of the 1st argument.
1206	* @param a_Type1 The type of the 2nd argument.
1207	* @param a_Arg1 The name of the 2nd argument.
1208	* @param a_Type2 The type of the 3rd argument.
1209	* @param a_Arg2 The name of the 3rd argument.
1210	*/
1211	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1212	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1213	/**
1214	* For defining a C instruction implementation function taking three extra
1215	* arguments.
1216	*
1217	* @param a_Name The name of the function.
1218	* @param a_Type0 The type of the 1st argument
1219	* @param a_Arg0 The name of the 1st argument.
1220	* @param a_Type1 The type of the 2nd argument.
1221	* @param a_Arg1 The name of the 2nd argument.
1222	* @param a_Type2 The type of the 3rd argument.
1223	* @param a_Arg2 The name of the 3rd argument.
1224	*/
1225	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1226	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1227	/**
1228	* For calling a C instruction implementation function taking three extra
1229	* arguments.
1230	*
1231	* This special call macro adds default arguments to the call and allow us to
1232	* change these later.
1233	*
1234	* @param a_fn The name of the function.
1235	* @param a0 The name of the 1st argument.
1236	* @param a1 The name of the 2nd argument.
1237	* @param a2 The name of the 3rd argument.
1238	*/
1239	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1240
1241
1242	/**
1243	* For typedef'ing or declaring a C instruction implementation function taking
1244	* four extra arguments.
1245	*
1246	* @param a_Name The name of the type.
1247	* @param a_Type0 The type of the 1st argument
1248	* @param a_Arg0 The name of the 1st argument.
1249	* @param a_Type1 The type of the 2nd argument.
1250	* @param a_Arg1 The name of the 2nd argument.
1251	* @param a_Type2 The type of the 3rd argument.
1252	* @param a_Arg2 The name of the 3rd argument.
1253	* @param a_Type3 The type of the 4th argument.
1254	* @param a_Arg3 The name of the 4th argument.
1255	*/
1256	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1257	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1258	/**
1259	* For defining a C instruction implementation function taking four extra
1260	* arguments.
1261	*
1262	* @param a_Name The name of the function.
1263	* @param a_Type0 The type of the 1st argument
1264	* @param a_Arg0 The name of the 1st argument.
1265	* @param a_Type1 The type of the 2nd argument.
1266	* @param a_Arg1 The name of the 2nd argument.
1267	* @param a_Type2 The type of the 3rd argument.
1268	* @param a_Arg2 The name of the 3rd argument.
1269	* @param a_Type3 The type of the 4th argument.
1270	* @param a_Arg3 The name of the 4th argument.
1271	*/
1272	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1273	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1274	a_Type2 a_Arg2, a_Type3 a_Arg3))
1275	/**
1276	* For calling a C instruction implementation function taking four extra
1277	* arguments.
1278	*
1279	* This special call macro adds default arguments to the call and allow us to
1280	* change these later.
1281	*
1282	* @param a_fn The name of the function.
1283	* @param a0 The name of the 1st argument.
1284	* @param a1 The name of the 2nd argument.
1285	* @param a2 The name of the 3rd argument.
1286	* @param a3 The name of the 4th argument.
1287	*/
1288	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1289
1290
1291	/**
1292	* For typedef'ing or declaring a C instruction implementation function taking
1293	* five extra arguments.
1294	*
1295	* @param a_Name The name of the type.
1296	* @param a_Type0 The type of the 1st argument
1297	* @param a_Arg0 The name of the 1st argument.
1298	* @param a_Type1 The type of the 2nd argument.
1299	* @param a_Arg1 The name of the 2nd argument.
1300	* @param a_Type2 The type of the 3rd argument.
1301	* @param a_Arg2 The name of the 3rd argument.
1302	* @param a_Type3 The type of the 4th argument.
1303	* @param a_Arg3 The name of the 4th argument.
1304	* @param a_Type4 The type of the 5th argument.
1305	* @param a_Arg4 The name of the 5th argument.
1306	*/
1307	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1308	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1309	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1310	a_Type3 a_Arg3, a_Type4 a_Arg4))
1311	/**
1312	* For defining a C instruction implementation function taking five extra
1313	* arguments.
1314	*
1315	* @param a_Name The name of the function.
1316	* @param a_Type0 The type of the 1st argument
1317	* @param a_Arg0 The name of the 1st argument.
1318	* @param a_Type1 The type of the 2nd argument.
1319	* @param a_Arg1 The name of the 2nd argument.
1320	* @param a_Type2 The type of the 3rd argument.
1321	* @param a_Arg2 The name of the 3rd argument.
1322	* @param a_Type3 The type of the 4th argument.
1323	* @param a_Arg3 The name of the 4th argument.
1324	* @param a_Type4 The type of the 5th argument.
1325	* @param a_Arg4 The name of the 5th argument.
1326	*/
1327	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1328	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1329	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1330	a_Type3 a_Arg3, a_Type4 a_Arg4))
1331	/**
1332	* For calling a C instruction implementation function taking five extra
1333	* arguments.
1334	*
1335	* This special call macro adds default arguments to the call and allow us to
1336	* change these later.
1337	*
1338	* @param a_fn The name of the function.
1339	* @param a0 The name of the 1st argument.
1340	* @param a1 The name of the 2nd argument.
1341	* @param a2 The name of the 3rd argument.
1342	* @param a3 The name of the 4th argument.
1343	* @param a4 The name of the 5th argument.
1344	*/
1345	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1346
1347	/** @} */
1348
1349
1350	/** @} */
1351
1352	RT_C_DECLS_END
1353
1354	#endif
1355

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 44355

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