IEMInternal.h@ 56021

Last change on this file since 56021 was 56021, checked in by vboxsync, 10 years ago
IEM_STATIC and stuff.
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1	/* $Id: IEMInternal.h 56021 2015-05-21 19:22:15Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** For expanding symbol in slickedit and other products tagging and
37	* crossreferencing IEM symbols. */
38	#ifndef IEM_STATIC
39	# define IEM_STATIC static
40	#endif
41
42	/** @def IEM_VERIFICATION_MODE_FULL
43	* Shorthand for:
44	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
45	*/
46	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
47	# define IEM_VERIFICATION_MODE_FULL
48	#endif
49
50
51	/** Finish and move to types.h */
52	typedef union
53	{
54	uint32_t u32;
55	} RTFLOAT32U;
56	typedef RTFLOAT32U *PRTFLOAT32U;
57	typedef RTFLOAT32U const *PCRTFLOAT32U;
58
59
60	/**
61	* Extended operand mode that includes a representation of 8-bit.
62	*
63	* This is used for packing down modes when invoking some C instruction
64	* implementations.
65	*/
66	typedef enum IEMMODEX
67	{
68	IEMMODEX_16BIT = IEMMODE_16BIT,
69	IEMMODEX_32BIT = IEMMODE_32BIT,
70	IEMMODEX_64BIT = IEMMODE_64BIT,
71	IEMMODEX_8BIT
72	} IEMMODEX;
73	AssertCompileSize(IEMMODEX, 4);
74
75
76	/**
77	* Branch types.
78	*/
79	typedef enum IEMBRANCH
80	{
81	IEMBRANCH_JUMP = 1,
82	IEMBRANCH_CALL,
83	IEMBRANCH_TRAP,
84	IEMBRANCH_SOFTWARE_INT,
85	IEMBRANCH_HARDWARE_INT
86	} IEMBRANCH;
87	AssertCompileSize(IEMBRANCH, 4);
88
89
90	/**
91	* A FPU result.
92	*/
93	typedef struct IEMFPURESULT
94	{
95	/** The output value. */
96	RTFLOAT80U r80Result;
97	/** The output status. */
98	uint16_t FSW;
99	} IEMFPURESULT;
100	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
101	/** Pointer to a FPU result. */
102	typedef IEMFPURESULT *PIEMFPURESULT;
103	/** Pointer to a const FPU result. */
104	typedef IEMFPURESULT const *PCIEMFPURESULT;
105
106
107	/**
108	* A FPU result consisting of two output values and FSW.
109	*/
110	typedef struct IEMFPURESULTTWO
111	{
112	/** The first output value. */
113	RTFLOAT80U r80Result1;
114	/** The output status. */
115	uint16_t FSW;
116	/** The second output value. */
117	RTFLOAT80U r80Result2;
118	} IEMFPURESULTTWO;
119	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
120	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
121	/** Pointer to a FPU result consisting of two output values and FSW. */
122	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
123	/** Pointer to a const FPU result consisting of two output values and FSW. */
124	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
125
126
127	#ifdef IEM_VERIFICATION_MODE_FULL
128
129	/**
130	* Verification event type.
131	*/
132	typedef enum IEMVERIFYEVENT
133	{
134	IEMVERIFYEVENT_INVALID = 0,
135	IEMVERIFYEVENT_IOPORT_READ,
136	IEMVERIFYEVENT_IOPORT_WRITE,
137	IEMVERIFYEVENT_RAM_WRITE,
138	IEMVERIFYEVENT_RAM_READ
139	} IEMVERIFYEVENT;
140
141	/** Checks if the event type is a RAM read or write. */
142	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
143
144	/**
145	* Verification event record.
146	*/
147	typedef struct IEMVERIFYEVTREC
148	{
149	/** Pointer to the next record in the list. */
150	struct IEMVERIFYEVTREC *pNext;
151	/** The event type. */
152	IEMVERIFYEVENT enmEvent;
153	/** The event data. */
154	union
155	{
156	/** IEMVERIFYEVENT_IOPORT_READ */
157	struct
158	{
159	RTIOPORT Port;
160	uint32_t cbValue;
161	} IOPortRead;
162
163	/** IEMVERIFYEVENT_IOPORT_WRITE */
164	struct
165	{
166	RTIOPORT Port;
167	uint32_t cbValue;
168	uint32_t u32Value;
169	} IOPortWrite;
170
171	/** IEMVERIFYEVENT_RAM_READ */
172	struct
173	{
174	RTGCPHYS GCPhys;
175	uint32_t cb;
176	} RamRead;
177
178	/** IEMVERIFYEVENT_RAM_WRITE */
179	struct
180	{
181	RTGCPHYS GCPhys;
182	uint32_t cb;
183	uint8_t ab[512];
184	} RamWrite;
185	} u;
186	} IEMVERIFYEVTREC;
187	/** Pointer to an IEM event verification records. */
188	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
189
190	#endif /* IEM_VERIFICATION_MODE_FULL */
191
192
193	/**
194	* The per-CPU IEM state.
195	*/
196	typedef struct IEMCPU
197	{
198	/** Pointer to the CPU context - ring-3 context. */
199	R3PTRTYPE(PCPUMCTX) pCtxR3;
200	/** Pointer to the CPU context - ring-0 context. */
201	R0PTRTYPE(PCPUMCTX) pCtxR0;
202	/** Pointer to the CPU context - raw-mode context. */
203	RCPTRTYPE(PCPUMCTX) pCtxRC;
204
205	/** Offset of the VMCPU structure relative to this structure (negative). */
206	int32_t offVMCpu;
207	/** Offset of the VM structure relative to this structure (negative). */
208	int32_t offVM;
209
210	/** Whether to bypass access handlers or not. */
211	bool fBypassHandlers;
212	/** Indicates that we're interpreting patch code - RC only! */
213	bool fInPatchCode;
214	/** Explicit alignment padding. */
215	bool afAlignment0[2];
216
217	/** The flags of the current exception / interrupt. */
218	uint32_t fCurXcpt;
219	/** The current exception / interrupt. */
220	uint8_t uCurXcpt;
221	/** Exception / interrupt recursion depth. */
222	int8_t cXcptRecursions;
223	/** Explicit alignment padding. */
224	bool afAlignment1[1];
225	/** The CPL. */
226	uint8_t uCpl;
227	/** The current CPU execution mode (CS). */
228	IEMMODE enmCpuMode;
229	/** Info status code that needs to be propagated to the IEM caller.
230	* This cannot be passed internally, as it would complicate all success
231	* checks within the interpreter making the code larger and almost impossible
232	* to get right. Instead, we'll store status codes to pass on here. Each
233	* source of these codes will perform appropriate sanity checks. */
234	int32_t rcPassUp;
235
236	/** @name Statistics
237	* @{ */
238	/** The number of instructions we've executed. */
239	uint32_t cInstructions;
240	/** The number of potential exits. */
241	uint32_t cPotentialExits;
242	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
243	* This may contain uncommitted writes. */
244	uint32_t cbWritten;
245	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
246	uint32_t cRetInstrNotImplemented;
247	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
248	uint32_t cRetAspectNotImplemented;
249	/** Counts informational statuses returned (other than VINF_SUCCESS). */
250	uint32_t cRetInfStatuses;
251	/** Counts other error statuses returned. */
252	uint32_t cRetErrStatuses;
253	/** Number of times rcPassUp has been used. */
254	uint32_t cRetPassUpStatus;
255	#ifdef IEM_VERIFICATION_MODE_FULL
256	/** The Number of I/O port reads that has been performed. */
257	uint32_t cIOReads;
258	/** The Number of I/O port writes that has been performed. */
259	uint32_t cIOWrites;
260	/** Set if no comparison to REM is currently performed.
261	* This is used to skip past really slow bits. */
262	bool fNoRem;
263	/** Indicates that RAX and RDX differences should be ignored since RDTSC
264	* and RDTSCP are timing sensitive. */
265	bool fIgnoreRaxRdx;
266	/** Indicates that a MOVS instruction with overlapping source and destination
267	* was executed, causing the memory write records to be incorrrect. */
268	bool fOverlappingMovs;
269	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
270	bool fProblematicMemory;
271	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
272	* CPUM doesn't yet reflect. */
273	uint8_t uInjectCpl;
274	bool afAlignment2[3];
275	/** Mask of undefined eflags.
276	* The verifier will any difference in these flags. */
277	uint32_t fUndefinedEFlags;
278	/** The CS of the instruction being interpreted. */
279	RTSEL uOldCs;
280	/** The RIP of the instruction being interpreted. */
281	uint64_t uOldRip;
282	/** The physical address corresponding to abOpcodes[0]. */
283	RTGCPHYS GCPhysOpcodes;
284	#endif
285	/** @} */
286
287	/** @name Decoder state.
288	* @{ */
289
290	/** The default addressing mode . */
291	IEMMODE enmDefAddrMode;
292	/** The effective addressing mode . */
293	IEMMODE enmEffAddrMode;
294	/** The default operand mode . */
295	IEMMODE enmDefOpSize;
296	/** The effective operand mode . */
297	IEMMODE enmEffOpSize;
298
299	/** The prefix mask (IEM_OP_PRF_XXX). */
300	uint32_t fPrefixes;
301	/** The extra REX ModR/M register field bit (REX.R << 3). */
302	uint8_t uRexReg;
303	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
304	* (REX.B << 3). */
305	uint8_t uRexB;
306	/** The extra REX SIB index field bit (REX.X << 3). */
307	uint8_t uRexIndex;
308	/** The effective segment register (X86_SREG_XXX). */
309	uint8_t iEffSeg;
310
311	/** The current offset into abOpcodes. */
312	uint8_t offOpcode;
313	/** The size of what has currently been fetched into abOpcodes. */
314	uint8_t cbOpcode;
315	/** The opcode bytes. */
316	uint8_t abOpcode[15];
317	/** Offset into abOpcodes where the FPU instruction starts.
318	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
319	* instruction result is committed. */
320	uint8_t offFpuOpcode;
321
322	/** @}*/
323
324	/** Alignment padding for aMemMappings. */
325	uint8_t abAlignment2[4];
326
327	/** The number of active guest memory mappings. */
328	uint8_t cActiveMappings;
329	/** The next unused mapping index. */
330	uint8_t iNextMapping;
331	/** Records for tracking guest memory mappings. */
332	struct
333	{
334	/** The address of the mapped bytes. */
335	void *pv;
336	#if defined(IN_RC) && HC_ARCH_BITS == 64
337	uint32_t u32Alignment3; /*< Alignment padding. /
338	#endif
339	/** The access flags (IEM_ACCESS_XXX).
340	* IEM_ACCESS_INVALID if the entry is unused. */
341	uint32_t fAccess;
342	#if HC_ARCH_BITS == 64
343	uint32_t u32Alignment4; /*< Alignment padding. /
344	#endif
345	} aMemMappings[3];
346
347	/** Locking records for the mapped memory. */
348	union
349	{
350	PGMPAGEMAPLOCK Lock;
351	uint64_t au64Padding[2];
352	} aMemMappingLocks[3];
353
354	/** Bounce buffer info.
355	* This runs in parallel to aMemMappings. */
356	struct
357	{
358	/** The physical address of the first byte. */
359	RTGCPHYS GCPhysFirst;
360	/** The physical address of the second page. */
361	RTGCPHYS GCPhysSecond;
362	/** The number of bytes in the first page. */
363	uint16_t cbFirst;
364	/** The number of bytes in the second page. */
365	uint16_t cbSecond;
366	/** Whether it's unassigned memory. */
367	bool fUnassigned;
368	/** Explicit alignment padding. */
369	bool afAlignment5[3];
370	} aMemBbMappings[3];
371
372	/** Bounce buffer storage.
373	* This runs in parallel to aMemMappings and aMemBbMappings. */
374	struct
375	{
376	uint8_t ab[512];
377	} aBounceBuffers[3];
378
379	/** @name Target CPU information.
380	* @{ */
381	/** The CPU vendor. */
382	CPUMCPUVENDOR enmCpuVendor;
383	/** @} */
384
385	/** @name Host CPU information.
386	* @{ */
387	/** The CPU vendor. */
388	CPUMCPUVENDOR enmHostCpuVendor;
389	/** @} */
390
391	#ifdef IEM_VERIFICATION_MODE_FULL
392	/** The event verification records for what IEM did (LIFO). */
393	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
394	/** Insertion point for pIemEvtRecHead. */
395	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
396	/** The event verification records for what the other party did (FIFO). */
397	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
398	/** Insertion point for pOtherEvtRecHead. */
399	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
400	/** List of free event records. */
401	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
402	#endif
403	} IEMCPU;
404	/** Pointer to the per-CPU IEM state. */
405	typedef IEMCPU *PIEMCPU;
406	/** Pointer to the const per-CPU IEM state. */
407	typedef IEMCPU const *PCIEMCPU;
408
409	/** Converts a IEMCPU pointer to a VMCPU pointer.
410	* @returns VMCPU pointer.
411	* @param a_pIemCpu The IEM per CPU instance data.
412	*/
413	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
414
415	/** Converts a IEMCPU pointer to a VM pointer.
416	* @returns VM pointer.
417	* @param a_pIemCpu The IEM per CPU instance data.
418	*/
419	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
420
421	/** @name IEM_ACCESS_XXX - Access details.
422	* @{ */
423	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
424	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
425	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
426	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
427	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
428	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
429	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
430	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
431	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
432	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
433	/** The writes are partial, so if initialize the bounce buffer with the
434	* orignal RAM content. */
435	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
436	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
437	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
438	/** Read+write data alias. */
439	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
440	/** Write data alias. */
441	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
442	/** Read data alias. */
443	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
444	/** Instruction fetch alias. */
445	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
446	/** Stack write alias. */
447	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
448	/** Stack read alias. */
449	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
450	/** Stack read+write alias. */
451	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
452	/** Read system table alias. */
453	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
454	/** Read+write system table alias. */
455	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
456	/** @} */
457
458	/** @name Prefix constants (IEMCPU::fPrefixes)
459	* @{ */
460	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
461	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
462	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
463	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
464	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
465	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
466	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
467
468	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
469	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
470	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
471
472	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
473	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
474	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
475
476	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
477	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
478	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
479	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
480	/** Mask with all the REX prefix flags.
481	* This is generally for use when needing to undo the REX prefixes when they
482	* are followed legacy prefixes and therefore does not immediately preceed
483	* the first opcode byte.
484	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
485	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
486	/** @} */
487
488	/** @name Opcode forms
489	* @{ */
490	/** ModR/M: reg, r/m */
491	#define IEMOPFORM_RM 0
492	/** ModR/M: reg, r/m (register) */
493	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
494	/** ModR/M: reg, r/m (memory) */
495	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
496	/** ModR/M: r/m, reg */
497	#define IEMOPFORM_MR 1
498	/** ModR/M: r/m (register), reg */
499	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
500	/** ModR/M: r/m (memory), reg */
501	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
502	/** ModR/M: r/m only */
503	#define IEMOPFORM_M 2
504	/** ModR/M: r/m only (register). */
505	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
506	/** ModR/M: r/m only (memory). */
507	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
508	/** ModR/M: reg only */
509	#define IEMOPFORM_R 3
510
511	/** Fixed register instruction, no R/M. */
512	#define IEMOPFORM_FIXED 4
513
514	/** The r/m is a register. */
515	#define IEMOPFORM_MOD3 RT_BIT_32(8)
516	/** The r/m is a memory access. */
517	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
518	/** @} */
519
520	/**
521	* Possible hardware task switch sources.
522	*/
523	typedef enum IEMTASKSWITCH
524	{
525	/** Task switch caused by an interrupt/exception. */
526	IEMTASKSWITCH_INT_XCPT = 1,
527	/** Task switch caused by a far CALL. */
528	IEMTASKSWITCH_CALL,
529	/** Task switch caused by a far JMP. */
530	IEMTASKSWITCH_JUMP,
531	/** Task switch caused by an IRET. */
532	IEMTASKSWITCH_IRET
533	} IEMTASKSWITCH;
534	AssertCompileSize(IEMTASKSWITCH, 4);
535
536
537	/**
538	* Tests if verification mode is enabled.
539	*
540	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
541	* should therefore cause the compiler to eliminate the verification branch
542	* of an if statement. */
543	#ifdef IEM_VERIFICATION_MODE_FULL
544	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
545	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
546	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
547	#else
548	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
549	#endif
550
551	/**
552	* Tests if full verification mode is enabled.
553	*
554	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
555	* should therefore cause the compiler to eliminate the verification branch
556	* of an if statement. */
557	#ifdef IEM_VERIFICATION_MODE_FULL
558	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
559	#else
560	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
561	#endif
562
563	/**
564	* Tests if full verification mode is enabled again REM.
565	*
566	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
567	* should therefore cause the compiler to eliminate the verification branch
568	* of an if statement. */
569	#ifdef IEM_VERIFICATION_MODE_FULL
570	# ifdef IEM_VERIFICATION_MODE_FULL_HM
571	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
572	# else
573	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
574	# endif
575	#else
576	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
577	#endif
578
579	/** @def IEM_VERIFICATION_MODE
580	* Indicates that one of the verfication modes are enabled.
581	*/
582	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
583	# define IEM_VERIFICATION_MODE
584	#endif
585
586	/**
587	* Indicates to the verifier that the given flag set is undefined.
588	*
589	* Can be invoked again to add more flags.
590	*
591	* This is a NOOP if the verifier isn't compiled in.
592	*/
593	#ifdef IEM_VERIFICATION_MODE_FULL
594	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
595	#else
596	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
597	#endif
598
599
600	/** @def IEM_DECL_IMPL_TYPE
601	* For typedef'ing an instruction implementation function.
602	*
603	* @param a_RetType The return type.
604	* @param a_Name The name of the type.
605	* @param a_ArgList The argument list enclosed in parentheses.
606	*/
607
608	/** @def IEM_DECL_IMPL_DEF
609	* For defining an instruction implementation function.
610	*
611	* @param a_RetType The return type.
612	* @param a_Name The name of the type.
613	* @param a_ArgList The argument list enclosed in parentheses.
614	*/
615
616	#if defined(__GNUC__) && defined(RT_ARCH_X86)
617	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
618	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
619	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
620	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
621
622	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
623	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
624	a_RetType (__fastcall a_Name) a_ArgList
625	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
626	a_RetType __fastcall a_Name a_ArgList
627
628	#else
629	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
630	a_RetType (VBOXCALL a_Name) a_ArgList
631	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
632	a_RetType VBOXCALL a_Name a_ArgList
633
634	#endif
635
636	/** @name Arithmetic assignment operations on bytes (binary).
637	* @{ */
638	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
639	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
640	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
641	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
642	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
643	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
644	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
645	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
646	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
647	/** @} */
648
649	/** @name Arithmetic assignment operations on words (binary).
650	* @{ */
651	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
652	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
653	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
654	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
655	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
656	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
657	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
658	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
659	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
660	/** @} */
661
662	/** @name Arithmetic assignment operations on double words (binary).
663	* @{ */
664	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
665	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
666	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
667	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
668	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
669	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
670	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
671	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
672	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
673	/** @} */
674
675	/** @name Arithmetic assignment operations on quad words (binary).
676	* @{ */
677	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
678	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
679	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
680	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
681	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
682	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
683	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
684	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
685	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
686	/** @} */
687
688	/** @name Compare operations (thrown in with the binary ops).
689	* @{ */
690	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
691	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
692	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
693	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
694	/** @} */
695
696	/** @name Test operations (thrown in with the binary ops).
697	* @{ */
698	FNIEMAIMPLBINU8 iemAImpl_test_u8;
699	FNIEMAIMPLBINU16 iemAImpl_test_u16;
700	FNIEMAIMPLBINU32 iemAImpl_test_u32;
701	FNIEMAIMPLBINU64 iemAImpl_test_u64;
702	/** @} */
703
704	/** @name Bit operations operations (thrown in with the binary ops).
705	* @{ */
706	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
707	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
708	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
709	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
710	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
711	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
712	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
713	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
714	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
715	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
716	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
717	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
718	/** @} */
719
720	/** @name Exchange memory with register operations.
721	* @{ */
722	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
723	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
724	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
725	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
726	/** @} */
727
728	/** @name Exchange and add operations.
729	* @{ */
730	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
731	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
732	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
733	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
734	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
735	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
736	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
737	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
738	/** @} */
739
740	/** @name Compare and exchange.
741	* @{ */
742	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
743	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
744	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
745	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
746	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
747	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
748	#ifdef RT_ARCH_X86
749	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
750	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
751	#else
752	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
753	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
754	#endif
755	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
756	uint32_t *pEFlags));
757	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
758	uint32_t *pEFlags));
759	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
760	uint32_t *pEFlags));
761	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
762	uint32_t *pEFlags));
763	/** @} */
764
765	/** @name Memory ordering
766	* @{ */
767	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
768	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
769	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
770	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
771	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
772	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
773	/** @} */
774
775	/** @name Double precision shifts
776	* @{ */
777	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
778	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
779	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
780	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
781	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
782	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
783	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
784	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
785	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
786	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
787	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
788	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
789	/** @} */
790
791
792	/** @name Bit search operations (thrown in with the binary ops).
793	* @{ */
794	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
795	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
796	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
797	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
798	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
799	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
800	/** @} */
801
802	/** @name Signed multiplication operations (thrown in with the binary ops).
803	* @{ */
804	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
805	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
806	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
807	/** @} */
808
809	/** @name Arithmetic assignment operations on bytes (unary).
810	* @{ */
811	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
812	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
813	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
814	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
815	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
816	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
817	/** @} */
818
819	/** @name Arithmetic assignment operations on words (unary).
820	* @{ */
821	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
822	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
823	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
824	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
825	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
826	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
827	/** @} */
828
829	/** @name Arithmetic assignment operations on double words (unary).
830	* @{ */
831	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
832	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
833	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
834	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
835	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
836	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
837	/** @} */
838
839	/** @name Arithmetic assignment operations on quad words (unary).
840	* @{ */
841	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
842	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
843	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
844	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
845	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
846	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
847	/** @} */
848
849
850	/** @name Shift operations on bytes (Group 2).
851	* @{ */
852	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
853	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
854	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
855	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
856	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
857	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
858	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
859	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
860	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
861	/** @} */
862
863	/** @name Shift operations on words (Group 2).
864	* @{ */
865	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
866	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
867	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
868	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
869	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
870	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
871	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
872	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
873	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
874	/** @} */
875
876	/** @name Shift operations on double words (Group 2).
877	* @{ */
878	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
879	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
880	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
881	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
882	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
883	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
884	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
885	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
886	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
887	/** @} */
888
889	/** @name Shift operations on words (Group 2).
890	* @{ */
891	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
892	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
893	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
894	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
895	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
896	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
897	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
898	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
899	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
900	/** @} */
901
902	/** @name Multiplication and division operations.
903	* @{ */
904	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
905	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
906	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
907	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
908
909	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
910	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
911	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
912	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
913
914	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
915	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
916	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
917	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
918
919	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
920	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
921	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
922	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
923	/** @} */
924
925	/** @name Byte Swap.
926	* @{ */
927	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
928	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
929	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
930	/** @} */
931
932	/** @name Misc.
933	* @{ */
934	FNIEMAIMPLBINU16 iemAImpl_arpl;
935	/** @} */
936
937
938	/** @name FPU operations taking a 32-bit float argument
939	* @{ */
940	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
941	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
942	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
943
944	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
945	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
946	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
947
948	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
949	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
950	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
951	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
952	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
953	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
954	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
955
956	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
957	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
958	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
959	/** @} */
960
961	/** @name FPU operations taking a 64-bit float argument
962	* @{ */
963	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
964	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
965	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
966
967	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
968	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
969	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
970	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
971	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
972	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
973
974	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
975	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
976	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
977	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
978	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
979	/** @} */
980
981	/** @name FPU operations taking a 80-bit float argument
982	* @{ */
983	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
984	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
985	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
986	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
987	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
988	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
989	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
990	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
991	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
992	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
993	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
994	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
995
996	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
997	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
998
999	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1000	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1001	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1002	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1003	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1004
1005	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1006	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1007	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1008	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1009	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1010
1011	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1012	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1013	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1014	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1015	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1016	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1017	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1018	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1019	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1020	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1021
1022	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1023	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1024	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1025	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1026
1027	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1028	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1029	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1030	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1031	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1032	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1033	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1034	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1035	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1036
1037	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1038	PCRTFLOAT80U pr80Val));
1039	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1040	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1041	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1042	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1043
1044	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1045	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1046	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1047
1048	/** @} */
1049
1050	/** @name FPU operations taking a 16-bit signed integer argument
1051	* @{ */
1052	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1053	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1054	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1055
1056	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1057	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1058	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1059	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1060	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1061	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1062
1063	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1064	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1065
1066	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1067	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1068	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1069	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1070	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1071	/** @} */
1072
1073	/** @name FPU operations taking a 32-bit signed integer argument
1074	* @{ */
1075	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1076	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1077	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1078
1079	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1080	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1081	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1082	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1083	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1084	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1085
1086	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1087	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1088
1089	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1090	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1091	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1092	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1093	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1094	/** @} */
1095
1096	/** @name FPU operations taking a 64-bit signed integer argument
1097	* @{ */
1098	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1099	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1100	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1101
1102	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1103	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1104	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1105	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1106	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1107	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1108
1109	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1110	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1111
1112	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1113	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1114	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1115	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1116	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1117	/** @} */
1118
1119
1120	/** Temporary type representing a 256-bit vector register. */
1121	typedef struct {uint64_t au64[4]; } IEMVMM256;
1122	/** Temporary type pointing to a 256-bit vector register. */
1123	typedef IEMVMM256 *PIEMVMM256;
1124	/** Temporary type pointing to a const 256-bit vector register. */
1125	typedef IEMVMM256 *PCIEMVMM256;
1126
1127
1128	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1129	* @{ */
1130	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1131	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1132	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1133	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1134	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1135	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1136	/** @} */
1137
1138	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1139	* @{ */
1140	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1141	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1142	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1143	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1144	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1145	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1146	/** @} */
1147
1148	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1149	* @{ */
1150	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1151	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1152	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1153	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1154	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1155	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1156	/** @} */
1157
1158	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1159	* @{ */
1160	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1161	uint128_t const *pu128Src, uint8_t bEvil));
1162	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1163	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1164	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1165	/** @} */
1166
1167	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1168	* @{ */
1169	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1170	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1171	/** @} */
1172
1173
1174
1175	/** @name Function tables.
1176	* @{
1177	*/
1178
1179	/**
1180	* Function table for a binary operator providing implementation based on
1181	* operand size.
1182	*/
1183	typedef struct IEMOPBINSIZES
1184	{
1185	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1186	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1187	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1188	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1189	} IEMOPBINSIZES;
1190	/** Pointer to a binary operator function table. */
1191	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1192
1193
1194	/**
1195	* Function table for a unary operator providing implementation based on
1196	* operand size.
1197	*/
1198	typedef struct IEMOPUNARYSIZES
1199	{
1200	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1201	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1202	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1203	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1204	} IEMOPUNARYSIZES;
1205	/** Pointer to a unary operator function table. */
1206	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1207
1208
1209	/**
1210	* Function table for a shift operator providing implementation based on
1211	* operand size.
1212	*/
1213	typedef struct IEMOPSHIFTSIZES
1214	{
1215	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1216	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1217	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1218	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1219	} IEMOPSHIFTSIZES;
1220	/** Pointer to a shift operator function table. */
1221	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1222
1223
1224	/**
1225	* Function table for a multiplication or division operation.
1226	*/
1227	typedef struct IEMOPMULDIVSIZES
1228	{
1229	PFNIEMAIMPLMULDIVU8 pfnU8;
1230	PFNIEMAIMPLMULDIVU16 pfnU16;
1231	PFNIEMAIMPLMULDIVU32 pfnU32;
1232	PFNIEMAIMPLMULDIVU64 pfnU64;
1233	} IEMOPMULDIVSIZES;
1234	/** Pointer to a multiplication or division operation function table. */
1235	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1236
1237
1238	/**
1239	* Function table for a double precision shift operator providing implementation
1240	* based on operand size.
1241	*/
1242	typedef struct IEMOPSHIFTDBLSIZES
1243	{
1244	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1245	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1246	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1247	} IEMOPSHIFTDBLSIZES;
1248	/** Pointer to a double precision shift function table. */
1249	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1250
1251
1252	/**
1253	* Function table for media instruction taking two full sized media registers,
1254	* optionally the 2nd being a memory reference (only modifying the first op.)
1255	*/
1256	typedef struct IEMOPMEDIAF2
1257	{
1258	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1259	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1260	} IEMOPMEDIAF2;
1261	/** Pointer to a media operation function table for full sized ops. */
1262	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1263
1264	/**
1265	* Function table for media instruction taking taking one full and one lower
1266	* half media register.
1267	*/
1268	typedef struct IEMOPMEDIAF1L1
1269	{
1270	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1271	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1272	} IEMOPMEDIAF1L1;
1273	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1274	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1275
1276	/**
1277	* Function table for media instruction taking taking one full and one high half
1278	* media register.
1279	*/
1280	typedef struct IEMOPMEDIAF1H1
1281	{
1282	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1283	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1284	} IEMOPMEDIAF1H1;
1285	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1286	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1287
1288
1289	/** @} */
1290
1291
1292	/** @name C instruction implementations for anything slightly complicated.
1293	* @{ */
1294
1295	/**
1296	* For typedef'ing or declaring a C instruction implementation function taking
1297	* no extra arguments.
1298	*
1299	* @param a_Name The name of the type.
1300	*/
1301	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1302	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1303	/**
1304	* For defining a C instruction implementation function taking no extra
1305	* arguments.
1306	*
1307	* @param a_Name The name of the function
1308	*/
1309	# define IEM_CIMPL_DEF_0(a_Name) \
1310	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1311	/**
1312	* For calling a C instruction implementation function taking no extra
1313	* arguments.
1314	*
1315	* This special call macro adds default arguments to the call and allow us to
1316	* change these later.
1317	*
1318	* @param a_fn The name of the function.
1319	*/
1320	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1321
1322	/**
1323	* For typedef'ing or declaring a C instruction implementation function taking
1324	* one extra argument.
1325	*
1326	* @param a_Name The name of the type.
1327	* @param a_Type0 The argument type.
1328	* @param a_Arg0 The argument name.
1329	*/
1330	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1331	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1332	/**
1333	* For defining a C instruction implementation function taking one extra
1334	* argument.
1335	*
1336	* @param a_Name The name of the function
1337	* @param a_Type0 The argument type.
1338	* @param a_Arg0 The argument name.
1339	*/
1340	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1341	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1342	/**
1343	* For calling a C instruction implementation function taking one extra
1344	* argument.
1345	*
1346	* This special call macro adds default arguments to the call and allow us to
1347	* change these later.
1348	*
1349	* @param a_fn The name of the function.
1350	* @param a0 The name of the 1st argument.
1351	*/
1352	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1353
1354	/**
1355	* For typedef'ing or declaring a C instruction implementation function taking
1356	* two extra arguments.
1357	*
1358	* @param a_Name The name of the type.
1359	* @param a_Type0 The type of the 1st argument
1360	* @param a_Arg0 The name of the 1st argument.
1361	* @param a_Type1 The type of the 2nd argument.
1362	* @param a_Arg1 The name of the 2nd argument.
1363	*/
1364	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1365	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1366	/**
1367	* For defining a C instruction implementation function taking two extra
1368	* arguments.
1369	*
1370	* @param a_Name The name of the function.
1371	* @param a_Type0 The type of the 1st argument
1372	* @param a_Arg0 The name of the 1st argument.
1373	* @param a_Type1 The type of the 2nd argument.
1374	* @param a_Arg1 The name of the 2nd argument.
1375	*/
1376	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1377	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1378	/**
1379	* For calling a C instruction implementation function taking two extra
1380	* arguments.
1381	*
1382	* This special call macro adds default arguments to the call and allow us to
1383	* change these later.
1384	*
1385	* @param a_fn The name of the function.
1386	* @param a0 The name of the 1st argument.
1387	* @param a1 The name of the 2nd argument.
1388	*/
1389	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1390
1391	/**
1392	* For typedef'ing or declaring a C instruction implementation function taking
1393	* three extra arguments.
1394	*
1395	* @param a_Name The name of the type.
1396	* @param a_Type0 The type of the 1st argument
1397	* @param a_Arg0 The name of the 1st argument.
1398	* @param a_Type1 The type of the 2nd argument.
1399	* @param a_Arg1 The name of the 2nd argument.
1400	* @param a_Type2 The type of the 3rd argument.
1401	* @param a_Arg2 The name of the 3rd argument.
1402	*/
1403	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1404	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1405	/**
1406	* For defining a C instruction implementation function taking three extra
1407	* arguments.
1408	*
1409	* @param a_Name The name of the function.
1410	* @param a_Type0 The type of the 1st argument
1411	* @param a_Arg0 The name of the 1st argument.
1412	* @param a_Type1 The type of the 2nd argument.
1413	* @param a_Arg1 The name of the 2nd argument.
1414	* @param a_Type2 The type of the 3rd argument.
1415	* @param a_Arg2 The name of the 3rd argument.
1416	*/
1417	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1418	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1419	/**
1420	* For calling a C instruction implementation function taking three extra
1421	* arguments.
1422	*
1423	* This special call macro adds default arguments to the call and allow us to
1424	* change these later.
1425	*
1426	* @param a_fn The name of the function.
1427	* @param a0 The name of the 1st argument.
1428	* @param a1 The name of the 2nd argument.
1429	* @param a2 The name of the 3rd argument.
1430	*/
1431	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1432
1433
1434	/**
1435	* For typedef'ing or declaring a C instruction implementation function taking
1436	* four extra arguments.
1437	*
1438	* @param a_Name The name of the type.
1439	* @param a_Type0 The type of the 1st argument
1440	* @param a_Arg0 The name of the 1st argument.
1441	* @param a_Type1 The type of the 2nd argument.
1442	* @param a_Arg1 The name of the 2nd argument.
1443	* @param a_Type2 The type of the 3rd argument.
1444	* @param a_Arg2 The name of the 3rd argument.
1445	* @param a_Type3 The type of the 4th argument.
1446	* @param a_Arg3 The name of the 4th argument.
1447	*/
1448	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1449	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1450	/**
1451	* For defining a C instruction implementation function taking four extra
1452	* arguments.
1453	*
1454	* @param a_Name The name of the function.
1455	* @param a_Type0 The type of the 1st argument
1456	* @param a_Arg0 The name of the 1st argument.
1457	* @param a_Type1 The type of the 2nd argument.
1458	* @param a_Arg1 The name of the 2nd argument.
1459	* @param a_Type2 The type of the 3rd argument.
1460	* @param a_Arg2 The name of the 3rd argument.
1461	* @param a_Type3 The type of the 4th argument.
1462	* @param a_Arg3 The name of the 4th argument.
1463	*/
1464	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1465	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1466	a_Type2 a_Arg2, a_Type3 a_Arg3))
1467	/**
1468	* For calling a C instruction implementation function taking four extra
1469	* arguments.
1470	*
1471	* This special call macro adds default arguments to the call and allow us to
1472	* change these later.
1473	*
1474	* @param a_fn The name of the function.
1475	* @param a0 The name of the 1st argument.
1476	* @param a1 The name of the 2nd argument.
1477	* @param a2 The name of the 3rd argument.
1478	* @param a3 The name of the 4th argument.
1479	*/
1480	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1481
1482
1483	/**
1484	* For typedef'ing or declaring a C instruction implementation function taking
1485	* five extra arguments.
1486	*
1487	* @param a_Name The name of the type.
1488	* @param a_Type0 The type of the 1st argument
1489	* @param a_Arg0 The name of the 1st argument.
1490	* @param a_Type1 The type of the 2nd argument.
1491	* @param a_Arg1 The name of the 2nd argument.
1492	* @param a_Type2 The type of the 3rd argument.
1493	* @param a_Arg2 The name of the 3rd argument.
1494	* @param a_Type3 The type of the 4th argument.
1495	* @param a_Arg3 The name of the 4th argument.
1496	* @param a_Type4 The type of the 5th argument.
1497	* @param a_Arg4 The name of the 5th argument.
1498	*/
1499	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1500	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1501	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1502	a_Type3 a_Arg3, a_Type4 a_Arg4))
1503	/**
1504	* For defining a C instruction implementation function taking five extra
1505	* arguments.
1506	*
1507	* @param a_Name The name of the function.
1508	* @param a_Type0 The type of the 1st argument
1509	* @param a_Arg0 The name of the 1st argument.
1510	* @param a_Type1 The type of the 2nd argument.
1511	* @param a_Arg1 The name of the 2nd argument.
1512	* @param a_Type2 The type of the 3rd argument.
1513	* @param a_Arg2 The name of the 3rd argument.
1514	* @param a_Type3 The type of the 4th argument.
1515	* @param a_Arg3 The name of the 4th argument.
1516	* @param a_Type4 The type of the 5th argument.
1517	* @param a_Arg4 The name of the 5th argument.
1518	*/
1519	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1520	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1521	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1522	a_Type3 a_Arg3, a_Type4 a_Arg4))
1523	/**
1524	* For calling a C instruction implementation function taking five extra
1525	* arguments.
1526	*
1527	* This special call macro adds default arguments to the call and allow us to
1528	* change these later.
1529	*
1530	* @param a_fn The name of the function.
1531	* @param a0 The name of the 1st argument.
1532	* @param a1 The name of the 2nd argument.
1533	* @param a2 The name of the 3rd argument.
1534	* @param a3 The name of the 4th argument.
1535	* @param a4 The name of the 5th argument.
1536	*/
1537	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1538
1539	/** @} */
1540
1541
1542	/** @} */
1543
1544	RT_C_DECLS_END
1545
1546	#endif
1547

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 56021

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