IEMInternal.h@ 57076

Last change on this file since 57076 was 56628, checked in by vboxsync, 10 years ago
IEM: Postpone INS memory writes to ring-3 if we hit an access handler. We cannot redo the read, that will only mess things us. This introduces a new per-cpu forced flag, VMCPU_FF_IEM, that must cause immediate return to ring-3 where it will be serviced ASAP. IEM will try return VINF_EM_RAW_TO_R3 as well to help make sure we get back to ring-3.
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File size: 64.9 KB

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1	/* $Id: IEMInternal.h 56628 2015-06-24 19:44:56Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** For expanding symbol in slickedit and other products tagging and
37	* crossreferencing IEM symbols. */
38	#ifndef IEM_STATIC
39	# define IEM_STATIC static
40	#endif
41
42	/** @def IEM_VERIFICATION_MODE_FULL
43	* Shorthand for:
44	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
45	*/
46	#if defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)
47	# define IEM_VERIFICATION_MODE_FULL
48	#endif
49
50
51	/** Finish and move to types.h */
52	typedef union
53	{
54	uint32_t u32;
55	} RTFLOAT32U;
56	typedef RTFLOAT32U *PRTFLOAT32U;
57	typedef RTFLOAT32U const *PCRTFLOAT32U;
58
59
60	/**
61	* Extended operand mode that includes a representation of 8-bit.
62	*
63	* This is used for packing down modes when invoking some C instruction
64	* implementations.
65	*/
66	typedef enum IEMMODEX
67	{
68	IEMMODEX_16BIT = IEMMODE_16BIT,
69	IEMMODEX_32BIT = IEMMODE_32BIT,
70	IEMMODEX_64BIT = IEMMODE_64BIT,
71	IEMMODEX_8BIT
72	} IEMMODEX;
73	AssertCompileSize(IEMMODEX, 4);
74
75
76	/**
77	* Branch types.
78	*/
79	typedef enum IEMBRANCH
80	{
81	IEMBRANCH_JUMP = 1,
82	IEMBRANCH_CALL,
83	IEMBRANCH_TRAP,
84	IEMBRANCH_SOFTWARE_INT,
85	IEMBRANCH_HARDWARE_INT
86	} IEMBRANCH;
87	AssertCompileSize(IEMBRANCH, 4);
88
89
90	/**
91	* A FPU result.
92	*/
93	typedef struct IEMFPURESULT
94	{
95	/** The output value. */
96	RTFLOAT80U r80Result;
97	/** The output status. */
98	uint16_t FSW;
99	} IEMFPURESULT;
100	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
101	/** Pointer to a FPU result. */
102	typedef IEMFPURESULT *PIEMFPURESULT;
103	/** Pointer to a const FPU result. */
104	typedef IEMFPURESULT const *PCIEMFPURESULT;
105
106
107	/**
108	* A FPU result consisting of two output values and FSW.
109	*/
110	typedef struct IEMFPURESULTTWO
111	{
112	/** The first output value. */
113	RTFLOAT80U r80Result1;
114	/** The output status. */
115	uint16_t FSW;
116	/** The second output value. */
117	RTFLOAT80U r80Result2;
118	} IEMFPURESULTTWO;
119	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
120	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
121	/** Pointer to a FPU result consisting of two output values and FSW. */
122	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
123	/** Pointer to a const FPU result consisting of two output values and FSW. */
124	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
125
126
127	/**
128	* IEM pending commit function index.
129	*/
130	typedef enum IEMCOMMIT
131	{
132	/** Invalid / nothing pending. */
133	IEMCOMMIT_INVALID = 0,
134	/** @name INS
135	* @{ */
136	IEMCOMMIT_INS_OP8_ADDR16,
137	IEMCOMMIT_INS_OP8_ADDR32,
138	IEMCOMMIT_INS_OP8_ADDR64,
139	IEMCOMMIT_INS_OP16_ADDR16,
140	IEMCOMMIT_INS_OP16_ADDR32,
141	IEMCOMMIT_INS_OP16_ADDR64,
142	IEMCOMMIT_INS_OP32_ADDR16,
143	IEMCOMMIT_INS_OP32_ADDR32,
144	IEMCOMMIT_INS_OP32_ADDR64,
145	/** @} */
146	/** @name REP INS
147	* @{ */
148	IEMCOMMIT_REP_INS_OP8_ADDR16,
149	IEMCOMMIT_REP_INS_OP8_ADDR32,
150	IEMCOMMIT_REP_INS_OP8_ADDR64,
151	IEMCOMMIT_REP_INS_OP16_ADDR16,
152	IEMCOMMIT_REP_INS_OP16_ADDR32,
153	IEMCOMMIT_REP_INS_OP16_ADDR64,
154	IEMCOMMIT_REP_INS_OP32_ADDR16,
155	IEMCOMMIT_REP_INS_OP32_ADDR32,
156	IEMCOMMIT_REP_INS_OP32_ADDR64,
157	/** @} */
158	/** End of valid functions. */
159	IEMCOMMIT_END,
160	/** Make sure the type is int in call contexts. */
161	IEMCOMMIT_32BIT_HACK = 0x7fffffff
162	} IEMCOMMIT;
163	AssertCompile(sizeof(IEMCOMMIT) == 4);
164
165
166	#ifdef IEM_VERIFICATION_MODE_FULL
167
168	/**
169	* Verification event type.
170	*/
171	typedef enum IEMVERIFYEVENT
172	{
173	IEMVERIFYEVENT_INVALID = 0,
174	IEMVERIFYEVENT_IOPORT_READ,
175	IEMVERIFYEVENT_IOPORT_WRITE,
176	IEMVERIFYEVENT_RAM_WRITE,
177	IEMVERIFYEVENT_RAM_READ
178	} IEMVERIFYEVENT;
179
180	/** Checks if the event type is a RAM read or write. */
181	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
182
183	/**
184	* Verification event record.
185	*/
186	typedef struct IEMVERIFYEVTREC
187	{
188	/** Pointer to the next record in the list. */
189	struct IEMVERIFYEVTREC *pNext;
190	/** The event type. */
191	IEMVERIFYEVENT enmEvent;
192	/** The event data. */
193	union
194	{
195	/** IEMVERIFYEVENT_IOPORT_READ */
196	struct
197	{
198	RTIOPORT Port;
199	uint32_t cbValue;
200	} IOPortRead;
201
202	/** IEMVERIFYEVENT_IOPORT_WRITE */
203	struct
204	{
205	RTIOPORT Port;
206	uint32_t cbValue;
207	uint32_t u32Value;
208	} IOPortWrite;
209
210	/** IEMVERIFYEVENT_RAM_READ */
211	struct
212	{
213	RTGCPHYS GCPhys;
214	uint32_t cb;
215	} RamRead;
216
217	/** IEMVERIFYEVENT_RAM_WRITE */
218	struct
219	{
220	RTGCPHYS GCPhys;
221	uint32_t cb;
222	uint8_t ab[512];
223	} RamWrite;
224	} u;
225	} IEMVERIFYEVTREC;
226	/** Pointer to an IEM event verification records. */
227	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
228
229	#endif /* IEM_VERIFICATION_MODE_FULL */
230
231
232	/**
233	* The per-CPU IEM state.
234	*/
235	typedef struct IEMCPU
236	{
237	/** Pointer to the CPU context - ring-3 context. */
238	R3PTRTYPE(PCPUMCTX) pCtxR3;
239	/** Pointer to the CPU context - ring-0 context. */
240	R0PTRTYPE(PCPUMCTX) pCtxR0;
241	/** Pointer to the CPU context - raw-mode context. */
242	RCPTRTYPE(PCPUMCTX) pCtxRC;
243
244	/** Offset of the VMCPU structure relative to this structure (negative). */
245	int32_t offVMCpu;
246	/** Offset of the VM structure relative to this structure (negative). */
247	int32_t offVM;
248
249	/** Whether to bypass access handlers or not. */
250	bool fBypassHandlers;
251	/** Indicates that we're interpreting patch code - RC only! */
252	bool fInPatchCode;
253	/** Explicit alignment padding. */
254	bool afAlignment0[2];
255
256	/** The flags of the current exception / interrupt. */
257	uint32_t fCurXcpt;
258	/** The current exception / interrupt. */
259	uint8_t uCurXcpt;
260	/** Exception / interrupt recursion depth. */
261	int8_t cXcptRecursions;
262	/** Explicit alignment padding. */
263	bool afAlignment1[1];
264	/** The CPL. */
265	uint8_t uCpl;
266	/** The current CPU execution mode (CS). */
267	IEMMODE enmCpuMode;
268	/** Info status code that needs to be propagated to the IEM caller.
269	* This cannot be passed internally, as it would complicate all success
270	* checks within the interpreter making the code larger and almost impossible
271	* to get right. Instead, we'll store status codes to pass on here. Each
272	* source of these codes will perform appropriate sanity checks. */
273	int32_t rcPassUp;
274
275	/** @name Statistics
276	* @{ */
277	/** The number of instructions we've executed. */
278	uint32_t cInstructions;
279	/** The number of potential exits. */
280	uint32_t cPotentialExits;
281	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
282	* This may contain uncommitted writes. */
283	uint32_t cbWritten;
284	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
285	uint32_t cRetInstrNotImplemented;
286	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
287	uint32_t cRetAspectNotImplemented;
288	/** Counts informational statuses returned (other than VINF_SUCCESS). */
289	uint32_t cRetInfStatuses;
290	/** Counts other error statuses returned. */
291	uint32_t cRetErrStatuses;
292	/** Number of times rcPassUp has been used. */
293	uint32_t cRetPassUpStatus;
294	/** Number of times RZ left with instruction commit pending for ring-3. */
295	uint32_t cPendingCommit;
296	#ifdef IEM_VERIFICATION_MODE_FULL
297	/** The Number of I/O port reads that has been performed. */
298	uint32_t cIOReads;
299	/** The Number of I/O port writes that has been performed. */
300	uint32_t cIOWrites;
301	/** Set if no comparison to REM is currently performed.
302	* This is used to skip past really slow bits. */
303	bool fNoRem;
304	/** Indicates that RAX and RDX differences should be ignored since RDTSC
305	* and RDTSCP are timing sensitive. */
306	bool fIgnoreRaxRdx;
307	/** Indicates that a MOVS instruction with overlapping source and destination
308	* was executed, causing the memory write records to be incorrrect. */
309	bool fOverlappingMovs;
310	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
311	bool fProblematicMemory;
312	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
313	* CPUM doesn't yet reflect. */
314	uint8_t uInjectCpl;
315	bool afAlignment2[3];
316	/** Mask of undefined eflags.
317	* The verifier will any difference in these flags. */
318	uint32_t fUndefinedEFlags;
319	/** The CS of the instruction being interpreted. */
320	RTSEL uOldCs;
321	/** The RIP of the instruction being interpreted. */
322	uint64_t uOldRip;
323	/** The physical address corresponding to abOpcodes[0]. */
324	RTGCPHYS GCPhysOpcodes;
325	#endif
326	/** @} */
327
328	/** @name Decoder state.
329	* @{ */
330
331	/** The default addressing mode . */
332	IEMMODE enmDefAddrMode;
333	/** The effective addressing mode . */
334	IEMMODE enmEffAddrMode;
335	/** The default operand mode . */
336	IEMMODE enmDefOpSize;
337	/** The effective operand mode . */
338	IEMMODE enmEffOpSize;
339
340	/** The prefix mask (IEM_OP_PRF_XXX). */
341	uint32_t fPrefixes;
342	/** The extra REX ModR/M register field bit (REX.R << 3). */
343	uint8_t uRexReg;
344	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
345	* (REX.B << 3). */
346	uint8_t uRexB;
347	/** The extra REX SIB index field bit (REX.X << 3). */
348	uint8_t uRexIndex;
349	/** The effective segment register (X86_SREG_XXX). */
350	uint8_t iEffSeg;
351
352	/** The current offset into abOpcodes. */
353	uint8_t offOpcode;
354	/** The size of what has currently been fetched into abOpcodes. */
355	uint8_t cbOpcode;
356	/** The opcode bytes. */
357	uint8_t abOpcode[15];
358	/** Offset into abOpcodes where the FPU instruction starts.
359	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
360	* instruction result is committed. */
361	uint8_t offFpuOpcode;
362
363	/** @}*/
364
365	/** The number of active guest memory mappings. */
366	uint8_t cActiveMappings;
367	/** The next unused mapping index. */
368	uint8_t iNextMapping;
369	/** Records for tracking guest memory mappings. */
370	struct
371	{
372	/** The address of the mapped bytes. */
373	void *pv;
374	#if defined(IN_RC) && HC_ARCH_BITS == 64
375	uint32_t u32Alignment3; /*< Alignment padding. /
376	#endif
377	/** The access flags (IEM_ACCESS_XXX).
378	* IEM_ACCESS_INVALID if the entry is unused. */
379	uint32_t fAccess;
380	#if HC_ARCH_BITS == 64
381	uint32_t u32Alignment4; /*< Alignment padding. /
382	#endif
383	} aMemMappings[3];
384
385	/** Locking records for the mapped memory. */
386	union
387	{
388	PGMPAGEMAPLOCK Lock;
389	uint64_t au64Padding[2];
390	} aMemMappingLocks[3];
391
392	/** Bounce buffer info.
393	* This runs in parallel to aMemMappings. */
394	struct
395	{
396	/** The physical address of the first byte. */
397	RTGCPHYS GCPhysFirst;
398	/** The physical address of the second page. */
399	RTGCPHYS GCPhysSecond;
400	/** The number of bytes in the first page. */
401	uint16_t cbFirst;
402	/** The number of bytes in the second page. */
403	uint16_t cbSecond;
404	/** Whether it's unassigned memory. */
405	bool fUnassigned;
406	/** Explicit alignment padding. */
407	bool afAlignment5[3];
408	} aMemBbMappings[3];
409
410	/** Bounce buffer storage.
411	* This runs in parallel to aMemMappings and aMemBbMappings. */
412	struct
413	{
414	uint8_t ab[512];
415	} aBounceBuffers[3];
416
417	/** @name Pending Instruction Commit (R0/RC postponed it to Ring-3).
418	* @{ */
419	struct
420	{
421	/** The commit function to call. */
422	IEMCOMMIT enmFn;
423	/** The instruction size. */
424	uint8_t cbInstr;
425	/** Generic value to commit. */
426	uint64_t uValue;
427	} PendingCommit;
428	/** @} */
429
430	/** @name Target CPU information.
431	* @{ */
432	/** The CPU vendor. */
433	CPUMCPUVENDOR enmCpuVendor;
434	/** @} */
435
436	/** @name Host CPU information.
437	* @{ */
438	/** The CPU vendor. */
439	CPUMCPUVENDOR enmHostCpuVendor;
440	/** @} */
441
442	#ifdef IEM_VERIFICATION_MODE_FULL
443	/** The event verification records for what IEM did (LIFO). */
444	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
445	/** Insertion point for pIemEvtRecHead. */
446	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
447	/** The event verification records for what the other party did (FIFO). */
448	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
449	/** Insertion point for pOtherEvtRecHead. */
450	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
451	/** List of free event records. */
452	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
453	#endif
454	} IEMCPU;
455	/** Pointer to the per-CPU IEM state. */
456	typedef IEMCPU *PIEMCPU;
457	/** Pointer to the const per-CPU IEM state. */
458	typedef IEMCPU const *PCIEMCPU;
459
460	/** Converts a IEMCPU pointer to a VMCPU pointer.
461	* @returns VMCPU pointer.
462	* @param a_pIemCpu The IEM per CPU instance data.
463	*/
464	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
465
466	/** Converts a IEMCPU pointer to a VM pointer.
467	* @returns VM pointer.
468	* @param a_pIemCpu The IEM per CPU instance data.
469	*/
470	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
471
472	/** @name IEM_ACCESS_XXX - Access details.
473	* @{ */
474	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
475	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
476	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
477	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
478	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
479	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
480	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
481	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
482	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
483	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
484	/** The writes are partial, so if initialize the bounce buffer with the
485	* orignal RAM content. */
486	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
487	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
488	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
489	/** Read+write data alias. */
490	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
491	/** Write data alias. */
492	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
493	/** Read data alias. */
494	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
495	/** Instruction fetch alias. */
496	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
497	/** Stack write alias. */
498	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
499	/** Stack read alias. */
500	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
501	/** Stack read+write alias. */
502	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
503	/** Read system table alias. */
504	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
505	/** Read+write system table alias. */
506	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
507	/** @} */
508
509	/** @name Prefix constants (IEMCPU::fPrefixes)
510	* @{ */
511	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
512	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
513	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
514	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
515	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
516	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
517	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
518
519	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
520	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
521	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
522
523	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
524	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
525	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
526
527	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
528	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
529	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
530	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
531	/** Mask with all the REX prefix flags.
532	* This is generally for use when needing to undo the REX prefixes when they
533	* are followed legacy prefixes and therefore does not immediately preceed
534	* the first opcode byte.
535	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
536	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
537	/** @} */
538
539	/** @name Opcode forms
540	* @{ */
541	/** ModR/M: reg, r/m */
542	#define IEMOPFORM_RM 0
543	/** ModR/M: reg, r/m (register) */
544	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
545	/** ModR/M: reg, r/m (memory) */
546	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
547	/** ModR/M: r/m, reg */
548	#define IEMOPFORM_MR 1
549	/** ModR/M: r/m (register), reg */
550	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
551	/** ModR/M: r/m (memory), reg */
552	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
553	/** ModR/M: r/m only */
554	#define IEMOPFORM_M 2
555	/** ModR/M: r/m only (register). */
556	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
557	/** ModR/M: r/m only (memory). */
558	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
559	/** ModR/M: reg only */
560	#define IEMOPFORM_R 3
561
562	/** Fixed register instruction, no R/M. */
563	#define IEMOPFORM_FIXED 4
564
565	/** The r/m is a register. */
566	#define IEMOPFORM_MOD3 RT_BIT_32(8)
567	/** The r/m is a memory access. */
568	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
569	/** @} */
570
571	/**
572	* Possible hardware task switch sources.
573	*/
574	typedef enum IEMTASKSWITCH
575	{
576	/** Task switch caused by an interrupt/exception. */
577	IEMTASKSWITCH_INT_XCPT = 1,
578	/** Task switch caused by a far CALL. */
579	IEMTASKSWITCH_CALL,
580	/** Task switch caused by a far JMP. */
581	IEMTASKSWITCH_JUMP,
582	/** Task switch caused by an IRET. */
583	IEMTASKSWITCH_IRET
584	} IEMTASKSWITCH;
585	AssertCompileSize(IEMTASKSWITCH, 4);
586
587
588	/**
589	* Tests if verification mode is enabled.
590	*
591	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
592	* should therefore cause the compiler to eliminate the verification branch
593	* of an if statement. */
594	#ifdef IEM_VERIFICATION_MODE_FULL
595	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
596	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
597	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
598	#else
599	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
600	#endif
601
602	/**
603	* Tests if full verification mode is enabled.
604	*
605	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
606	* should therefore cause the compiler to eliminate the verification branch
607	* of an if statement. */
608	#ifdef IEM_VERIFICATION_MODE_FULL
609	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
610	#else
611	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
612	#endif
613
614	/**
615	* Tests if full verification mode is enabled again REM.
616	*
617	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
618	* should therefore cause the compiler to eliminate the verification branch
619	* of an if statement. */
620	#ifdef IEM_VERIFICATION_MODE_FULL
621	# ifdef IEM_VERIFICATION_MODE_FULL_HM
622	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
623	# else
624	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
625	# endif
626	#else
627	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
628	#endif
629
630	/** @def IEM_VERIFICATION_MODE
631	* Indicates that one of the verfication modes are enabled.
632	*/
633	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE)
634	# define IEM_VERIFICATION_MODE
635	#endif
636
637	/**
638	* Indicates to the verifier that the given flag set is undefined.
639	*
640	* Can be invoked again to add more flags.
641	*
642	* This is a NOOP if the verifier isn't compiled in.
643	*/
644	#ifdef IEM_VERIFICATION_MODE_FULL
645	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
646	#else
647	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
648	#endif
649
650
651	/** @def IEM_DECL_IMPL_TYPE
652	* For typedef'ing an instruction implementation function.
653	*
654	* @param a_RetType The return type.
655	* @param a_Name The name of the type.
656	* @param a_ArgList The argument list enclosed in parentheses.
657	*/
658
659	/** @def IEM_DECL_IMPL_DEF
660	* For defining an instruction implementation function.
661	*
662	* @param a_RetType The return type.
663	* @param a_Name The name of the type.
664	* @param a_ArgList The argument list enclosed in parentheses.
665	*/
666
667	#if defined(__GNUC__) && defined(RT_ARCH_X86)
668	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
669	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
670	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
671	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
672
673	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
674	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
675	a_RetType (__fastcall a_Name) a_ArgList
676	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
677	a_RetType __fastcall a_Name a_ArgList
678
679	#else
680	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
681	a_RetType (VBOXCALL a_Name) a_ArgList
682	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
683	a_RetType VBOXCALL a_Name a_ArgList
684
685	#endif
686
687	/** @name Arithmetic assignment operations on bytes (binary).
688	* @{ */
689	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
690	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
691	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
692	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
693	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
694	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
695	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
696	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
697	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
698	/** @} */
699
700	/** @name Arithmetic assignment operations on words (binary).
701	* @{ */
702	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
703	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
704	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
705	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
706	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
707	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
708	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
709	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
710	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
711	/** @} */
712
713	/** @name Arithmetic assignment operations on double words (binary).
714	* @{ */
715	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
716	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
717	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
718	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
719	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
720	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
721	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
722	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
723	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
724	/** @} */
725
726	/** @name Arithmetic assignment operations on quad words (binary).
727	* @{ */
728	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
729	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
730	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
731	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
732	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
733	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
734	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
735	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
736	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
737	/** @} */
738
739	/** @name Compare operations (thrown in with the binary ops).
740	* @{ */
741	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
742	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
743	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
744	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
745	/** @} */
746
747	/** @name Test operations (thrown in with the binary ops).
748	* @{ */
749	FNIEMAIMPLBINU8 iemAImpl_test_u8;
750	FNIEMAIMPLBINU16 iemAImpl_test_u16;
751	FNIEMAIMPLBINU32 iemAImpl_test_u32;
752	FNIEMAIMPLBINU64 iemAImpl_test_u64;
753	/** @} */
754
755	/** @name Bit operations operations (thrown in with the binary ops).
756	* @{ */
757	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
758	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
759	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
760	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
761	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
762	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
763	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
764	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
765	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
766	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
767	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
768	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
769	/** @} */
770
771	/** @name Exchange memory with register operations.
772	* @{ */
773	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
774	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
775	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
776	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
777	/** @} */
778
779	/** @name Exchange and add operations.
780	* @{ */
781	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
782	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
783	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
784	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
785	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
786	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
787	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
788	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
789	/** @} */
790
791	/** @name Compare and exchange.
792	* @{ */
793	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
794	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
795	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
796	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
797	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
798	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
799	#ifdef RT_ARCH_X86
800	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
801	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
802	#else
803	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
804	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
805	#endif
806	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
807	uint32_t *pEFlags));
808	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
809	uint32_t *pEFlags));
810	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
811	uint32_t *pEFlags));
812	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
813	uint32_t *pEFlags));
814	/** @} */
815
816	/** @name Memory ordering
817	* @{ */
818	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
819	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
820	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
821	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
822	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
823	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
824	/** @} */
825
826	/** @name Double precision shifts
827	* @{ */
828	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
829	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
830	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
831	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
832	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
833	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
834	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
835	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
836	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
837	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
838	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
839	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
840	/** @} */
841
842
843	/** @name Bit search operations (thrown in with the binary ops).
844	* @{ */
845	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
846	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
847	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
848	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
849	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
850	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
851	/** @} */
852
853	/** @name Signed multiplication operations (thrown in with the binary ops).
854	* @{ */
855	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
856	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
857	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
858	/** @} */
859
860	/** @name Arithmetic assignment operations on bytes (unary).
861	* @{ */
862	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
863	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
864	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
865	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
866	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
867	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
868	/** @} */
869
870	/** @name Arithmetic assignment operations on words (unary).
871	* @{ */
872	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
873	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
874	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
875	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
876	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
877	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
878	/** @} */
879
880	/** @name Arithmetic assignment operations on double words (unary).
881	* @{ */
882	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
883	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
884	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
885	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
886	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
887	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
888	/** @} */
889
890	/** @name Arithmetic assignment operations on quad words (unary).
891	* @{ */
892	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
893	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
894	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
895	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
896	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
897	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
898	/** @} */
899
900
901	/** @name Shift operations on bytes (Group 2).
902	* @{ */
903	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
904	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
905	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
906	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
907	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
908	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
909	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
910	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
911	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
912	/** @} */
913
914	/** @name Shift operations on words (Group 2).
915	* @{ */
916	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
917	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
918	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
919	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
920	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
921	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
922	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
923	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
924	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
925	/** @} */
926
927	/** @name Shift operations on double words (Group 2).
928	* @{ */
929	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
930	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
931	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
932	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
933	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
934	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
935	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
936	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
937	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
938	/** @} */
939
940	/** @name Shift operations on words (Group 2).
941	* @{ */
942	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
943	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
944	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
945	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
946	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
947	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
948	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
949	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
950	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
951	/** @} */
952
953	/** @name Multiplication and division operations.
954	* @{ */
955	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
956	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
957	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
958	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
959
960	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
961	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
962	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
963	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
964
965	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
966	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
967	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
968	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
969
970	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
971	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
972	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
973	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
974	/** @} */
975
976	/** @name Byte Swap.
977	* @{ */
978	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
979	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
980	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
981	/** @} */
982
983	/** @name Misc.
984	* @{ */
985	FNIEMAIMPLBINU16 iemAImpl_arpl;
986	/** @} */
987
988
989	/** @name FPU operations taking a 32-bit float argument
990	* @{ */
991	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
992	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
993	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
994
995	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
996	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
997	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
998
999	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
1000	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
1001	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
1002	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
1003	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
1004	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
1005	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
1006
1007	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
1008	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1009	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
1010	/** @} */
1011
1012	/** @name FPU operations taking a 64-bit float argument
1013	* @{ */
1014	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1015	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1016	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
1017
1018	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
1019	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
1020	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
1021	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
1022	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
1023	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
1024
1025	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1026	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1027	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
1028	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1029	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
1030	/** @} */
1031
1032	/** @name FPU operations taking a 80-bit float argument
1033	* @{ */
1034	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1035	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1036	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
1037	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
1038	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
1039	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
1040	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
1041	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
1042	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
1043	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
1044	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
1045	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
1046
1047	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
1048	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
1049
1050	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1051	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1052	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1053	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1054	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1055
1056	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1057	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1058	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1059	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1060	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1061
1062	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1063	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1064	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1065	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1066	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1067	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1068	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1069	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1070	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1071	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1072
1073	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1074	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1075	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1076	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1077
1078	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1079	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1080	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1081	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1082	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1083	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1084	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1085	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1086	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1087
1088	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1089	PCRTFLOAT80U pr80Val));
1090	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1091	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1092	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1093	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1094
1095	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1096	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1097	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1098
1099	/** @} */
1100
1101	/** @name FPU operations taking a 16-bit signed integer argument
1102	* @{ */
1103	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1104	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1105	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1106
1107	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1108	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1109	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1110	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1111	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1112	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1113
1114	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1115	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1116
1117	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1118	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1119	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1120	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1121	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1122	/** @} */
1123
1124	/** @name FPU operations taking a 32-bit signed integer argument
1125	* @{ */
1126	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1127	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1128	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1129
1130	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1131	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1132	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1133	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1134	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1135	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1136
1137	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1138	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1139
1140	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1141	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1142	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1143	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1144	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1145	/** @} */
1146
1147	/** @name FPU operations taking a 64-bit signed integer argument
1148	* @{ */
1149	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1150	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1151	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1152
1153	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1154	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1155	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1156	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1157	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1158	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1159
1160	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1161	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1162
1163	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1164	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1165	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1166	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1167	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1168	/** @} */
1169
1170
1171	/** Temporary type representing a 256-bit vector register. */
1172	typedef struct {uint64_t au64[4]; } IEMVMM256;
1173	/** Temporary type pointing to a 256-bit vector register. */
1174	typedef IEMVMM256 *PIEMVMM256;
1175	/** Temporary type pointing to a const 256-bit vector register. */
1176	typedef IEMVMM256 *PCIEMVMM256;
1177
1178
1179	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1180	* @{ */
1181	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1182	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1183	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1184	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1185	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1186	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1187	/** @} */
1188
1189	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1190	* @{ */
1191	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1192	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1193	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1194	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1195	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1196	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1197	/** @} */
1198
1199	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1200	* @{ */
1201	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1202	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1203	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1204	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1205	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1206	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1207	/** @} */
1208
1209	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1210	* @{ */
1211	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1212	uint128_t const *pu128Src, uint8_t bEvil));
1213	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1214	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1215	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1216	/** @} */
1217
1218	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1219	* @{ */
1220	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1221	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1222	/** @} */
1223
1224
1225
1226	/** @name Function tables.
1227	* @{
1228	*/
1229
1230	/**
1231	* Function table for a binary operator providing implementation based on
1232	* operand size.
1233	*/
1234	typedef struct IEMOPBINSIZES
1235	{
1236	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1237	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1238	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1239	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1240	} IEMOPBINSIZES;
1241	/** Pointer to a binary operator function table. */
1242	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1243
1244
1245	/**
1246	* Function table for a unary operator providing implementation based on
1247	* operand size.
1248	*/
1249	typedef struct IEMOPUNARYSIZES
1250	{
1251	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1252	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1253	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1254	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1255	} IEMOPUNARYSIZES;
1256	/** Pointer to a unary operator function table. */
1257	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1258
1259
1260	/**
1261	* Function table for a shift operator providing implementation based on
1262	* operand size.
1263	*/
1264	typedef struct IEMOPSHIFTSIZES
1265	{
1266	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1267	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1268	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1269	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1270	} IEMOPSHIFTSIZES;
1271	/** Pointer to a shift operator function table. */
1272	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1273
1274
1275	/**
1276	* Function table for a multiplication or division operation.
1277	*/
1278	typedef struct IEMOPMULDIVSIZES
1279	{
1280	PFNIEMAIMPLMULDIVU8 pfnU8;
1281	PFNIEMAIMPLMULDIVU16 pfnU16;
1282	PFNIEMAIMPLMULDIVU32 pfnU32;
1283	PFNIEMAIMPLMULDIVU64 pfnU64;
1284	} IEMOPMULDIVSIZES;
1285	/** Pointer to a multiplication or division operation function table. */
1286	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1287
1288
1289	/**
1290	* Function table for a double precision shift operator providing implementation
1291	* based on operand size.
1292	*/
1293	typedef struct IEMOPSHIFTDBLSIZES
1294	{
1295	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1296	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1297	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1298	} IEMOPSHIFTDBLSIZES;
1299	/** Pointer to a double precision shift function table. */
1300	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1301
1302
1303	/**
1304	* Function table for media instruction taking two full sized media registers,
1305	* optionally the 2nd being a memory reference (only modifying the first op.)
1306	*/
1307	typedef struct IEMOPMEDIAF2
1308	{
1309	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1310	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1311	} IEMOPMEDIAF2;
1312	/** Pointer to a media operation function table for full sized ops. */
1313	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1314
1315	/**
1316	* Function table for media instruction taking taking one full and one lower
1317	* half media register.
1318	*/
1319	typedef struct IEMOPMEDIAF1L1
1320	{
1321	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1322	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1323	} IEMOPMEDIAF1L1;
1324	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1325	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1326
1327	/**
1328	* Function table for media instruction taking taking one full and one high half
1329	* media register.
1330	*/
1331	typedef struct IEMOPMEDIAF1H1
1332	{
1333	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1334	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1335	} IEMOPMEDIAF1H1;
1336	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1337	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1338
1339
1340	/** @} */
1341
1342
1343	/** @name C instruction implementations for anything slightly complicated.
1344	* @{ */
1345
1346	/**
1347	* For typedef'ing or declaring a C instruction implementation function taking
1348	* no extra arguments.
1349	*
1350	* @param a_Name The name of the type.
1351	*/
1352	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1353	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1354	/**
1355	* For defining a C instruction implementation function taking no extra
1356	* arguments.
1357	*
1358	* @param a_Name The name of the function
1359	*/
1360	# define IEM_CIMPL_DEF_0(a_Name) \
1361	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1362	/**
1363	* For calling a C instruction implementation function taking no extra
1364	* arguments.
1365	*
1366	* This special call macro adds default arguments to the call and allow us to
1367	* change these later.
1368	*
1369	* @param a_fn The name of the function.
1370	*/
1371	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1372
1373	/**
1374	* For typedef'ing or declaring a C instruction implementation function taking
1375	* one extra argument.
1376	*
1377	* @param a_Name The name of the type.
1378	* @param a_Type0 The argument type.
1379	* @param a_Arg0 The argument name.
1380	*/
1381	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1382	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1383	/**
1384	* For defining a C instruction implementation function taking one extra
1385	* argument.
1386	*
1387	* @param a_Name The name of the function
1388	* @param a_Type0 The argument type.
1389	* @param a_Arg0 The argument name.
1390	*/
1391	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1392	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1393	/**
1394	* For calling a C instruction implementation function taking one extra
1395	* argument.
1396	*
1397	* This special call macro adds default arguments to the call and allow us to
1398	* change these later.
1399	*
1400	* @param a_fn The name of the function.
1401	* @param a0 The name of the 1st argument.
1402	*/
1403	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1404
1405	/**
1406	* For typedef'ing or declaring a C instruction implementation function taking
1407	* two extra arguments.
1408	*
1409	* @param a_Name The name of the type.
1410	* @param a_Type0 The type of the 1st argument
1411	* @param a_Arg0 The name of the 1st argument.
1412	* @param a_Type1 The type of the 2nd argument.
1413	* @param a_Arg1 The name of the 2nd argument.
1414	*/
1415	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1416	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1417	/**
1418	* For defining a C instruction implementation function taking two extra
1419	* arguments.
1420	*
1421	* @param a_Name The name of the function.
1422	* @param a_Type0 The type of the 1st argument
1423	* @param a_Arg0 The name of the 1st argument.
1424	* @param a_Type1 The type of the 2nd argument.
1425	* @param a_Arg1 The name of the 2nd argument.
1426	*/
1427	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1428	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1429	/**
1430	* For calling a C instruction implementation function taking two extra
1431	* arguments.
1432	*
1433	* This special call macro adds default arguments to the call and allow us to
1434	* change these later.
1435	*
1436	* @param a_fn The name of the function.
1437	* @param a0 The name of the 1st argument.
1438	* @param a1 The name of the 2nd argument.
1439	*/
1440	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1441
1442	/**
1443	* For typedef'ing or declaring a C instruction implementation function taking
1444	* three extra arguments.
1445	*
1446	* @param a_Name The name of the type.
1447	* @param a_Type0 The type of the 1st argument
1448	* @param a_Arg0 The name of the 1st argument.
1449	* @param a_Type1 The type of the 2nd argument.
1450	* @param a_Arg1 The name of the 2nd argument.
1451	* @param a_Type2 The type of the 3rd argument.
1452	* @param a_Arg2 The name of the 3rd argument.
1453	*/
1454	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1455	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1456	/**
1457	* For defining a C instruction implementation function taking three extra
1458	* arguments.
1459	*
1460	* @param a_Name The name of the function.
1461	* @param a_Type0 The type of the 1st argument
1462	* @param a_Arg0 The name of the 1st argument.
1463	* @param a_Type1 The type of the 2nd argument.
1464	* @param a_Arg1 The name of the 2nd argument.
1465	* @param a_Type2 The type of the 3rd argument.
1466	* @param a_Arg2 The name of the 3rd argument.
1467	*/
1468	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1469	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1470	/**
1471	* For calling a C instruction implementation function taking three extra
1472	* arguments.
1473	*
1474	* This special call macro adds default arguments to the call and allow us to
1475	* change these later.
1476	*
1477	* @param a_fn The name of the function.
1478	* @param a0 The name of the 1st argument.
1479	* @param a1 The name of the 2nd argument.
1480	* @param a2 The name of the 3rd argument.
1481	*/
1482	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1483
1484
1485	/**
1486	* For typedef'ing or declaring a C instruction implementation function taking
1487	* four extra arguments.
1488	*
1489	* @param a_Name The name of the type.
1490	* @param a_Type0 The type of the 1st argument
1491	* @param a_Arg0 The name of the 1st argument.
1492	* @param a_Type1 The type of the 2nd argument.
1493	* @param a_Arg1 The name of the 2nd argument.
1494	* @param a_Type2 The type of the 3rd argument.
1495	* @param a_Arg2 The name of the 3rd argument.
1496	* @param a_Type3 The type of the 4th argument.
1497	* @param a_Arg3 The name of the 4th argument.
1498	*/
1499	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1500	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1501	/**
1502	* For defining a C instruction implementation function taking four extra
1503	* arguments.
1504	*
1505	* @param a_Name The name of the function.
1506	* @param a_Type0 The type of the 1st argument
1507	* @param a_Arg0 The name of the 1st argument.
1508	* @param a_Type1 The type of the 2nd argument.
1509	* @param a_Arg1 The name of the 2nd argument.
1510	* @param a_Type2 The type of the 3rd argument.
1511	* @param a_Arg2 The name of the 3rd argument.
1512	* @param a_Type3 The type of the 4th argument.
1513	* @param a_Arg3 The name of the 4th argument.
1514	*/
1515	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1516	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1517	a_Type2 a_Arg2, a_Type3 a_Arg3))
1518	/**
1519	* For calling a C instruction implementation function taking four extra
1520	* arguments.
1521	*
1522	* This special call macro adds default arguments to the call and allow us to
1523	* change these later.
1524	*
1525	* @param a_fn The name of the function.
1526	* @param a0 The name of the 1st argument.
1527	* @param a1 The name of the 2nd argument.
1528	* @param a2 The name of the 3rd argument.
1529	* @param a3 The name of the 4th argument.
1530	*/
1531	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1532
1533
1534	/**
1535	* For typedef'ing or declaring a C instruction implementation function taking
1536	* five extra arguments.
1537	*
1538	* @param a_Name The name of the type.
1539	* @param a_Type0 The type of the 1st argument
1540	* @param a_Arg0 The name of the 1st argument.
1541	* @param a_Type1 The type of the 2nd argument.
1542	* @param a_Arg1 The name of the 2nd argument.
1543	* @param a_Type2 The type of the 3rd argument.
1544	* @param a_Arg2 The name of the 3rd argument.
1545	* @param a_Type3 The type of the 4th argument.
1546	* @param a_Arg3 The name of the 4th argument.
1547	* @param a_Type4 The type of the 5th argument.
1548	* @param a_Arg4 The name of the 5th argument.
1549	*/
1550	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1551	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1552	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1553	a_Type3 a_Arg3, a_Type4 a_Arg4))
1554	/**
1555	* For defining a C instruction implementation function taking five extra
1556	* arguments.
1557	*
1558	* @param a_Name The name of the function.
1559	* @param a_Type0 The type of the 1st argument
1560	* @param a_Arg0 The name of the 1st argument.
1561	* @param a_Type1 The type of the 2nd argument.
1562	* @param a_Arg1 The name of the 2nd argument.
1563	* @param a_Type2 The type of the 3rd argument.
1564	* @param a_Arg2 The name of the 3rd argument.
1565	* @param a_Type3 The type of the 4th argument.
1566	* @param a_Arg3 The name of the 4th argument.
1567	* @param a_Type4 The type of the 5th argument.
1568	* @param a_Arg4 The name of the 5th argument.
1569	*/
1570	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1571	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1572	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1573	a_Type3 a_Arg3, a_Type4 a_Arg4))
1574	/**
1575	* For calling a C instruction implementation function taking five extra
1576	* arguments.
1577	*
1578	* This special call macro adds default arguments to the call and allow us to
1579	* change these later.
1580	*
1581	* @param a_fn The name of the function.
1582	* @param a0 The name of the 1st argument.
1583	* @param a1 The name of the 2nd argument.
1584	* @param a2 The name of the 3rd argument.
1585	* @param a3 The name of the 4th argument.
1586	* @param a4 The name of the 5th argument.
1587	*/
1588	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1589
1590	/** @} */
1591
1592
1593	/** @} */
1594
1595	RT_C_DECLS_END
1596
1597	#endif
1598

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 57076

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