IEMInternal.h@ 60384

Last change on this file since 60384 was 60384, checked in by vboxsync, 9 years ago
IEM: Marked instructions introduced by the 186, 286, 386 and 486 to speed up debugging bs3kit on the 286.
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1	/* $Id: IEMInternal.h 60384 2016-04-08 00:16:58Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** For expanding symbol in slickedit and other products tagging and
37	* crossreferencing IEM symbols. */
38	#ifndef IEM_STATIC
39	# define IEM_STATIC static
40	#endif
41
42	/** @def IEM_VERIFICATION_MODE_FULL
43	* Shorthand for:
44	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
45	*/
46	#if (defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)) \
47	\|\| defined(DOXYGEN_RUNNING)
48	# define IEM_VERIFICATION_MODE_FULL
49	#endif
50
51
52	/** @def IEM_CFG_TARGET_CPU
53	* The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value). The
54	* default is the a "current" CPU, i.e. something newer than the pentium pro. By
55	* twiddling this value, you can make IEM try behave like older CPUs which is
56	* useful when checking software that needs to run on real old CPUs.
57	*/
58	#if !defined(IEM_CFG_TARGET_CPU) \|\| defined(DOXYGEN_RUNNING)
59	# define IEM_CFG_TARGET_CPU IEMTARGETCPU_CURRENT
60	/# define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC/
61	#endif
62
63
64
65	/** Finish and move to types.h */
66	typedef union
67	{
68	uint32_t u32;
69	} RTFLOAT32U;
70	typedef RTFLOAT32U *PRTFLOAT32U;
71	typedef RTFLOAT32U const *PCRTFLOAT32U;
72
73
74	/**
75	* Extended operand mode that includes a representation of 8-bit.
76	*
77	* This is used for packing down modes when invoking some C instruction
78	* implementations.
79	*/
80	typedef enum IEMMODEX
81	{
82	IEMMODEX_16BIT = IEMMODE_16BIT,
83	IEMMODEX_32BIT = IEMMODE_32BIT,
84	IEMMODEX_64BIT = IEMMODE_64BIT,
85	IEMMODEX_8BIT
86	} IEMMODEX;
87	AssertCompileSize(IEMMODEX, 4);
88
89
90	/**
91	* Branch types.
92	*/
93	typedef enum IEMBRANCH
94	{
95	IEMBRANCH_JUMP = 1,
96	IEMBRANCH_CALL,
97	IEMBRANCH_TRAP,
98	IEMBRANCH_SOFTWARE_INT,
99	IEMBRANCH_HARDWARE_INT
100	} IEMBRANCH;
101	AssertCompileSize(IEMBRANCH, 4);
102
103
104	/**
105	* A FPU result.
106	*/
107	typedef struct IEMFPURESULT
108	{
109	/** The output value. */
110	RTFLOAT80U r80Result;
111	/** The output status. */
112	uint16_t FSW;
113	} IEMFPURESULT;
114	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
115	/** Pointer to a FPU result. */
116	typedef IEMFPURESULT *PIEMFPURESULT;
117	/** Pointer to a const FPU result. */
118	typedef IEMFPURESULT const *PCIEMFPURESULT;
119
120
121	/**
122	* A FPU result consisting of two output values and FSW.
123	*/
124	typedef struct IEMFPURESULTTWO
125	{
126	/** The first output value. */
127	RTFLOAT80U r80Result1;
128	/** The output status. */
129	uint16_t FSW;
130	/** The second output value. */
131	RTFLOAT80U r80Result2;
132	} IEMFPURESULTTWO;
133	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
134	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
135	/** Pointer to a FPU result consisting of two output values and FSW. */
136	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
137	/** Pointer to a const FPU result consisting of two output values and FSW. */
138	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
139
140
141	/**
142	* IEM pending commit function index.
143	*/
144	typedef enum IEMCOMMIT
145	{
146	/** Invalid / nothing pending. */
147	IEMCOMMIT_INVALID = 0,
148	/** @name INS
149	* @{ */
150	IEMCOMMIT_INS_OP8_ADDR16,
151	IEMCOMMIT_INS_OP8_ADDR32,
152	IEMCOMMIT_INS_OP8_ADDR64,
153	IEMCOMMIT_INS_OP16_ADDR16,
154	IEMCOMMIT_INS_OP16_ADDR32,
155	IEMCOMMIT_INS_OP16_ADDR64,
156	IEMCOMMIT_INS_OP32_ADDR16,
157	IEMCOMMIT_INS_OP32_ADDR32,
158	IEMCOMMIT_INS_OP32_ADDR64,
159	/** @} */
160	/** @name REP INS
161	* @{ */
162	IEMCOMMIT_REP_INS_OP8_ADDR16,
163	IEMCOMMIT_REP_INS_OP8_ADDR32,
164	IEMCOMMIT_REP_INS_OP8_ADDR64,
165	IEMCOMMIT_REP_INS_OP16_ADDR16,
166	IEMCOMMIT_REP_INS_OP16_ADDR32,
167	IEMCOMMIT_REP_INS_OP16_ADDR64,
168	IEMCOMMIT_REP_INS_OP32_ADDR16,
169	IEMCOMMIT_REP_INS_OP32_ADDR32,
170	IEMCOMMIT_REP_INS_OP32_ADDR64,
171	/** @} */
172	/** End of valid functions. */
173	IEMCOMMIT_END,
174	/** Make sure the type is int in call contexts. */
175	IEMCOMMIT_32BIT_HACK = 0x7fffffff
176	} IEMCOMMIT;
177	AssertCompile(sizeof(IEMCOMMIT) == 4);
178
179
180	#ifdef IEM_VERIFICATION_MODE_FULL
181
182	/**
183	* Verification event type.
184	*/
185	typedef enum IEMVERIFYEVENT
186	{
187	IEMVERIFYEVENT_INVALID = 0,
188	IEMVERIFYEVENT_IOPORT_READ,
189	IEMVERIFYEVENT_IOPORT_WRITE,
190	IEMVERIFYEVENT_IOPORT_STR_READ,
191	IEMVERIFYEVENT_IOPORT_STR_WRITE,
192	IEMVERIFYEVENT_RAM_WRITE,
193	IEMVERIFYEVENT_RAM_READ
194	} IEMVERIFYEVENT;
195
196	/** Checks if the event type is a RAM read or write. */
197	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
198
199	/**
200	* Verification event record.
201	*/
202	typedef struct IEMVERIFYEVTREC
203	{
204	/** Pointer to the next record in the list. */
205	struct IEMVERIFYEVTREC *pNext;
206	/** The event type. */
207	IEMVERIFYEVENT enmEvent;
208	/** The event data. */
209	union
210	{
211	/** IEMVERIFYEVENT_IOPORT_READ */
212	struct
213	{
214	RTIOPORT Port;
215	uint8_t cbValue;
216	} IOPortRead;
217
218	/** IEMVERIFYEVENT_IOPORT_WRITE */
219	struct
220	{
221	RTIOPORT Port;
222	uint8_t cbValue;
223	uint32_t u32Value;
224	} IOPortWrite;
225
226	/** IEMVERIFYEVENT_IOPORT_STR_READ */
227	struct
228	{
229	RTIOPORT Port;
230	uint8_t cbValue;
231	RTGCUINTREG cTransfers;
232	} IOPortStrRead;
233
234	/** IEMVERIFYEVENT_IOPORT_STR_WRITE */
235	struct
236	{
237	RTIOPORT Port;
238	uint8_t cbValue;
239	RTGCUINTREG cTransfers;
240	} IOPortStrWrite;
241
242	/** IEMVERIFYEVENT_RAM_READ */
243	struct
244	{
245	RTGCPHYS GCPhys;
246	uint32_t cb;
247	} RamRead;
248
249	/** IEMVERIFYEVENT_RAM_WRITE */
250	struct
251	{
252	RTGCPHYS GCPhys;
253	uint32_t cb;
254	uint8_t ab[512];
255	} RamWrite;
256	} u;
257	} IEMVERIFYEVTREC;
258	/** Pointer to an IEM event verification records. */
259	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
260
261	#endif /* IEM_VERIFICATION_MODE_FULL */
262
263
264	/**
265	* The per-CPU IEM state.
266	*/
267	typedef struct IEMCPU
268	{
269	/** Pointer to the CPU context - ring-3 context. */
270	R3PTRTYPE(PCPUMCTX) pCtxR3;
271	/** Pointer to the CPU context - ring-0 context. */
272	R0PTRTYPE(PCPUMCTX) pCtxR0;
273	/** Pointer to the CPU context - raw-mode context. */
274	RCPTRTYPE(PCPUMCTX) pCtxRC;
275
276	/** Offset of the VMCPU structure relative to this structure (negative). */
277	int32_t offVMCpu;
278	/** Offset of the VM structure relative to this structure (negative). */
279	int32_t offVM;
280
281	/** Whether to bypass access handlers or not. */
282	bool fBypassHandlers;
283	/** Indicates that we're interpreting patch code - RC only! */
284	bool fInPatchCode;
285	/** Explicit alignment padding. */
286	bool afAlignment0[2];
287
288	/** The flags of the current exception / interrupt. */
289	uint32_t fCurXcpt;
290	/** The current exception / interrupt. */
291	uint8_t uCurXcpt;
292	/** Exception / interrupt recursion depth. */
293	int8_t cXcptRecursions;
294	/** Explicit alignment padding. */
295	bool afAlignment1[1];
296	/** The CPL. */
297	uint8_t uCpl;
298	/** The current CPU execution mode (CS). */
299	IEMMODE enmCpuMode;
300	/** Info status code that needs to be propagated to the IEM caller.
301	* This cannot be passed internally, as it would complicate all success
302	* checks within the interpreter making the code larger and almost impossible
303	* to get right. Instead, we'll store status codes to pass on here. Each
304	* source of these codes will perform appropriate sanity checks. */
305	int32_t rcPassUp;
306
307	/** @name Statistics
308	* @{ */
309	/** The number of instructions we've executed. */
310	uint32_t cInstructions;
311	/** The number of potential exits. */
312	uint32_t cPotentialExits;
313	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
314	* This may contain uncommitted writes. */
315	uint32_t cbWritten;
316	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
317	uint32_t cRetInstrNotImplemented;
318	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
319	uint32_t cRetAspectNotImplemented;
320	/** Counts informational statuses returned (other than VINF_SUCCESS). */
321	uint32_t cRetInfStatuses;
322	/** Counts other error statuses returned. */
323	uint32_t cRetErrStatuses;
324	/** Number of times rcPassUp has been used. */
325	uint32_t cRetPassUpStatus;
326	/** Number of times RZ left with instruction commit pending for ring-3. */
327	uint32_t cPendingCommit;
328	#ifdef IEM_VERIFICATION_MODE_FULL
329	/** The Number of I/O port reads that has been performed. */
330	uint32_t cIOReads;
331	/** The Number of I/O port writes that has been performed. */
332	uint32_t cIOWrites;
333	/** Set if no comparison to REM is currently performed.
334	* This is used to skip past really slow bits. */
335	bool fNoRem;
336	/** Saved fNoRem flag used by #iemInitExec and #iemUninitExec. */
337	bool fNoRemSavedByExec;
338	/** Indicates that RAX and RDX differences should be ignored since RDTSC
339	* and RDTSCP are timing sensitive. */
340	bool fIgnoreRaxRdx;
341	/** Indicates that a MOVS instruction with overlapping source and destination
342	* was executed, causing the memory write records to be incorrrect. */
343	bool fOverlappingMovs;
344	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
345	bool fProblematicMemory;
346	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
347	* CPUM doesn't yet reflect. */
348	uint8_t uInjectCpl;
349	bool afAlignment2[3];
350	/** Mask of undefined eflags.
351	* The verifier will any difference in these flags. */
352	uint32_t fUndefinedEFlags;
353	/** The CS of the instruction being interpreted. */
354	RTSEL uOldCs;
355	/** The RIP of the instruction being interpreted. */
356	uint64_t uOldRip;
357	/** The physical address corresponding to abOpcodes[0]. */
358	RTGCPHYS GCPhysOpcodes;
359	#endif
360	/** @} */
361
362	/** @name Decoder state.
363	* @{ */
364
365	/** The default addressing mode . */
366	IEMMODE enmDefAddrMode;
367	/** The effective addressing mode . */
368	IEMMODE enmEffAddrMode;
369	/** The default operand mode . */
370	IEMMODE enmDefOpSize;
371	/** The effective operand mode . */
372	IEMMODE enmEffOpSize;
373
374	/** The prefix mask (IEM_OP_PRF_XXX). */
375	uint32_t fPrefixes;
376	/** The extra REX ModR/M register field bit (REX.R << 3). */
377	uint8_t uRexReg;
378	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
379	* (REX.B << 3). */
380	uint8_t uRexB;
381	/** The extra REX SIB index field bit (REX.X << 3). */
382	uint8_t uRexIndex;
383	/** The effective segment register (X86_SREG_XXX). */
384	uint8_t iEffSeg;
385
386	/** The current offset into abOpcodes. */
387	uint8_t offOpcode;
388	/** The size of what has currently been fetched into abOpcodes. */
389	uint8_t cbOpcode;
390	/** The opcode bytes. */
391	uint8_t abOpcode[15];
392	/** Offset into abOpcodes where the FPU instruction starts.
393	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
394	* instruction result is committed. */
395	uint8_t offFpuOpcode;
396
397	/** @} */
398
399	/** The number of active guest memory mappings. */
400	uint8_t cActiveMappings;
401	/** The next unused mapping index. */
402	uint8_t iNextMapping;
403	/** Records for tracking guest memory mappings. */
404	struct
405	{
406	/** The address of the mapped bytes. */
407	void *pv;
408	#if defined(IN_RC) && HC_ARCH_BITS == 64
409	uint32_t u32Alignment3; /*< Alignment padding. /
410	#endif
411	/** The access flags (IEM_ACCESS_XXX).
412	* IEM_ACCESS_INVALID if the entry is unused. */
413	uint32_t fAccess;
414	#if HC_ARCH_BITS == 64
415	uint32_t u32Alignment4; /*< Alignment padding. /
416	#endif
417	} aMemMappings[3];
418
419	/** Locking records for the mapped memory. */
420	union
421	{
422	PGMPAGEMAPLOCK Lock;
423	uint64_t au64Padding[2];
424	} aMemMappingLocks[3];
425
426	/** Bounce buffer info.
427	* This runs in parallel to aMemMappings. */
428	struct
429	{
430	/** The physical address of the first byte. */
431	RTGCPHYS GCPhysFirst;
432	/** The physical address of the second page. */
433	RTGCPHYS GCPhysSecond;
434	/** The number of bytes in the first page. */
435	uint16_t cbFirst;
436	/** The number of bytes in the second page. */
437	uint16_t cbSecond;
438	/** Whether it's unassigned memory. */
439	bool fUnassigned;
440	/** Explicit alignment padding. */
441	bool afAlignment5[3];
442	} aMemBbMappings[3];
443
444	/** Bounce buffer storage.
445	* This runs in parallel to aMemMappings and aMemBbMappings. */
446	struct
447	{
448	uint8_t ab[512];
449	} aBounceBuffers[3];
450
451	/** @name Pending Instruction Commit (R0/RC postponed it to Ring-3).
452	* @{ */
453	struct
454	{
455	/** The commit function to call. */
456	IEMCOMMIT enmFn;
457	/** The instruction size. */
458	uint8_t cbInstr;
459	/** Generic value to commit. */
460	uint64_t uValue;
461	} PendingCommit;
462	/** @} */
463
464	/** @name Target CPU information.
465	* @{ */
466	#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
467	/** The target CPU. */
468	uint32_t uTargetCpu;
469	#else
470	uint32_t u32TargetCpuPadding;
471	#endif
472	/** The CPU vendor. */
473	CPUMCPUVENDOR enmCpuVendor;
474	/** @} */
475
476	/** @name Host CPU information.
477	* @{ */
478	/** The CPU vendor. */
479	CPUMCPUVENDOR enmHostCpuVendor;
480	/** @} */
481
482	uint32_t u32Alignment6; /*< Alignment padding. /
483
484	#ifdef IEM_VERIFICATION_MODE_FULL
485	/** The event verification records for what IEM did (LIFO). */
486	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
487	/** Insertion point for pIemEvtRecHead. */
488	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
489	/** The event verification records for what the other party did (FIFO). */
490	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
491	/** Insertion point for pOtherEvtRecHead. */
492	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
493	/** List of free event records. */
494	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
495	#endif
496	} IEMCPU;
497	/** Pointer to the per-CPU IEM state. */
498	typedef IEMCPU *PIEMCPU;
499	/** Pointer to the const per-CPU IEM state. */
500	typedef IEMCPU const *PCIEMCPU;
501
502	/** Converts a IEMCPU pointer to a VMCPU pointer.
503	* @returns VMCPU pointer.
504	* @param a_pIemCpu The IEM per CPU instance data.
505	*/
506	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
507
508	/** Converts a IEMCPU pointer to a VM pointer.
509	* @returns VM pointer.
510	* @param a_pIemCpu The IEM per CPU instance data.
511	*/
512	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
513
514	/** Gets the current IEMTARGETCPU value.
515	* @returns IEMTARGETCPU value.
516	* @param a_pIemCpu The IEM per CPU instance data.
517	*/
518	#if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
519	# define IEM_GET_TARGET_CPU(a_pIemCpu) (IEM_CFG_TARGET_CPU)
520	#else
521	# define IEM_GET_TARGET_CPU(a_pIemCpu) ((a_pIemCpu)->uTargetCpu)
522	#endif
523
524	/** @name IEM_ACCESS_XXX - Access details.
525	* @{ */
526	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
527	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
528	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
529	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
530	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
531	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
532	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
533	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
534	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
535	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
536	/** The writes are partial, so if initialize the bounce buffer with the
537	* orignal RAM content. */
538	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
539	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
540	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
541	/** Valid bit mask. */
542	#define IEM_ACCESS_VALID_MASK UINT32_C(0x000003ff)
543	/** Read+write data alias. */
544	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
545	/** Write data alias. */
546	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
547	/** Read data alias. */
548	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
549	/** Instruction fetch alias. */
550	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
551	/** Stack write alias. */
552	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
553	/** Stack read alias. */
554	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
555	/** Stack read+write alias. */
556	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
557	/** Read system table alias. */
558	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
559	/** Read+write system table alias. */
560	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
561	/** @} */
562
563	/** @name Prefix constants (IEMCPU::fPrefixes)
564	* @{ */
565	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
566	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
567	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
568	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
569	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
570	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
571	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
572
573	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
574	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
575	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
576
577	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
578	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
579	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
580
581	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
582	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
583	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
584	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
585	/** Mask with all the REX prefix flags.
586	* This is generally for use when needing to undo the REX prefixes when they
587	* are followed legacy prefixes and therefore does not immediately preceed
588	* the first opcode byte.
589	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
590	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
591	/** @} */
592
593	/** @name Opcode forms
594	* @{ */
595	/** ModR/M: reg, r/m */
596	#define IEMOPFORM_RM 0
597	/** ModR/M: reg, r/m (register) */
598	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
599	/** ModR/M: reg, r/m (memory) */
600	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
601	/** ModR/M: r/m, reg */
602	#define IEMOPFORM_MR 1
603	/** ModR/M: r/m (register), reg */
604	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
605	/** ModR/M: r/m (memory), reg */
606	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
607	/** ModR/M: r/m only */
608	#define IEMOPFORM_M 2
609	/** ModR/M: r/m only (register). */
610	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
611	/** ModR/M: r/m only (memory). */
612	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
613	/** ModR/M: reg only */
614	#define IEMOPFORM_R 3
615
616	/** Fixed register instruction, no R/M. */
617	#define IEMOPFORM_FIXED 4
618
619	/** The r/m is a register. */
620	#define IEMOPFORM_MOD3 RT_BIT_32(8)
621	/** The r/m is a memory access. */
622	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
623	/** @} */
624
625	/**
626	* Possible hardware task switch sources.
627	*/
628	typedef enum IEMTASKSWITCH
629	{
630	/** Task switch caused by an interrupt/exception. */
631	IEMTASKSWITCH_INT_XCPT = 1,
632	/** Task switch caused by a far CALL. */
633	IEMTASKSWITCH_CALL,
634	/** Task switch caused by a far JMP. */
635	IEMTASKSWITCH_JUMP,
636	/** Task switch caused by an IRET. */
637	IEMTASKSWITCH_IRET
638	} IEMTASKSWITCH;
639	AssertCompileSize(IEMTASKSWITCH, 4);
640
641
642	/**
643	* Tests if verification mode is enabled.
644	*
645	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
646	* should therefore cause the compiler to eliminate the verification branch
647	* of an if statement. */
648	#ifdef IEM_VERIFICATION_MODE_FULL
649	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
650	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
651	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
652	#else
653	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
654	#endif
655
656	/**
657	* Tests if full verification mode is enabled.
658	*
659	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
660	* should therefore cause the compiler to eliminate the verification branch
661	* of an if statement. */
662	#ifdef IEM_VERIFICATION_MODE_FULL
663	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
664	#else
665	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
666	#endif
667
668	/**
669	* Tests if full verification mode is enabled again REM.
670	*
671	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
672	* should therefore cause the compiler to eliminate the verification branch
673	* of an if statement. */
674	#ifdef IEM_VERIFICATION_MODE_FULL
675	# ifdef IEM_VERIFICATION_MODE_FULL_HM
676	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
677	# else
678	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
679	# endif
680	#else
681	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
682	#endif
683
684	/** @def IEM_VERIFICATION_MODE
685	* Indicates that one of the verfication modes are enabled.
686	*/
687	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE) \
688	\|\| defined(DOXYGEN_RUNNING)
689	# define IEM_VERIFICATION_MODE
690	#endif
691
692	/**
693	* Indicates to the verifier that the given flag set is undefined.
694	*
695	* Can be invoked again to add more flags.
696	*
697	* This is a NOOP if the verifier isn't compiled in.
698	*/
699	#ifdef IEM_VERIFICATION_MODE_FULL
700	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
701	#else
702	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
703	#endif
704
705
706	/** @def IEM_DECL_IMPL_TYPE
707	* For typedef'ing an instruction implementation function.
708	*
709	* @param a_RetType The return type.
710	* @param a_Name The name of the type.
711	* @param a_ArgList The argument list enclosed in parentheses.
712	*/
713
714	/** @def IEM_DECL_IMPL_DEF
715	* For defining an instruction implementation function.
716	*
717	* @param a_RetType The return type.
718	* @param a_Name The name of the type.
719	* @param a_ArgList The argument list enclosed in parentheses.
720	*/
721
722	#if defined(__GNUC__) && defined(RT_ARCH_X86)
723	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
724	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
725	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
726	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
727
728	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
729	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
730	a_RetType (__fastcall a_Name) a_ArgList
731	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
732	a_RetType __fastcall a_Name a_ArgList
733
734	#else
735	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
736	a_RetType (VBOXCALL a_Name) a_ArgList
737	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
738	a_RetType VBOXCALL a_Name a_ArgList
739
740	#endif
741
742	/** @name Arithmetic assignment operations on bytes (binary).
743	* @{ */
744	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
745	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
746	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
747	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
748	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
749	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
750	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
751	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
752	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
753	/** @} */
754
755	/** @name Arithmetic assignment operations on words (binary).
756	* @{ */
757	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
758	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
759	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
760	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
761	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
762	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
763	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
764	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
765	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
766	/** @} */
767
768	/** @name Arithmetic assignment operations on double words (binary).
769	* @{ */
770	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
771	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
772	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
773	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
774	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
775	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
776	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
777	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
778	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
779	/** @} */
780
781	/** @name Arithmetic assignment operations on quad words (binary).
782	* @{ */
783	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
784	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
785	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
786	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
787	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
788	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
789	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
790	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
791	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
792	/** @} */
793
794	/** @name Compare operations (thrown in with the binary ops).
795	* @{ */
796	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
797	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
798	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
799	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
800	/** @} */
801
802	/** @name Test operations (thrown in with the binary ops).
803	* @{ */
804	FNIEMAIMPLBINU8 iemAImpl_test_u8;
805	FNIEMAIMPLBINU16 iemAImpl_test_u16;
806	FNIEMAIMPLBINU32 iemAImpl_test_u32;
807	FNIEMAIMPLBINU64 iemAImpl_test_u64;
808	/** @} */
809
810	/** @name Bit operations operations (thrown in with the binary ops).
811	* @{ */
812	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
813	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
814	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
815	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
816	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
817	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
818	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
819	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
820	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
821	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
822	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
823	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
824	/** @} */
825
826	/** @name Exchange memory with register operations.
827	* @{ */
828	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
829	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
830	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
831	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
832	/** @} */
833
834	/** @name Exchange and add operations.
835	* @{ */
836	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
837	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
838	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
839	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
840	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
841	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
842	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
843	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
844	/** @} */
845
846	/** @name Compare and exchange.
847	* @{ */
848	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
849	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
850	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
851	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
852	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
853	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
854	#ifdef RT_ARCH_X86
855	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
856	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
857	#else
858	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
859	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
860	#endif
861	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
862	uint32_t *pEFlags));
863	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
864	uint32_t *pEFlags));
865	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
866	uint32_t *pEFlags));
867	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
868	uint32_t *pEFlags));
869	/** @} */
870
871	/** @name Memory ordering
872	* @{ */
873	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
874	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
875	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
876	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
877	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
878	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
879	/** @} */
880
881	/** @name Double precision shifts
882	* @{ */
883	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
884	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
885	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
886	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
887	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
888	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
889	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
890	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
891	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
892	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
893	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
894	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
895	/** @} */
896
897
898	/** @name Bit search operations (thrown in with the binary ops).
899	* @{ */
900	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
901	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
902	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
903	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
904	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
905	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
906	/** @} */
907
908	/** @name Signed multiplication operations (thrown in with the binary ops).
909	* @{ */
910	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
911	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
912	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
913	/** @} */
914
915	/** @name Arithmetic assignment operations on bytes (unary).
916	* @{ */
917	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
918	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
919	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
920	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
921	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
922	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
923	/** @} */
924
925	/** @name Arithmetic assignment operations on words (unary).
926	* @{ */
927	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
928	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
929	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
930	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
931	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
932	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
933	/** @} */
934
935	/** @name Arithmetic assignment operations on double words (unary).
936	* @{ */
937	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
938	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
939	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
940	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
941	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
942	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
943	/** @} */
944
945	/** @name Arithmetic assignment operations on quad words (unary).
946	* @{ */
947	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
948	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
949	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
950	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
951	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
952	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
953	/** @} */
954
955
956	/** @name Shift operations on bytes (Group 2).
957	* @{ */
958	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
959	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
960	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
961	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
962	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
963	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
964	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
965	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
966	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
967	/** @} */
968
969	/** @name Shift operations on words (Group 2).
970	* @{ */
971	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
972	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
973	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
974	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
975	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
976	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
977	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
978	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
979	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
980	/** @} */
981
982	/** @name Shift operations on double words (Group 2).
983	* @{ */
984	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
985	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
986	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
987	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
988	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
989	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
990	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
991	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
992	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
993	/** @} */
994
995	/** @name Shift operations on words (Group 2).
996	* @{ */
997	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
998	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
999	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
1000	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
1001	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
1002	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
1003	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
1004	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
1005	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
1006	/** @} */
1007
1008	/** @name Multiplication and division operations.
1009	* @{ */
1010	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
1011	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
1012	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
1013	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
1014
1015	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
1016	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
1017	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
1018	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
1019
1020	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
1021	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
1022	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
1023	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
1024
1025	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
1026	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
1027	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
1028	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
1029	/** @} */
1030
1031	/** @name Byte Swap.
1032	* @{ */
1033	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
1034	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
1035	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
1036	/** @} */
1037
1038	/** @name Misc.
1039	* @{ */
1040	FNIEMAIMPLBINU16 iemAImpl_arpl;
1041	/** @} */
1042
1043
1044	/** @name FPU operations taking a 32-bit float argument
1045	* @{ */
1046	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1047	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1048	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
1049
1050	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1051	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1052	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
1053
1054	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
1055	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
1056	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
1057	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
1058	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
1059	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
1060	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
1061
1062	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
1063	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1064	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
1065	/** @} */
1066
1067	/** @name FPU operations taking a 64-bit float argument
1068	* @{ */
1069	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1070	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1071	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
1072
1073	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
1074	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
1075	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
1076	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
1077	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
1078	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
1079
1080	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1081	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1082	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
1083	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1084	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
1085	/** @} */
1086
1087	/** @name FPU operations taking a 80-bit float argument
1088	* @{ */
1089	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1090	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1091	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
1092	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
1093	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
1094	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
1095	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
1096	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
1097	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
1098	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
1099	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
1100	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
1101
1102	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
1103	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
1104
1105	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1106	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1107	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1108	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1109	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1110
1111	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1112	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1113	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1114	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1115	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1116
1117	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1118	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1119	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1120	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1121	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1122	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1123	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1124	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1125	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1126	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1127
1128	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1129	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1130	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1131	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1132
1133	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1134	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1135	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1136	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1137	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1138	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1139	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1140	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1141	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1142
1143	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1144	PCRTFLOAT80U pr80Val));
1145	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1146	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1147	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1148	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1149
1150	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1151	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1152	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1153
1154	/** @} */
1155
1156	/** @name FPU operations taking a 16-bit signed integer argument
1157	* @{ */
1158	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1159	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1160	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1161
1162	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1163	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1164	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1165	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1166	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1167	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1168
1169	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1170	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1171
1172	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1173	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1174	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1175	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1176	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1177	/** @} */
1178
1179	/** @name FPU operations taking a 32-bit signed integer argument
1180	* @{ */
1181	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1182	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1183	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1184
1185	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1186	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1187	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1188	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1189	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1190	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1191
1192	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1193	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1194
1195	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1196	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1197	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1198	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1199	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1200	/** @} */
1201
1202	/** @name FPU operations taking a 64-bit signed integer argument
1203	* @{ */
1204	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1205	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1206	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1207
1208	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1209	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1210	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1211	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1212	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1213	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1214
1215	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1216	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1217
1218	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1219	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1220	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1221	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1222	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1223	/** @} */
1224
1225
1226	/** Temporary type representing a 256-bit vector register. */
1227	typedef struct {uint64_t au64[4]; } IEMVMM256;
1228	/** Temporary type pointing to a 256-bit vector register. */
1229	typedef IEMVMM256 *PIEMVMM256;
1230	/** Temporary type pointing to a const 256-bit vector register. */
1231	typedef IEMVMM256 *PCIEMVMM256;
1232
1233
1234	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1235	* @{ */
1236	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1237	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1238	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1239	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1240	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1241	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1242	/** @} */
1243
1244	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1245	* @{ */
1246	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1247	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1248	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1249	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1250	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1251	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1252	/** @} */
1253
1254	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1255	* @{ */
1256	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1257	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1258	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1259	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1260	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1261	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1262	/** @} */
1263
1264	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1265	* @{ */
1266	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1267	uint128_t const *pu128Src, uint8_t bEvil));
1268	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1269	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1270	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1271	/** @} */
1272
1273	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1274	* @{ */
1275	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1276	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1277	/** @} */
1278
1279
1280
1281	/** @name Function tables.
1282	* @{
1283	*/
1284
1285	/**
1286	* Function table for a binary operator providing implementation based on
1287	* operand size.
1288	*/
1289	typedef struct IEMOPBINSIZES
1290	{
1291	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1292	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1293	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1294	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1295	} IEMOPBINSIZES;
1296	/** Pointer to a binary operator function table. */
1297	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1298
1299
1300	/**
1301	* Function table for a unary operator providing implementation based on
1302	* operand size.
1303	*/
1304	typedef struct IEMOPUNARYSIZES
1305	{
1306	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1307	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1308	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1309	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1310	} IEMOPUNARYSIZES;
1311	/** Pointer to a unary operator function table. */
1312	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1313
1314
1315	/**
1316	* Function table for a shift operator providing implementation based on
1317	* operand size.
1318	*/
1319	typedef struct IEMOPSHIFTSIZES
1320	{
1321	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1322	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1323	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1324	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1325	} IEMOPSHIFTSIZES;
1326	/** Pointer to a shift operator function table. */
1327	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1328
1329
1330	/**
1331	* Function table for a multiplication or division operation.
1332	*/
1333	typedef struct IEMOPMULDIVSIZES
1334	{
1335	PFNIEMAIMPLMULDIVU8 pfnU8;
1336	PFNIEMAIMPLMULDIVU16 pfnU16;
1337	PFNIEMAIMPLMULDIVU32 pfnU32;
1338	PFNIEMAIMPLMULDIVU64 pfnU64;
1339	} IEMOPMULDIVSIZES;
1340	/** Pointer to a multiplication or division operation function table. */
1341	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1342
1343
1344	/**
1345	* Function table for a double precision shift operator providing implementation
1346	* based on operand size.
1347	*/
1348	typedef struct IEMOPSHIFTDBLSIZES
1349	{
1350	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1351	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1352	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1353	} IEMOPSHIFTDBLSIZES;
1354	/** Pointer to a double precision shift function table. */
1355	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1356
1357
1358	/**
1359	* Function table for media instruction taking two full sized media registers,
1360	* optionally the 2nd being a memory reference (only modifying the first op.)
1361	*/
1362	typedef struct IEMOPMEDIAF2
1363	{
1364	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1365	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1366	} IEMOPMEDIAF2;
1367	/** Pointer to a media operation function table for full sized ops. */
1368	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1369
1370	/**
1371	* Function table for media instruction taking taking one full and one lower
1372	* half media register.
1373	*/
1374	typedef struct IEMOPMEDIAF1L1
1375	{
1376	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1377	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1378	} IEMOPMEDIAF1L1;
1379	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1380	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1381
1382	/**
1383	* Function table for media instruction taking taking one full and one high half
1384	* media register.
1385	*/
1386	typedef struct IEMOPMEDIAF1H1
1387	{
1388	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1389	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1390	} IEMOPMEDIAF1H1;
1391	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1392	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1393
1394
1395	/** @} */
1396
1397
1398	/** @name C instruction implementations for anything slightly complicated.
1399	* @{ */
1400
1401	/**
1402	* For typedef'ing or declaring a C instruction implementation function taking
1403	* no extra arguments.
1404	*
1405	* @param a_Name The name of the type.
1406	*/
1407	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1408	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1409	/**
1410	* For defining a C instruction implementation function taking no extra
1411	* arguments.
1412	*
1413	* @param a_Name The name of the function
1414	*/
1415	# define IEM_CIMPL_DEF_0(a_Name) \
1416	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1417	/**
1418	* For calling a C instruction implementation function taking no extra
1419	* arguments.
1420	*
1421	* This special call macro adds default arguments to the call and allow us to
1422	* change these later.
1423	*
1424	* @param a_fn The name of the function.
1425	*/
1426	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1427
1428	/**
1429	* For typedef'ing or declaring a C instruction implementation function taking
1430	* one extra argument.
1431	*
1432	* @param a_Name The name of the type.
1433	* @param a_Type0 The argument type.
1434	* @param a_Arg0 The argument name.
1435	*/
1436	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1437	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1438	/**
1439	* For defining a C instruction implementation function taking one extra
1440	* argument.
1441	*
1442	* @param a_Name The name of the function
1443	* @param a_Type0 The argument type.
1444	* @param a_Arg0 The argument name.
1445	*/
1446	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1447	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1448	/**
1449	* For calling a C instruction implementation function taking one extra
1450	* argument.
1451	*
1452	* This special call macro adds default arguments to the call and allow us to
1453	* change these later.
1454	*
1455	* @param a_fn The name of the function.
1456	* @param a0 The name of the 1st argument.
1457	*/
1458	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1459
1460	/**
1461	* For typedef'ing or declaring a C instruction implementation function taking
1462	* two extra arguments.
1463	*
1464	* @param a_Name The name of the type.
1465	* @param a_Type0 The type of the 1st argument
1466	* @param a_Arg0 The name of the 1st argument.
1467	* @param a_Type1 The type of the 2nd argument.
1468	* @param a_Arg1 The name of the 2nd argument.
1469	*/
1470	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1471	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1472	/**
1473	* For defining a C instruction implementation function taking two extra
1474	* arguments.
1475	*
1476	* @param a_Name The name of the function.
1477	* @param a_Type0 The type of the 1st argument
1478	* @param a_Arg0 The name of the 1st argument.
1479	* @param a_Type1 The type of the 2nd argument.
1480	* @param a_Arg1 The name of the 2nd argument.
1481	*/
1482	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1483	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1484	/**
1485	* For calling a C instruction implementation function taking two extra
1486	* arguments.
1487	*
1488	* This special call macro adds default arguments to the call and allow us to
1489	* change these later.
1490	*
1491	* @param a_fn The name of the function.
1492	* @param a0 The name of the 1st argument.
1493	* @param a1 The name of the 2nd argument.
1494	*/
1495	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1496
1497	/**
1498	* For typedef'ing or declaring a C instruction implementation function taking
1499	* three extra arguments.
1500	*
1501	* @param a_Name The name of the type.
1502	* @param a_Type0 The type of the 1st argument
1503	* @param a_Arg0 The name of the 1st argument.
1504	* @param a_Type1 The type of the 2nd argument.
1505	* @param a_Arg1 The name of the 2nd argument.
1506	* @param a_Type2 The type of the 3rd argument.
1507	* @param a_Arg2 The name of the 3rd argument.
1508	*/
1509	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1510	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1511	/**
1512	* For defining a C instruction implementation function taking three extra
1513	* arguments.
1514	*
1515	* @param a_Name The name of the function.
1516	* @param a_Type0 The type of the 1st argument
1517	* @param a_Arg0 The name of the 1st argument.
1518	* @param a_Type1 The type of the 2nd argument.
1519	* @param a_Arg1 The name of the 2nd argument.
1520	* @param a_Type2 The type of the 3rd argument.
1521	* @param a_Arg2 The name of the 3rd argument.
1522	*/
1523	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1524	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1525	/**
1526	* For calling a C instruction implementation function taking three extra
1527	* arguments.
1528	*
1529	* This special call macro adds default arguments to the call and allow us to
1530	* change these later.
1531	*
1532	* @param a_fn The name of the function.
1533	* @param a0 The name of the 1st argument.
1534	* @param a1 The name of the 2nd argument.
1535	* @param a2 The name of the 3rd argument.
1536	*/
1537	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1538
1539
1540	/**
1541	* For typedef'ing or declaring a C instruction implementation function taking
1542	* four extra arguments.
1543	*
1544	* @param a_Name The name of the type.
1545	* @param a_Type0 The type of the 1st argument
1546	* @param a_Arg0 The name of the 1st argument.
1547	* @param a_Type1 The type of the 2nd argument.
1548	* @param a_Arg1 The name of the 2nd argument.
1549	* @param a_Type2 The type of the 3rd argument.
1550	* @param a_Arg2 The name of the 3rd argument.
1551	* @param a_Type3 The type of the 4th argument.
1552	* @param a_Arg3 The name of the 4th argument.
1553	*/
1554	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1555	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1556	/**
1557	* For defining a C instruction implementation function taking four extra
1558	* arguments.
1559	*
1560	* @param a_Name The name of the function.
1561	* @param a_Type0 The type of the 1st argument
1562	* @param a_Arg0 The name of the 1st argument.
1563	* @param a_Type1 The type of the 2nd argument.
1564	* @param a_Arg1 The name of the 2nd argument.
1565	* @param a_Type2 The type of the 3rd argument.
1566	* @param a_Arg2 The name of the 3rd argument.
1567	* @param a_Type3 The type of the 4th argument.
1568	* @param a_Arg3 The name of the 4th argument.
1569	*/
1570	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1571	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1572	a_Type2 a_Arg2, a_Type3 a_Arg3))
1573	/**
1574	* For calling a C instruction implementation function taking four extra
1575	* arguments.
1576	*
1577	* This special call macro adds default arguments to the call and allow us to
1578	* change these later.
1579	*
1580	* @param a_fn The name of the function.
1581	* @param a0 The name of the 1st argument.
1582	* @param a1 The name of the 2nd argument.
1583	* @param a2 The name of the 3rd argument.
1584	* @param a3 The name of the 4th argument.
1585	*/
1586	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1587
1588
1589	/**
1590	* For typedef'ing or declaring a C instruction implementation function taking
1591	* five extra arguments.
1592	*
1593	* @param a_Name The name of the type.
1594	* @param a_Type0 The type of the 1st argument
1595	* @param a_Arg0 The name of the 1st argument.
1596	* @param a_Type1 The type of the 2nd argument.
1597	* @param a_Arg1 The name of the 2nd argument.
1598	* @param a_Type2 The type of the 3rd argument.
1599	* @param a_Arg2 The name of the 3rd argument.
1600	* @param a_Type3 The type of the 4th argument.
1601	* @param a_Arg3 The name of the 4th argument.
1602	* @param a_Type4 The type of the 5th argument.
1603	* @param a_Arg4 The name of the 5th argument.
1604	*/
1605	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1606	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1607	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1608	a_Type3 a_Arg3, a_Type4 a_Arg4))
1609	/**
1610	* For defining a C instruction implementation function taking five extra
1611	* arguments.
1612	*
1613	* @param a_Name The name of the function.
1614	* @param a_Type0 The type of the 1st argument
1615	* @param a_Arg0 The name of the 1st argument.
1616	* @param a_Type1 The type of the 2nd argument.
1617	* @param a_Arg1 The name of the 2nd argument.
1618	* @param a_Type2 The type of the 3rd argument.
1619	* @param a_Arg2 The name of the 3rd argument.
1620	* @param a_Type3 The type of the 4th argument.
1621	* @param a_Arg3 The name of the 4th argument.
1622	* @param a_Type4 The type of the 5th argument.
1623	* @param a_Arg4 The name of the 5th argument.
1624	*/
1625	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1626	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1627	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1628	a_Type3 a_Arg3, a_Type4 a_Arg4))
1629	/**
1630	* For calling a C instruction implementation function taking five extra
1631	* arguments.
1632	*
1633	* This special call macro adds default arguments to the call and allow us to
1634	* change these later.
1635	*
1636	* @param a_fn The name of the function.
1637	* @param a0 The name of the 1st argument.
1638	* @param a1 The name of the 2nd argument.
1639	* @param a2 The name of the 3rd argument.
1640	* @param a3 The name of the 4th argument.
1641	* @param a4 The name of the 5th argument.
1642	*/
1643	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1644
1645	/** @} */
1646
1647
1648	/** @} */
1649
1650	RT_C_DECLS_END
1651
1652	#endif
1653

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 60384

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