IEMInternal.h@ 60605

Last change on this file since 60605 was 60415, checked in by vboxsync, 9 years ago
IEM: Implemented main characteristics of 8086, 80186 and 80286.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 66.7 KB

Line
1	/* $Id: IEMInternal.h 60415 2016-04-11 08:51:07Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26
27	RT_C_DECLS_BEGIN
28
29
30	/** @defgroup grp_iem_int Internals
31	* @ingroup grp_iem
32	* @internal
33	* @{
34	*/
35
36	/** For expanding symbol in slickedit and other products tagging and
37	* crossreferencing IEM symbols. */
38	#ifndef IEM_STATIC
39	# define IEM_STATIC static
40	#endif
41
42	/** @def IEM_VERIFICATION_MODE_FULL
43	* Shorthand for:
44	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
45	*/
46	#if (defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)) \
47	\|\| defined(DOXYGEN_RUNNING)
48	# define IEM_VERIFICATION_MODE_FULL
49	#endif
50
51
52	/** @def IEM_CFG_TARGET_CPU
53	* The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value).
54	*
55	* By default we allow this to be configured by the user via the
56	* CPUM/GuestCpuName config string, but this comes at a slight cost during
57	* decoding. So, for applications of this code where there is no need to
58	* be dynamic wrt target CPU, just modify this define.
59	*/
60	#if !defined(IEM_CFG_TARGET_CPU) \|\| defined(DOXYGEN_RUNNING)
61	# define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC
62	#endif
63
64
65
66	/** Finish and move to types.h */
67	typedef union
68	{
69	uint32_t u32;
70	} RTFLOAT32U;
71	typedef RTFLOAT32U *PRTFLOAT32U;
72	typedef RTFLOAT32U const *PCRTFLOAT32U;
73
74
75	/**
76	* Extended operand mode that includes a representation of 8-bit.
77	*
78	* This is used for packing down modes when invoking some C instruction
79	* implementations.
80	*/
81	typedef enum IEMMODEX
82	{
83	IEMMODEX_16BIT = IEMMODE_16BIT,
84	IEMMODEX_32BIT = IEMMODE_32BIT,
85	IEMMODEX_64BIT = IEMMODE_64BIT,
86	IEMMODEX_8BIT
87	} IEMMODEX;
88	AssertCompileSize(IEMMODEX, 4);
89
90
91	/**
92	* Branch types.
93	*/
94	typedef enum IEMBRANCH
95	{
96	IEMBRANCH_JUMP = 1,
97	IEMBRANCH_CALL,
98	IEMBRANCH_TRAP,
99	IEMBRANCH_SOFTWARE_INT,
100	IEMBRANCH_HARDWARE_INT
101	} IEMBRANCH;
102	AssertCompileSize(IEMBRANCH, 4);
103
104
105	/**
106	* A FPU result.
107	*/
108	typedef struct IEMFPURESULT
109	{
110	/** The output value. */
111	RTFLOAT80U r80Result;
112	/** The output status. */
113	uint16_t FSW;
114	} IEMFPURESULT;
115	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
116	/** Pointer to a FPU result. */
117	typedef IEMFPURESULT *PIEMFPURESULT;
118	/** Pointer to a const FPU result. */
119	typedef IEMFPURESULT const *PCIEMFPURESULT;
120
121
122	/**
123	* A FPU result consisting of two output values and FSW.
124	*/
125	typedef struct IEMFPURESULTTWO
126	{
127	/** The first output value. */
128	RTFLOAT80U r80Result1;
129	/** The output status. */
130	uint16_t FSW;
131	/** The second output value. */
132	RTFLOAT80U r80Result2;
133	} IEMFPURESULTTWO;
134	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
135	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
136	/** Pointer to a FPU result consisting of two output values and FSW. */
137	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
138	/** Pointer to a const FPU result consisting of two output values and FSW. */
139	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
140
141
142	/**
143	* IEM pending commit function index.
144	*/
145	typedef enum IEMCOMMIT
146	{
147	/** Invalid / nothing pending. */
148	IEMCOMMIT_INVALID = 0,
149	/** @name INS
150	* @{ */
151	IEMCOMMIT_INS_OP8_ADDR16,
152	IEMCOMMIT_INS_OP8_ADDR32,
153	IEMCOMMIT_INS_OP8_ADDR64,
154	IEMCOMMIT_INS_OP16_ADDR16,
155	IEMCOMMIT_INS_OP16_ADDR32,
156	IEMCOMMIT_INS_OP16_ADDR64,
157	IEMCOMMIT_INS_OP32_ADDR16,
158	IEMCOMMIT_INS_OP32_ADDR32,
159	IEMCOMMIT_INS_OP32_ADDR64,
160	/** @} */
161	/** @name REP INS
162	* @{ */
163	IEMCOMMIT_REP_INS_OP8_ADDR16,
164	IEMCOMMIT_REP_INS_OP8_ADDR32,
165	IEMCOMMIT_REP_INS_OP8_ADDR64,
166	IEMCOMMIT_REP_INS_OP16_ADDR16,
167	IEMCOMMIT_REP_INS_OP16_ADDR32,
168	IEMCOMMIT_REP_INS_OP16_ADDR64,
169	IEMCOMMIT_REP_INS_OP32_ADDR16,
170	IEMCOMMIT_REP_INS_OP32_ADDR32,
171	IEMCOMMIT_REP_INS_OP32_ADDR64,
172	/** @} */
173	/** End of valid functions. */
174	IEMCOMMIT_END,
175	/** Make sure the type is int in call contexts. */
176	IEMCOMMIT_32BIT_HACK = 0x7fffffff
177	} IEMCOMMIT;
178	AssertCompile(sizeof(IEMCOMMIT) == 4);
179
180
181	#ifdef IEM_VERIFICATION_MODE_FULL
182
183	/**
184	* Verification event type.
185	*/
186	typedef enum IEMVERIFYEVENT
187	{
188	IEMVERIFYEVENT_INVALID = 0,
189	IEMVERIFYEVENT_IOPORT_READ,
190	IEMVERIFYEVENT_IOPORT_WRITE,
191	IEMVERIFYEVENT_IOPORT_STR_READ,
192	IEMVERIFYEVENT_IOPORT_STR_WRITE,
193	IEMVERIFYEVENT_RAM_WRITE,
194	IEMVERIFYEVENT_RAM_READ
195	} IEMVERIFYEVENT;
196
197	/** Checks if the event type is a RAM read or write. */
198	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
199
200	/**
201	* Verification event record.
202	*/
203	typedef struct IEMVERIFYEVTREC
204	{
205	/** Pointer to the next record in the list. */
206	struct IEMVERIFYEVTREC *pNext;
207	/** The event type. */
208	IEMVERIFYEVENT enmEvent;
209	/** The event data. */
210	union
211	{
212	/** IEMVERIFYEVENT_IOPORT_READ */
213	struct
214	{
215	RTIOPORT Port;
216	uint8_t cbValue;
217	} IOPortRead;
218
219	/** IEMVERIFYEVENT_IOPORT_WRITE */
220	struct
221	{
222	RTIOPORT Port;
223	uint8_t cbValue;
224	uint32_t u32Value;
225	} IOPortWrite;
226
227	/** IEMVERIFYEVENT_IOPORT_STR_READ */
228	struct
229	{
230	RTIOPORT Port;
231	uint8_t cbValue;
232	RTGCUINTREG cTransfers;
233	} IOPortStrRead;
234
235	/** IEMVERIFYEVENT_IOPORT_STR_WRITE */
236	struct
237	{
238	RTIOPORT Port;
239	uint8_t cbValue;
240	RTGCUINTREG cTransfers;
241	} IOPortStrWrite;
242
243	/** IEMVERIFYEVENT_RAM_READ */
244	struct
245	{
246	RTGCPHYS GCPhys;
247	uint32_t cb;
248	} RamRead;
249
250	/** IEMVERIFYEVENT_RAM_WRITE */
251	struct
252	{
253	RTGCPHYS GCPhys;
254	uint32_t cb;
255	uint8_t ab[512];
256	} RamWrite;
257	} u;
258	} IEMVERIFYEVTREC;
259	/** Pointer to an IEM event verification records. */
260	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
261
262	#endif /* IEM_VERIFICATION_MODE_FULL */
263
264
265	/**
266	* The per-CPU IEM state.
267	*/
268	typedef struct IEMCPU
269	{
270	/** Pointer to the CPU context - ring-3 context. */
271	R3PTRTYPE(PCPUMCTX) pCtxR3;
272	/** Pointer to the CPU context - ring-0 context. */
273	R0PTRTYPE(PCPUMCTX) pCtxR0;
274	/** Pointer to the CPU context - raw-mode context. */
275	RCPTRTYPE(PCPUMCTX) pCtxRC;
276
277	/** Offset of the VMCPU structure relative to this structure (negative). */
278	int32_t offVMCpu;
279	/** Offset of the VM structure relative to this structure (negative). */
280	int32_t offVM;
281
282	/** Whether to bypass access handlers or not. */
283	bool fBypassHandlers;
284	/** Indicates that we're interpreting patch code - RC only! */
285	bool fInPatchCode;
286	/** Explicit alignment padding. */
287	bool afAlignment0[2];
288
289	/** The flags of the current exception / interrupt. */
290	uint32_t fCurXcpt;
291	/** The current exception / interrupt. */
292	uint8_t uCurXcpt;
293	/** Exception / interrupt recursion depth. */
294	int8_t cXcptRecursions;
295	/** Explicit alignment padding. */
296	bool afAlignment1[1];
297	/** The CPL. */
298	uint8_t uCpl;
299	/** The current CPU execution mode (CS). */
300	IEMMODE enmCpuMode;
301	/** Info status code that needs to be propagated to the IEM caller.
302	* This cannot be passed internally, as it would complicate all success
303	* checks within the interpreter making the code larger and almost impossible
304	* to get right. Instead, we'll store status codes to pass on here. Each
305	* source of these codes will perform appropriate sanity checks. */
306	int32_t rcPassUp;
307
308	/** @name Statistics
309	* @{ */
310	/** The number of instructions we've executed. */
311	uint32_t cInstructions;
312	/** The number of potential exits. */
313	uint32_t cPotentialExits;
314	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
315	* This may contain uncommitted writes. */
316	uint32_t cbWritten;
317	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
318	uint32_t cRetInstrNotImplemented;
319	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
320	uint32_t cRetAspectNotImplemented;
321	/** Counts informational statuses returned (other than VINF_SUCCESS). */
322	uint32_t cRetInfStatuses;
323	/** Counts other error statuses returned. */
324	uint32_t cRetErrStatuses;
325	/** Number of times rcPassUp has been used. */
326	uint32_t cRetPassUpStatus;
327	/** Number of times RZ left with instruction commit pending for ring-3. */
328	uint32_t cPendingCommit;
329	#ifdef IEM_VERIFICATION_MODE_FULL
330	/** The Number of I/O port reads that has been performed. */
331	uint32_t cIOReads;
332	/** The Number of I/O port writes that has been performed. */
333	uint32_t cIOWrites;
334	/** Set if no comparison to REM is currently performed.
335	* This is used to skip past really slow bits. */
336	bool fNoRem;
337	/** Saved fNoRem flag used by #iemInitExec and #iemUninitExec. */
338	bool fNoRemSavedByExec;
339	/** Indicates that RAX and RDX differences should be ignored since RDTSC
340	* and RDTSCP are timing sensitive. */
341	bool fIgnoreRaxRdx;
342	/** Indicates that a MOVS instruction with overlapping source and destination
343	* was executed, causing the memory write records to be incorrrect. */
344	bool fOverlappingMovs;
345	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
346	bool fProblematicMemory;
347	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
348	* CPUM doesn't yet reflect. */
349	uint8_t uInjectCpl;
350	bool afAlignment2[3];
351	/** Mask of undefined eflags.
352	* The verifier will any difference in these flags. */
353	uint32_t fUndefinedEFlags;
354	/** The CS of the instruction being interpreted. */
355	RTSEL uOldCs;
356	/** The RIP of the instruction being interpreted. */
357	uint64_t uOldRip;
358	/** The physical address corresponding to abOpcodes[0]. */
359	RTGCPHYS GCPhysOpcodes;
360	#endif
361	/** @} */
362
363	/** @name Decoder state.
364	* @{ */
365
366	/** The default addressing mode . */
367	IEMMODE enmDefAddrMode;
368	/** The effective addressing mode . */
369	IEMMODE enmEffAddrMode;
370	/** The default operand mode . */
371	IEMMODE enmDefOpSize;
372	/** The effective operand mode . */
373	IEMMODE enmEffOpSize;
374
375	/** The prefix mask (IEM_OP_PRF_XXX). */
376	uint32_t fPrefixes;
377	/** The extra REX ModR/M register field bit (REX.R << 3). */
378	uint8_t uRexReg;
379	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
380	* (REX.B << 3). */
381	uint8_t uRexB;
382	/** The extra REX SIB index field bit (REX.X << 3). */
383	uint8_t uRexIndex;
384	/** The effective segment register (X86_SREG_XXX). */
385	uint8_t iEffSeg;
386
387	/** The current offset into abOpcodes. */
388	uint8_t offOpcode;
389	/** The size of what has currently been fetched into abOpcodes. */
390	uint8_t cbOpcode;
391	/** The opcode bytes. */
392	uint8_t abOpcode[15];
393	/** Offset into abOpcodes where the FPU instruction starts.
394	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
395	* instruction result is committed. */
396	uint8_t offFpuOpcode;
397
398	/** @} */
399
400	/** The number of active guest memory mappings. */
401	uint8_t cActiveMappings;
402	/** The next unused mapping index. */
403	uint8_t iNextMapping;
404	/** Records for tracking guest memory mappings. */
405	struct
406	{
407	/** The address of the mapped bytes. */
408	void *pv;
409	#if defined(IN_RC) && HC_ARCH_BITS == 64
410	uint32_t u32Alignment3; /*< Alignment padding. /
411	#endif
412	/** The access flags (IEM_ACCESS_XXX).
413	* IEM_ACCESS_INVALID if the entry is unused. */
414	uint32_t fAccess;
415	#if HC_ARCH_BITS == 64
416	uint32_t u32Alignment4; /*< Alignment padding. /
417	#endif
418	} aMemMappings[3];
419
420	/** Locking records for the mapped memory. */
421	union
422	{
423	PGMPAGEMAPLOCK Lock;
424	uint64_t au64Padding[2];
425	} aMemMappingLocks[3];
426
427	/** Bounce buffer info.
428	* This runs in parallel to aMemMappings. */
429	struct
430	{
431	/** The physical address of the first byte. */
432	RTGCPHYS GCPhysFirst;
433	/** The physical address of the second page. */
434	RTGCPHYS GCPhysSecond;
435	/** The number of bytes in the first page. */
436	uint16_t cbFirst;
437	/** The number of bytes in the second page. */
438	uint16_t cbSecond;
439	/** Whether it's unassigned memory. */
440	bool fUnassigned;
441	/** Explicit alignment padding. */
442	bool afAlignment5[3];
443	} aMemBbMappings[3];
444
445	/** Bounce buffer storage.
446	* This runs in parallel to aMemMappings and aMemBbMappings. */
447	struct
448	{
449	uint8_t ab[512];
450	} aBounceBuffers[3];
451
452	/** @name Pending Instruction Commit (R0/RC postponed it to Ring-3).
453	* @{ */
454	struct
455	{
456	/** The commit function to call. */
457	IEMCOMMIT enmFn;
458	/** The instruction size. */
459	uint8_t cbInstr;
460	/** Generic value to commit. */
461	uint64_t uValue;
462	} PendingCommit;
463	/** @} */
464
465	/** @name Target CPU information.
466	* @{ */
467	#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
468	/** The target CPU. */
469	uint32_t uTargetCpu;
470	#else
471	uint32_t u32TargetCpuPadding;
472	#endif
473	/** The CPU vendor. */
474	CPUMCPUVENDOR enmCpuVendor;
475	/** @} */
476
477	/** @name Host CPU information.
478	* @{ */
479	/** The CPU vendor. */
480	CPUMCPUVENDOR enmHostCpuVendor;
481	/** @} */
482
483	uint32_t u32Alignment6; /*< Alignment padding. /
484
485	#ifdef IEM_VERIFICATION_MODE_FULL
486	/** The event verification records for what IEM did (LIFO). */
487	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
488	/** Insertion point for pIemEvtRecHead. */
489	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
490	/** The event verification records for what the other party did (FIFO). */
491	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
492	/** Insertion point for pOtherEvtRecHead. */
493	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
494	/** List of free event records. */
495	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
496	#endif
497	} IEMCPU;
498	/** Pointer to the per-CPU IEM state. */
499	typedef IEMCPU *PIEMCPU;
500	/** Pointer to the const per-CPU IEM state. */
501	typedef IEMCPU const *PCIEMCPU;
502
503	/** Converts a IEMCPU pointer to a VMCPU pointer.
504	* @returns VMCPU pointer.
505	* @param a_pIemCpu The IEM per CPU instance data.
506	*/
507	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
508
509	/** Converts a IEMCPU pointer to a VM pointer.
510	* @returns VM pointer.
511	* @param a_pIemCpu The IEM per CPU instance data.
512	*/
513	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
514
515	/** Gets the current IEMTARGETCPU value.
516	* @returns IEMTARGETCPU value.
517	* @param a_pIemCpu The IEM per CPU instance data.
518	*/
519	#if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
520	# define IEM_GET_TARGET_CPU(a_pIemCpu) (IEM_CFG_TARGET_CPU)
521	#else
522	# define IEM_GET_TARGET_CPU(a_pIemCpu) ((a_pIemCpu)->uTargetCpu)
523	#endif
524
525	/** @name IEM_ACCESS_XXX - Access details.
526	* @{ */
527	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
528	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
529	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
530	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
531	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
532	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
533	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
534	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
535	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
536	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
537	/** The writes are partial, so if initialize the bounce buffer with the
538	* orignal RAM content. */
539	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
540	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
541	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
542	/** Valid bit mask. */
543	#define IEM_ACCESS_VALID_MASK UINT32_C(0x000003ff)
544	/** Read+write data alias. */
545	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
546	/** Write data alias. */
547	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
548	/** Read data alias. */
549	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
550	/** Instruction fetch alias. */
551	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
552	/** Stack write alias. */
553	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
554	/** Stack read alias. */
555	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
556	/** Stack read+write alias. */
557	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
558	/** Read system table alias. */
559	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
560	/** Read+write system table alias. */
561	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
562	/** @} */
563
564	/** @name Prefix constants (IEMCPU::fPrefixes)
565	* @{ */
566	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
567	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
568	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
569	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
570	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
571	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
572	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
573
574	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
575	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
576	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
577
578	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
579	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
580	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
581
582	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
583	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
584	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
585	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
586	/** Mask with all the REX prefix flags.
587	* This is generally for use when needing to undo the REX prefixes when they
588	* are followed legacy prefixes and therefore does not immediately preceed
589	* the first opcode byte.
590	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
591	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
592	/** @} */
593
594	/** @name Opcode forms
595	* @{ */
596	/** ModR/M: reg, r/m */
597	#define IEMOPFORM_RM 0
598	/** ModR/M: reg, r/m (register) */
599	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
600	/** ModR/M: reg, r/m (memory) */
601	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
602	/** ModR/M: r/m, reg */
603	#define IEMOPFORM_MR 1
604	/** ModR/M: r/m (register), reg */
605	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
606	/** ModR/M: r/m (memory), reg */
607	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
608	/** ModR/M: r/m only */
609	#define IEMOPFORM_M 2
610	/** ModR/M: r/m only (register). */
611	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
612	/** ModR/M: r/m only (memory). */
613	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
614	/** ModR/M: reg only */
615	#define IEMOPFORM_R 3
616
617	/** Fixed register instruction, no R/M. */
618	#define IEMOPFORM_FIXED 4
619
620	/** The r/m is a register. */
621	#define IEMOPFORM_MOD3 RT_BIT_32(8)
622	/** The r/m is a memory access. */
623	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
624	/** @} */
625
626	/**
627	* Possible hardware task switch sources.
628	*/
629	typedef enum IEMTASKSWITCH
630	{
631	/** Task switch caused by an interrupt/exception. */
632	IEMTASKSWITCH_INT_XCPT = 1,
633	/** Task switch caused by a far CALL. */
634	IEMTASKSWITCH_CALL,
635	/** Task switch caused by a far JMP. */
636	IEMTASKSWITCH_JUMP,
637	/** Task switch caused by an IRET. */
638	IEMTASKSWITCH_IRET
639	} IEMTASKSWITCH;
640	AssertCompileSize(IEMTASKSWITCH, 4);
641
642
643	/**
644	* Tests if verification mode is enabled.
645	*
646	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
647	* should therefore cause the compiler to eliminate the verification branch
648	* of an if statement. */
649	#ifdef IEM_VERIFICATION_MODE_FULL
650	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
651	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
652	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
653	#else
654	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
655	#endif
656
657	/**
658	* Tests if full verification mode is enabled.
659	*
660	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
661	* should therefore cause the compiler to eliminate the verification branch
662	* of an if statement. */
663	#ifdef IEM_VERIFICATION_MODE_FULL
664	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
665	#else
666	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
667	#endif
668
669	/**
670	* Tests if full verification mode is enabled again REM.
671	*
672	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
673	* should therefore cause the compiler to eliminate the verification branch
674	* of an if statement. */
675	#ifdef IEM_VERIFICATION_MODE_FULL
676	# ifdef IEM_VERIFICATION_MODE_FULL_HM
677	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
678	# else
679	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
680	# endif
681	#else
682	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
683	#endif
684
685	/** @def IEM_VERIFICATION_MODE
686	* Indicates that one of the verfication modes are enabled.
687	*/
688	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE) \
689	\|\| defined(DOXYGEN_RUNNING)
690	# define IEM_VERIFICATION_MODE
691	#endif
692
693	/**
694	* Indicates to the verifier that the given flag set is undefined.
695	*
696	* Can be invoked again to add more flags.
697	*
698	* This is a NOOP if the verifier isn't compiled in.
699	*/
700	#ifdef IEM_VERIFICATION_MODE_FULL
701	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
702	#else
703	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
704	#endif
705
706
707	/** @def IEM_DECL_IMPL_TYPE
708	* For typedef'ing an instruction implementation function.
709	*
710	* @param a_RetType The return type.
711	* @param a_Name The name of the type.
712	* @param a_ArgList The argument list enclosed in parentheses.
713	*/
714
715	/** @def IEM_DECL_IMPL_DEF
716	* For defining an instruction implementation function.
717	*
718	* @param a_RetType The return type.
719	* @param a_Name The name of the type.
720	* @param a_ArgList The argument list enclosed in parentheses.
721	*/
722
723	#if defined(__GNUC__) && defined(RT_ARCH_X86)
724	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
725	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
726	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
727	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
728
729	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
730	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
731	a_RetType (__fastcall a_Name) a_ArgList
732	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
733	a_RetType __fastcall a_Name a_ArgList
734
735	#else
736	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
737	a_RetType (VBOXCALL a_Name) a_ArgList
738	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
739	a_RetType VBOXCALL a_Name a_ArgList
740
741	#endif
742
743	/** @name Arithmetic assignment operations on bytes (binary).
744	* @{ */
745	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
746	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
747	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
748	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
749	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
750	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
751	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
752	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
753	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
754	/** @} */
755
756	/** @name Arithmetic assignment operations on words (binary).
757	* @{ */
758	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
759	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
760	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
761	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
762	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
763	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
764	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
765	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
766	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
767	/** @} */
768
769	/** @name Arithmetic assignment operations on double words (binary).
770	* @{ */
771	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
772	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
773	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
774	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
775	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
776	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
777	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
778	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
779	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
780	/** @} */
781
782	/** @name Arithmetic assignment operations on quad words (binary).
783	* @{ */
784	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
785	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
786	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
787	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
788	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
789	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
790	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
791	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
792	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
793	/** @} */
794
795	/** @name Compare operations (thrown in with the binary ops).
796	* @{ */
797	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
798	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
799	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
800	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
801	/** @} */
802
803	/** @name Test operations (thrown in with the binary ops).
804	* @{ */
805	FNIEMAIMPLBINU8 iemAImpl_test_u8;
806	FNIEMAIMPLBINU16 iemAImpl_test_u16;
807	FNIEMAIMPLBINU32 iemAImpl_test_u32;
808	FNIEMAIMPLBINU64 iemAImpl_test_u64;
809	/** @} */
810
811	/** @name Bit operations operations (thrown in with the binary ops).
812	* @{ */
813	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
814	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
815	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
816	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
817	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
818	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
819	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
820	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
821	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
822	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
823	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
824	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
825	/** @} */
826
827	/** @name Exchange memory with register operations.
828	* @{ */
829	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
830	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
831	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
832	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
833	/** @} */
834
835	/** @name Exchange and add operations.
836	* @{ */
837	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
838	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
839	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
840	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
841	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
842	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
843	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
844	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
845	/** @} */
846
847	/** @name Compare and exchange.
848	* @{ */
849	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
850	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
851	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
852	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
853	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
854	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
855	#ifdef RT_ARCH_X86
856	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
857	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
858	#else
859	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
860	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
861	#endif
862	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
863	uint32_t *pEFlags));
864	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
865	uint32_t *pEFlags));
866	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
867	uint32_t *pEFlags));
868	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
869	uint32_t *pEFlags));
870	/** @} */
871
872	/** @name Memory ordering
873	* @{ */
874	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
875	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
876	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
877	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
878	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
879	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
880	/** @} */
881
882	/** @name Double precision shifts
883	* @{ */
884	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
885	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
886	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
887	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
888	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
889	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
890	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
891	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
892	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
893	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
894	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
895	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
896	/** @} */
897
898
899	/** @name Bit search operations (thrown in with the binary ops).
900	* @{ */
901	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
902	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
903	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
904	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
905	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
906	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
907	/** @} */
908
909	/** @name Signed multiplication operations (thrown in with the binary ops).
910	* @{ */
911	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
912	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
913	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
914	/** @} */
915
916	/** @name Arithmetic assignment operations on bytes (unary).
917	* @{ */
918	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
919	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
920	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
921	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
922	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
923	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
924	/** @} */
925
926	/** @name Arithmetic assignment operations on words (unary).
927	* @{ */
928	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
929	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
930	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
931	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
932	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
933	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
934	/** @} */
935
936	/** @name Arithmetic assignment operations on double words (unary).
937	* @{ */
938	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
939	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
940	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
941	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
942	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
943	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
944	/** @} */
945
946	/** @name Arithmetic assignment operations on quad words (unary).
947	* @{ */
948	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
949	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
950	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
951	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
952	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
953	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
954	/** @} */
955
956
957	/** @name Shift operations on bytes (Group 2).
958	* @{ */
959	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
960	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
961	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
962	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
963	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
964	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
965	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
966	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
967	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
968	/** @} */
969
970	/** @name Shift operations on words (Group 2).
971	* @{ */
972	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
973	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
974	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
975	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
976	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
977	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
978	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
979	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
980	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
981	/** @} */
982
983	/** @name Shift operations on double words (Group 2).
984	* @{ */
985	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
986	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
987	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
988	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
989	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
990	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
991	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
992	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
993	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
994	/** @} */
995
996	/** @name Shift operations on words (Group 2).
997	* @{ */
998	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
999	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
1000	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
1001	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
1002	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
1003	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
1004	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
1005	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
1006	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
1007	/** @} */
1008
1009	/** @name Multiplication and division operations.
1010	* @{ */
1011	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
1012	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
1013	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
1014	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
1015
1016	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
1017	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
1018	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
1019	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
1020
1021	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
1022	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
1023	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
1024	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
1025
1026	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
1027	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
1028	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
1029	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
1030	/** @} */
1031
1032	/** @name Byte Swap.
1033	* @{ */
1034	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
1035	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
1036	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
1037	/** @} */
1038
1039	/** @name Misc.
1040	* @{ */
1041	FNIEMAIMPLBINU16 iemAImpl_arpl;
1042	/** @} */
1043
1044
1045	/** @name FPU operations taking a 32-bit float argument
1046	* @{ */
1047	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1048	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1049	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
1050
1051	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1052	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1053	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
1054
1055	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
1056	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
1057	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
1058	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
1059	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
1060	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
1061	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
1062
1063	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
1064	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1065	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
1066	/** @} */
1067
1068	/** @name FPU operations taking a 64-bit float argument
1069	* @{ */
1070	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1071	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1072	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
1073
1074	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
1075	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
1076	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
1077	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
1078	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
1079	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
1080
1081	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1082	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1083	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
1084	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1085	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
1086	/** @} */
1087
1088	/** @name FPU operations taking a 80-bit float argument
1089	* @{ */
1090	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1091	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1092	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
1093	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
1094	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
1095	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
1096	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
1097	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
1098	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
1099	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
1100	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
1101	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
1102
1103	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
1104	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
1105
1106	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1107	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1108	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1109	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1110	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1111
1112	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1113	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1114	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1115	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1116	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1117
1118	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1119	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1120	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1121	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1122	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1123	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1124	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1125	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1126	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1127	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1128
1129	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1130	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1131	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1132	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1133
1134	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1135	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1136	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1137	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1138	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1139	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1140	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1141	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1142	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1143
1144	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1145	PCRTFLOAT80U pr80Val));
1146	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1147	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1148	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1149	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1150
1151	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1152	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1153	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1154
1155	/** @} */
1156
1157	/** @name FPU operations taking a 16-bit signed integer argument
1158	* @{ */
1159	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1160	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1161	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1162
1163	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1164	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1165	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1166	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1167	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1168	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1169
1170	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1171	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1172
1173	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1174	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1175	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1176	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1177	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1178	/** @} */
1179
1180	/** @name FPU operations taking a 32-bit signed integer argument
1181	* @{ */
1182	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1183	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1184	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1185
1186	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1187	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1188	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1189	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1190	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1191	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1192
1193	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1194	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1195
1196	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1197	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1198	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1199	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1200	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1201	/** @} */
1202
1203	/** @name FPU operations taking a 64-bit signed integer argument
1204	* @{ */
1205	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1206	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1207	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1208
1209	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1210	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1211	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1212	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1213	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1214	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1215
1216	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1217	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1218
1219	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1220	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1221	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1222	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1223	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1224	/** @} */
1225
1226
1227	/** Temporary type representing a 256-bit vector register. */
1228	typedef struct {uint64_t au64[4]; } IEMVMM256;
1229	/** Temporary type pointing to a 256-bit vector register. */
1230	typedef IEMVMM256 *PIEMVMM256;
1231	/** Temporary type pointing to a const 256-bit vector register. */
1232	typedef IEMVMM256 *PCIEMVMM256;
1233
1234
1235	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1236	* @{ */
1237	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1238	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1239	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1240	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1241	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1242	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1243	/** @} */
1244
1245	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1246	* @{ */
1247	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1248	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1249	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1250	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1251	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1252	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1253	/** @} */
1254
1255	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1256	* @{ */
1257	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1258	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1259	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1260	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1261	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1262	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1263	/** @} */
1264
1265	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1266	* @{ */
1267	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1268	uint128_t const *pu128Src, uint8_t bEvil));
1269	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1270	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1271	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1272	/** @} */
1273
1274	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1275	* @{ */
1276	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1277	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1278	/** @} */
1279
1280
1281
1282	/** @name Function tables.
1283	* @{
1284	*/
1285
1286	/**
1287	* Function table for a binary operator providing implementation based on
1288	* operand size.
1289	*/
1290	typedef struct IEMOPBINSIZES
1291	{
1292	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1293	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1294	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1295	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1296	} IEMOPBINSIZES;
1297	/** Pointer to a binary operator function table. */
1298	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1299
1300
1301	/**
1302	* Function table for a unary operator providing implementation based on
1303	* operand size.
1304	*/
1305	typedef struct IEMOPUNARYSIZES
1306	{
1307	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1308	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1309	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1310	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1311	} IEMOPUNARYSIZES;
1312	/** Pointer to a unary operator function table. */
1313	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1314
1315
1316	/**
1317	* Function table for a shift operator providing implementation based on
1318	* operand size.
1319	*/
1320	typedef struct IEMOPSHIFTSIZES
1321	{
1322	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1323	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1324	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1325	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1326	} IEMOPSHIFTSIZES;
1327	/** Pointer to a shift operator function table. */
1328	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1329
1330
1331	/**
1332	* Function table for a multiplication or division operation.
1333	*/
1334	typedef struct IEMOPMULDIVSIZES
1335	{
1336	PFNIEMAIMPLMULDIVU8 pfnU8;
1337	PFNIEMAIMPLMULDIVU16 pfnU16;
1338	PFNIEMAIMPLMULDIVU32 pfnU32;
1339	PFNIEMAIMPLMULDIVU64 pfnU64;
1340	} IEMOPMULDIVSIZES;
1341	/** Pointer to a multiplication or division operation function table. */
1342	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1343
1344
1345	/**
1346	* Function table for a double precision shift operator providing implementation
1347	* based on operand size.
1348	*/
1349	typedef struct IEMOPSHIFTDBLSIZES
1350	{
1351	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1352	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1353	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1354	} IEMOPSHIFTDBLSIZES;
1355	/** Pointer to a double precision shift function table. */
1356	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1357
1358
1359	/**
1360	* Function table for media instruction taking two full sized media registers,
1361	* optionally the 2nd being a memory reference (only modifying the first op.)
1362	*/
1363	typedef struct IEMOPMEDIAF2
1364	{
1365	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1366	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1367	} IEMOPMEDIAF2;
1368	/** Pointer to a media operation function table for full sized ops. */
1369	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1370
1371	/**
1372	* Function table for media instruction taking taking one full and one lower
1373	* half media register.
1374	*/
1375	typedef struct IEMOPMEDIAF1L1
1376	{
1377	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1378	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1379	} IEMOPMEDIAF1L1;
1380	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1381	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1382
1383	/**
1384	* Function table for media instruction taking taking one full and one high half
1385	* media register.
1386	*/
1387	typedef struct IEMOPMEDIAF1H1
1388	{
1389	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1390	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1391	} IEMOPMEDIAF1H1;
1392	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1393	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1394
1395
1396	/** @} */
1397
1398
1399	/** @name C instruction implementations for anything slightly complicated.
1400	* @{ */
1401
1402	/**
1403	* For typedef'ing or declaring a C instruction implementation function taking
1404	* no extra arguments.
1405	*
1406	* @param a_Name The name of the type.
1407	*/
1408	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1409	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1410	/**
1411	* For defining a C instruction implementation function taking no extra
1412	* arguments.
1413	*
1414	* @param a_Name The name of the function
1415	*/
1416	# define IEM_CIMPL_DEF_0(a_Name) \
1417	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1418	/**
1419	* For calling a C instruction implementation function taking no extra
1420	* arguments.
1421	*
1422	* This special call macro adds default arguments to the call and allow us to
1423	* change these later.
1424	*
1425	* @param a_fn The name of the function.
1426	*/
1427	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1428
1429	/**
1430	* For typedef'ing or declaring a C instruction implementation function taking
1431	* one extra argument.
1432	*
1433	* @param a_Name The name of the type.
1434	* @param a_Type0 The argument type.
1435	* @param a_Arg0 The argument name.
1436	*/
1437	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1438	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1439	/**
1440	* For defining a C instruction implementation function taking one extra
1441	* argument.
1442	*
1443	* @param a_Name The name of the function
1444	* @param a_Type0 The argument type.
1445	* @param a_Arg0 The argument name.
1446	*/
1447	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1448	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1449	/**
1450	* For calling a C instruction implementation function taking one extra
1451	* argument.
1452	*
1453	* This special call macro adds default arguments to the call and allow us to
1454	* change these later.
1455	*
1456	* @param a_fn The name of the function.
1457	* @param a0 The name of the 1st argument.
1458	*/
1459	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1460
1461	/**
1462	* For typedef'ing or declaring a C instruction implementation function taking
1463	* two extra arguments.
1464	*
1465	* @param a_Name The name of the type.
1466	* @param a_Type0 The type of the 1st argument
1467	* @param a_Arg0 The name of the 1st argument.
1468	* @param a_Type1 The type of the 2nd argument.
1469	* @param a_Arg1 The name of the 2nd argument.
1470	*/
1471	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1472	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1473	/**
1474	* For defining a C instruction implementation function taking two extra
1475	* arguments.
1476	*
1477	* @param a_Name The name of the function.
1478	* @param a_Type0 The type of the 1st argument
1479	* @param a_Arg0 The name of the 1st argument.
1480	* @param a_Type1 The type of the 2nd argument.
1481	* @param a_Arg1 The name of the 2nd argument.
1482	*/
1483	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1484	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1485	/**
1486	* For calling a C instruction implementation function taking two extra
1487	* arguments.
1488	*
1489	* This special call macro adds default arguments to the call and allow us to
1490	* change these later.
1491	*
1492	* @param a_fn The name of the function.
1493	* @param a0 The name of the 1st argument.
1494	* @param a1 The name of the 2nd argument.
1495	*/
1496	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1497
1498	/**
1499	* For typedef'ing or declaring a C instruction implementation function taking
1500	* three extra arguments.
1501	*
1502	* @param a_Name The name of the type.
1503	* @param a_Type0 The type of the 1st argument
1504	* @param a_Arg0 The name of the 1st argument.
1505	* @param a_Type1 The type of the 2nd argument.
1506	* @param a_Arg1 The name of the 2nd argument.
1507	* @param a_Type2 The type of the 3rd argument.
1508	* @param a_Arg2 The name of the 3rd argument.
1509	*/
1510	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1511	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1512	/**
1513	* For defining a C instruction implementation function taking three extra
1514	* arguments.
1515	*
1516	* @param a_Name The name of the function.
1517	* @param a_Type0 The type of the 1st argument
1518	* @param a_Arg0 The name of the 1st argument.
1519	* @param a_Type1 The type of the 2nd argument.
1520	* @param a_Arg1 The name of the 2nd argument.
1521	* @param a_Type2 The type of the 3rd argument.
1522	* @param a_Arg2 The name of the 3rd argument.
1523	*/
1524	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1525	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1526	/**
1527	* For calling a C instruction implementation function taking three extra
1528	* arguments.
1529	*
1530	* This special call macro adds default arguments to the call and allow us to
1531	* change these later.
1532	*
1533	* @param a_fn The name of the function.
1534	* @param a0 The name of the 1st argument.
1535	* @param a1 The name of the 2nd argument.
1536	* @param a2 The name of the 3rd argument.
1537	*/
1538	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1539
1540
1541	/**
1542	* For typedef'ing or declaring a C instruction implementation function taking
1543	* four extra arguments.
1544	*
1545	* @param a_Name The name of the type.
1546	* @param a_Type0 The type of the 1st argument
1547	* @param a_Arg0 The name of the 1st argument.
1548	* @param a_Type1 The type of the 2nd argument.
1549	* @param a_Arg1 The name of the 2nd argument.
1550	* @param a_Type2 The type of the 3rd argument.
1551	* @param a_Arg2 The name of the 3rd argument.
1552	* @param a_Type3 The type of the 4th argument.
1553	* @param a_Arg3 The name of the 4th argument.
1554	*/
1555	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1556	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1557	/**
1558	* For defining a C instruction implementation function taking four extra
1559	* arguments.
1560	*
1561	* @param a_Name The name of the function.
1562	* @param a_Type0 The type of the 1st argument
1563	* @param a_Arg0 The name of the 1st argument.
1564	* @param a_Type1 The type of the 2nd argument.
1565	* @param a_Arg1 The name of the 2nd argument.
1566	* @param a_Type2 The type of the 3rd argument.
1567	* @param a_Arg2 The name of the 3rd argument.
1568	* @param a_Type3 The type of the 4th argument.
1569	* @param a_Arg3 The name of the 4th argument.
1570	*/
1571	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1572	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1573	a_Type2 a_Arg2, a_Type3 a_Arg3))
1574	/**
1575	* For calling a C instruction implementation function taking four extra
1576	* arguments.
1577	*
1578	* This special call macro adds default arguments to the call and allow us to
1579	* change these later.
1580	*
1581	* @param a_fn The name of the function.
1582	* @param a0 The name of the 1st argument.
1583	* @param a1 The name of the 2nd argument.
1584	* @param a2 The name of the 3rd argument.
1585	* @param a3 The name of the 4th argument.
1586	*/
1587	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1588
1589
1590	/**
1591	* For typedef'ing or declaring a C instruction implementation function taking
1592	* five extra arguments.
1593	*
1594	* @param a_Name The name of the type.
1595	* @param a_Type0 The type of the 1st argument
1596	* @param a_Arg0 The name of the 1st argument.
1597	* @param a_Type1 The type of the 2nd argument.
1598	* @param a_Arg1 The name of the 2nd argument.
1599	* @param a_Type2 The type of the 3rd argument.
1600	* @param a_Arg2 The name of the 3rd argument.
1601	* @param a_Type3 The type of the 4th argument.
1602	* @param a_Arg3 The name of the 4th argument.
1603	* @param a_Type4 The type of the 5th argument.
1604	* @param a_Arg4 The name of the 5th argument.
1605	*/
1606	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1607	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1608	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1609	a_Type3 a_Arg3, a_Type4 a_Arg4))
1610	/**
1611	* For defining a C instruction implementation function taking five extra
1612	* arguments.
1613	*
1614	* @param a_Name The name of the function.
1615	* @param a_Type0 The type of the 1st argument
1616	* @param a_Arg0 The name of the 1st argument.
1617	* @param a_Type1 The type of the 2nd argument.
1618	* @param a_Arg1 The name of the 2nd argument.
1619	* @param a_Type2 The type of the 3rd argument.
1620	* @param a_Arg2 The name of the 3rd argument.
1621	* @param a_Type3 The type of the 4th argument.
1622	* @param a_Arg3 The name of the 4th argument.
1623	* @param a_Type4 The type of the 5th argument.
1624	* @param a_Arg4 The name of the 5th argument.
1625	*/
1626	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1627	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1628	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1629	a_Type3 a_Arg3, a_Type4 a_Arg4))
1630	/**
1631	* For calling a C instruction implementation function taking five extra
1632	* arguments.
1633	*
1634	* This special call macro adds default arguments to the call and allow us to
1635	* change these later.
1636	*
1637	* @param a_fn The name of the function.
1638	* @param a0 The name of the 1st argument.
1639	* @param a1 The name of the 2nd argument.
1640	* @param a2 The name of the 3rd argument.
1641	* @param a3 The name of the 4th argument.
1642	* @param a4 The name of the 5th argument.
1643	*/
1644	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1645
1646	/** @} */
1647
1648
1649	/** @} */
1650
1651	RT_C_DECLS_END
1652
1653	#endif
1654

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 60605

Download in other formats: