IEMInternal.h@ 61885

Last change on this file since 61885 was 61885, checked in by vboxsync, 9 years ago
IEM: Playing with setjmp (disabled) vs return codes. Group6 jump table.
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1	/* $Id: IEMInternal.h 61885 2016-06-26 22:12:23Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/cpum.h>
22	#include <VBox/vmm/iem.h>
23	#include <VBox/vmm/stam.h>
24	#include <VBox/param.h>
25
26	#include <setjmp.h>
27
28
29	RT_C_DECLS_BEGIN
30
31
32	/** @defgroup grp_iem_int Internals
33	* @ingroup grp_iem
34	* @internal
35	* @{
36	*/
37
38	/** For expanding symbol in slickedit and other products tagging and
39	* crossreferencing IEM symbols. */
40	#ifndef IEM_STATIC
41	# define IEM_STATIC static
42	#endif
43
44	/** @def IEM_VERIFICATION_MODE_FULL
45	* Shorthand for:
46	* defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL)
47	*/
48	#if (defined(IEM_VERIFICATION_MODE) && !defined(IEM_VERIFICATION_MODE_MINIMAL) && !defined(IEM_VERIFICATION_MODE_FULL)) \
49	\|\| defined(DOXYGEN_RUNNING)
50	# define IEM_VERIFICATION_MODE_FULL
51	#endif
52
53
54	/** @def IEM_CFG_TARGET_CPU
55	* The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value).
56	*
57	* By default we allow this to be configured by the user via the
58	* CPUM/GuestCpuName config string, but this comes at a slight cost during
59	* decoding. So, for applications of this code where there is no need to
60	* be dynamic wrt target CPU, just modify this define.
61	*/
62	#if !defined(IEM_CFG_TARGET_CPU) \|\| defined(DOXYGEN_RUNNING)
63	# define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC
64	#endif
65
66
67
68	/** Finish and move to types.h */
69	typedef union
70	{
71	uint32_t u32;
72	} RTFLOAT32U;
73	typedef RTFLOAT32U *PRTFLOAT32U;
74	typedef RTFLOAT32U const *PCRTFLOAT32U;
75
76
77	/**
78	* Extended operand mode that includes a representation of 8-bit.
79	*
80	* This is used for packing down modes when invoking some C instruction
81	* implementations.
82	*/
83	typedef enum IEMMODEX
84	{
85	IEMMODEX_16BIT = IEMMODE_16BIT,
86	IEMMODEX_32BIT = IEMMODE_32BIT,
87	IEMMODEX_64BIT = IEMMODE_64BIT,
88	IEMMODEX_8BIT
89	} IEMMODEX;
90	AssertCompileSize(IEMMODEX, 4);
91
92
93	/**
94	* Branch types.
95	*/
96	typedef enum IEMBRANCH
97	{
98	IEMBRANCH_JUMP = 1,
99	IEMBRANCH_CALL,
100	IEMBRANCH_TRAP,
101	IEMBRANCH_SOFTWARE_INT,
102	IEMBRANCH_HARDWARE_INT
103	} IEMBRANCH;
104	AssertCompileSize(IEMBRANCH, 4);
105
106
107	/**
108	* A FPU result.
109	*/
110	typedef struct IEMFPURESULT
111	{
112	/** The output value. */
113	RTFLOAT80U r80Result;
114	/** The output status. */
115	uint16_t FSW;
116	} IEMFPURESULT;
117	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
118	/** Pointer to a FPU result. */
119	typedef IEMFPURESULT *PIEMFPURESULT;
120	/** Pointer to a const FPU result. */
121	typedef IEMFPURESULT const *PCIEMFPURESULT;
122
123
124	/**
125	* A FPU result consisting of two output values and FSW.
126	*/
127	typedef struct IEMFPURESULTTWO
128	{
129	/** The first output value. */
130	RTFLOAT80U r80Result1;
131	/** The output status. */
132	uint16_t FSW;
133	/** The second output value. */
134	RTFLOAT80U r80Result2;
135	} IEMFPURESULTTWO;
136	AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
137	AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
138	/** Pointer to a FPU result consisting of two output values and FSW. */
139	typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
140	/** Pointer to a const FPU result consisting of two output values and FSW. */
141	typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
142
143
144
145	#ifdef IEM_VERIFICATION_MODE_FULL
146
147	/**
148	* Verification event type.
149	*/
150	typedef enum IEMVERIFYEVENT
151	{
152	IEMVERIFYEVENT_INVALID = 0,
153	IEMVERIFYEVENT_IOPORT_READ,
154	IEMVERIFYEVENT_IOPORT_WRITE,
155	IEMVERIFYEVENT_IOPORT_STR_READ,
156	IEMVERIFYEVENT_IOPORT_STR_WRITE,
157	IEMVERIFYEVENT_RAM_WRITE,
158	IEMVERIFYEVENT_RAM_READ
159	} IEMVERIFYEVENT;
160
161	/** Checks if the event type is a RAM read or write. */
162	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
163
164	/**
165	* Verification event record.
166	*/
167	typedef struct IEMVERIFYEVTREC
168	{
169	/** Pointer to the next record in the list. */
170	struct IEMVERIFYEVTREC *pNext;
171	/** The event type. */
172	IEMVERIFYEVENT enmEvent;
173	/** The event data. */
174	union
175	{
176	/** IEMVERIFYEVENT_IOPORT_READ */
177	struct
178	{
179	RTIOPORT Port;
180	uint8_t cbValue;
181	} IOPortRead;
182
183	/** IEMVERIFYEVENT_IOPORT_WRITE */
184	struct
185	{
186	RTIOPORT Port;
187	uint8_t cbValue;
188	uint32_t u32Value;
189	} IOPortWrite;
190
191	/** IEMVERIFYEVENT_IOPORT_STR_READ */
192	struct
193	{
194	RTIOPORT Port;
195	uint8_t cbValue;
196	RTGCUINTREG cTransfers;
197	} IOPortStrRead;
198
199	/** IEMVERIFYEVENT_IOPORT_STR_WRITE */
200	struct
201	{
202	RTIOPORT Port;
203	uint8_t cbValue;
204	RTGCUINTREG cTransfers;
205	} IOPortStrWrite;
206
207	/** IEMVERIFYEVENT_RAM_READ */
208	struct
209	{
210	RTGCPHYS GCPhys;
211	uint32_t cb;
212	} RamRead;
213
214	/** IEMVERIFYEVENT_RAM_WRITE */
215	struct
216	{
217	RTGCPHYS GCPhys;
218	uint32_t cb;
219	uint8_t ab[512];
220	} RamWrite;
221	} u;
222	} IEMVERIFYEVTREC;
223	/** Pointer to an IEM event verification records. */
224	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
225
226	#endif /* IEM_VERIFICATION_MODE_FULL */
227
228
229	/**
230	* The per-CPU IEM state.
231	*/
232	typedef struct IEMCPU
233	{
234	/** Pointer to the CPU context - ring-3 context. */
235	R3PTRTYPE(PCPUMCTX) pCtxR3;
236	/** Pointer set jump buffer - ring-3 context. */
237	R3PTRTYPE(jmp_buf *) pJmpBufR3;
238	/** Pointer to the CPU context - ring-0 context. */
239	R0PTRTYPE(PCPUMCTX) pCtxR0;
240	/** Pointer set jump buffer - ring-0 context. */
241	R0PTRTYPE(jmp_buf *) pJmpBufR0;
242	/** Pointer to the CPU context - raw-mode context. */
243	RCPTRTYPE(PCPUMCTX) pCtxRC;
244	/** Pointer set jump buffer - raw-mode context. */
245	RCPTRTYPE(jmp_buf *) pJmpBufRC;
246
247	/** Offset of the VMCPU structure relative to this structure (negative). */
248	int32_t offVMCpu;
249	/** Offset of the VM structure relative to this structure (negative). */
250	int32_t offVM;
251
252	/** Whether to bypass access handlers or not. */
253	bool fBypassHandlers;
254	/** Indicates that we're interpreting patch code - RC only! */
255	bool fInPatchCode;
256	/** Explicit alignment padding. */
257	bool afAlignment0[2];
258
259	/** The flags of the current exception / interrupt. */
260	uint32_t fCurXcpt;
261	/** The current exception / interrupt. */
262	uint8_t uCurXcpt;
263	/** Exception / interrupt recursion depth. */
264	int8_t cXcptRecursions;
265	/** Explicit alignment padding. */
266	bool afAlignment1[1];
267	/** The CPL. */
268	uint8_t uCpl;
269	/** The current CPU execution mode (CS). */
270	IEMMODE enmCpuMode;
271	/** Info status code that needs to be propagated to the IEM caller.
272	* This cannot be passed internally, as it would complicate all success
273	* checks within the interpreter making the code larger and almost impossible
274	* to get right. Instead, we'll store status codes to pass on here. Each
275	* source of these codes will perform appropriate sanity checks. */
276	int32_t rcPassUp;
277
278	/** @name Statistics
279	* @{ */
280	/** The number of instructions we've executed. */
281	uint32_t cInstructions;
282	/** The number of potential exits. */
283	uint32_t cPotentialExits;
284	/** The number of bytes data or stack written (mostly for IEMExecOneEx).
285	* This may contain uncommitted writes. */
286	uint32_t cbWritten;
287	/** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
288	uint32_t cRetInstrNotImplemented;
289	/** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
290	uint32_t cRetAspectNotImplemented;
291	/** Counts informational statuses returned (other than VINF_SUCCESS). */
292	uint32_t cRetInfStatuses;
293	/** Counts other error statuses returned. */
294	uint32_t cRetErrStatuses;
295	/** Number of times rcPassUp has been used. */
296	uint32_t cRetPassUpStatus;
297	/** Number of times RZ left with instruction commit pending for ring-3. */
298	uint32_t cPendingCommit;
299	#ifdef IEM_VERIFICATION_MODE_FULL
300	/** The Number of I/O port reads that has been performed. */
301	uint32_t cIOReads;
302	/** The Number of I/O port writes that has been performed. */
303	uint32_t cIOWrites;
304	/** Set if no comparison to REM is currently performed.
305	* This is used to skip past really slow bits. */
306	bool fNoRem;
307	/** Saved fNoRem flag used by #iemInitExec and #iemUninitExec. */
308	bool fNoRemSavedByExec;
309	/** Indicates that RAX and RDX differences should be ignored since RDTSC
310	* and RDTSCP are timing sensitive. */
311	bool fIgnoreRaxRdx;
312	/** Indicates that a MOVS instruction with overlapping source and destination
313	* was executed, causing the memory write records to be incorrrect. */
314	bool fOverlappingMovs;
315	/** Set if there are problematic memory accesses (MMIO, write monitored, ++). */
316	bool fProblematicMemory;
317	/** This is used to communicate a CPL changed caused by IEMInjectTrap that
318	* CPUM doesn't yet reflect. */
319	uint8_t uInjectCpl;
320	/** To prevent EMR3HmSingleInstruction from triggering endless recursion via
321	* emR3ExecuteInstruction and iemExecVerificationModeCheck. */
322	uint8_t cVerifyDepth;
323	bool afAlignment2[2];
324	/** Mask of undefined eflags.
325	* The verifier will any difference in these flags. */
326	uint32_t fUndefinedEFlags;
327	/** The CS of the instruction being interpreted. */
328	RTSEL uOldCs;
329	/** The RIP of the instruction being interpreted. */
330	uint64_t uOldRip;
331	/** The physical address corresponding to abOpcodes[0]. */
332	RTGCPHYS GCPhysOpcodes;
333	#endif
334	/** @} */
335
336	/** @name Decoder state.
337	* @{ */
338
339	/** The default addressing mode . */
340	IEMMODE enmDefAddrMode;
341	/** The effective addressing mode . */
342	IEMMODE enmEffAddrMode;
343	/** The default operand mode . */
344	IEMMODE enmDefOpSize;
345	/** The effective operand mode . */
346	IEMMODE enmEffOpSize;
347
348	/** The prefix mask (IEM_OP_PRF_XXX). */
349	uint32_t fPrefixes;
350	/** The extra REX ModR/M register field bit (REX.R << 3). */
351	uint8_t uRexReg;
352	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
353	* (REX.B << 3). */
354	uint8_t uRexB;
355	/** The extra REX SIB index field bit (REX.X << 3). */
356	uint8_t uRexIndex;
357	/** The effective segment register (X86_SREG_XXX). */
358	uint8_t iEffSeg;
359
360	/** The current offset into abOpcodes. */
361	uint8_t offOpcode;
362	/** The size of what has currently been fetched into abOpcodes. */
363	uint8_t cbOpcode;
364	/** The opcode bytes. */
365	uint8_t abOpcode[15];
366	/** Offset into abOpcodes where the FPU instruction starts.
367	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
368	* instruction result is committed. */
369	uint8_t offFpuOpcode;
370
371	/** @} */
372
373	/** The number of active guest memory mappings. */
374	uint8_t cActiveMappings;
375	/** The next unused mapping index. */
376	uint8_t iNextMapping;
377	/** Records for tracking guest memory mappings. */
378	struct
379	{
380	/** The address of the mapped bytes. */
381	void *pv;
382	#if defined(IN_RC) && HC_ARCH_BITS == 64
383	uint32_t u32Alignment3; /*< Alignment padding. /
384	#endif
385	/** The access flags (IEM_ACCESS_XXX).
386	* IEM_ACCESS_INVALID if the entry is unused. */
387	uint32_t fAccess;
388	#if HC_ARCH_BITS == 64
389	uint32_t u32Alignment4; /*< Alignment padding. /
390	#endif
391	} aMemMappings[3];
392
393	/** Locking records for the mapped memory. */
394	union
395	{
396	PGMPAGEMAPLOCK Lock;
397	uint64_t au64Padding[2];
398	} aMemMappingLocks[3];
399
400	/** Bounce buffer info.
401	* This runs in parallel to aMemMappings. */
402	struct
403	{
404	/** The physical address of the first byte. */
405	RTGCPHYS GCPhysFirst;
406	/** The physical address of the second page. */
407	RTGCPHYS GCPhysSecond;
408	/** The number of bytes in the first page. */
409	uint16_t cbFirst;
410	/** The number of bytes in the second page. */
411	uint16_t cbSecond;
412	/** Whether it's unassigned memory. */
413	bool fUnassigned;
414	/** Explicit alignment padding. */
415	bool afAlignment5[3];
416	} aMemBbMappings[3];
417
418	/** Bounce buffer storage.
419	* This runs in parallel to aMemMappings and aMemBbMappings. */
420	struct
421	{
422	uint8_t ab[512];
423	} aBounceBuffers[3];
424
425	/** @name Target CPU information.
426	* @{ */
427	#if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
428	/** The target CPU. */
429	uint32_t uTargetCpu;
430	#else
431	uint32_t u32TargetCpuPadding;
432	#endif
433	/** The CPU vendor. */
434	CPUMCPUVENDOR enmCpuVendor;
435	/** @} */
436
437	/** @name Host CPU information.
438	* @{ */
439	/** The CPU vendor. */
440	CPUMCPUVENDOR enmHostCpuVendor;
441	/** @} */
442
443	uint32_t u32Alignment6; /*< Alignment padding. /
444
445	#ifdef IEM_VERIFICATION_MODE_FULL
446	/** The event verification records for what IEM did (LIFO). */
447	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
448	/** Insertion point for pIemEvtRecHead. */
449	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
450	/** The event verification records for what the other party did (FIFO). */
451	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
452	/** Insertion point for pOtherEvtRecHead. */
453	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
454	/** List of free event records. */
455	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
456	#endif
457	} IEMCPU;
458	/** Pointer to the per-CPU IEM state. */
459	typedef IEMCPU *PIEMCPU;
460	/** Pointer to the const per-CPU IEM state. */
461	typedef IEMCPU const *PCIEMCPU;
462
463	/** Converts a IEMCPU pointer to a VMCPU pointer.
464	* @returns VMCPU pointer.
465	* @param a_pIemCpu The IEM per CPU instance data.
466	*/
467	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
468
469	/** Converts a IEMCPU pointer to a VM pointer.
470	* @returns VM pointer.
471	* @param a_pIemCpu The IEM per CPU instance data.
472	*/
473	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
474
475	/** Gets the current IEMTARGETCPU value.
476	* @returns IEMTARGETCPU value.
477	* @param a_pIemCpu The IEM per CPU instance data.
478	*/
479	#if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
480	# define IEM_GET_TARGET_CPU(a_pIemCpu) (IEM_CFG_TARGET_CPU)
481	#else
482	# define IEM_GET_TARGET_CPU(a_pIemCpu) ((a_pIemCpu)->uTargetCpu)
483	#endif
484
485	/** @name IEM_ACCESS_XXX - Access details.
486	* @{ */
487	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
488	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
489	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
490	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
491	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
492	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
493	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
494	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
495	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
496	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
497	/** The writes are partial, so if initialize the bounce buffer with the
498	* orignal RAM content. */
499	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
500	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
501	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
502	/** Bounce buffer with ring-3 write pending, first page. */
503	#define IEM_ACCESS_PENDING_R3_WRITE_1ST UINT32_C(0x00000400)
504	/** Bounce buffer with ring-3 write pending, second page. */
505	#define IEM_ACCESS_PENDING_R3_WRITE_2ND UINT32_C(0x00000800)
506	/** Valid bit mask. */
507	#define IEM_ACCESS_VALID_MASK UINT32_C(0x00000fff)
508	/** Read+write data alias. */
509	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
510	/** Write data alias. */
511	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
512	/** Read data alias. */
513	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
514	/** Instruction fetch alias. */
515	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
516	/** Stack write alias. */
517	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
518	/** Stack read alias. */
519	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
520	/** Stack read+write alias. */
521	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
522	/** Read system table alias. */
523	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
524	/** Read+write system table alias. */
525	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
526	/** @} */
527
528	/** @name Prefix constants (IEMCPU::fPrefixes)
529	* @{ */
530	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
531	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
532	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
533	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
534	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
535	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
536	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
537
538	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
539	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
540	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
541
542	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
543	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
544	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
545
546	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
547	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
548	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
549	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
550	/** Mask with all the REX prefix flags.
551	* This is generally for use when needing to undo the REX prefixes when they
552	* are followed legacy prefixes and therefore does not immediately preceed
553	* the first opcode byte.
554	* For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
555	#define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX \| IEM_OP_PRF_REX_R \| IEM_OP_PRF_REX_B \| IEM_OP_PRF_REX_X \| IEM_OP_PRF_SIZE_REX_W )
556	/** @} */
557
558	/** @name Opcode forms
559	* @{ */
560	/** ModR/M: reg, r/m */
561	#define IEMOPFORM_RM 0
562	/** ModR/M: reg, r/m (register) */
563	#define IEMOPFORM_RM_REG (IEMOPFORM_RM \| IEMOPFORM_MOD3)
564	/** ModR/M: reg, r/m (memory) */
565	#define IEMOPFORM_RM_MEM (IEMOPFORM_RM \| IEMOPFORM_NOT_MOD3)
566	/** ModR/M: r/m, reg */
567	#define IEMOPFORM_MR 1
568	/** ModR/M: r/m (register), reg */
569	#define IEMOPFORM_MR_REG (IEMOPFORM_MR \| IEMOPFORM_MOD3)
570	/** ModR/M: r/m (memory), reg */
571	#define IEMOPFORM_MR_MEM (IEMOPFORM_MR \| IEMOPFORM_NOT_MOD3)
572	/** ModR/M: r/m only */
573	#define IEMOPFORM_M 2
574	/** ModR/M: r/m only (register). */
575	#define IEMOPFORM_M_REG (IEMOPFORM_M \| IEMOPFORM_MOD3)
576	/** ModR/M: r/m only (memory). */
577	#define IEMOPFORM_M_MEM (IEMOPFORM_M \| IEMOPFORM_NOT_MOD3)
578	/** ModR/M: reg only */
579	#define IEMOPFORM_R 3
580
581	/** Fixed register instruction, no R/M. */
582	#define IEMOPFORM_FIXED 4
583
584	/** The r/m is a register. */
585	#define IEMOPFORM_MOD3 RT_BIT_32(8)
586	/** The r/m is a memory access. */
587	#define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
588	/** @} */
589
590	/**
591	* Possible hardware task switch sources.
592	*/
593	typedef enum IEMTASKSWITCH
594	{
595	/** Task switch caused by an interrupt/exception. */
596	IEMTASKSWITCH_INT_XCPT = 1,
597	/** Task switch caused by a far CALL. */
598	IEMTASKSWITCH_CALL,
599	/** Task switch caused by a far JMP. */
600	IEMTASKSWITCH_JUMP,
601	/** Task switch caused by an IRET. */
602	IEMTASKSWITCH_IRET
603	} IEMTASKSWITCH;
604	AssertCompileSize(IEMTASKSWITCH, 4);
605
606
607	/**
608	* Tests if verification mode is enabled.
609	*
610	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
611	* should therefore cause the compiler to eliminate the verification branch
612	* of an if statement. */
613	#ifdef IEM_VERIFICATION_MODE_FULL
614	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
615	#elif defined(IEM_VERIFICATION_MODE_MINIMAL)
616	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (true)
617	#else
618	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
619	#endif
620
621	/**
622	* Tests if full verification mode is enabled.
623	*
624	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
625	* should therefore cause the compiler to eliminate the verification branch
626	* of an if statement. */
627	#ifdef IEM_VERIFICATION_MODE_FULL
628	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
629	#else
630	# define IEM_FULL_VERIFICATION_ENABLED(a_pIemCpu) (false)
631	#endif
632
633	/**
634	* Tests if full verification mode is enabled again REM.
635	*
636	* This expands to @c false when IEM_VERIFICATION_MODE_FULL is not defined and
637	* should therefore cause the compiler to eliminate the verification branch
638	* of an if statement. */
639	#ifdef IEM_VERIFICATION_MODE_FULL
640	# ifdef IEM_VERIFICATION_MODE_FULL_HM
641	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem && !HMIsEnabled(IEMCPU_TO_VM(a_pIemCpu)))
642	# else
643	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
644	# endif
645	#else
646	# define IEM_FULL_VERIFICATION_REM_ENABLED(a_pIemCpu) (false)
647	#endif
648
649	/** @def IEM_VERIFICATION_MODE
650	* Indicates that one of the verfication modes are enabled.
651	*/
652	#if (defined(IEM_VERIFICATION_MODE_FULL) \|\| defined(IEM_VERIFICATION_MODE_MINIMAL)) && !defined(IEM_VERIFICATION_MODE) \
653	\|\| defined(DOXYGEN_RUNNING)
654	# define IEM_VERIFICATION_MODE
655	#endif
656
657	/**
658	* Indicates to the verifier that the given flag set is undefined.
659	*
660	* Can be invoked again to add more flags.
661	*
662	* This is a NOOP if the verifier isn't compiled in.
663	*/
664	#ifdef IEM_VERIFICATION_MODE_FULL
665	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
666	#else
667	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
668	#endif
669
670
671	/** @def IEM_DECL_IMPL_TYPE
672	* For typedef'ing an instruction implementation function.
673	*
674	* @param a_RetType The return type.
675	* @param a_Name The name of the type.
676	* @param a_ArgList The argument list enclosed in parentheses.
677	*/
678
679	/** @def IEM_DECL_IMPL_DEF
680	* For defining an instruction implementation function.
681	*
682	* @param a_RetType The return type.
683	* @param a_Name The name of the type.
684	* @param a_ArgList The argument list enclosed in parentheses.
685	*/
686
687	#if defined(__GNUC__) && defined(RT_ARCH_X86)
688	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
689	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
690	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
691	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
692
693	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
694	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
695	a_RetType (__fastcall a_Name) a_ArgList
696	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
697	a_RetType __fastcall a_Name a_ArgList
698
699	#else
700	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
701	a_RetType (VBOXCALL a_Name) a_ArgList
702	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
703	a_RetType VBOXCALL a_Name a_ArgList
704
705	#endif
706
707	/** @name Arithmetic assignment operations on bytes (binary).
708	* @{ */
709	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
710	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
711	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
712	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
713	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
714	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
715	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
716	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
717	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
718	/** @} */
719
720	/** @name Arithmetic assignment operations on words (binary).
721	* @{ */
722	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
723	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
724	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
725	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
726	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
727	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
728	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
729	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
730	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
731	/** @} */
732
733	/** @name Arithmetic assignment operations on double words (binary).
734	* @{ */
735	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
736	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
737	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
738	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
739	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
740	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
741	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
742	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
743	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
744	/** @} */
745
746	/** @name Arithmetic assignment operations on quad words (binary).
747	* @{ */
748	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
749	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
750	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
751	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
752	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
753	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
754	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
755	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
756	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
757	/** @} */
758
759	/** @name Compare operations (thrown in with the binary ops).
760	* @{ */
761	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
762	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
763	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
764	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
765	/** @} */
766
767	/** @name Test operations (thrown in with the binary ops).
768	* @{ */
769	FNIEMAIMPLBINU8 iemAImpl_test_u8;
770	FNIEMAIMPLBINU16 iemAImpl_test_u16;
771	FNIEMAIMPLBINU32 iemAImpl_test_u32;
772	FNIEMAIMPLBINU64 iemAImpl_test_u64;
773	/** @} */
774
775	/** @name Bit operations operations (thrown in with the binary ops).
776	* @{ */
777	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
778	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
779	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
780	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
781	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
782	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
783	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
784	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
785	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
786	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
787	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
788	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
789	/** @} */
790
791	/** @name Exchange memory with register operations.
792	* @{ */
793	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
794	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
795	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
796	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
797	/** @} */
798
799	/** @name Exchange and add operations.
800	* @{ */
801	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
802	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
803	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
804	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
805	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
806	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
807	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
808	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
809	/** @} */
810
811	/** @name Compare and exchange.
812	* @{ */
813	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
814	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t pu8Dst, uint8_t puAl, uint8_t uSrcReg, uint32_t *pEFlags));
815	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
816	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t pu16Dst, uint16_t puAx, uint16_t uSrcReg, uint32_t *pEFlags));
817	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
818	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t pu32Dst, uint32_t puEax, uint32_t uSrcReg, uint32_t *pEFlags));
819	#ifdef RT_ARCH_X86
820	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
821	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t puSrcReg, uint32_t pEFlags));
822	#else
823	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
824	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t pu64Dst, uint64_t puRax, uint64_t uSrcReg, uint32_t *pEFlags));
825	#endif
826	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
827	uint32_t *pEFlags));
828	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
829	uint32_t *pEFlags));
830	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
831	uint32_t *pEFlags));
832	IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U *pu128Dst, PRTUINT128U pu64RaxRdx, PRTUINT128U pu64RbxRcx,
833	uint32_t *pEFlags));
834	/** @} */
835
836	/** @name Memory ordering
837	* @{ */
838	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
839	typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
840	IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
841	IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
842	IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
843	IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
844	/** @} */
845
846	/** @name Double precision shifts
847	* @{ */
848	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
849	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
850	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
851	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
852	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
853	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
854	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
855	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
856	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
857	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
858	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
859	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
860	/** @} */
861
862
863	/** @name Bit search operations (thrown in with the binary ops).
864	* @{ */
865	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
866	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
867	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
868	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
869	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
870	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
871	/** @} */
872
873	/** @name Signed multiplication operations (thrown in with the binary ops).
874	* @{ */
875	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
876	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
877	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
878	/** @} */
879
880	/** @name Arithmetic assignment operations on bytes (unary).
881	* @{ */
882	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
883	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
884	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
885	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
886	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
887	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
888	/** @} */
889
890	/** @name Arithmetic assignment operations on words (unary).
891	* @{ */
892	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
893	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
894	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
895	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
896	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
897	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
898	/** @} */
899
900	/** @name Arithmetic assignment operations on double words (unary).
901	* @{ */
902	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
903	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
904	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
905	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
906	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
907	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
908	/** @} */
909
910	/** @name Arithmetic assignment operations on quad words (unary).
911	* @{ */
912	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
913	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
914	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
915	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
916	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
917	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
918	/** @} */
919
920
921	/** @name Shift operations on bytes (Group 2).
922	* @{ */
923	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
924	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
925	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
926	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
927	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
928	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
929	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
930	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
931	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
932	/** @} */
933
934	/** @name Shift operations on words (Group 2).
935	* @{ */
936	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
937	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
938	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
939	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
940	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
941	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
942	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
943	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
944	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
945	/** @} */
946
947	/** @name Shift operations on double words (Group 2).
948	* @{ */
949	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
950	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
951	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
952	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
953	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
954	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
955	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
956	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
957	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
958	/** @} */
959
960	/** @name Shift operations on words (Group 2).
961	* @{ */
962	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
963	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
964	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
965	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
966	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
967	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
968	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
969	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
970	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
971	/** @} */
972
973	/** @name Multiplication and division operations.
974	* @{ */
975	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
976	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
977	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
978	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
979
980	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
981	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
982	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
983	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
984
985	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
986	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
987	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
988	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
989
990	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
991	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
992	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
993	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
994	/** @} */
995
996	/** @name Byte Swap.
997	* @{ */
998	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
999	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
1000	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
1001	/** @} */
1002
1003	/** @name Misc.
1004	* @{ */
1005	FNIEMAIMPLBINU16 iemAImpl_arpl;
1006	/** @} */
1007
1008
1009	/** @name FPU operations taking a 32-bit float argument
1010	* @{ */
1011	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1012	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1013	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
1014
1015	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1016	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
1017	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
1018
1019	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
1020	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
1021	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
1022	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
1023	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
1024	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
1025	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
1026
1027	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
1028	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1029	PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
1030	/** @} */
1031
1032	/** @name FPU operations taking a 64-bit float argument
1033	* @{ */
1034	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1035	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1036	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
1037
1038	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
1039	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
1040	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
1041	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
1042	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
1043	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
1044
1045	IEM_DECL_IMPL_DEF(void, iemAImpl_fcom_r80_by_r64,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1046	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
1047	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
1048	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1049	PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
1050	/** @} */
1051
1052	/** @name FPU operations taking a 80-bit float argument
1053	* @{ */
1054	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1055	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1056	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
1057	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
1058	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
1059	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
1060	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
1061	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
1062	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
1063	FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
1064	FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
1065	FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
1066
1067	FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80;
1068	FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80;
1069
1070	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
1071	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1072	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
1073	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
1074	FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
1075
1076	typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1077	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
1078	typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
1079	FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
1080	FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
1081
1082	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1083	typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
1084	FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
1085	FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
1086	FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80;
1087	FNIEMAIMPLFPUR80UNARY iemAImpl_fyl2x_r80;
1088	FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
1089	FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
1090	FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80;
1091	FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80;
1092
1093	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
1094	typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
1095	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
1096	FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
1097
1098	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
1099	typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
1100	FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
1101	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
1102	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
1103	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
1104	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
1105	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
1106	FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
1107
1108	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
1109	PCRTFLOAT80U pr80Val));
1110	typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
1111	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80;
1112	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
1113	FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80;
1114
1115	IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
1116	IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1117	PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
1118
1119	/** @} */
1120
1121	/** @name FPU operations taking a 16-bit signed integer argument
1122	* @{ */
1123	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1124	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1125	typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
1126
1127	FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
1128	FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
1129	FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
1130	FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
1131	FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
1132	FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
1133
1134	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1135	PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
1136
1137	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i16_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
1138	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1139	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1140	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1141	int16_t *pi16Val, PCRTFLOAT80U pr80Val));
1142	/** @} */
1143
1144	/** @name FPU operations taking a 32-bit signed integer argument
1145	* @{ */
1146	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1147	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1148	typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
1149
1150	FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
1151	FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
1152	FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
1153	FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
1154	FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
1155	FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
1156
1157	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1158	PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
1159
1160	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i32_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
1161	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1162	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1163	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1164	int32_t *pi32Val, PCRTFLOAT80U pr80Val));
1165	/** @} */
1166
1167	/** @name FPU operations taking a 64-bit signed integer argument
1168	* @{ */
1169	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
1170	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1171	typedef FNIEMAIMPLFPUI64 *PFNIEMAIMPLFPUI64;
1172
1173	FNIEMAIMPLFPUI64 iemAImpl_fiadd_r80_by_i64;
1174	FNIEMAIMPLFPUI64 iemAImpl_fimul_r80_by_i64;
1175	FNIEMAIMPLFPUI64 iemAImpl_fisub_r80_by_i64;
1176	FNIEMAIMPLFPUI64 iemAImpl_fisubr_r80_by_i64;
1177	FNIEMAIMPLFPUI64 iemAImpl_fidiv_r80_by_i64;
1178	FNIEMAIMPLFPUI64 iemAImpl_fidivr_r80_by_i64;
1179
1180	IEM_DECL_IMPL_DEF(void, iemAImpl_ficom_r80_by_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
1181	PCRTFLOAT80U pr80Val1, int64_t const *pi64Val2));
1182
1183	IEM_DECL_IMPL_DEF(void, iemAImpl_fild_i64_to_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
1184	IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1185	int64_t *pi64Val, PCRTFLOAT80U pr80Val));
1186	IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
1187	int64_t *pi32Val, PCRTFLOAT80U pr80Val));
1188	/** @} */
1189
1190
1191	/** Temporary type representing a 256-bit vector register. */
1192	typedef struct {uint64_t au64[4]; } IEMVMM256;
1193	/** Temporary type pointing to a 256-bit vector register. */
1194	typedef IEMVMM256 *PIEMVMM256;
1195	/** Temporary type pointing to a const 256-bit vector register. */
1196	typedef IEMVMM256 *PCIEMVMM256;
1197
1198
1199	/** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
1200	* @{ */
1201	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1202	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
1203	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1204	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
1205	FNIEMAIMPLMEDIAF2U64 iemAImpl_pxor_u64, iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
1206	FNIEMAIMPLMEDIAF2U128 iemAImpl_pxor_u128, iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
1207	/** @} */
1208
1209	/** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
1210	* @{ */
1211	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint32_t const pu32Src));
1212	typedef FNIEMAIMPLMEDIAF1L1U64 *PFNIEMAIMPLMEDIAF1L1U64;
1213	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1L1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint64_t const pu64Src));
1214	typedef FNIEMAIMPLMEDIAF1L1U128 *PFNIEMAIMPLMEDIAF1L1U128;
1215	FNIEMAIMPLMEDIAF1L1U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
1216	FNIEMAIMPLMEDIAF1L1U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
1217	/** @} */
1218
1219	/** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
1220	* @{ */
1221	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1222	typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF1H1U64;
1223	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF1H1U128,(PCX86FXSTATE pFpuState, uint128_t pu128Dst, uint128_t const pu128Src));
1224	typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF1H1U128;
1225	FNIEMAIMPLMEDIAF1H1U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
1226	FNIEMAIMPLMEDIAF1H1U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
1227	/** @} */
1228
1229	/** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
1230	* @{ */
1231	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUF,(PCX86FXSTATE pFpuState, uint128_t *pu128Dst,
1232	uint128_t const *pu128Src, uint8_t bEvil));
1233	typedef FNIEMAIMPLMEDIAPSHUF *PFNIEMAIMPLMEDIAPSHUF;
1234	FNIEMAIMPLMEDIAPSHUF iemAImpl_pshufhw, iemAImpl_pshuflw, iemAImpl_pshufd;
1235	IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src, uint8_t bEvil));
1236	/** @} */
1237
1238	/** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
1239	* @{ */
1240	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint64_t const pu64Src));
1241	IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(PCX86FXSTATE pFpuState, uint64_t pu64Dst, uint128_t const pu128Src));
1242	/** @} */
1243
1244
1245
1246	/** @name Function tables.
1247	* @{
1248	*/
1249
1250	/**
1251	* Function table for a binary operator providing implementation based on
1252	* operand size.
1253	*/
1254	typedef struct IEMOPBINSIZES
1255	{
1256	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
1257	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
1258	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
1259	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
1260	} IEMOPBINSIZES;
1261	/** Pointer to a binary operator function table. */
1262	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
1263
1264
1265	/**
1266	* Function table for a unary operator providing implementation based on
1267	* operand size.
1268	*/
1269	typedef struct IEMOPUNARYSIZES
1270	{
1271	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
1272	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
1273	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
1274	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
1275	} IEMOPUNARYSIZES;
1276	/** Pointer to a unary operator function table. */
1277	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
1278
1279
1280	/**
1281	* Function table for a shift operator providing implementation based on
1282	* operand size.
1283	*/
1284	typedef struct IEMOPSHIFTSIZES
1285	{
1286	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
1287	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
1288	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
1289	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
1290	} IEMOPSHIFTSIZES;
1291	/** Pointer to a shift operator function table. */
1292	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
1293
1294
1295	/**
1296	* Function table for a multiplication or division operation.
1297	*/
1298	typedef struct IEMOPMULDIVSIZES
1299	{
1300	PFNIEMAIMPLMULDIVU8 pfnU8;
1301	PFNIEMAIMPLMULDIVU16 pfnU16;
1302	PFNIEMAIMPLMULDIVU32 pfnU32;
1303	PFNIEMAIMPLMULDIVU64 pfnU64;
1304	} IEMOPMULDIVSIZES;
1305	/** Pointer to a multiplication or division operation function table. */
1306	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
1307
1308
1309	/**
1310	* Function table for a double precision shift operator providing implementation
1311	* based on operand size.
1312	*/
1313	typedef struct IEMOPSHIFTDBLSIZES
1314	{
1315	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
1316	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
1317	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
1318	} IEMOPSHIFTDBLSIZES;
1319	/** Pointer to a double precision shift function table. */
1320	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
1321
1322
1323	/**
1324	* Function table for media instruction taking two full sized media registers,
1325	* optionally the 2nd being a memory reference (only modifying the first op.)
1326	*/
1327	typedef struct IEMOPMEDIAF2
1328	{
1329	PFNIEMAIMPLMEDIAF2U64 pfnU64;
1330	PFNIEMAIMPLMEDIAF2U128 pfnU128;
1331	} IEMOPMEDIAF2;
1332	/** Pointer to a media operation function table for full sized ops. */
1333	typedef IEMOPMEDIAF2 const *PCIEMOPMEDIAF2;
1334
1335	/**
1336	* Function table for media instruction taking taking one full and one lower
1337	* half media register.
1338	*/
1339	typedef struct IEMOPMEDIAF1L1
1340	{
1341	PFNIEMAIMPLMEDIAF1L1U64 pfnU64;
1342	PFNIEMAIMPLMEDIAF1L1U128 pfnU128;
1343	} IEMOPMEDIAF1L1;
1344	/** Pointer to a media operation function table for lowhalf+lowhalf -> full. */
1345	typedef IEMOPMEDIAF1L1 const *PCIEMOPMEDIAF1L1;
1346
1347	/**
1348	* Function table for media instruction taking taking one full and one high half
1349	* media register.
1350	*/
1351	typedef struct IEMOPMEDIAF1H1
1352	{
1353	PFNIEMAIMPLMEDIAF1H1U64 pfnU64;
1354	PFNIEMAIMPLMEDIAF1H1U128 pfnU128;
1355	} IEMOPMEDIAF1H1;
1356	/** Pointer to a media operation function table for hihalf+hihalf -> full. */
1357	typedef IEMOPMEDIAF1H1 const *PCIEMOPMEDIAF1H1;
1358
1359
1360	/** @} */
1361
1362
1363	/** @name C instruction implementations for anything slightly complicated.
1364	* @{ */
1365
1366	/**
1367	* For typedef'ing or declaring a C instruction implementation function taking
1368	* no extra arguments.
1369	*
1370	* @param a_Name The name of the type.
1371	*/
1372	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
1373	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1374	/**
1375	* For defining a C instruction implementation function taking no extra
1376	* arguments.
1377	*
1378	* @param a_Name The name of the function
1379	*/
1380	# define IEM_CIMPL_DEF_0(a_Name) \
1381	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
1382	/**
1383	* For calling a C instruction implementation function taking no extra
1384	* arguments.
1385	*
1386	* This special call macro adds default arguments to the call and allow us to
1387	* change these later.
1388	*
1389	* @param a_fn The name of the function.
1390	*/
1391	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
1392
1393	/**
1394	* For typedef'ing or declaring a C instruction implementation function taking
1395	* one extra argument.
1396	*
1397	* @param a_Name The name of the type.
1398	* @param a_Type0 The argument type.
1399	* @param a_Arg0 The argument name.
1400	*/
1401	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
1402	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1403	/**
1404	* For defining a C instruction implementation function taking one extra
1405	* argument.
1406	*
1407	* @param a_Name The name of the function
1408	* @param a_Type0 The argument type.
1409	* @param a_Arg0 The argument name.
1410	*/
1411	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
1412	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
1413	/**
1414	* For calling a C instruction implementation function taking one extra
1415	* argument.
1416	*
1417	* This special call macro adds default arguments to the call and allow us to
1418	* change these later.
1419	*
1420	* @param a_fn The name of the function.
1421	* @param a0 The name of the 1st argument.
1422	*/
1423	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
1424
1425	/**
1426	* For typedef'ing or declaring a C instruction implementation function taking
1427	* two extra arguments.
1428	*
1429	* @param a_Name The name of the type.
1430	* @param a_Type0 The type of the 1st argument
1431	* @param a_Arg0 The name of the 1st argument.
1432	* @param a_Type1 The type of the 2nd argument.
1433	* @param a_Arg1 The name of the 2nd argument.
1434	*/
1435	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1436	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1437	/**
1438	* For defining a C instruction implementation function taking two extra
1439	* arguments.
1440	*
1441	* @param a_Name The name of the function.
1442	* @param a_Type0 The type of the 1st argument
1443	* @param a_Arg0 The name of the 1st argument.
1444	* @param a_Type1 The type of the 2nd argument.
1445	* @param a_Arg1 The name of the 2nd argument.
1446	*/
1447	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
1448	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
1449	/**
1450	* For calling a C instruction implementation function taking two extra
1451	* arguments.
1452	*
1453	* This special call macro adds default arguments to the call and allow us to
1454	* change these later.
1455	*
1456	* @param a_fn The name of the function.
1457	* @param a0 The name of the 1st argument.
1458	* @param a1 The name of the 2nd argument.
1459	*/
1460	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
1461
1462	/**
1463	* For typedef'ing or declaring a C instruction implementation function taking
1464	* three extra arguments.
1465	*
1466	* @param a_Name The name of the type.
1467	* @param a_Type0 The type of the 1st argument
1468	* @param a_Arg0 The name of the 1st argument.
1469	* @param a_Type1 The type of the 2nd argument.
1470	* @param a_Arg1 The name of the 2nd argument.
1471	* @param a_Type2 The type of the 3rd argument.
1472	* @param a_Arg2 The name of the 3rd argument.
1473	*/
1474	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1475	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1476	/**
1477	* For defining a C instruction implementation function taking three extra
1478	* arguments.
1479	*
1480	* @param a_Name The name of the function.
1481	* @param a_Type0 The type of the 1st argument
1482	* @param a_Arg0 The name of the 1st argument.
1483	* @param a_Type1 The type of the 2nd argument.
1484	* @param a_Arg1 The name of the 2nd argument.
1485	* @param a_Type2 The type of the 3rd argument.
1486	* @param a_Arg2 The name of the 3rd argument.
1487	*/
1488	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1489	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1490	/**
1491	* For calling a C instruction implementation function taking three extra
1492	* arguments.
1493	*
1494	* This special call macro adds default arguments to the call and allow us to
1495	* change these later.
1496	*
1497	* @param a_fn The name of the function.
1498	* @param a0 The name of the 1st argument.
1499	* @param a1 The name of the 2nd argument.
1500	* @param a2 The name of the 3rd argument.
1501	*/
1502	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1503
1504
1505	/**
1506	* For typedef'ing or declaring a C instruction implementation function taking
1507	* four extra arguments.
1508	*
1509	* @param a_Name The name of the type.
1510	* @param a_Type0 The type of the 1st argument
1511	* @param a_Arg0 The name of the 1st argument.
1512	* @param a_Type1 The type of the 2nd argument.
1513	* @param a_Arg1 The name of the 2nd argument.
1514	* @param a_Type2 The type of the 3rd argument.
1515	* @param a_Arg2 The name of the 3rd argument.
1516	* @param a_Type3 The type of the 4th argument.
1517	* @param a_Arg3 The name of the 4th argument.
1518	*/
1519	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1520	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1521	/**
1522	* For defining a C instruction implementation function taking four extra
1523	* arguments.
1524	*
1525	* @param a_Name The name of the function.
1526	* @param a_Type0 The type of the 1st argument
1527	* @param a_Arg0 The name of the 1st argument.
1528	* @param a_Type1 The type of the 2nd argument.
1529	* @param a_Arg1 The name of the 2nd argument.
1530	* @param a_Type2 The type of the 3rd argument.
1531	* @param a_Arg2 The name of the 3rd argument.
1532	* @param a_Type3 The type of the 4th argument.
1533	* @param a_Arg3 The name of the 4th argument.
1534	*/
1535	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1536	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1537	a_Type2 a_Arg2, a_Type3 a_Arg3))
1538	/**
1539	* For calling a C instruction implementation function taking four extra
1540	* arguments.
1541	*
1542	* This special call macro adds default arguments to the call and allow us to
1543	* change these later.
1544	*
1545	* @param a_fn The name of the function.
1546	* @param a0 The name of the 1st argument.
1547	* @param a1 The name of the 2nd argument.
1548	* @param a2 The name of the 3rd argument.
1549	* @param a3 The name of the 4th argument.
1550	*/
1551	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1552
1553
1554	/**
1555	* For typedef'ing or declaring a C instruction implementation function taking
1556	* five extra arguments.
1557	*
1558	* @param a_Name The name of the type.
1559	* @param a_Type0 The type of the 1st argument
1560	* @param a_Arg0 The name of the 1st argument.
1561	* @param a_Type1 The type of the 2nd argument.
1562	* @param a_Arg1 The name of the 2nd argument.
1563	* @param a_Type2 The type of the 3rd argument.
1564	* @param a_Arg2 The name of the 3rd argument.
1565	* @param a_Type3 The type of the 4th argument.
1566	* @param a_Arg3 The name of the 4th argument.
1567	* @param a_Type4 The type of the 5th argument.
1568	* @param a_Arg4 The name of the 5th argument.
1569	*/
1570	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1571	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1572	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1573	a_Type3 a_Arg3, a_Type4 a_Arg4))
1574	/**
1575	* For defining a C instruction implementation function taking five extra
1576	* arguments.
1577	*
1578	* @param a_Name The name of the function.
1579	* @param a_Type0 The type of the 1st argument
1580	* @param a_Arg0 The name of the 1st argument.
1581	* @param a_Type1 The type of the 2nd argument.
1582	* @param a_Arg1 The name of the 2nd argument.
1583	* @param a_Type2 The type of the 3rd argument.
1584	* @param a_Arg2 The name of the 3rd argument.
1585	* @param a_Type3 The type of the 4th argument.
1586	* @param a_Arg3 The name of the 4th argument.
1587	* @param a_Type4 The type of the 5th argument.
1588	* @param a_Arg4 The name of the 5th argument.
1589	*/
1590	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1591	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1592	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1593	a_Type3 a_Arg3, a_Type4 a_Arg4))
1594	/**
1595	* For calling a C instruction implementation function taking five extra
1596	* arguments.
1597	*
1598	* This special call macro adds default arguments to the call and allow us to
1599	* change these later.
1600	*
1601	* @param a_fn The name of the function.
1602	* @param a0 The name of the 1st argument.
1603	* @param a1 The name of the 2nd argument.
1604	* @param a2 The name of the 3rd argument.
1605	* @param a3 The name of the 4th argument.
1606	* @param a4 The name of the 5th argument.
1607	*/
1608	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1609
1610	/** @} */
1611
1612
1613	/** @} */
1614
1615	RT_C_DECLS_END
1616
1617	#endif
1618

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 61885

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