| 1 | /* $Id: IEMInternal.h 99832 2023-05-18 01:18:57Z vboxsync $ */
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| 2 | /** @file
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| 3 | * IEM - Internal header file.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2011-2023 Oracle and/or its affiliates.
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| 8 | *
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| 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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| 26 | */
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| 27 |
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| 28 | #ifndef VMM_INCLUDED_SRC_include_IEMInternal_h
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| 29 | #define VMM_INCLUDED_SRC_include_IEMInternal_h
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| 30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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| 31 | # pragma once
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| 32 | #endif
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| 33 |
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| 34 | #include <VBox/vmm/cpum.h>
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| 35 | #include <VBox/vmm/iem.h>
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| 36 | #include <VBox/vmm/pgm.h>
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| 37 | #include <VBox/vmm/stam.h>
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| 38 | #include <VBox/param.h>
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| 39 |
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| 40 | #include <iprt/setjmp-without-sigmask.h>
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| 41 |
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| 42 |
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| 43 | RT_C_DECLS_BEGIN
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| 44 |
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| 45 |
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| 46 | /** @defgroup grp_iem_int Internals
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| 47 | * @ingroup grp_iem
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| 48 | * @internal
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| 49 | * @{
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| 50 | */
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| 51 |
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| 52 | /** For expanding symbol in slickedit and other products tagging and
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| 53 | * crossreferencing IEM symbols. */
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| 54 | #ifndef IEM_STATIC
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| 55 | # define IEM_STATIC static
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| 56 | #endif
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| 57 |
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| 58 | /** @def IEM_WITH_SETJMP
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| 59 | * Enables alternative status code handling using setjmps.
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| 60 | *
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| 61 | * This adds a bit of expense via the setjmp() call since it saves all the
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| 62 | * non-volatile registers. However, it eliminates return code checks and allows
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| 63 | * for more optimal return value passing (return regs instead of stack buffer).
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| 64 | */
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| 65 | #if defined(DOXYGEN_RUNNING) || defined(RT_OS_WINDOWS) || 1
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| 66 | # define IEM_WITH_SETJMP
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| 67 | #endif
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| 68 |
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| 69 | /** @def IEM_WITH_THROW_CATCH
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| 70 | * Enables using C++ throw/catch as an alternative to setjmp/longjmp in user
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| 71 | * mode code when IEM_WITH_SETJMP is in effect.
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| 72 | *
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| 73 | * With GCC 11.3.1 and code TLB on linux, using throw/catch instead of
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| 74 | * setjmp/long resulted in bs2-test-1 running 3.00% faster and all but on test
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| 75 | * result value improving by more than 1%. (Best out of three.)
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| 76 | *
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| 77 | * With Visual C++ 2019 and code TLB on windows, using throw/catch instead of
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| 78 | * setjmp/long resulted in bs2-test-1 running 3.68% faster and all but some of
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| 79 | * the MMIO and CPUID tests ran noticeably faster. Variation is greater than on
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| 80 | * Linux, but it should be quite a bit faster for normal code.
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| 81 | */
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| 82 | #if (defined(IEM_WITH_SETJMP) && defined(IN_RING3) && (defined(__GNUC__) || defined(_MSC_VER))) \
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| 83 | || defined(DOXYGEN_RUNNING)
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| 84 | # define IEM_WITH_THROW_CATCH
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| 85 | #endif
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| 86 |
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| 87 | /** @def IEM_DO_LONGJMP
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| 88 | *
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| 89 | * Wrapper around longjmp / throw.
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| 90 | *
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| 91 | * @param a_pVCpu The CPU handle.
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| 92 | * @param a_rc The status code jump back with / throw.
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| 93 | */
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| 94 | #if defined(IEM_WITH_SETJMP) || defined(DOXYGEN_RUNNING)
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| 95 | # ifdef IEM_WITH_THROW_CATCH
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| 96 | # define IEM_DO_LONGJMP(a_pVCpu, a_rc) throw int(a_rc)
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| 97 | # else
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| 98 | # define IEM_DO_LONGJMP(a_pVCpu, a_rc) longjmp(*(a_pVCpu)->iem.s.CTX_SUFF(pJmpBuf), (a_rc))
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| 99 | # endif
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| 100 | #endif
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| 101 |
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| 102 | /** For use with IEM function that may do a longjmp (when enabled).
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| 103 | *
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| 104 | * Visual C++ has trouble longjmp'ing from/over functions with the noexcept
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| 105 | * attribute. So, we indicate that function that may be part of a longjmp may
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| 106 | * throw "exceptions" and that the compiler should definitely not generate and
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| 107 | * std::terminate calling unwind code.
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| 108 | *
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| 109 | * Here is one example of this ending in std::terminate:
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| 110 | * @code{.txt}
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| 111 | 00 00000041`cadfda10 00007ffc`5d5a1f9f ucrtbase!abort+0x4e
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| 112 | 01 00000041`cadfda40 00007ffc`57af229a ucrtbase!terminate+0x1f
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| 113 | 02 00000041`cadfda70 00007ffb`eec91030 VCRUNTIME140!__std_terminate+0xa [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\ehhelpers.cpp @ 192]
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| 114 | 03 00000041`cadfdaa0 00007ffb`eec92c6d VCRUNTIME140_1!_CallSettingFrame+0x20 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\amd64\handlers.asm @ 50]
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| 115 | 04 00000041`cadfdad0 00007ffb`eec93ae5 VCRUNTIME140_1!__FrameHandler4::FrameUnwindToState+0x241 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\frame.cpp @ 1085]
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| 116 | 05 00000041`cadfdc00 00007ffb`eec92258 VCRUNTIME140_1!__FrameHandler4::FrameUnwindToEmptyState+0x2d [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\risctrnsctrl.cpp @ 218]
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| 117 | 06 00000041`cadfdc30 00007ffb`eec940e9 VCRUNTIME140_1!__InternalCxxFrameHandler<__FrameHandler4>+0x194 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\frame.cpp @ 304]
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| 118 | 07 00000041`cadfdcd0 00007ffc`5f9f249f VCRUNTIME140_1!__CxxFrameHandler4+0xa9 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\risctrnsctrl.cpp @ 290]
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| 119 | 08 00000041`cadfdd40 00007ffc`5f980939 ntdll!RtlpExecuteHandlerForUnwind+0xf
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| 120 | 09 00000041`cadfdd70 00007ffc`5f9a0edd ntdll!RtlUnwindEx+0x339
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| 121 | 0a 00000041`cadfe490 00007ffc`57aff976 ntdll!RtlUnwind+0xcd
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| 122 | 0b 00000041`cadfea00 00007ffb`e1b5de01 VCRUNTIME140!__longjmp_internal+0xe6 [d:\agent\_work\1\s\src\vctools\crt\vcruntime\src\eh\amd64\longjmp.asm @ 140]
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| 123 | 0c (Inline Function) --------`-------- VBoxVMM!iemOpcodeGetNextU8SlowJmp+0x95 [L:\vbox-intern\src\VBox\VMM\VMMAll\IEMAll.cpp @ 1155]
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| 124 | 0d 00000041`cadfea50 00007ffb`e1b60f6b VBoxVMM!iemOpcodeGetNextU8Jmp+0xc1 [L:\vbox-intern\src\VBox\VMM\include\IEMInline.h @ 402]
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| 125 | 0e 00000041`cadfea90 00007ffb`e1cc6201 VBoxVMM!IEMExecForExits+0xdb [L:\vbox-intern\src\VBox\VMM\VMMAll\IEMAll.cpp @ 10185]
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| 126 | 0f 00000041`cadfec70 00007ffb`e1d0df8d VBoxVMM!EMHistoryExec+0x4f1 [L:\vbox-intern\src\VBox\VMM\VMMAll\EMAll.cpp @ 452]
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| 127 | 10 00000041`cadfed60 00007ffb`e1d0d4c0 VBoxVMM!nemR3WinHandleExitCpuId+0x79d [L:\vbox-intern\src\VBox\VMM\VMMAll\NEMAllNativeTemplate-win.cpp.h @ 1829] @encode
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| 128 | @endcode
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| 129 | *
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| 130 | * @see https://developercommunity.visualstudio.com/t/fragile-behavior-of-longjmp-called-from-noexcept-f/1532859
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| 131 | */
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| 132 | #if defined(IEM_WITH_SETJMP) && (defined(_MSC_VER) || defined(IEM_WITH_THROW_CATCH))
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| 133 | # define IEM_NOEXCEPT_MAY_LONGJMP RT_NOEXCEPT_EX(false)
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| 134 | #else
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| 135 | # define IEM_NOEXCEPT_MAY_LONGJMP RT_NOEXCEPT
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| 136 | #endif
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| 137 |
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| 138 | #define IEM_IMPLEMENTS_TASKSWITCH
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| 139 |
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| 140 | /** @def IEM_WITH_3DNOW
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| 141 | * Includes the 3DNow decoding. */
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| 142 | #if (!defined(IEM_WITH_3DNOW) && !defined(IEM_WITHOUT_3DNOW)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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| 143 | # define IEM_WITH_3DNOW
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| 144 | #endif
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| 145 |
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| 146 | /** @def IEM_WITH_THREE_0F_38
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| 147 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
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| 148 | #if (!defined(IEM_WITH_THREE_0F_38) && !defined(IEM_WITHOUT_THREE_0F_38)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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| 149 | # define IEM_WITH_THREE_0F_38
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| 150 | #endif
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| 151 |
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| 152 | /** @def IEM_WITH_THREE_0F_3A
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| 153 | * Includes the three byte opcode map for instrs starting with 0x0f 0x38. */
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| 154 | #if (!defined(IEM_WITH_THREE_0F_3A) && !defined(IEM_WITHOUT_THREE_0F_3A)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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| 155 | # define IEM_WITH_THREE_0F_3A
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| 156 | #endif
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| 157 |
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| 158 | /** @def IEM_WITH_VEX
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| 159 | * Includes the VEX decoding. */
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| 160 | #if (!defined(IEM_WITH_VEX) && !defined(IEM_WITHOUT_VEX)) || defined(DOXYGEN_RUNNING) /* For doxygen, set in Config.kmk. */
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| 161 | # define IEM_WITH_VEX
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| 162 | #endif
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| 163 |
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| 164 | /** @def IEM_CFG_TARGET_CPU
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| 165 | * The minimum target CPU for the IEM emulation (IEMTARGETCPU_XXX value).
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| 166 | *
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| 167 | * By default we allow this to be configured by the user via the
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| 168 | * CPUM/GuestCpuName config string, but this comes at a slight cost during
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| 169 | * decoding. So, for applications of this code where there is no need to
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| 170 | * be dynamic wrt target CPU, just modify this define.
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| 171 | */
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| 172 | #if !defined(IEM_CFG_TARGET_CPU) || defined(DOXYGEN_RUNNING)
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| 173 | # define IEM_CFG_TARGET_CPU IEMTARGETCPU_DYNAMIC
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| 174 | #endif
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| 175 |
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| 176 | //#define IEM_WITH_CODE_TLB // - work in progress
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| 177 | //#define IEM_WITH_DATA_TLB // - work in progress
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| 178 |
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| 179 |
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| 180 | /** @def IEM_USE_UNALIGNED_DATA_ACCESS
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| 181 | * Use unaligned accesses instead of elaborate byte assembly. */
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| 182 | #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) || defined(DOXYGEN_RUNNING)
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| 183 | # define IEM_USE_UNALIGNED_DATA_ACCESS
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| 184 | #endif
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| 185 |
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| 186 | //#define IEM_LOG_MEMORY_WRITES
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| 187 |
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| 188 | #if !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
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| 189 | /** Instruction statistics. */
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| 190 | typedef struct IEMINSTRSTATS
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| 191 | {
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| 192 | # define IEM_DO_INSTR_STAT(a_Name, a_szDesc) uint32_t a_Name;
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| 193 | # include "IEMInstructionStatisticsTmpl.h"
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| 194 | # undef IEM_DO_INSTR_STAT
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| 195 | } IEMINSTRSTATS;
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| 196 | #else
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| 197 | struct IEMINSTRSTATS;
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| 198 | typedef struct IEMINSTRSTATS IEMINSTRSTATS;
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| 199 | #endif
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| 200 | /** Pointer to IEM instruction statistics. */
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| 201 | typedef IEMINSTRSTATS *PIEMINSTRSTATS;
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| 202 |
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| 203 |
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| 204 | /** @name IEMTARGETCPU_EFL_BEHAVIOR_XXX - IEMCPU::aidxTargetCpuEflFlavour
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| 205 | * @{ */
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| 206 | #define IEMTARGETCPU_EFL_BEHAVIOR_NATIVE 0 /**< Native x86 EFLAGS result; Intel EFLAGS when on non-x86 hosts. */
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| 207 | #define IEMTARGETCPU_EFL_BEHAVIOR_INTEL 1 /**< Intel EFLAGS result. */
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| 208 | #define IEMTARGETCPU_EFL_BEHAVIOR_AMD 2 /**< AMD EFLAGS result */
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| 209 | #define IEMTARGETCPU_EFL_BEHAVIOR_RESERVED 3 /**< Reserved/dummy entry slot that's the same as 0. */
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| 210 | #define IEMTARGETCPU_EFL_BEHAVIOR_MASK 3 /**< For masking the index before use. */
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| 211 | /** Selects the right variant from a_aArray.
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| 212 | * pVCpu is implicit in the caller context. */
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| 213 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT(a_aArray) \
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| 214 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[1] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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| 215 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for when no native worker can
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| 216 | * be used because the host CPU does not support the operation. */
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| 217 | #define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_NON_NATIVE(a_aArray) \
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| 218 | (a_aArray[pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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| 219 | /** Variation of IEMTARGETCPU_EFL_BEHAVIOR_SELECT for a two dimentional
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| 220 | * array paralleling IEMCPU::aidxTargetCpuEflFlavour and a single bit index
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| 221 | * into the two.
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| 222 | * @sa IEM_SELECT_NATIVE_OR_FALLBACK */
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| 223 | #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
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| 224 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
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| 225 | (a_aaArray[a_fNative][pVCpu->iem.s.aidxTargetCpuEflFlavour[a_fNative] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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| 226 | #else
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| 227 | # define IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX(a_aaArray, a_fNative) \
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| 228 | (a_aaArray[0][pVCpu->iem.s.aidxTargetCpuEflFlavour[0] & IEMTARGETCPU_EFL_BEHAVIOR_MASK])
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| 229 | #endif
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| 230 | /** @} */
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| 231 |
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| 232 | /**
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| 233 | * Picks @a a_pfnNative or @a a_pfnFallback according to the host CPU feature
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| 234 | * indicator given by @a a_fCpumFeatureMember (CPUMFEATURES member).
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| 235 | *
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| 236 | * On non-x86 hosts, this will shortcut to the fallback w/o checking the
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| 237 | * indicator.
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| 238 | *
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| 239 | * @sa IEMTARGETCPU_EFL_BEHAVIOR_SELECT_EX
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| 240 | */
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| 241 | #if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
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| 242 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) \
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| 243 | (g_CpumHostFeatures.s.a_fCpumFeatureMember ? a_pfnNative : a_pfnFallback)
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| 244 | #else
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| 245 | # define IEM_SELECT_HOST_OR_FALLBACK(a_fCpumFeatureMember, a_pfnNative, a_pfnFallback) (a_pfnFallback)
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| 246 | #endif
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| 247 |
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| 248 |
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| 249 | /**
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| 250 | * Extended operand mode that includes a representation of 8-bit.
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| 251 | *
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| 252 | * This is used for packing down modes when invoking some C instruction
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| 253 | * implementations.
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| 254 | */
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| 255 | typedef enum IEMMODEX
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| 256 | {
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| 257 | IEMMODEX_16BIT = IEMMODE_16BIT,
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| 258 | IEMMODEX_32BIT = IEMMODE_32BIT,
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| 259 | IEMMODEX_64BIT = IEMMODE_64BIT,
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| 260 | IEMMODEX_8BIT
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| 261 | } IEMMODEX;
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| 262 | AssertCompileSize(IEMMODEX, 4);
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| 263 |
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| 264 |
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| 265 | /**
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| 266 | * Branch types.
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| 267 | */
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| 268 | typedef enum IEMBRANCH
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| 269 | {
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| 270 | IEMBRANCH_JUMP = 1,
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| 271 | IEMBRANCH_CALL,
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| 272 | IEMBRANCH_TRAP,
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| 273 | IEMBRANCH_SOFTWARE_INT,
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| 274 | IEMBRANCH_HARDWARE_INT
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| 275 | } IEMBRANCH;
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| 276 | AssertCompileSize(IEMBRANCH, 4);
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| 277 |
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| 278 |
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| 279 | /**
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| 280 | * INT instruction types.
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| 281 | */
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| 282 | typedef enum IEMINT
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| 283 | {
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| 284 | /** INT n instruction (opcode 0xcd imm). */
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| 285 | IEMINT_INTN = 0,
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| 286 | /** Single byte INT3 instruction (opcode 0xcc). */
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| 287 | IEMINT_INT3 = IEM_XCPT_FLAGS_BP_INSTR,
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| 288 | /** Single byte INTO instruction (opcode 0xce). */
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| 289 | IEMINT_INTO = IEM_XCPT_FLAGS_OF_INSTR,
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| 290 | /** Single byte INT1 (ICEBP) instruction (opcode 0xf1). */
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| 291 | IEMINT_INT1 = IEM_XCPT_FLAGS_ICEBP_INSTR
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| 292 | } IEMINT;
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| 293 | AssertCompileSize(IEMINT, 4);
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| 294 |
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| 295 |
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| 296 | /**
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| 297 | * A FPU result.
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| 298 | */
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| 299 | typedef struct IEMFPURESULT
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| 300 | {
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| 301 | /** The output value. */
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| 302 | RTFLOAT80U r80Result;
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| 303 | /** The output status. */
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| 304 | uint16_t FSW;
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| 305 | } IEMFPURESULT;
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| 306 | AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
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| 307 | /** Pointer to a FPU result. */
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| 308 | typedef IEMFPURESULT *PIEMFPURESULT;
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| 309 | /** Pointer to a const FPU result. */
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| 310 | typedef IEMFPURESULT const *PCIEMFPURESULT;
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| 311 |
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| 312 |
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| 313 | /**
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| 314 | * A FPU result consisting of two output values and FSW.
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| 315 | */
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| 316 | typedef struct IEMFPURESULTTWO
|
|---|
| 317 | {
|
|---|
| 318 | /** The first output value. */
|
|---|
| 319 | RTFLOAT80U r80Result1;
|
|---|
| 320 | /** The output status. */
|
|---|
| 321 | uint16_t FSW;
|
|---|
| 322 | /** The second output value. */
|
|---|
| 323 | RTFLOAT80U r80Result2;
|
|---|
| 324 | } IEMFPURESULTTWO;
|
|---|
| 325 | AssertCompileMemberOffset(IEMFPURESULTTWO, FSW, 10);
|
|---|
| 326 | AssertCompileMemberOffset(IEMFPURESULTTWO, r80Result2, 12);
|
|---|
| 327 | /** Pointer to a FPU result consisting of two output values and FSW. */
|
|---|
| 328 | typedef IEMFPURESULTTWO *PIEMFPURESULTTWO;
|
|---|
| 329 | /** Pointer to a const FPU result consisting of two output values and FSW. */
|
|---|
| 330 | typedef IEMFPURESULTTWO const *PCIEMFPURESULTTWO;
|
|---|
| 331 |
|
|---|
| 332 |
|
|---|
| 333 | /**
|
|---|
| 334 | * IEM TLB entry.
|
|---|
| 335 | *
|
|---|
| 336 | * Lookup assembly:
|
|---|
| 337 | * @code{.asm}
|
|---|
| 338 | ; Calculate tag.
|
|---|
| 339 | mov rax, [VA]
|
|---|
| 340 | shl rax, 16
|
|---|
| 341 | shr rax, 16 + X86_PAGE_SHIFT
|
|---|
| 342 | or rax, [uTlbRevision]
|
|---|
| 343 |
|
|---|
| 344 | ; Do indexing.
|
|---|
| 345 | movzx ecx, al
|
|---|
| 346 | lea rcx, [pTlbEntries + rcx]
|
|---|
| 347 |
|
|---|
| 348 | ; Check tag.
|
|---|
| 349 | cmp [rcx + IEMTLBENTRY.uTag], rax
|
|---|
| 350 | jne .TlbMiss
|
|---|
| 351 |
|
|---|
| 352 | ; Check access.
|
|---|
| 353 | mov rax, ACCESS_FLAGS | MAPPING_R3_NOT_VALID | 0xffffff00
|
|---|
| 354 | and rax, [rcx + IEMTLBENTRY.fFlagsAndPhysRev]
|
|---|
| 355 | cmp rax, [uTlbPhysRev]
|
|---|
| 356 | jne .TlbMiss
|
|---|
| 357 |
|
|---|
| 358 | ; Calc address and we're done.
|
|---|
| 359 | mov eax, X86_PAGE_OFFSET_MASK
|
|---|
| 360 | and eax, [VA]
|
|---|
| 361 | or rax, [rcx + IEMTLBENTRY.pMappingR3]
|
|---|
| 362 | %ifdef VBOX_WITH_STATISTICS
|
|---|
| 363 | inc qword [cTlbHits]
|
|---|
| 364 | %endif
|
|---|
| 365 | jmp .Done
|
|---|
| 366 |
|
|---|
| 367 | .TlbMiss:
|
|---|
| 368 | mov r8d, ACCESS_FLAGS
|
|---|
| 369 | mov rdx, [VA]
|
|---|
| 370 | mov rcx, [pVCpu]
|
|---|
| 371 | call iemTlbTypeMiss
|
|---|
| 372 | .Done:
|
|---|
| 373 |
|
|---|
| 374 | @endcode
|
|---|
| 375 | *
|
|---|
| 376 | */
|
|---|
| 377 | typedef struct IEMTLBENTRY
|
|---|
| 378 | {
|
|---|
| 379 | /** The TLB entry tag.
|
|---|
| 380 | * Bits 35 thru 0 are made up of the virtual address shifted right 12 bits, this
|
|---|
| 381 | * is ASSUMING a virtual address width of 48 bits.
|
|---|
| 382 | *
|
|---|
| 383 | * Bits 63 thru 36 are made up of the TLB revision (zero means invalid).
|
|---|
| 384 | *
|
|---|
| 385 | * The TLB lookup code uses the current TLB revision, which won't ever be zero,
|
|---|
| 386 | * enabling an extremely cheap TLB invalidation most of the time. When the TLB
|
|---|
| 387 | * revision wraps around though, the tags needs to be zeroed.
|
|---|
| 388 | *
|
|---|
| 389 | * @note Try use SHRD instruction? After seeing
|
|---|
| 390 | * https://gmplib.org/~tege/x86-timing.pdf, maybe not.
|
|---|
| 391 | *
|
|---|
| 392 | * @todo This will need to be reorganized for 57-bit wide virtual address and
|
|---|
| 393 | * PCID (currently 12 bits) and ASID (currently 6 bits) support. We'll
|
|---|
| 394 | * have to move the TLB entry versioning entirely to the
|
|---|
| 395 | * fFlagsAndPhysRev member then, 57 bit wide VAs means we'll only have
|
|---|
| 396 | * 19 bits left (64 - 57 + 12 = 19) and they'll almost entire be
|
|---|
| 397 | * consumed by PCID and ASID (12 + 6 = 18).
|
|---|
| 398 | */
|
|---|
| 399 | uint64_t uTag;
|
|---|
| 400 | /** Access flags and physical TLB revision.
|
|---|
| 401 | *
|
|---|
| 402 | * - Bit 0 - page tables - not executable (X86_PTE_PAE_NX).
|
|---|
| 403 | * - Bit 1 - page tables - not writable (complemented X86_PTE_RW).
|
|---|
| 404 | * - Bit 2 - page tables - not user (complemented X86_PTE_US).
|
|---|
| 405 | * - Bit 3 - pgm phys/virt - not directly writable.
|
|---|
| 406 | * - Bit 4 - pgm phys page - not directly readable.
|
|---|
| 407 | * - Bit 5 - page tables - not accessed (complemented X86_PTE_A).
|
|---|
| 408 | * - Bit 6 - page tables - not dirty (complemented X86_PTE_D).
|
|---|
| 409 | * - Bit 7 - tlb entry - pMappingR3 member not valid.
|
|---|
| 410 | * - Bits 63 thru 8 are used for the physical TLB revision number.
|
|---|
| 411 | *
|
|---|
| 412 | * We're using complemented bit meanings here because it makes it easy to check
|
|---|
| 413 | * whether special action is required. For instance a user mode write access
|
|---|
| 414 | * would do a "TEST fFlags, (X86_PTE_RW | X86_PTE_US | X86_PTE_D)" and a
|
|---|
| 415 | * non-zero result would mean special handling needed because either it wasn't
|
|---|
| 416 | * writable, or it wasn't user, or the page wasn't dirty. A user mode read
|
|---|
| 417 | * access would do "TEST fFlags, X86_PTE_US"; and a kernel mode read wouldn't
|
|---|
| 418 | * need to check any PTE flag.
|
|---|
| 419 | */
|
|---|
| 420 | uint64_t fFlagsAndPhysRev;
|
|---|
| 421 | /** The guest physical page address. */
|
|---|
| 422 | uint64_t GCPhys;
|
|---|
| 423 | /** Pointer to the ring-3 mapping. */
|
|---|
| 424 | R3PTRTYPE(uint8_t *) pbMappingR3;
|
|---|
| 425 | #if HC_ARCH_BITS == 32
|
|---|
| 426 | uint32_t u32Padding1;
|
|---|
| 427 | #endif
|
|---|
| 428 | } IEMTLBENTRY;
|
|---|
| 429 | AssertCompileSize(IEMTLBENTRY, 32);
|
|---|
| 430 | /** Pointer to an IEM TLB entry. */
|
|---|
| 431 | typedef IEMTLBENTRY *PIEMTLBENTRY;
|
|---|
| 432 |
|
|---|
| 433 | /** @name IEMTLBE_F_XXX - TLB entry flags (IEMTLBENTRY::fFlagsAndPhysRev)
|
|---|
| 434 | * @{ */
|
|---|
| 435 | #define IEMTLBE_F_PT_NO_EXEC RT_BIT_64(0) /**< Page tables: Not executable. */
|
|---|
| 436 | #define IEMTLBE_F_PT_NO_WRITE RT_BIT_64(1) /**< Page tables: Not writable. */
|
|---|
| 437 | #define IEMTLBE_F_PT_NO_USER RT_BIT_64(2) /**< Page tables: Not user accessible (supervisor only). */
|
|---|
| 438 | #define IEMTLBE_F_PG_NO_WRITE RT_BIT_64(3) /**< Phys page: Not writable (access handler, ROM, whatever). */
|
|---|
| 439 | #define IEMTLBE_F_PG_NO_READ RT_BIT_64(4) /**< Phys page: Not readable (MMIO / access handler, ROM) */
|
|---|
| 440 | #define IEMTLBE_F_PT_NO_ACCESSED RT_BIT_64(5) /**< Phys tables: Not accessed (need to be marked accessed). */
|
|---|
| 441 | #define IEMTLBE_F_PT_NO_DIRTY RT_BIT_64(6) /**< Page tables: Not dirty (needs to be made dirty on write). */
|
|---|
| 442 | #define IEMTLBE_F_NO_MAPPINGR3 RT_BIT_64(7) /**< TLB entry: The IEMTLBENTRY::pMappingR3 member is invalid. */
|
|---|
| 443 | #define IEMTLBE_F_PG_UNASSIGNED RT_BIT_64(8) /**< Phys page: Unassigned memory (not RAM, ROM, MMIO2 or MMIO). */
|
|---|
| 444 | #define IEMTLBE_F_PHYS_REV UINT64_C(0xfffffffffffffe00) /**< Physical revision mask. @sa IEMTLB_PHYS_REV_INCR */
|
|---|
| 445 | /** @} */
|
|---|
| 446 |
|
|---|
| 447 |
|
|---|
| 448 | /**
|
|---|
| 449 | * An IEM TLB.
|
|---|
| 450 | *
|
|---|
| 451 | * We've got two of these, one for data and one for instructions.
|
|---|
| 452 | */
|
|---|
| 453 | typedef struct IEMTLB
|
|---|
| 454 | {
|
|---|
| 455 | /** The TLB entries.
|
|---|
| 456 | * We've choosen 256 because that way we can obtain the result directly from a
|
|---|
| 457 | * 8-bit register without an additional AND instruction. */
|
|---|
| 458 | IEMTLBENTRY aEntries[256];
|
|---|
| 459 | /** The TLB revision.
|
|---|
| 460 | * This is actually only 28 bits wide (see IEMTLBENTRY::uTag) and is incremented
|
|---|
| 461 | * by adding RT_BIT_64(36) to it. When it wraps around and becomes zero, all
|
|---|
| 462 | * the tags in the TLB must be zeroed and the revision set to RT_BIT_64(36).
|
|---|
| 463 | * (The revision zero indicates an invalid TLB entry.)
|
|---|
| 464 | *
|
|---|
| 465 | * The initial value is choosen to cause an early wraparound. */
|
|---|
| 466 | uint64_t uTlbRevision;
|
|---|
| 467 | /** The TLB physical address revision - shadow of PGM variable.
|
|---|
| 468 | *
|
|---|
| 469 | * This is actually only 56 bits wide (see IEMTLBENTRY::fFlagsAndPhysRev) and is
|
|---|
| 470 | * incremented by adding RT_BIT_64(8). When it wraps around and becomes zero,
|
|---|
| 471 | * a rendezvous is called and each CPU wipe the IEMTLBENTRY::pMappingR3 as well
|
|---|
| 472 | * as IEMTLBENTRY::fFlagsAndPhysRev bits 63 thru 8, 4, and 3.
|
|---|
| 473 | *
|
|---|
| 474 | * The initial value is choosen to cause an early wraparound. */
|
|---|
| 475 | uint64_t volatile uTlbPhysRev;
|
|---|
| 476 |
|
|---|
| 477 | /* Statistics: */
|
|---|
| 478 |
|
|---|
| 479 | /** TLB hits (VBOX_WITH_STATISTICS only). */
|
|---|
| 480 | uint64_t cTlbHits;
|
|---|
| 481 | /** TLB misses. */
|
|---|
| 482 | uint32_t cTlbMisses;
|
|---|
| 483 | /** Slow read path. */
|
|---|
| 484 | uint32_t cTlbSlowReadPath;
|
|---|
| 485 | #if 0
|
|---|
| 486 | /** TLB misses because of tag mismatch. */
|
|---|
| 487 | uint32_t cTlbMissesTag;
|
|---|
| 488 | /** TLB misses because of virtual access violation. */
|
|---|
| 489 | uint32_t cTlbMissesVirtAccess;
|
|---|
| 490 | /** TLB misses because of dirty bit. */
|
|---|
| 491 | uint32_t cTlbMissesDirty;
|
|---|
| 492 | /** TLB misses because of MMIO */
|
|---|
| 493 | uint32_t cTlbMissesMmio;
|
|---|
| 494 | /** TLB misses because of write access handlers. */
|
|---|
| 495 | uint32_t cTlbMissesWriteHandler;
|
|---|
| 496 | /** TLB misses because no r3(/r0) mapping. */
|
|---|
| 497 | uint32_t cTlbMissesMapping;
|
|---|
| 498 | #endif
|
|---|
| 499 | /** Alignment padding. */
|
|---|
| 500 | uint32_t au32Padding[3+5];
|
|---|
| 501 | } IEMTLB;
|
|---|
| 502 | AssertCompileSizeAlignment(IEMTLB, 64);
|
|---|
| 503 | /** IEMTLB::uTlbRevision increment. */
|
|---|
| 504 | #define IEMTLB_REVISION_INCR RT_BIT_64(36)
|
|---|
| 505 | /** IEMTLB::uTlbRevision mask. */
|
|---|
| 506 | #define IEMTLB_REVISION_MASK (~(RT_BIT_64(36) - 1))
|
|---|
| 507 | /** IEMTLB::uTlbPhysRev increment.
|
|---|
| 508 | * @sa IEMTLBE_F_PHYS_REV */
|
|---|
| 509 | #define IEMTLB_PHYS_REV_INCR RT_BIT_64(9)
|
|---|
| 510 | /**
|
|---|
| 511 | * Calculates the TLB tag for a virtual address.
|
|---|
| 512 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
|---|
| 513 | * @param a_pTlb The TLB.
|
|---|
| 514 | * @param a_GCPtr The virtual address.
|
|---|
| 515 | */
|
|---|
| 516 | #define IEMTLB_CALC_TAG(a_pTlb, a_GCPtr) ( IEMTLB_CALC_TAG_NO_REV(a_GCPtr) | (a_pTlb)->uTlbRevision )
|
|---|
| 517 | /**
|
|---|
| 518 | * Calculates the TLB tag for a virtual address but without TLB revision.
|
|---|
| 519 | * @returns Tag value for indexing and comparing with IEMTLB::uTag.
|
|---|
| 520 | * @param a_GCPtr The virtual address.
|
|---|
| 521 | */
|
|---|
| 522 | #define IEMTLB_CALC_TAG_NO_REV(a_GCPtr) ( (((a_GCPtr) << 16) >> (GUEST_PAGE_SHIFT + 16)) )
|
|---|
| 523 | /**
|
|---|
| 524 | * Converts a TLB tag value into a TLB index.
|
|---|
| 525 | * @returns Index into IEMTLB::aEntries.
|
|---|
| 526 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
|---|
| 527 | */
|
|---|
| 528 | #define IEMTLB_TAG_TO_INDEX(a_uTag) ( (uint8_t)(a_uTag) )
|
|---|
| 529 | /**
|
|---|
| 530 | * Converts a TLB tag value into a TLB index.
|
|---|
| 531 | * @returns Index into IEMTLB::aEntries.
|
|---|
| 532 | * @param a_pTlb The TLB.
|
|---|
| 533 | * @param a_uTag Value returned by IEMTLB_CALC_TAG.
|
|---|
| 534 | */
|
|---|
| 535 | #define IEMTLB_TAG_TO_ENTRY(a_pTlb, a_uTag) ( &(a_pTlb)->aEntries[IEMTLB_TAG_TO_INDEX(a_uTag)] )
|
|---|
| 536 |
|
|---|
| 537 |
|
|---|
| 538 | /** Pointer to a translation block. */
|
|---|
| 539 | typedef struct IEMTB *PIEMTB;
|
|---|
| 540 |
|
|---|
| 541 |
|
|---|
| 542 | /**
|
|---|
| 543 | * The per-CPU IEM state.
|
|---|
| 544 | */
|
|---|
| 545 | typedef struct IEMCPU
|
|---|
| 546 | {
|
|---|
| 547 | /** Info status code that needs to be propagated to the IEM caller.
|
|---|
| 548 | * This cannot be passed internally, as it would complicate all success
|
|---|
| 549 | * checks within the interpreter making the code larger and almost impossible
|
|---|
| 550 | * to get right. Instead, we'll store status codes to pass on here. Each
|
|---|
| 551 | * source of these codes will perform appropriate sanity checks. */
|
|---|
| 552 | int32_t rcPassUp; /* 0x00 */
|
|---|
| 553 |
|
|---|
| 554 | /** The current CPU execution mode (CS). */
|
|---|
| 555 | IEMMODE enmCpuMode; /* 0x04 */
|
|---|
| 556 | /** The CPL. */
|
|---|
| 557 | uint8_t uCpl; /* 0x05 */
|
|---|
| 558 |
|
|---|
| 559 | /** Whether to bypass access handlers or not. */
|
|---|
| 560 | bool fBypassHandlers : 1; /* 0x06.0 */
|
|---|
| 561 | /** Whether to disregard the lock prefix (implied or not). */
|
|---|
| 562 | bool fDisregardLock : 1; /* 0x06.1 */
|
|---|
| 563 | /** Whether there are pending hardware instruction breakpoints. */
|
|---|
| 564 | bool fPendingInstructionBreakpoints : 1; /* 0x06.2 */
|
|---|
| 565 | /** Whether there are pending hardware data breakpoints. */
|
|---|
| 566 | bool fPendingDataBreakpoints : 1; /* 0x06.3 */
|
|---|
| 567 | /** Whether there are pending hardware I/O breakpoints. */
|
|---|
| 568 | bool fPendingIoBreakpoints : 1; /* 0x06.4 */
|
|---|
| 569 |
|
|---|
| 570 | /* Unused/padding */
|
|---|
| 571 | bool fUnused; /* 0x07 */
|
|---|
| 572 |
|
|---|
| 573 | /** @name Decoder state.
|
|---|
| 574 | * @{ */
|
|---|
| 575 | #ifndef IEM_WITH_OPAQUE_DECODER_STATE
|
|---|
| 576 | # ifdef IEM_WITH_CODE_TLB
|
|---|
| 577 | /** The offset of the next instruction byte. */
|
|---|
| 578 | uint32_t offInstrNextByte; /* 0x08 */
|
|---|
| 579 | /** The number of bytes available at pbInstrBuf for the current instruction.
|
|---|
| 580 | * This takes the max opcode length into account so that doesn't need to be
|
|---|
| 581 | * checked separately. */
|
|---|
| 582 | uint32_t cbInstrBuf; /* 0x0c */
|
|---|
| 583 | /** Pointer to the page containing RIP, user specified buffer or abOpcode.
|
|---|
| 584 | * This can be NULL if the page isn't mappable for some reason, in which
|
|---|
| 585 | * case we'll do fallback stuff.
|
|---|
| 586 | *
|
|---|
| 587 | * If we're executing an instruction from a user specified buffer,
|
|---|
| 588 | * IEMExecOneWithPrefetchedByPC and friends, this is not necessarily a page
|
|---|
| 589 | * aligned pointer but pointer to the user data.
|
|---|
| 590 | *
|
|---|
| 591 | * For instructions crossing pages, this will start on the first page and be
|
|---|
| 592 | * advanced to the next page by the time we've decoded the instruction. This
|
|---|
| 593 | * therefore precludes stuff like <tt>pbInstrBuf[offInstrNextByte + cbInstrBuf - cbCurInstr]</tt>
|
|---|
| 594 | */
|
|---|
| 595 | uint8_t const *pbInstrBuf; /* 0x10 */
|
|---|
| 596 | # if ARCH_BITS == 32
|
|---|
| 597 | uint32_t uInstrBufHigh; /** The high dword of the host context pbInstrBuf member. */
|
|---|
| 598 | # endif
|
|---|
| 599 | /** The program counter corresponding to pbInstrBuf.
|
|---|
| 600 | * This is set to a non-canonical address when we need to invalidate it. */
|
|---|
| 601 | uint64_t uInstrBufPc; /* 0x18 */
|
|---|
| 602 | /** The number of bytes available at pbInstrBuf in total (for IEMExecLots).
|
|---|
| 603 | * This takes the CS segment limit into account. */
|
|---|
| 604 | uint16_t cbInstrBufTotal; /* 0x20 */
|
|---|
| 605 | /** Offset into pbInstrBuf of the first byte of the current instruction.
|
|---|
| 606 | * Can be negative to efficiently handle cross page instructions. */
|
|---|
| 607 | int16_t offCurInstrStart; /* 0x22 */
|
|---|
| 608 |
|
|---|
| 609 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
|---|
| 610 | uint32_t fPrefixes; /* 0x24 */
|
|---|
| 611 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
|---|
| 612 | uint8_t uRexReg; /* 0x28 */
|
|---|
| 613 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
|---|
| 614 | * (REX.B << 3). */
|
|---|
| 615 | uint8_t uRexB; /* 0x29 */
|
|---|
| 616 | /** The extra REX SIB index field bit (REX.X << 3). */
|
|---|
| 617 | uint8_t uRexIndex; /* 0x2a */
|
|---|
| 618 |
|
|---|
| 619 | /** The effective segment register (X86_SREG_XXX). */
|
|---|
| 620 | uint8_t iEffSeg; /* 0x2b */
|
|---|
| 621 |
|
|---|
| 622 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
|---|
| 623 | uint8_t offModRm; /* 0x2c */
|
|---|
| 624 | # else /* !IEM_WITH_CODE_TLB */
|
|---|
| 625 | /** The size of what has currently been fetched into abOpcode. */
|
|---|
| 626 | uint8_t cbOpcode; /* 0x08 */
|
|---|
| 627 | /** The current offset into abOpcode. */
|
|---|
| 628 | uint8_t offOpcode; /* 0x09 */
|
|---|
| 629 | /** The offset of the ModR/M byte relative to the start of the instruction. */
|
|---|
| 630 | uint8_t offModRm; /* 0x0a */
|
|---|
| 631 |
|
|---|
| 632 | /** The effective segment register (X86_SREG_XXX). */
|
|---|
| 633 | uint8_t iEffSeg; /* 0x0b */
|
|---|
| 634 |
|
|---|
| 635 | /** The prefix mask (IEM_OP_PRF_XXX). */
|
|---|
| 636 | uint32_t fPrefixes; /* 0x0c */
|
|---|
| 637 | /** The extra REX ModR/M register field bit (REX.R << 3). */
|
|---|
| 638 | uint8_t uRexReg; /* 0x10 */
|
|---|
| 639 | /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
|
|---|
| 640 | * (REX.B << 3). */
|
|---|
| 641 | uint8_t uRexB; /* 0x11 */
|
|---|
| 642 | /** The extra REX SIB index field bit (REX.X << 3). */
|
|---|
| 643 | uint8_t uRexIndex; /* 0x12 */
|
|---|
| 644 |
|
|---|
| 645 | # endif /* !IEM_WITH_CODE_TLB */
|
|---|
| 646 |
|
|---|
| 647 | /** The effective operand mode. */
|
|---|
| 648 | IEMMODE enmEffOpSize; /* 0x2d, 0x13 */
|
|---|
| 649 | /** The default addressing mode. */
|
|---|
| 650 | IEMMODE enmDefAddrMode; /* 0x2e, 0x14 */
|
|---|
| 651 | /** The effective addressing mode. */
|
|---|
| 652 | IEMMODE enmEffAddrMode; /* 0x2f, 0x15 */
|
|---|
| 653 | /** The default operand mode. */
|
|---|
| 654 | IEMMODE enmDefOpSize; /* 0x30, 0x16 */
|
|---|
| 655 |
|
|---|
| 656 | /** Prefix index (VEX.pp) for two byte and three byte tables. */
|
|---|
| 657 | uint8_t idxPrefix; /* 0x31, 0x17 */
|
|---|
| 658 | /** 3rd VEX/EVEX/XOP register.
|
|---|
| 659 | * Please use IEM_GET_EFFECTIVE_VVVV to access. */
|
|---|
| 660 | uint8_t uVex3rdReg; /* 0x32, 0x18 */
|
|---|
| 661 | /** The VEX/EVEX/XOP length field. */
|
|---|
| 662 | uint8_t uVexLength; /* 0x33, 0x19 */
|
|---|
| 663 | /** Additional EVEX stuff. */
|
|---|
| 664 | uint8_t fEvexStuff; /* 0x34, 0x1a */
|
|---|
| 665 |
|
|---|
| 666 | /** Explicit alignment padding. */
|
|---|
| 667 | uint8_t abAlignment2a[1]; /* 0x35, 0x1b */
|
|---|
| 668 | /** The FPU opcode (FOP). */
|
|---|
| 669 | uint16_t uFpuOpcode; /* 0x36, 0x1c */
|
|---|
| 670 | # ifndef IEM_WITH_CODE_TLB
|
|---|
| 671 | /** Explicit alignment padding. */
|
|---|
| 672 | uint8_t abAlignment2b[2]; /* 0x1e */
|
|---|
| 673 | # endif
|
|---|
| 674 |
|
|---|
| 675 | /** The opcode bytes. */
|
|---|
| 676 | uint8_t abOpcode[15]; /* 0x48, 0x20 */
|
|---|
| 677 | /** Explicit alignment padding. */
|
|---|
| 678 | # ifdef IEM_WITH_CODE_TLB
|
|---|
| 679 | uint8_t abAlignment2c[0x48 - 0x47]; /* 0x37 */
|
|---|
| 680 | # else
|
|---|
| 681 | uint8_t abAlignment2c[0x48 - 0x2f]; /* 0x2f */
|
|---|
| 682 | # endif
|
|---|
| 683 | #else /* IEM_WITH_OPAQUE_DECODER_STATE */
|
|---|
| 684 | uint8_t abOpaqueDecoder[0x48 - 0x8];
|
|---|
| 685 | #endif /* IEM_WITH_OPAQUE_DECODER_STATE */
|
|---|
| 686 | /** @} */
|
|---|
| 687 |
|
|---|
| 688 |
|
|---|
| 689 | /** The flags of the current exception / interrupt. */
|
|---|
| 690 | uint32_t fCurXcpt; /* 0x48, 0x48 */
|
|---|
| 691 | /** The current exception / interrupt. */
|
|---|
| 692 | uint8_t uCurXcpt;
|
|---|
| 693 | /** Exception / interrupt recursion depth. */
|
|---|
| 694 | int8_t cXcptRecursions;
|
|---|
| 695 |
|
|---|
| 696 | /** The number of active guest memory mappings. */
|
|---|
| 697 | uint8_t cActiveMappings;
|
|---|
| 698 | /** The next unused mapping index. */
|
|---|
| 699 | uint8_t iNextMapping;
|
|---|
| 700 | /** Records for tracking guest memory mappings. */
|
|---|
| 701 | struct
|
|---|
| 702 | {
|
|---|
| 703 | /** The address of the mapped bytes. */
|
|---|
| 704 | void *pv;
|
|---|
| 705 | /** The access flags (IEM_ACCESS_XXX).
|
|---|
| 706 | * IEM_ACCESS_INVALID if the entry is unused. */
|
|---|
| 707 | uint32_t fAccess;
|
|---|
| 708 | #if HC_ARCH_BITS == 64
|
|---|
| 709 | uint32_t u32Alignment4; /**< Alignment padding. */
|
|---|
| 710 | #endif
|
|---|
| 711 | } aMemMappings[3];
|
|---|
| 712 |
|
|---|
| 713 | /** Locking records for the mapped memory. */
|
|---|
| 714 | union
|
|---|
| 715 | {
|
|---|
| 716 | PGMPAGEMAPLOCK Lock;
|
|---|
| 717 | uint64_t au64Padding[2];
|
|---|
| 718 | } aMemMappingLocks[3];
|
|---|
| 719 |
|
|---|
| 720 | /** Bounce buffer info.
|
|---|
| 721 | * This runs in parallel to aMemMappings. */
|
|---|
| 722 | struct
|
|---|
| 723 | {
|
|---|
| 724 | /** The physical address of the first byte. */
|
|---|
| 725 | RTGCPHYS GCPhysFirst;
|
|---|
| 726 | /** The physical address of the second page. */
|
|---|
| 727 | RTGCPHYS GCPhysSecond;
|
|---|
| 728 | /** The number of bytes in the first page. */
|
|---|
| 729 | uint16_t cbFirst;
|
|---|
| 730 | /** The number of bytes in the second page. */
|
|---|
| 731 | uint16_t cbSecond;
|
|---|
| 732 | /** Whether it's unassigned memory. */
|
|---|
| 733 | bool fUnassigned;
|
|---|
| 734 | /** Explicit alignment padding. */
|
|---|
| 735 | bool afAlignment5[3];
|
|---|
| 736 | } aMemBbMappings[3];
|
|---|
| 737 |
|
|---|
| 738 | /* Ensure that aBounceBuffers are aligned at a 32 byte boundrary. */
|
|---|
| 739 | uint64_t abAlignment7[1];
|
|---|
| 740 |
|
|---|
| 741 | /** Bounce buffer storage.
|
|---|
| 742 | * This runs in parallel to aMemMappings and aMemBbMappings. */
|
|---|
| 743 | struct
|
|---|
| 744 | {
|
|---|
| 745 | uint8_t ab[512];
|
|---|
| 746 | } aBounceBuffers[3];
|
|---|
| 747 |
|
|---|
| 748 |
|
|---|
| 749 | /** Pointer set jump buffer - ring-3 context. */
|
|---|
| 750 | R3PTRTYPE(jmp_buf *) pJmpBufR3;
|
|---|
| 751 | /** Pointer set jump buffer - ring-0 context. */
|
|---|
| 752 | R0PTRTYPE(jmp_buf *) pJmpBufR0;
|
|---|
| 753 |
|
|---|
| 754 | /** @todo Should move this near @a fCurXcpt later. */
|
|---|
| 755 | /** The CR2 for the current exception / interrupt. */
|
|---|
| 756 | uint64_t uCurXcptCr2;
|
|---|
| 757 | /** The error code for the current exception / interrupt. */
|
|---|
| 758 | uint32_t uCurXcptErr;
|
|---|
| 759 |
|
|---|
| 760 | /** @name Statistics
|
|---|
| 761 | * @{ */
|
|---|
| 762 | /** The number of instructions we've executed. */
|
|---|
| 763 | uint32_t cInstructions;
|
|---|
| 764 | /** The number of potential exits. */
|
|---|
| 765 | uint32_t cPotentialExits;
|
|---|
| 766 | /** The number of bytes data or stack written (mostly for IEMExecOneEx).
|
|---|
| 767 | * This may contain uncommitted writes. */
|
|---|
| 768 | uint32_t cbWritten;
|
|---|
| 769 | /** Counts the VERR_IEM_INSTR_NOT_IMPLEMENTED returns. */
|
|---|
| 770 | uint32_t cRetInstrNotImplemented;
|
|---|
| 771 | /** Counts the VERR_IEM_ASPECT_NOT_IMPLEMENTED returns. */
|
|---|
| 772 | uint32_t cRetAspectNotImplemented;
|
|---|
| 773 | /** Counts informational statuses returned (other than VINF_SUCCESS). */
|
|---|
| 774 | uint32_t cRetInfStatuses;
|
|---|
| 775 | /** Counts other error statuses returned. */
|
|---|
| 776 | uint32_t cRetErrStatuses;
|
|---|
| 777 | /** Number of times rcPassUp has been used. */
|
|---|
| 778 | uint32_t cRetPassUpStatus;
|
|---|
| 779 | /** Number of times RZ left with instruction commit pending for ring-3. */
|
|---|
| 780 | uint32_t cPendingCommit;
|
|---|
| 781 | /** Number of long jumps. */
|
|---|
| 782 | uint32_t cLongJumps;
|
|---|
| 783 | /** @} */
|
|---|
| 784 |
|
|---|
| 785 | /** @name Target CPU information.
|
|---|
| 786 | * @{ */
|
|---|
| 787 | #if IEM_CFG_TARGET_CPU == IEMTARGETCPU_DYNAMIC
|
|---|
| 788 | /** The target CPU. */
|
|---|
| 789 | uint8_t uTargetCpu;
|
|---|
| 790 | #else
|
|---|
| 791 | uint8_t bTargetCpuPadding;
|
|---|
| 792 | #endif
|
|---|
| 793 | /** For selecting assembly works matching the target CPU EFLAGS behaviour, see
|
|---|
| 794 | * IEMTARGETCPU_EFL_BEHAVIOR_XXX for values, with the 1st entry for when no
|
|---|
| 795 | * native host support and the 2nd for when there is.
|
|---|
| 796 | *
|
|---|
| 797 | * The two values are typically indexed by a g_CpumHostFeatures bit.
|
|---|
| 798 | *
|
|---|
| 799 | * This is for instance used for the BSF & BSR instructions where AMD and
|
|---|
| 800 | * Intel CPUs produce different EFLAGS. */
|
|---|
| 801 | uint8_t aidxTargetCpuEflFlavour[2];
|
|---|
| 802 |
|
|---|
| 803 | /** The CPU vendor. */
|
|---|
| 804 | CPUMCPUVENDOR enmCpuVendor;
|
|---|
| 805 | /** @} */
|
|---|
| 806 |
|
|---|
| 807 | /** @name Host CPU information.
|
|---|
| 808 | * @{ */
|
|---|
| 809 | /** The CPU vendor. */
|
|---|
| 810 | CPUMCPUVENDOR enmHostCpuVendor;
|
|---|
| 811 | /** @} */
|
|---|
| 812 |
|
|---|
| 813 | /** Counts RDMSR \#GP(0) LogRel(). */
|
|---|
| 814 | uint8_t cLogRelRdMsr;
|
|---|
| 815 | /** Counts WRMSR \#GP(0) LogRel(). */
|
|---|
| 816 | uint8_t cLogRelWrMsr;
|
|---|
| 817 | /** Alignment padding. */
|
|---|
| 818 | uint8_t abAlignment8[42];
|
|---|
| 819 |
|
|---|
| 820 | /** @name Recompilation
|
|---|
| 821 | * @{ */
|
|---|
| 822 | /** Pointer to the current translation block.
|
|---|
| 823 | * This can either be one being executed or one being compiled. */
|
|---|
| 824 | R3PTRTYPE(PIEMTB) pCurTbR3;
|
|---|
| 825 | /** Spaced reserved for recompiler data / alignment. */
|
|---|
| 826 | uint64_t auRecompilerStuff[7];
|
|---|
| 827 | /** @} */
|
|---|
| 828 |
|
|---|
| 829 | /** Data TLB.
|
|---|
| 830 | * @remarks Must be 64-byte aligned. */
|
|---|
| 831 | IEMTLB DataTlb;
|
|---|
| 832 | /** Instruction TLB.
|
|---|
| 833 | * @remarks Must be 64-byte aligned. */
|
|---|
| 834 | IEMTLB CodeTlb;
|
|---|
| 835 |
|
|---|
| 836 | /** Exception statistics. */
|
|---|
| 837 | STAMCOUNTER aStatXcpts[32];
|
|---|
| 838 | /** Interrupt statistics. */
|
|---|
| 839 | uint32_t aStatInts[256];
|
|---|
| 840 |
|
|---|
| 841 | #if defined(VBOX_WITH_STATISTICS) && !defined(IN_TSTVMSTRUCT) && !defined(DOXYGEN_RUNNING)
|
|---|
| 842 | /** Instruction statistics for ring-0/raw-mode. */
|
|---|
| 843 | IEMINSTRSTATS StatsRZ;
|
|---|
| 844 | /** Instruction statistics for ring-3. */
|
|---|
| 845 | IEMINSTRSTATS StatsR3;
|
|---|
| 846 | #endif
|
|---|
| 847 | } IEMCPU;
|
|---|
| 848 | AssertCompileMemberOffset(IEMCPU, fCurXcpt, 0x48);
|
|---|
| 849 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 8);
|
|---|
| 850 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 16);
|
|---|
| 851 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 32);
|
|---|
| 852 | AssertCompileMemberAlignment(IEMCPU, aBounceBuffers, 64);
|
|---|
| 853 | AssertCompileMemberAlignment(IEMCPU, DataTlb, 64);
|
|---|
| 854 | AssertCompileMemberAlignment(IEMCPU, CodeTlb, 64);
|
|---|
| 855 |
|
|---|
| 856 | /** Pointer to the per-CPU IEM state. */
|
|---|
| 857 | typedef IEMCPU *PIEMCPU;
|
|---|
| 858 | /** Pointer to the const per-CPU IEM state. */
|
|---|
| 859 | typedef IEMCPU const *PCIEMCPU;
|
|---|
| 860 |
|
|---|
| 861 |
|
|---|
| 862 | /** @def IEM_GET_CTX
|
|---|
| 863 | * Gets the guest CPU context for the calling EMT.
|
|---|
| 864 | * @returns PCPUMCTX
|
|---|
| 865 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 866 | */
|
|---|
| 867 | #define IEM_GET_CTX(a_pVCpu) (&(a_pVCpu)->cpum.GstCtx)
|
|---|
| 868 |
|
|---|
| 869 | /** @def IEM_CTX_ASSERT
|
|---|
| 870 | * Asserts that the @a a_fExtrnMbz is present in the CPU context.
|
|---|
| 871 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 872 | * @param a_fExtrnMbz The mask of CPUMCTX_EXTRN_XXX flags that must be zero.
|
|---|
| 873 | */
|
|---|
| 874 | #define IEM_CTX_ASSERT(a_pVCpu, a_fExtrnMbz) AssertMsg(!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnMbz)), \
|
|---|
| 875 | ("fExtrn=%#RX64 fExtrnMbz=%#RX64\n", (a_pVCpu)->cpum.GstCtx.fExtrn, \
|
|---|
| 876 | (a_fExtrnMbz)))
|
|---|
| 877 |
|
|---|
| 878 | /** @def IEM_CTX_IMPORT_RET
|
|---|
| 879 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
|---|
| 880 | *
|
|---|
| 881 | * Will call the keep to import the bits as needed.
|
|---|
| 882 | *
|
|---|
| 883 | * Returns on import failure.
|
|---|
| 884 | *
|
|---|
| 885 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 886 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
|---|
| 887 | */
|
|---|
| 888 | #define IEM_CTX_IMPORT_RET(a_pVCpu, a_fExtrnImport) \
|
|---|
| 889 | do { \
|
|---|
| 890 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
|---|
| 891 | { /* likely */ } \
|
|---|
| 892 | else \
|
|---|
| 893 | { \
|
|---|
| 894 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
|---|
| 895 | AssertRCReturn(rcCtxImport, rcCtxImport); \
|
|---|
| 896 | } \
|
|---|
| 897 | } while (0)
|
|---|
| 898 |
|
|---|
| 899 | /** @def IEM_CTX_IMPORT_NORET
|
|---|
| 900 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
|---|
| 901 | *
|
|---|
| 902 | * Will call the keep to import the bits as needed.
|
|---|
| 903 | *
|
|---|
| 904 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 905 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
|---|
| 906 | */
|
|---|
| 907 | #define IEM_CTX_IMPORT_NORET(a_pVCpu, a_fExtrnImport) \
|
|---|
| 908 | do { \
|
|---|
| 909 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
|---|
| 910 | { /* likely */ } \
|
|---|
| 911 | else \
|
|---|
| 912 | { \
|
|---|
| 913 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
|---|
| 914 | AssertLogRelRC(rcCtxImport); \
|
|---|
| 915 | } \
|
|---|
| 916 | } while (0)
|
|---|
| 917 |
|
|---|
| 918 | /** @def IEM_CTX_IMPORT_JMP
|
|---|
| 919 | * Makes sure the CPU context bits given by @a a_fExtrnImport are imported.
|
|---|
| 920 | *
|
|---|
| 921 | * Will call the keep to import the bits as needed.
|
|---|
| 922 | *
|
|---|
| 923 | * Jumps on import failure.
|
|---|
| 924 | *
|
|---|
| 925 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 926 | * @param a_fExtrnImport The mask of CPUMCTX_EXTRN_XXX flags to import.
|
|---|
| 927 | */
|
|---|
| 928 | #define IEM_CTX_IMPORT_JMP(a_pVCpu, a_fExtrnImport) \
|
|---|
| 929 | do { \
|
|---|
| 930 | if (!((a_pVCpu)->cpum.GstCtx.fExtrn & (a_fExtrnImport))) \
|
|---|
| 931 | { /* likely */ } \
|
|---|
| 932 | else \
|
|---|
| 933 | { \
|
|---|
| 934 | int rcCtxImport = CPUMImportGuestStateOnDemand(a_pVCpu, a_fExtrnImport); \
|
|---|
| 935 | AssertRCStmt(rcCtxImport, IEM_DO_LONGJMP(pVCpu, rcCtxImport)); \
|
|---|
| 936 | } \
|
|---|
| 937 | } while (0)
|
|---|
| 938 |
|
|---|
| 939 |
|
|---|
| 940 |
|
|---|
| 941 | /** @def IEM_GET_TARGET_CPU
|
|---|
| 942 | * Gets the current IEMTARGETCPU value.
|
|---|
| 943 | * @returns IEMTARGETCPU value.
|
|---|
| 944 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 945 | */
|
|---|
| 946 | #if IEM_CFG_TARGET_CPU != IEMTARGETCPU_DYNAMIC
|
|---|
| 947 | # define IEM_GET_TARGET_CPU(a_pVCpu) (IEM_CFG_TARGET_CPU)
|
|---|
| 948 | #else
|
|---|
| 949 | # define IEM_GET_TARGET_CPU(a_pVCpu) ((a_pVCpu)->iem.s.uTargetCpu)
|
|---|
| 950 | #endif
|
|---|
| 951 |
|
|---|
| 952 | /** @def IEM_GET_INSTR_LEN
|
|---|
| 953 | * Gets the instruction length. */
|
|---|
| 954 | #ifdef IEM_WITH_CODE_TLB
|
|---|
| 955 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offInstrNextByte - (uint32_t)(int32_t)(a_pVCpu)->iem.s.offCurInstrStart)
|
|---|
| 956 | #else
|
|---|
| 957 | # define IEM_GET_INSTR_LEN(a_pVCpu) ((a_pVCpu)->iem.s.offOpcode)
|
|---|
| 958 | #endif
|
|---|
| 959 |
|
|---|
| 960 |
|
|---|
| 961 | /**
|
|---|
| 962 | * Shared per-VM IEM data.
|
|---|
| 963 | */
|
|---|
| 964 | typedef struct IEM
|
|---|
| 965 | {
|
|---|
| 966 | /** The VMX APIC-access page handler type. */
|
|---|
| 967 | PGMPHYSHANDLERTYPE hVmxApicAccessPage;
|
|---|
| 968 | #ifndef VBOX_WITHOUT_CPUID_HOST_CALL
|
|---|
| 969 | /** Set if the CPUID host call functionality is enabled. */
|
|---|
| 970 | bool fCpuIdHostCall;
|
|---|
| 971 | #endif
|
|---|
| 972 | } IEM;
|
|---|
| 973 |
|
|---|
| 974 |
|
|---|
| 975 |
|
|---|
| 976 | /** @name IEM_ACCESS_XXX - Access details.
|
|---|
| 977 | * @{ */
|
|---|
| 978 | #define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
|
|---|
| 979 | #define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
|
|---|
| 980 | #define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
|
|---|
| 981 | #define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
|
|---|
| 982 | #define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
|
|---|
| 983 | #define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
|
|---|
| 984 | #define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
|
|---|
| 985 | #define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
|
|---|
| 986 | #define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
|
|---|
| 987 | #define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
|
|---|
| 988 | /** The writes are partial, so if initialize the bounce buffer with the
|
|---|
| 989 | * orignal RAM content. */
|
|---|
| 990 | #define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
|
|---|
| 991 | /** Used in aMemMappings to indicate that the entry is bounce buffered. */
|
|---|
| 992 | #define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
|
|---|
| 993 | /** Bounce buffer with ring-3 write pending, first page. */
|
|---|
| 994 | #define IEM_ACCESS_PENDING_R3_WRITE_1ST UINT32_C(0x00000400)
|
|---|
| 995 | /** Bounce buffer with ring-3 write pending, second page. */
|
|---|
| 996 | #define IEM_ACCESS_PENDING_R3_WRITE_2ND UINT32_C(0x00000800)
|
|---|
| 997 | /** Not locked, accessed via the TLB. */
|
|---|
| 998 | #define IEM_ACCESS_NOT_LOCKED UINT32_C(0x00001000)
|
|---|
| 999 | /** Valid bit mask. */
|
|---|
| 1000 | #define IEM_ACCESS_VALID_MASK UINT32_C(0x00001fff)
|
|---|
| 1001 | /** Shift count for the TLB flags (upper word). */
|
|---|
| 1002 | #define IEM_ACCESS_SHIFT_TLB_FLAGS 16
|
|---|
| 1003 |
|
|---|
| 1004 | /** Read+write data alias. */
|
|---|
| 1005 | #define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
|---|
| 1006 | /** Write data alias. */
|
|---|
| 1007 | #define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
|
|---|
| 1008 | /** Read data alias. */
|
|---|
| 1009 | #define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA)
|
|---|
| 1010 | /** Instruction fetch alias. */
|
|---|
| 1011 | #define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_WHAT_CODE)
|
|---|
| 1012 | /** Stack write alias. */
|
|---|
| 1013 | #define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
|---|
| 1014 | /** Stack read alias. */
|
|---|
| 1015 | #define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_STACK)
|
|---|
| 1016 | /** Stack read+write alias. */
|
|---|
| 1017 | #define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
|
|---|
| 1018 | /** Read system table alias. */
|
|---|
| 1019 | #define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_SYS)
|
|---|
| 1020 | /** Read+write system table alias. */
|
|---|
| 1021 | #define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_SYS)
|
|---|
| 1022 | /** @} */
|
|---|
| 1023 |
|
|---|
| 1024 | /** @name Prefix constants (IEMCPU::fPrefixes)
|
|---|
| 1025 | * @{ */
|
|---|
| 1026 | #define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /**< CS segment prefix (0x2e). */
|
|---|
| 1027 | #define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /**< SS segment prefix (0x36). */
|
|---|
| 1028 | #define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /**< DS segment prefix (0x3e). */
|
|---|
| 1029 | #define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /**< ES segment prefix (0x26). */
|
|---|
| 1030 | #define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /**< FS segment prefix (0x64). */
|
|---|
| 1031 | #define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /**< GS segment prefix (0x65). */
|
|---|
| 1032 | #define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
|
|---|
| 1033 |
|
|---|
| 1034 | #define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /**< Operand size prefix (0x66). */
|
|---|
| 1035 | #define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /**< REX.W prefix (0x48-0x4f). */
|
|---|
| 1036 | #define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /**< Address size prefix (0x67). */
|
|---|
| 1037 |
|
|---|
| 1038 | #define IEM_OP_PRF_LOCK RT_BIT_32(16) /**< Lock prefix (0xf0). */
|
|---|
| 1039 | #define IEM_OP_PRF_REPNZ RT_BIT_32(17) /**< Repeat-not-zero prefix (0xf2). */
|
|---|
| 1040 | #define IEM_OP_PRF_REPZ RT_BIT_32(18) /**< Repeat-if-zero prefix (0xf3). */
|
|---|
| 1041 |
|
|---|
| 1042 | #define IEM_OP_PRF_REX RT_BIT_32(24) /**< Any REX prefix (0x40-0x4f). */
|
|---|
| 1043 | #define IEM_OP_PRF_REX_R RT_BIT_32(25) /**< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). */
|
|---|
| 1044 | #define IEM_OP_PRF_REX_B RT_BIT_32(26) /**< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). */
|
|---|
| 1045 | #define IEM_OP_PRF_REX_X RT_BIT_32(27) /**< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). */
|
|---|
| 1046 | /** Mask with all the REX prefix flags.
|
|---|
| 1047 | * This is generally for use when needing to undo the REX prefixes when they
|
|---|
| 1048 | * are followed legacy prefixes and therefore does not immediately preceed
|
|---|
| 1049 | * the first opcode byte.
|
|---|
| 1050 | * For testing whether any REX prefix is present, use IEM_OP_PRF_REX instead. */
|
|---|
| 1051 | #define IEM_OP_PRF_REX_MASK (IEM_OP_PRF_REX | IEM_OP_PRF_REX_R | IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X | IEM_OP_PRF_SIZE_REX_W )
|
|---|
| 1052 |
|
|---|
| 1053 | #define IEM_OP_PRF_VEX RT_BIT_32(28) /**< Indiciates VEX prefix. */
|
|---|
| 1054 | #define IEM_OP_PRF_EVEX RT_BIT_32(29) /**< Indiciates EVEX prefix. */
|
|---|
| 1055 | #define IEM_OP_PRF_XOP RT_BIT_32(30) /**< Indiciates XOP prefix. */
|
|---|
| 1056 | /** @} */
|
|---|
| 1057 |
|
|---|
| 1058 | /** @name IEMOPFORM_XXX - Opcode forms
|
|---|
| 1059 | * @note These are ORed together with IEMOPHINT_XXX.
|
|---|
| 1060 | * @{ */
|
|---|
| 1061 | /** ModR/M: reg, r/m */
|
|---|
| 1062 | #define IEMOPFORM_RM 0
|
|---|
| 1063 | /** ModR/M: reg, r/m (register) */
|
|---|
| 1064 | #define IEMOPFORM_RM_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
|---|
| 1065 | /** ModR/M: reg, r/m (memory) */
|
|---|
| 1066 | #define IEMOPFORM_RM_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
|---|
| 1067 | /** ModR/M: reg, r/m */
|
|---|
| 1068 | #define IEMOPFORM_RMI 1
|
|---|
| 1069 | /** ModR/M: reg, r/m (register) */
|
|---|
| 1070 | #define IEMOPFORM_RMI_REG (IEMOPFORM_RM | IEMOPFORM_MOD3)
|
|---|
| 1071 | /** ModR/M: reg, r/m (memory) */
|
|---|
| 1072 | #define IEMOPFORM_RMI_MEM (IEMOPFORM_RM | IEMOPFORM_NOT_MOD3)
|
|---|
| 1073 | /** ModR/M: r/m, reg */
|
|---|
| 1074 | #define IEMOPFORM_MR 2
|
|---|
| 1075 | /** ModR/M: r/m (register), reg */
|
|---|
| 1076 | #define IEMOPFORM_MR_REG (IEMOPFORM_MR | IEMOPFORM_MOD3)
|
|---|
| 1077 | /** ModR/M: r/m (memory), reg */
|
|---|
| 1078 | #define IEMOPFORM_MR_MEM (IEMOPFORM_MR | IEMOPFORM_NOT_MOD3)
|
|---|
| 1079 | /** ModR/M: r/m, reg */
|
|---|
| 1080 | #define IEMOPFORM_MRI 3
|
|---|
| 1081 | /** ModR/M: r/m (register), reg */
|
|---|
| 1082 | #define IEMOPFORM_MRI_REG (IEMOPFORM_MR | IEMOPFORM_MOD3)
|
|---|
| 1083 | /** ModR/M: r/m (memory), reg */
|
|---|
| 1084 | #define IEMOPFORM_MRI_MEM (IEMOPFORM_MR | IEMOPFORM_NOT_MOD3)
|
|---|
| 1085 | /** ModR/M: r/m only */
|
|---|
| 1086 | #define IEMOPFORM_M 4
|
|---|
| 1087 | /** ModR/M: r/m only (register). */
|
|---|
| 1088 | #define IEMOPFORM_M_REG (IEMOPFORM_M | IEMOPFORM_MOD3)
|
|---|
| 1089 | /** ModR/M: r/m only (memory). */
|
|---|
| 1090 | #define IEMOPFORM_M_MEM (IEMOPFORM_M | IEMOPFORM_NOT_MOD3)
|
|---|
| 1091 | /** ModR/M: reg only */
|
|---|
| 1092 | #define IEMOPFORM_R 5
|
|---|
| 1093 |
|
|---|
| 1094 | /** VEX+ModR/M: reg, r/m */
|
|---|
| 1095 | #define IEMOPFORM_VEX_RM 8
|
|---|
| 1096 | /** VEX+ModR/M: reg, r/m (register) */
|
|---|
| 1097 | #define IEMOPFORM_VEX_RM_REG (IEMOPFORM_VEX_RM | IEMOPFORM_MOD3)
|
|---|
| 1098 | /** VEX+ModR/M: reg, r/m (memory) */
|
|---|
| 1099 | #define IEMOPFORM_VEX_RM_MEM (IEMOPFORM_VEX_RM | IEMOPFORM_NOT_MOD3)
|
|---|
| 1100 | /** VEX+ModR/M: r/m, reg */
|
|---|
| 1101 | #define IEMOPFORM_VEX_MR 9
|
|---|
| 1102 | /** VEX+ModR/M: r/m (register), reg */
|
|---|
| 1103 | #define IEMOPFORM_VEX_MR_REG (IEMOPFORM_VEX_MR | IEMOPFORM_MOD3)
|
|---|
| 1104 | /** VEX+ModR/M: r/m (memory), reg */
|
|---|
| 1105 | #define IEMOPFORM_VEX_MR_MEM (IEMOPFORM_VEX_MR | IEMOPFORM_NOT_MOD3)
|
|---|
| 1106 | /** VEX+ModR/M: r/m only */
|
|---|
| 1107 | #define IEMOPFORM_VEX_M 10
|
|---|
| 1108 | /** VEX+ModR/M: r/m only (register). */
|
|---|
| 1109 | #define IEMOPFORM_VEX_M_REG (IEMOPFORM_VEX_M | IEMOPFORM_MOD3)
|
|---|
| 1110 | /** VEX+ModR/M: r/m only (memory). */
|
|---|
| 1111 | #define IEMOPFORM_VEX_M_MEM (IEMOPFORM_VEX_M | IEMOPFORM_NOT_MOD3)
|
|---|
| 1112 | /** VEX+ModR/M: reg only */
|
|---|
| 1113 | #define IEMOPFORM_VEX_R 11
|
|---|
| 1114 | /** VEX+ModR/M: reg, vvvv, r/m */
|
|---|
| 1115 | #define IEMOPFORM_VEX_RVM 12
|
|---|
| 1116 | /** VEX+ModR/M: reg, vvvv, r/m (register). */
|
|---|
| 1117 | #define IEMOPFORM_VEX_RVM_REG (IEMOPFORM_VEX_RVM | IEMOPFORM_MOD3)
|
|---|
| 1118 | /** VEX+ModR/M: reg, vvvv, r/m (memory). */
|
|---|
| 1119 | #define IEMOPFORM_VEX_RVM_MEM (IEMOPFORM_VEX_RVM | IEMOPFORM_NOT_MOD3)
|
|---|
| 1120 | /** VEX+ModR/M: reg, r/m, vvvv */
|
|---|
| 1121 | #define IEMOPFORM_VEX_RMV 13
|
|---|
| 1122 | /** VEX+ModR/M: reg, r/m, vvvv (register). */
|
|---|
| 1123 | #define IEMOPFORM_VEX_RMV_REG (IEMOPFORM_VEX_RMV | IEMOPFORM_MOD3)
|
|---|
| 1124 | /** VEX+ModR/M: reg, r/m, vvvv (memory). */
|
|---|
| 1125 | #define IEMOPFORM_VEX_RMV_MEM (IEMOPFORM_VEX_RMV | IEMOPFORM_NOT_MOD3)
|
|---|
| 1126 | /** VEX+ModR/M: reg, r/m, imm8 */
|
|---|
| 1127 | #define IEMOPFORM_VEX_RMI 14
|
|---|
| 1128 | /** VEX+ModR/M: reg, r/m, imm8 (register). */
|
|---|
| 1129 | #define IEMOPFORM_VEX_RMI_REG (IEMOPFORM_VEX_RMI | IEMOPFORM_MOD3)
|
|---|
| 1130 | /** VEX+ModR/M: reg, r/m, imm8 (memory). */
|
|---|
| 1131 | #define IEMOPFORM_VEX_RMI_MEM (IEMOPFORM_VEX_RMI | IEMOPFORM_NOT_MOD3)
|
|---|
| 1132 | /** VEX+ModR/M: r/m, vvvv, reg */
|
|---|
| 1133 | #define IEMOPFORM_VEX_MVR 15
|
|---|
| 1134 | /** VEX+ModR/M: r/m, vvvv, reg (register) */
|
|---|
| 1135 | #define IEMOPFORM_VEX_MVR_REG (IEMOPFORM_VEX_MVR | IEMOPFORM_MOD3)
|
|---|
| 1136 | /** VEX+ModR/M: r/m, vvvv, reg (memory) */
|
|---|
| 1137 | #define IEMOPFORM_VEX_MVR_MEM (IEMOPFORM_VEX_MVR | IEMOPFORM_NOT_MOD3)
|
|---|
| 1138 | /** VEX+ModR/M+/n: vvvv, r/m */
|
|---|
| 1139 | #define IEMOPFORM_VEX_VM 16
|
|---|
| 1140 | /** VEX+ModR/M+/n: vvvv, r/m (register) */
|
|---|
| 1141 | #define IEMOPFORM_VEX_VM_REG (IEMOPFORM_VEX_VM | IEMOPFORM_MOD3)
|
|---|
| 1142 | /** VEX+ModR/M+/n: vvvv, r/m (memory) */
|
|---|
| 1143 | #define IEMOPFORM_VEX_VM_MEM (IEMOPFORM_VEX_VM | IEMOPFORM_NOT_MOD3)
|
|---|
| 1144 |
|
|---|
| 1145 | /** Fixed register instruction, no R/M. */
|
|---|
| 1146 | #define IEMOPFORM_FIXED 32
|
|---|
| 1147 |
|
|---|
| 1148 | /** The r/m is a register. */
|
|---|
| 1149 | #define IEMOPFORM_MOD3 RT_BIT_32(8)
|
|---|
| 1150 | /** The r/m is a memory access. */
|
|---|
| 1151 | #define IEMOPFORM_NOT_MOD3 RT_BIT_32(9)
|
|---|
| 1152 | /** @} */
|
|---|
| 1153 |
|
|---|
| 1154 | /** @name IEMOPHINT_XXX - Additional Opcode Hints
|
|---|
| 1155 | * @note These are ORed together with IEMOPFORM_XXX.
|
|---|
| 1156 | * @{ */
|
|---|
| 1157 | /** Ignores the operand size prefix (66h). */
|
|---|
| 1158 | #define IEMOPHINT_IGNORES_OZ_PFX RT_BIT_32(10)
|
|---|
| 1159 | /** Ignores REX.W (aka WIG). */
|
|---|
| 1160 | #define IEMOPHINT_IGNORES_REXW RT_BIT_32(11)
|
|---|
| 1161 | /** Both the operand size prefixes (66h + REX.W) are ignored. */
|
|---|
| 1162 | #define IEMOPHINT_IGNORES_OP_SIZES (IEMOPHINT_IGNORES_OZ_PFX | IEMOPHINT_IGNORES_REXW)
|
|---|
| 1163 | /** Allowed with the lock prefix. */
|
|---|
| 1164 | #define IEMOPHINT_LOCK_ALLOWED RT_BIT_32(11)
|
|---|
| 1165 | /** The VEX.L value is ignored (aka LIG). */
|
|---|
| 1166 | #define IEMOPHINT_VEX_L_IGNORED RT_BIT_32(12)
|
|---|
| 1167 | /** The VEX.L value must be zero (i.e. 128-bit width only). */
|
|---|
| 1168 | #define IEMOPHINT_VEX_L_ZERO RT_BIT_32(13)
|
|---|
| 1169 | /** The VEX.V value must be zero. */
|
|---|
| 1170 | #define IEMOPHINT_VEX_V_ZERO RT_BIT_32(14)
|
|---|
| 1171 |
|
|---|
| 1172 | /** Hint to IEMAllInstructionPython.py that this macro should be skipped. */
|
|---|
| 1173 | #define IEMOPHINT_SKIP_PYTHON RT_BIT_32(31)
|
|---|
| 1174 | /** @} */
|
|---|
| 1175 |
|
|---|
| 1176 | /**
|
|---|
| 1177 | * Possible hardware task switch sources.
|
|---|
| 1178 | */
|
|---|
| 1179 | typedef enum IEMTASKSWITCH
|
|---|
| 1180 | {
|
|---|
| 1181 | /** Task switch caused by an interrupt/exception. */
|
|---|
| 1182 | IEMTASKSWITCH_INT_XCPT = 1,
|
|---|
| 1183 | /** Task switch caused by a far CALL. */
|
|---|
| 1184 | IEMTASKSWITCH_CALL,
|
|---|
| 1185 | /** Task switch caused by a far JMP. */
|
|---|
| 1186 | IEMTASKSWITCH_JUMP,
|
|---|
| 1187 | /** Task switch caused by an IRET. */
|
|---|
| 1188 | IEMTASKSWITCH_IRET
|
|---|
| 1189 | } IEMTASKSWITCH;
|
|---|
| 1190 | AssertCompileSize(IEMTASKSWITCH, 4);
|
|---|
| 1191 |
|
|---|
| 1192 | /**
|
|---|
| 1193 | * Possible CrX load (write) sources.
|
|---|
| 1194 | */
|
|---|
| 1195 | typedef enum IEMACCESSCRX
|
|---|
| 1196 | {
|
|---|
| 1197 | /** CrX access caused by 'mov crX' instruction. */
|
|---|
| 1198 | IEMACCESSCRX_MOV_CRX,
|
|---|
| 1199 | /** CrX (CR0) write caused by 'lmsw' instruction. */
|
|---|
| 1200 | IEMACCESSCRX_LMSW,
|
|---|
| 1201 | /** CrX (CR0) write caused by 'clts' instruction. */
|
|---|
| 1202 | IEMACCESSCRX_CLTS,
|
|---|
| 1203 | /** CrX (CR0) read caused by 'smsw' instruction. */
|
|---|
| 1204 | IEMACCESSCRX_SMSW
|
|---|
| 1205 | } IEMACCESSCRX;
|
|---|
| 1206 |
|
|---|
| 1207 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
|---|
| 1208 | /** @name IEM_SLAT_FAIL_XXX - Second-level address translation failure information.
|
|---|
| 1209 | *
|
|---|
| 1210 | * These flags provide further context to SLAT page-walk failures that could not be
|
|---|
| 1211 | * determined by PGM (e.g, PGM is not privy to memory access permissions).
|
|---|
| 1212 | *
|
|---|
| 1213 | * @{
|
|---|
| 1214 | */
|
|---|
| 1215 | /** Translating a nested-guest linear address failed accessing a nested-guest
|
|---|
| 1216 | * physical address. */
|
|---|
| 1217 | # define IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR RT_BIT_32(0)
|
|---|
| 1218 | /** Translating a nested-guest linear address failed accessing a
|
|---|
| 1219 | * paging-structure entry or updating accessed/dirty bits. */
|
|---|
| 1220 | # define IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE RT_BIT_32(1)
|
|---|
| 1221 | /** @} */
|
|---|
| 1222 |
|
|---|
| 1223 | DECLCALLBACK(FNPGMPHYSHANDLER) iemVmxApicAccessPageHandler;
|
|---|
| 1224 | # ifndef IN_RING3
|
|---|
| 1225 | DECLCALLBACK(FNPGMRZPHYSPFHANDLER) iemVmxApicAccessPagePfHandler;
|
|---|
| 1226 | # endif
|
|---|
| 1227 | #endif
|
|---|
| 1228 |
|
|---|
| 1229 | /**
|
|---|
| 1230 | * Indicates to the verifier that the given flag set is undefined.
|
|---|
| 1231 | *
|
|---|
| 1232 | * Can be invoked again to add more flags.
|
|---|
| 1233 | *
|
|---|
| 1234 | * This is a NOOP if the verifier isn't compiled in.
|
|---|
| 1235 | *
|
|---|
| 1236 | * @note We're temporarily keeping this until code is converted to new
|
|---|
| 1237 | * disassembler style opcode handling.
|
|---|
| 1238 | */
|
|---|
| 1239 | #define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
|
|---|
| 1240 |
|
|---|
| 1241 |
|
|---|
| 1242 | /** @def IEM_DECL_IMPL_TYPE
|
|---|
| 1243 | * For typedef'ing an instruction implementation function.
|
|---|
| 1244 | *
|
|---|
| 1245 | * @param a_RetType The return type.
|
|---|
| 1246 | * @param a_Name The name of the type.
|
|---|
| 1247 | * @param a_ArgList The argument list enclosed in parentheses.
|
|---|
| 1248 | */
|
|---|
| 1249 |
|
|---|
| 1250 | /** @def IEM_DECL_IMPL_DEF
|
|---|
| 1251 | * For defining an instruction implementation function.
|
|---|
| 1252 | *
|
|---|
| 1253 | * @param a_RetType The return type.
|
|---|
| 1254 | * @param a_Name The name of the type.
|
|---|
| 1255 | * @param a_ArgList The argument list enclosed in parentheses.
|
|---|
| 1256 | */
|
|---|
| 1257 |
|
|---|
| 1258 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
|---|
| 1259 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1260 | __attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
|
|---|
| 1261 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1262 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
|---|
| 1263 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1264 | __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
|
|---|
| 1265 |
|
|---|
| 1266 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
|---|
| 1267 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1268 | a_RetType (__fastcall a_Name) a_ArgList
|
|---|
| 1269 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1270 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
|---|
| 1271 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1272 | a_RetType __fastcall a_Name a_ArgList RT_NOEXCEPT
|
|---|
| 1273 |
|
|---|
| 1274 | #elif __cplusplus >= 201700 /* P0012R1 support */
|
|---|
| 1275 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1276 | a_RetType (VBOXCALL a_Name) a_ArgList RT_NOEXCEPT
|
|---|
| 1277 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1278 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
|---|
| 1279 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1280 | a_RetType VBOXCALL a_Name a_ArgList RT_NOEXCEPT
|
|---|
| 1281 |
|
|---|
| 1282 | #else
|
|---|
| 1283 | # define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1284 | a_RetType (VBOXCALL a_Name) a_ArgList
|
|---|
| 1285 | # define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1286 | a_RetType VBOXCALL a_Name a_ArgList
|
|---|
| 1287 | # define IEM_DECL_IMPL_PROTO(a_RetType, a_Name, a_ArgList) \
|
|---|
| 1288 | a_RetType VBOXCALL a_Name a_ArgList
|
|---|
| 1289 |
|
|---|
| 1290 | #endif
|
|---|
| 1291 |
|
|---|
| 1292 | /** Defined in IEMAllAImplC.cpp but also used by IEMAllAImplA.asm. */
|
|---|
| 1293 | RT_C_DECLS_BEGIN
|
|---|
| 1294 | extern uint8_t const g_afParity[256];
|
|---|
| 1295 | RT_C_DECLS_END
|
|---|
| 1296 |
|
|---|
| 1297 |
|
|---|
| 1298 | /** @name Arithmetic assignment operations on bytes (binary).
|
|---|
| 1299 | * @{ */
|
|---|
| 1300 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t *pu8Dst, uint8_t u8Src, uint32_t *pEFlags));
|
|---|
| 1301 | typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
|
|---|
| 1302 | FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
|
|---|
| 1303 | FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
|
|---|
| 1304 | FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
|
|---|
| 1305 | FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
|
|---|
| 1306 | FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
|
|---|
| 1307 | FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
|
|---|
| 1308 | FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
|
|---|
| 1309 | /** @} */
|
|---|
| 1310 |
|
|---|
| 1311 | /** @name Arithmetic assignment operations on words (binary).
|
|---|
| 1312 | * @{ */
|
|---|
| 1313 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pEFlags));
|
|---|
| 1314 | typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
|
|---|
| 1315 | FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
|
|---|
| 1316 | FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
|
|---|
| 1317 | FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
|
|---|
| 1318 | FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
|
|---|
| 1319 | FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
|
|---|
| 1320 | FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
|
|---|
| 1321 | FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
|
|---|
| 1322 | /** @} */
|
|---|
| 1323 |
|
|---|
| 1324 | /** @name Arithmetic assignment operations on double words (binary).
|
|---|
| 1325 | * @{ */
|
|---|
| 1326 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t *pu32Dst, uint32_t u32Src, uint32_t *pEFlags));
|
|---|
| 1327 | typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
|
|---|
| 1328 | FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
|
|---|
| 1329 | FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
|
|---|
| 1330 | FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
|
|---|
| 1331 | FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
|
|---|
| 1332 | FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
|
|---|
| 1333 | FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
|
|---|
| 1334 | FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
|
|---|
| 1335 | FNIEMAIMPLBINU32 iemAImpl_blsi_u32, iemAImpl_blsi_u32_fallback;
|
|---|
| 1336 | FNIEMAIMPLBINU32 iemAImpl_blsr_u32, iemAImpl_blsr_u32_fallback;
|
|---|
| 1337 | FNIEMAIMPLBINU32 iemAImpl_blsmsk_u32, iemAImpl_blsmsk_u32_fallback;
|
|---|
| 1338 | /** @} */
|
|---|
| 1339 |
|
|---|
| 1340 | /** @name Arithmetic assignment operations on quad words (binary).
|
|---|
| 1341 | * @{ */
|
|---|
| 1342 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t *pu64Dst, uint64_t u64Src, uint32_t *pEFlags));
|
|---|
| 1343 | typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
|
|---|
| 1344 | FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
|
|---|
| 1345 | FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
|
|---|
| 1346 | FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
|
|---|
| 1347 | FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
|
|---|
| 1348 | FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
|
|---|
| 1349 | FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
|
|---|
| 1350 | FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
|
|---|
| 1351 | FNIEMAIMPLBINU64 iemAImpl_blsi_u64, iemAImpl_blsi_u64_fallback;
|
|---|
| 1352 | FNIEMAIMPLBINU64 iemAImpl_blsr_u64, iemAImpl_blsr_u64_fallback;
|
|---|
| 1353 | FNIEMAIMPLBINU64 iemAImpl_blsmsk_u64, iemAImpl_blsmsk_u64_fallback;
|
|---|
| 1354 | /** @} */
|
|---|
| 1355 |
|
|---|
| 1356 | /** @name Compare operations (thrown in with the binary ops).
|
|---|
| 1357 | * @{ */
|
|---|
| 1358 | FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
|
|---|
| 1359 | FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
|
|---|
| 1360 | FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
|
|---|
| 1361 | FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
|
|---|
| 1362 | /** @} */
|
|---|
| 1363 |
|
|---|
| 1364 | /** @name Test operations (thrown in with the binary ops).
|
|---|
| 1365 | * @{ */
|
|---|
| 1366 | FNIEMAIMPLBINU8 iemAImpl_test_u8;
|
|---|
| 1367 | FNIEMAIMPLBINU16 iemAImpl_test_u16;
|
|---|
| 1368 | FNIEMAIMPLBINU32 iemAImpl_test_u32;
|
|---|
| 1369 | FNIEMAIMPLBINU64 iemAImpl_test_u64;
|
|---|
| 1370 | /** @} */
|
|---|
| 1371 |
|
|---|
| 1372 | /** @name Bit operations operations (thrown in with the binary ops).
|
|---|
| 1373 | * @{ */
|
|---|
| 1374 | FNIEMAIMPLBINU16 iemAImpl_bt_u16;
|
|---|
| 1375 | FNIEMAIMPLBINU32 iemAImpl_bt_u32;
|
|---|
| 1376 | FNIEMAIMPLBINU64 iemAImpl_bt_u64;
|
|---|
| 1377 | FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
|
|---|
| 1378 | FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
|
|---|
| 1379 | FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
|
|---|
| 1380 | FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
|
|---|
| 1381 | FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
|
|---|
| 1382 | FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
|
|---|
| 1383 | FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
|
|---|
| 1384 | FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
|
|---|
| 1385 | FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
|
|---|
| 1386 | /** @} */
|
|---|
| 1387 |
|
|---|
| 1388 | /** @name Arithmetic three operand operations on double words (binary).
|
|---|
| 1389 | * @{ */
|
|---|
| 1390 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2, uint32_t *pEFlags));
|
|---|
| 1391 | typedef FNIEMAIMPLBINVEXU32 *PFNIEMAIMPLBINVEXU32;
|
|---|
| 1392 | FNIEMAIMPLBINVEXU32 iemAImpl_andn_u32, iemAImpl_andn_u32_fallback;
|
|---|
| 1393 | FNIEMAIMPLBINVEXU32 iemAImpl_bextr_u32, iemAImpl_bextr_u32_fallback;
|
|---|
| 1394 | FNIEMAIMPLBINVEXU32 iemAImpl_bzhi_u32, iemAImpl_bzhi_u32_fallback;
|
|---|
| 1395 | /** @} */
|
|---|
| 1396 |
|
|---|
| 1397 | /** @name Arithmetic three operand operations on quad words (binary).
|
|---|
| 1398 | * @{ */
|
|---|
| 1399 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2, uint32_t *pEFlags));
|
|---|
| 1400 | typedef FNIEMAIMPLBINVEXU64 *PFNIEMAIMPLBINVEXU64;
|
|---|
| 1401 | FNIEMAIMPLBINVEXU64 iemAImpl_andn_u64, iemAImpl_andn_u64_fallback;
|
|---|
| 1402 | FNIEMAIMPLBINVEXU64 iemAImpl_bextr_u64, iemAImpl_bextr_u64_fallback;
|
|---|
| 1403 | FNIEMAIMPLBINVEXU64 iemAImpl_bzhi_u64, iemAImpl_bzhi_u64_fallback;
|
|---|
| 1404 | /** @} */
|
|---|
| 1405 |
|
|---|
| 1406 | /** @name Arithmetic three operand operations on double words w/o EFLAGS (binary).
|
|---|
| 1407 | * @{ */
|
|---|
| 1408 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU32NOEFL, (uint32_t *pu32Dst, uint32_t u32Src1, uint32_t u32Src2));
|
|---|
| 1409 | typedef FNIEMAIMPLBINVEXU32NOEFL *PFNIEMAIMPLBINVEXU32NOEFL;
|
|---|
| 1410 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pdep_u32, iemAImpl_pdep_u32_fallback;
|
|---|
| 1411 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_pext_u32, iemAImpl_pext_u32_fallback;
|
|---|
| 1412 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_sarx_u32, iemAImpl_sarx_u32_fallback;
|
|---|
| 1413 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shlx_u32, iemAImpl_shlx_u32_fallback;
|
|---|
| 1414 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_shrx_u32, iemAImpl_shrx_u32_fallback;
|
|---|
| 1415 | FNIEMAIMPLBINVEXU32NOEFL iemAImpl_rorx_u32;
|
|---|
| 1416 | /** @} */
|
|---|
| 1417 |
|
|---|
| 1418 | /** @name Arithmetic three operand operations on quad words w/o EFLAGS (binary).
|
|---|
| 1419 | * @{ */
|
|---|
| 1420 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINVEXU64NOEFL, (uint64_t *pu64Dst, uint64_t u64Src1, uint64_t u64Src2));
|
|---|
| 1421 | typedef FNIEMAIMPLBINVEXU64NOEFL *PFNIEMAIMPLBINVEXU64NOEFL;
|
|---|
| 1422 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pdep_u64, iemAImpl_pdep_u64_fallback;
|
|---|
| 1423 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_pext_u64, iemAImpl_pext_u64_fallback;
|
|---|
| 1424 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_sarx_u64, iemAImpl_sarx_u64_fallback;
|
|---|
| 1425 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shlx_u64, iemAImpl_shlx_u64_fallback;
|
|---|
| 1426 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_shrx_u64, iemAImpl_shrx_u64_fallback;
|
|---|
| 1427 | FNIEMAIMPLBINVEXU64NOEFL iemAImpl_rorx_u64;
|
|---|
| 1428 | /** @} */
|
|---|
| 1429 |
|
|---|
| 1430 | /** @name MULX 32-bit and 64-bit.
|
|---|
| 1431 | * @{ */
|
|---|
| 1432 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU32, (uint32_t *puDst1, uint32_t *puDst2, uint32_t uSrc1, uint32_t uSrc2));
|
|---|
| 1433 | typedef FNIEMAIMPLMULXVEXU32 *PFNIEMAIMPLMULXVEXU32;
|
|---|
| 1434 | FNIEMAIMPLMULXVEXU32 iemAImpl_mulx_u32, iemAImpl_mulx_u32_fallback;
|
|---|
| 1435 |
|
|---|
| 1436 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMULXVEXU64, (uint64_t *puDst1, uint64_t *puDst2, uint64_t uSrc1, uint64_t uSrc2));
|
|---|
| 1437 | typedef FNIEMAIMPLMULXVEXU64 *PFNIEMAIMPLMULXVEXU64;
|
|---|
| 1438 | FNIEMAIMPLMULXVEXU64 iemAImpl_mulx_u64, iemAImpl_mulx_u64_fallback;
|
|---|
| 1439 | /** @} */
|
|---|
| 1440 |
|
|---|
| 1441 |
|
|---|
| 1442 | /** @name Exchange memory with register operations.
|
|---|
| 1443 | * @{ */
|
|---|
| 1444 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_locked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
|---|
| 1445 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_locked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
|---|
| 1446 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_locked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
|---|
| 1447 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_locked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
|---|
| 1448 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8_unlocked, (uint8_t *pu8Mem, uint8_t *pu8Reg));
|
|---|
| 1449 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16_unlocked,(uint16_t *pu16Mem, uint16_t *pu16Reg));
|
|---|
| 1450 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32_unlocked,(uint32_t *pu32Mem, uint32_t *pu32Reg));
|
|---|
| 1451 | IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64_unlocked,(uint64_t *pu64Mem, uint64_t *pu64Reg));
|
|---|
| 1452 | /** @} */
|
|---|
| 1453 |
|
|---|
| 1454 | /** @name Exchange and add operations.
|
|---|
| 1455 | * @{ */
|
|---|
| 1456 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
|---|
| 1457 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
|---|
| 1458 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
|---|
| 1459 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
|---|
| 1460 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
|
|---|
| 1461 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
|
|---|
| 1462 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
|
|---|
| 1463 | IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
|
|---|
| 1464 | /** @} */
|
|---|
| 1465 |
|
|---|
| 1466 | /** @name Compare and exchange.
|
|---|
| 1467 | * @{ */
|
|---|
| 1468 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1469 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u8_locked, (uint8_t *pu8Dst, uint8_t *puAl, uint8_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1470 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16, (uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1471 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u16_locked,(uint16_t *pu16Dst, uint16_t *puAx, uint16_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1472 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32, (uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1473 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u32_locked,(uint32_t *pu32Dst, uint32_t *puEax, uint32_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1474 | #if ARCH_BITS == 32
|
|---|
| 1475 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
|---|
| 1476 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t *puSrcReg, uint32_t *pEFlags));
|
|---|
| 1477 | #else
|
|---|
| 1478 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64, (uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1479 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg_u64_locked,(uint64_t *pu64Dst, uint64_t *puRax, uint64_t uSrcReg, uint32_t *pEFlags));
|
|---|
| 1480 | #endif
|
|---|
| 1481 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
|---|
| 1482 | uint32_t *pEFlags));
|
|---|
| 1483 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg8b_locked,(uint64_t *pu64Dst, PRTUINT64U pu64EaxEdx, PRTUINT64U pu64EbxEcx,
|
|---|
| 1484 | uint32_t *pEFlags));
|
|---|
| 1485 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
|---|
| 1486 | uint32_t *pEFlags));
|
|---|
| 1487 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_locked,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx, PRTUINT128U pu128RbxRcx,
|
|---|
| 1488 | uint32_t *pEFlags));
|
|---|
| 1489 | #ifndef RT_ARCH_ARM64
|
|---|
| 1490 | IEM_DECL_IMPL_DEF(void, iemAImpl_cmpxchg16b_fallback,(PRTUINT128U pu128Dst, PRTUINT128U pu128RaxRdx,
|
|---|
| 1491 | PRTUINT128U pu128RbxRcx, uint32_t *pEFlags));
|
|---|
| 1492 | #endif
|
|---|
| 1493 | /** @} */
|
|---|
| 1494 |
|
|---|
| 1495 | /** @name Memory ordering
|
|---|
| 1496 | * @{ */
|
|---|
| 1497 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEMFENCE,(void));
|
|---|
| 1498 | typedef FNIEMAIMPLMEMFENCE *PFNIEMAIMPLMEMFENCE;
|
|---|
| 1499 | IEM_DECL_IMPL_DEF(void, iemAImpl_mfence,(void));
|
|---|
| 1500 | IEM_DECL_IMPL_DEF(void, iemAImpl_sfence,(void));
|
|---|
| 1501 | IEM_DECL_IMPL_DEF(void, iemAImpl_lfence,(void));
|
|---|
| 1502 | #ifndef RT_ARCH_ARM64
|
|---|
| 1503 | IEM_DECL_IMPL_DEF(void, iemAImpl_alt_mem_fence,(void));
|
|---|
| 1504 | #endif
|
|---|
| 1505 | /** @} */
|
|---|
| 1506 |
|
|---|
| 1507 | /** @name Double precision shifts
|
|---|
| 1508 | * @{ */
|
|---|
| 1509 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t *pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1510 | typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
|
|---|
| 1511 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t *pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1512 | typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
|
|---|
| 1513 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1514 | typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
|
|---|
| 1515 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16, iemAImpl_shld_u16_amd, iemAImpl_shld_u16_intel;
|
|---|
| 1516 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32, iemAImpl_shld_u32_amd, iemAImpl_shld_u32_intel;
|
|---|
| 1517 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64, iemAImpl_shld_u64_amd, iemAImpl_shld_u64_intel;
|
|---|
| 1518 | FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16, iemAImpl_shrd_u16_amd, iemAImpl_shrd_u16_intel;
|
|---|
| 1519 | FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32, iemAImpl_shrd_u32_amd, iemAImpl_shrd_u32_intel;
|
|---|
| 1520 | FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64, iemAImpl_shrd_u64_amd, iemAImpl_shrd_u64_intel;
|
|---|
| 1521 | /** @} */
|
|---|
| 1522 |
|
|---|
| 1523 |
|
|---|
| 1524 | /** @name Bit search operations (thrown in with the binary ops).
|
|---|
| 1525 | * @{ */
|
|---|
| 1526 | FNIEMAIMPLBINU16 iemAImpl_bsf_u16, iemAImpl_bsf_u16_amd, iemAImpl_bsf_u16_intel;
|
|---|
| 1527 | FNIEMAIMPLBINU32 iemAImpl_bsf_u32, iemAImpl_bsf_u32_amd, iemAImpl_bsf_u32_intel;
|
|---|
| 1528 | FNIEMAIMPLBINU64 iemAImpl_bsf_u64, iemAImpl_bsf_u64_amd, iemAImpl_bsf_u64_intel;
|
|---|
| 1529 | FNIEMAIMPLBINU16 iemAImpl_bsr_u16, iemAImpl_bsr_u16_amd, iemAImpl_bsr_u16_intel;
|
|---|
| 1530 | FNIEMAIMPLBINU32 iemAImpl_bsr_u32, iemAImpl_bsr_u32_amd, iemAImpl_bsr_u32_intel;
|
|---|
| 1531 | FNIEMAIMPLBINU64 iemAImpl_bsr_u64, iemAImpl_bsr_u64_amd, iemAImpl_bsr_u64_intel;
|
|---|
| 1532 | FNIEMAIMPLBINU16 iemAImpl_lzcnt_u16, iemAImpl_lzcnt_u16_amd, iemAImpl_lzcnt_u16_intel;
|
|---|
| 1533 | FNIEMAIMPLBINU32 iemAImpl_lzcnt_u32, iemAImpl_lzcnt_u32_amd, iemAImpl_lzcnt_u32_intel;
|
|---|
| 1534 | FNIEMAIMPLBINU64 iemAImpl_lzcnt_u64, iemAImpl_lzcnt_u64_amd, iemAImpl_lzcnt_u64_intel;
|
|---|
| 1535 | FNIEMAIMPLBINU16 iemAImpl_tzcnt_u16, iemAImpl_tzcnt_u16_amd, iemAImpl_tzcnt_u16_intel;
|
|---|
| 1536 | FNIEMAIMPLBINU32 iemAImpl_tzcnt_u32, iemAImpl_tzcnt_u32_amd, iemAImpl_tzcnt_u32_intel;
|
|---|
| 1537 | FNIEMAIMPLBINU64 iemAImpl_tzcnt_u64, iemAImpl_tzcnt_u64_amd, iemAImpl_tzcnt_u64_intel;
|
|---|
| 1538 | FNIEMAIMPLBINU16 iemAImpl_popcnt_u16, iemAImpl_popcnt_u16_fallback;
|
|---|
| 1539 | FNIEMAIMPLBINU32 iemAImpl_popcnt_u32, iemAImpl_popcnt_u32_fallback;
|
|---|
| 1540 | FNIEMAIMPLBINU64 iemAImpl_popcnt_u64, iemAImpl_popcnt_u64_fallback;
|
|---|
| 1541 | /** @} */
|
|---|
| 1542 |
|
|---|
| 1543 | /** @name Signed multiplication operations (thrown in with the binary ops).
|
|---|
| 1544 | * @{ */
|
|---|
| 1545 | FNIEMAIMPLBINU16 iemAImpl_imul_two_u16, iemAImpl_imul_two_u16_amd, iemAImpl_imul_two_u16_intel;
|
|---|
| 1546 | FNIEMAIMPLBINU32 iemAImpl_imul_two_u32, iemAImpl_imul_two_u32_amd, iemAImpl_imul_two_u32_intel;
|
|---|
| 1547 | FNIEMAIMPLBINU64 iemAImpl_imul_two_u64, iemAImpl_imul_two_u64_amd, iemAImpl_imul_two_u64_intel;
|
|---|
| 1548 | /** @} */
|
|---|
| 1549 |
|
|---|
| 1550 | /** @name Arithmetic assignment operations on bytes (unary).
|
|---|
| 1551 | * @{ */
|
|---|
| 1552 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t *pu8Dst, uint32_t *pEFlags));
|
|---|
| 1553 | typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
|
|---|
| 1554 | FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
|
|---|
| 1555 | FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
|
|---|
| 1556 | FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
|
|---|
| 1557 | FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
|
|---|
| 1558 | /** @} */
|
|---|
| 1559 |
|
|---|
| 1560 | /** @name Arithmetic assignment operations on words (unary).
|
|---|
| 1561 | * @{ */
|
|---|
| 1562 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t *pu16Dst, uint32_t *pEFlags));
|
|---|
| 1563 | typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
|
|---|
| 1564 | FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
|
|---|
| 1565 | FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
|
|---|
| 1566 | FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
|
|---|
| 1567 | FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
|
|---|
| 1568 | /** @} */
|
|---|
| 1569 |
|
|---|
| 1570 | /** @name Arithmetic assignment operations on double words (unary).
|
|---|
| 1571 | * @{ */
|
|---|
| 1572 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t *pu32Dst, uint32_t *pEFlags));
|
|---|
| 1573 | typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
|
|---|
| 1574 | FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
|
|---|
| 1575 | FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
|
|---|
| 1576 | FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
|
|---|
| 1577 | FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
|
|---|
| 1578 | /** @} */
|
|---|
| 1579 |
|
|---|
| 1580 | /** @name Arithmetic assignment operations on quad words (unary).
|
|---|
| 1581 | * @{ */
|
|---|
| 1582 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t *pu64Dst, uint32_t *pEFlags));
|
|---|
| 1583 | typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
|
|---|
| 1584 | FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
|
|---|
| 1585 | FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
|
|---|
| 1586 | FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
|
|---|
| 1587 | FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
|
|---|
| 1588 | /** @} */
|
|---|
| 1589 |
|
|---|
| 1590 |
|
|---|
| 1591 | /** @name Shift operations on bytes (Group 2).
|
|---|
| 1592 | * @{ */
|
|---|
| 1593 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t *pu8Dst, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1594 | typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
|
|---|
| 1595 | FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8, iemAImpl_rol_u8_amd, iemAImpl_rol_u8_intel;
|
|---|
| 1596 | FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8, iemAImpl_ror_u8_amd, iemAImpl_ror_u8_intel;
|
|---|
| 1597 | FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8, iemAImpl_rcl_u8_amd, iemAImpl_rcl_u8_intel;
|
|---|
| 1598 | FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8, iemAImpl_rcr_u8_amd, iemAImpl_rcr_u8_intel;
|
|---|
| 1599 | FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8, iemAImpl_shl_u8_amd, iemAImpl_shl_u8_intel;
|
|---|
| 1600 | FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8, iemAImpl_shr_u8_amd, iemAImpl_shr_u8_intel;
|
|---|
| 1601 | FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8, iemAImpl_sar_u8_amd, iemAImpl_sar_u8_intel;
|
|---|
| 1602 | /** @} */
|
|---|
| 1603 |
|
|---|
| 1604 | /** @name Shift operations on words (Group 2).
|
|---|
| 1605 | * @{ */
|
|---|
| 1606 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t *pu16Dst, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1607 | typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
|
|---|
| 1608 | FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16, iemAImpl_rol_u16_amd, iemAImpl_rol_u16_intel;
|
|---|
| 1609 | FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16, iemAImpl_ror_u16_amd, iemAImpl_ror_u16_intel;
|
|---|
| 1610 | FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16, iemAImpl_rcl_u16_amd, iemAImpl_rcl_u16_intel;
|
|---|
| 1611 | FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16, iemAImpl_rcr_u16_amd, iemAImpl_rcr_u16_intel;
|
|---|
| 1612 | FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16, iemAImpl_shl_u16_amd, iemAImpl_shl_u16_intel;
|
|---|
| 1613 | FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16, iemAImpl_shr_u16_amd, iemAImpl_shr_u16_intel;
|
|---|
| 1614 | FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16, iemAImpl_sar_u16_amd, iemAImpl_sar_u16_intel;
|
|---|
| 1615 | /** @} */
|
|---|
| 1616 |
|
|---|
| 1617 | /** @name Shift operations on double words (Group 2).
|
|---|
| 1618 | * @{ */
|
|---|
| 1619 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t *pu32Dst, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1620 | typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
|
|---|
| 1621 | FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32, iemAImpl_rol_u32_amd, iemAImpl_rol_u32_intel;
|
|---|
| 1622 | FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32, iemAImpl_ror_u32_amd, iemAImpl_ror_u32_intel;
|
|---|
| 1623 | FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32, iemAImpl_rcl_u32_amd, iemAImpl_rcl_u32_intel;
|
|---|
| 1624 | FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32, iemAImpl_rcr_u32_amd, iemAImpl_rcr_u32_intel;
|
|---|
| 1625 | FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32, iemAImpl_shl_u32_amd, iemAImpl_shl_u32_intel;
|
|---|
| 1626 | FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32, iemAImpl_shr_u32_amd, iemAImpl_shr_u32_intel;
|
|---|
| 1627 | FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32, iemAImpl_sar_u32_amd, iemAImpl_sar_u32_intel;
|
|---|
| 1628 | /** @} */
|
|---|
| 1629 |
|
|---|
| 1630 | /** @name Shift operations on words (Group 2).
|
|---|
| 1631 | * @{ */
|
|---|
| 1632 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t *pu64Dst, uint8_t cShift, uint32_t *pEFlags));
|
|---|
| 1633 | typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
|
|---|
| 1634 | FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64, iemAImpl_rol_u64_amd, iemAImpl_rol_u64_intel;
|
|---|
| 1635 | FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64, iemAImpl_ror_u64_amd, iemAImpl_ror_u64_intel;
|
|---|
| 1636 | FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64, iemAImpl_rcl_u64_amd, iemAImpl_rcl_u64_intel;
|
|---|
| 1637 | FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64, iemAImpl_rcr_u64_amd, iemAImpl_rcr_u64_intel;
|
|---|
| 1638 | FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64, iemAImpl_shl_u64_amd, iemAImpl_shl_u64_intel;
|
|---|
| 1639 | FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64, iemAImpl_shr_u64_amd, iemAImpl_shr_u64_intel;
|
|---|
| 1640 | FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64, iemAImpl_sar_u64_amd, iemAImpl_sar_u64_intel;
|
|---|
| 1641 | /** @} */
|
|---|
| 1642 |
|
|---|
| 1643 | /** @name Multiplication and division operations.
|
|---|
| 1644 | * @{ */
|
|---|
| 1645 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t *pu16AX, uint8_t u8FactorDivisor, uint32_t *pEFlags));
|
|---|
| 1646 | typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
|
|---|
| 1647 | FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_mul_u8_amd, iemAImpl_mul_u8_intel;
|
|---|
| 1648 | FNIEMAIMPLMULDIVU8 iemAImpl_imul_u8, iemAImpl_imul_u8_amd, iemAImpl_imul_u8_intel;
|
|---|
| 1649 | FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_div_u8_amd, iemAImpl_div_u8_intel;
|
|---|
| 1650 | FNIEMAIMPLMULDIVU8 iemAImpl_idiv_u8, iemAImpl_idiv_u8_amd, iemAImpl_idiv_u8_intel;
|
|---|
| 1651 |
|
|---|
| 1652 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t *pu16AX, uint16_t *pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
|
|---|
| 1653 | typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
|
|---|
| 1654 | FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_mul_u16_amd, iemAImpl_mul_u16_intel;
|
|---|
| 1655 | FNIEMAIMPLMULDIVU16 iemAImpl_imul_u16, iemAImpl_imul_u16_amd, iemAImpl_imul_u16_intel;
|
|---|
| 1656 | FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_div_u16_amd, iemAImpl_div_u16_intel;
|
|---|
| 1657 | FNIEMAIMPLMULDIVU16 iemAImpl_idiv_u16, iemAImpl_idiv_u16_amd, iemAImpl_idiv_u16_intel;
|
|---|
| 1658 |
|
|---|
| 1659 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t *pu32EAX, uint32_t *pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
|
|---|
| 1660 | typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
|
|---|
| 1661 | FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_mul_u32_amd, iemAImpl_mul_u32_intel;
|
|---|
| 1662 | FNIEMAIMPLMULDIVU32 iemAImpl_imul_u32, iemAImpl_imul_u32_amd, iemAImpl_imul_u32_intel;
|
|---|
| 1663 | FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_div_u32_amd, iemAImpl_div_u32_intel;
|
|---|
| 1664 | FNIEMAIMPLMULDIVU32 iemAImpl_idiv_u32, iemAImpl_idiv_u32_amd, iemAImpl_idiv_u32_intel;
|
|---|
| 1665 |
|
|---|
| 1666 | typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
|
|---|
| 1667 | typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
|
|---|
| 1668 | FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_mul_u64_amd, iemAImpl_mul_u64_intel;
|
|---|
| 1669 | FNIEMAIMPLMULDIVU64 iemAImpl_imul_u64, iemAImpl_imul_u64_amd, iemAImpl_imul_u64_intel;
|
|---|
| 1670 | FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_div_u64_amd, iemAImpl_div_u64_intel;
|
|---|
| 1671 | FNIEMAIMPLMULDIVU64 iemAImpl_idiv_u64, iemAImpl_idiv_u64_amd, iemAImpl_idiv_u64_intel;
|
|---|
| 1672 | /** @} */
|
|---|
| 1673 |
|
|---|
| 1674 | /** @name Byte Swap.
|
|---|
| 1675 | * @{ */
|
|---|
| 1676 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
|
|---|
| 1677 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
|
|---|
| 1678 | IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
|
|---|
| 1679 | /** @} */
|
|---|
| 1680 |
|
|---|
| 1681 | /** @name Misc.
|
|---|
| 1682 | * @{ */
|
|---|
| 1683 | FNIEMAIMPLBINU16 iemAImpl_arpl;
|
|---|
| 1684 | /** @} */
|
|---|
| 1685 |
|
|---|
| 1686 | /** @name RDRAND and RDSEED
|
|---|
| 1687 | * @{ */
|
|---|
| 1688 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU16,(uint16_t *puDst, uint32_t *pEFlags));
|
|---|
| 1689 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU32,(uint32_t *puDst, uint32_t *pEFlags));
|
|---|
| 1690 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU64,(uint64_t *puDst, uint32_t *pEFlags));
|
|---|
| 1691 | typedef FNIEMAIMPLRDRANDSEEDU16 *FNIEMAIMPLPRDRANDSEEDU16;
|
|---|
| 1692 | typedef FNIEMAIMPLRDRANDSEEDU32 *FNIEMAIMPLPRDRANDSEEDU32;
|
|---|
| 1693 | typedef FNIEMAIMPLRDRANDSEEDU64 *FNIEMAIMPLPRDRANDSEEDU64;
|
|---|
| 1694 |
|
|---|
| 1695 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdrand_u16, iemAImpl_rdrand_u16_fallback;
|
|---|
| 1696 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdrand_u32, iemAImpl_rdrand_u32_fallback;
|
|---|
| 1697 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdrand_u64, iemAImpl_rdrand_u64_fallback;
|
|---|
| 1698 | FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdseed_u16, iemAImpl_rdseed_u16_fallback;
|
|---|
| 1699 | FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdseed_u32, iemAImpl_rdseed_u32_fallback;
|
|---|
| 1700 | FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdseed_u64, iemAImpl_rdseed_u64_fallback;
|
|---|
| 1701 | /** @} */
|
|---|
| 1702 |
|
|---|
| 1703 | /** @name ADOX and ADCX
|
|---|
| 1704 | * @{ */
|
|---|
| 1705 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLADXU32,(uint32_t *puDst, uint32_t *pfEFlags, uint32_t uSrc));
|
|---|
| 1706 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLADXU64,(uint64_t *puDst, uint32_t *pfEFlags, uint64_t uSrc));
|
|---|
| 1707 | typedef FNIEMAIMPLADXU32 *PFNIEMAIMPLADXU32;
|
|---|
| 1708 | typedef FNIEMAIMPLADXU64 *PFNIEMAIMPLADXU64;
|
|---|
| 1709 |
|
|---|
| 1710 | FNIEMAIMPLADXU32 iemAImpl_adcx_u32, iemAImpl_adcx_u32_fallback;
|
|---|
| 1711 | FNIEMAIMPLADXU64 iemAImpl_adcx_u64, iemAImpl_adcx_u64_fallback;
|
|---|
| 1712 | FNIEMAIMPLADXU32 iemAImpl_adox_u32, iemAImpl_adox_u32_fallback;
|
|---|
| 1713 | FNIEMAIMPLADXU64 iemAImpl_adox_u64, iemAImpl_adox_u64_fallback;
|
|---|
| 1714 | /** @} */
|
|---|
| 1715 |
|
|---|
| 1716 | /** @name FPU operations taking a 32-bit float argument
|
|---|
| 1717 | * @{ */
|
|---|
| 1718 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
|---|
| 1719 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
|---|
| 1720 | typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
|
|---|
| 1721 |
|
|---|
| 1722 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
|---|
| 1723 | PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
|
|---|
| 1724 | typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
|
|---|
| 1725 |
|
|---|
| 1726 | FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
|
|---|
| 1727 | FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
|
|---|
| 1728 | FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
|
|---|
| 1729 | FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
|
|---|
| 1730 | FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
|
|---|
| 1731 | FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
|
|---|
| 1732 | FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
|
|---|
| 1733 |
|
|---|
| 1734 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
|
|---|
| 1735 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
|---|
| 1736 | PRTFLOAT32U pr32Val, PCRTFLOAT80U pr80Val));
|
|---|
| 1737 | /** @} */
|
|---|
| 1738 |
|
|---|
| 1739 | /** @name FPU operations taking a 64-bit float argument
|
|---|
| 1740 | * @{ */
|
|---|
| 1741 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
|---|
| 1742 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
|---|
| 1743 | typedef FNIEMAIMPLFPUR64FSW *PFNIEMAIMPLFPUR64FSW;
|
|---|
| 1744 |
|
|---|
| 1745 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
|---|
| 1746 | PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
|
|---|
| 1747 | typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
|
|---|
| 1748 |
|
|---|
| 1749 | FNIEMAIMPLFPUR64FSW iemAImpl_fcom_r80_by_r64;
|
|---|
| 1750 | FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
|
|---|
| 1751 | FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
|
|---|
| 1752 | FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
|
|---|
| 1753 | FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
|
|---|
| 1754 | FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
|
|---|
| 1755 | FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
|
|---|
| 1756 |
|
|---|
| 1757 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
|
|---|
| 1758 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
|---|
| 1759 | PRTFLOAT64U pr32Val, PCRTFLOAT80U pr80Val));
|
|---|
| 1760 | /** @} */
|
|---|
| 1761 |
|
|---|
| 1762 | /** @name FPU operations taking a 80-bit float argument
|
|---|
| 1763 | * @{ */
|
|---|
| 1764 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
|---|
| 1765 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
|---|
| 1766 | typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
|
|---|
| 1767 | FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
|
|---|
| 1768 | FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
|
|---|
| 1769 | FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
|
|---|
| 1770 | FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
|
|---|
| 1771 | FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
|
|---|
| 1772 | FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
|
|---|
| 1773 | FNIEMAIMPLFPUR80 iemAImpl_fprem_r80_by_r80;
|
|---|
| 1774 | FNIEMAIMPLFPUR80 iemAImpl_fprem1_r80_by_r80;
|
|---|
| 1775 | FNIEMAIMPLFPUR80 iemAImpl_fscale_r80_by_r80;
|
|---|
| 1776 |
|
|---|
| 1777 | FNIEMAIMPLFPUR80 iemAImpl_fpatan_r80_by_r80, iemAImpl_fpatan_r80_by_r80_amd, iemAImpl_fpatan_r80_by_r80_intel;
|
|---|
| 1778 | FNIEMAIMPLFPUR80 iemAImpl_fyl2x_r80_by_r80, iemAImpl_fyl2x_r80_by_r80_amd, iemAImpl_fyl2x_r80_by_r80_intel;
|
|---|
| 1779 | FNIEMAIMPLFPUR80 iemAImpl_fyl2xp1_r80_by_r80, iemAImpl_fyl2xp1_r80_by_r80_amd, iemAImpl_fyl2xp1_r80_by_r80_intel;
|
|---|
| 1780 |
|
|---|
| 1781 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
|---|
| 1782 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
|---|
| 1783 | typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
|
|---|
| 1784 | FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
|
|---|
| 1785 | FNIEMAIMPLFPUR80FSW iemAImpl_fucom_r80_by_r80;
|
|---|
| 1786 |
|
|---|
| 1787 | typedef IEM_DECL_IMPL_TYPE(uint32_t, FNIEMAIMPLFPUR80EFL,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw,
|
|---|
| 1788 | PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
|
|---|
| 1789 | typedef FNIEMAIMPLFPUR80EFL *PFNIEMAIMPLFPUR80EFL;
|
|---|
| 1790 | FNIEMAIMPLFPUR80EFL iemAImpl_fcomi_r80_by_r80;
|
|---|
| 1791 | FNIEMAIMPLFPUR80EFL iemAImpl_fucomi_r80_by_r80;
|
|---|
| 1792 |
|
|---|
| 1793 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARY,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
|---|
| 1794 | typedef FNIEMAIMPLFPUR80UNARY *PFNIEMAIMPLFPUR80UNARY;
|
|---|
| 1795 | FNIEMAIMPLFPUR80UNARY iemAImpl_fabs_r80;
|
|---|
| 1796 | FNIEMAIMPLFPUR80UNARY iemAImpl_fchs_r80;
|
|---|
| 1797 | FNIEMAIMPLFPUR80UNARY iemAImpl_f2xm1_r80, iemAImpl_f2xm1_r80_amd, iemAImpl_f2xm1_r80_intel;
|
|---|
| 1798 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsqrt_r80;
|
|---|
| 1799 | FNIEMAIMPLFPUR80UNARY iemAImpl_frndint_r80;
|
|---|
| 1800 | FNIEMAIMPLFPUR80UNARY iemAImpl_fsin_r80, iemAImpl_fsin_r80_amd, iemAImpl_fsin_r80_intel;
|
|---|
| 1801 | FNIEMAIMPLFPUR80UNARY iemAImpl_fcos_r80, iemAImpl_fcos_r80_amd, iemAImpl_fcos_r80_intel;
|
|---|
| 1802 |
|
|---|
| 1803 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYFSW,(PCX86FXSTATE pFpuState, uint16_t *pu16Fsw, PCRTFLOAT80U pr80Val));
|
|---|
| 1804 | typedef FNIEMAIMPLFPUR80UNARYFSW *PFNIEMAIMPLFPUR80UNARYFSW;
|
|---|
| 1805 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_ftst_r80;
|
|---|
| 1806 | FNIEMAIMPLFPUR80UNARYFSW iemAImpl_fxam_r80;
|
|---|
| 1807 |
|
|---|
| 1808 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80LDCONST,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes));
|
|---|
| 1809 | typedef FNIEMAIMPLFPUR80LDCONST *PFNIEMAIMPLFPUR80LDCONST;
|
|---|
| 1810 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fld1;
|
|---|
| 1811 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2t;
|
|---|
| 1812 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldl2e;
|
|---|
| 1813 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldpi;
|
|---|
| 1814 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldlg2;
|
|---|
| 1815 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldln2;
|
|---|
| 1816 | FNIEMAIMPLFPUR80LDCONST iemAImpl_fldz;
|
|---|
| 1817 |
|
|---|
| 1818 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80UNARYTWO,(PCX86FXSTATE pFpuState, PIEMFPURESULTTWO pFpuResTwo,
|
|---|
| 1819 | PCRTFLOAT80U pr80Val));
|
|---|
| 1820 | typedef FNIEMAIMPLFPUR80UNARYTWO *PFNIEMAIMPLFPUR80UNARYTWO;
|
|---|
| 1821 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fptan_r80_r80, iemAImpl_fptan_r80_r80_amd, iemAImpl_fptan_r80_r80_intel;
|
|---|
| 1822 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fxtract_r80_r80;
|
|---|
| 1823 | FNIEMAIMPLFPUR80UNARYTWO iemAImpl_fsincos_r80_r80, iemAImpl_fsincos_r80_r80_amd, iemAImpl_fsincos_r80_r80_intel;
|
|---|
| 1824 |
|
|---|
| 1825 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_r80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT80U pr80Val));
|
|---|
| 1826 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_r80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
|---|
| 1827 | PRTFLOAT80U pr80Dst, PCRTFLOAT80U pr80Src));
|
|---|
| 1828 |
|
|---|
| 1829 | IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_d80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTPBCD80U pd80Val));
|
|---|
| 1830 | IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_d80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
|
|---|
| 1831 | PRTPBCD80U pd80Dst, PCRTFLOAT80U pr80Src));
|
|---|
| 1832 |
|
|---|
| 1833 | /** @} */
|
|---|
| 1834 |
|
|---|
| 1835 | /** @name FPU operations taking a 16-bit signed integer argument
|
|---|
| 1836 | * @{ */
|
|---|
| 1837 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
|---|
| 1838 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
|---|
| 1839 | typedef FNIEMAIMPLFPUI16 *PFNIEMAIMPLFPUI16;
|
|---|
| 1840 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI16,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
|---|
| 1841 | int16_t *pi16Dst, PCRTFLOAT80U pr80Src));
|
|---|
| 1842 | typedef FNIEMAIMPLFPUSTR80TOI16 *PFNIEMAIMPLFPUSTR80TOI16;
|
|---|
| 1843 |
|
|---|
| 1844 | FNIEMAIMPLFPUI16 iemAImpl_fiadd_r80_by_i16;
|
|---|
| 1845 | FNIEMAIMPLFPUI16 iemAImpl_fimul_r80_by_i16;
|
|---|
| 1846 | FNIEMAIMPLFPUI16 iemAImpl_fisub_r80_by_i16;
|
|---|
| 1847 | FNIEMAIMPLFPUI16 iemAImpl_fisubr_r80_by_i16;
|
|---|
| 1848 | FNIEMAIMPLFPUI16 iemAImpl_fidiv_r80_by_i16;
|
|---|
| 1849 | FNIEMAIMPLFPUI16 iemAImpl_fidivr_r80_by_i16;
|
|---|
| 1850 |
|
|---|
| 1851 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI16FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
|---|
| 1852 | PCRTFLOAT80U pr80Val1, int16_t const *pi16Val2));
|
|---|
| 1853 | typedef FNIEMAIMPLFPUI16FSW *PFNIEMAIMPLFPUI16FSW;
|
|---|
| 1854 | FNIEMAIMPLFPUI16FSW iemAImpl_ficom_r80_by_i16;
|
|---|
| 1855 |
|
|---|
| 1856 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val));
|
|---|
| 1857 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fist_r80_to_i16;
|
|---|
| 1858 | FNIEMAIMPLFPUSTR80TOI16 iemAImpl_fistt_r80_to_i16, iemAImpl_fistt_r80_to_i16_amd, iemAImpl_fistt_r80_to_i16_intel;
|
|---|
| 1859 | /** @} */
|
|---|
| 1860 |
|
|---|
| 1861 | /** @name FPU operations taking a 32-bit signed integer argument
|
|---|
| 1862 | * @{ */
|
|---|
| 1863 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
|
|---|
| 1864 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
|---|
| 1865 | typedef FNIEMAIMPLFPUI32 *PFNIEMAIMPLFPUI32;
|
|---|
| 1866 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI32,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
|---|
| 1867 | int32_t *pi32Dst, PCRTFLOAT80U pr80Src));
|
|---|
| 1868 | typedef FNIEMAIMPLFPUSTR80TOI32 *PFNIEMAIMPLFPUSTR80TOI32;
|
|---|
| 1869 |
|
|---|
| 1870 | FNIEMAIMPLFPUI32 iemAImpl_fiadd_r80_by_i32;
|
|---|
| 1871 | FNIEMAIMPLFPUI32 iemAImpl_fimul_r80_by_i32;
|
|---|
| 1872 | FNIEMAIMPLFPUI32 iemAImpl_fisub_r80_by_i32;
|
|---|
| 1873 | FNIEMAIMPLFPUI32 iemAImpl_fisubr_r80_by_i32;
|
|---|
| 1874 | FNIEMAIMPLFPUI32 iemAImpl_fidiv_r80_by_i32;
|
|---|
| 1875 | FNIEMAIMPLFPUI32 iemAImpl_fidivr_r80_by_i32;
|
|---|
| 1876 |
|
|---|
| 1877 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUI32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
|
|---|
| 1878 | PCRTFLOAT80U pr80Val1, int32_t const *pi32Val2));
|
|---|
| 1879 | typedef FNIEMAIMPLFPUI32FSW *PFNIEMAIMPLFPUI32FSW;
|
|---|
| 1880 | FNIEMAIMPLFPUI32FSW iemAImpl_ficom_r80_by_i32;
|
|---|
| 1881 |
|
|---|
| 1882 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val));
|
|---|
| 1883 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fist_r80_to_i32;
|
|---|
| 1884 | FNIEMAIMPLFPUSTR80TOI32 iemAImpl_fistt_r80_to_i32;
|
|---|
| 1885 | /** @} */
|
|---|
| 1886 |
|
|---|
| 1887 | /** @name FPU operations taking a 64-bit signed integer argument
|
|---|
| 1888 | * @{ */
|
|---|
| 1889 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUSTR80TOI64,(PCX86FXSTATE pFpuState, uint16_t *pFpuRes,
|
|---|
| 1890 | int64_t *pi64Dst, PCRTFLOAT80U pr80Src));
|
|---|
| 1891 | typedef FNIEMAIMPLFPUSTR80TOI64 *PFNIEMAIMPLFPUSTR80TOI64;
|
|---|
| 1892 |
|
|---|
| 1893 | IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val));
|
|---|
| 1894 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fist_r80_to_i64;
|
|---|
| 1895 | FNIEMAIMPLFPUSTR80TOI64 iemAImpl_fistt_r80_to_i64;
|
|---|
| 1896 | /** @} */
|
|---|
| 1897 |
|
|---|
| 1898 |
|
|---|
| 1899 | /** Temporary type representing a 256-bit vector register. */
|
|---|
| 1900 | typedef struct { uint64_t au64[4]; } IEMVMM256;
|
|---|
| 1901 | /** Temporary type pointing to a 256-bit vector register. */
|
|---|
| 1902 | typedef IEMVMM256 *PIEMVMM256;
|
|---|
| 1903 | /** Temporary type pointing to a const 256-bit vector register. */
|
|---|
| 1904 | typedef IEMVMM256 *PCIEMVMM256;
|
|---|
| 1905 |
|
|---|
| 1906 |
|
|---|
| 1907 | /** @name Media (SSE/MMX/AVX) operations: full1 + full2 -> full1.
|
|---|
| 1908 | * @{ */
|
|---|
| 1909 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc));
|
|---|
| 1910 | typedef FNIEMAIMPLMEDIAF2U64 *PFNIEMAIMPLMEDIAF2U64;
|
|---|
| 1911 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF2U128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc));
|
|---|
| 1912 | typedef FNIEMAIMPLMEDIAF2U128 *PFNIEMAIMPLMEDIAF2U128;
|
|---|
| 1913 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U128,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
|
|---|
| 1914 | typedef FNIEMAIMPLMEDIAF3U128 *PFNIEMAIMPLMEDIAF3U128;
|
|---|
| 1915 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAF3U256,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
|
|---|
| 1916 | typedef FNIEMAIMPLMEDIAF3U256 *PFNIEMAIMPLMEDIAF3U256;
|
|---|
| 1917 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U64,(uint64_t *puDst, uint64_t const *puSrc));
|
|---|
| 1918 | typedef FNIEMAIMPLMEDIAOPTF2U64 *PFNIEMAIMPLMEDIAOPTF2U64;
|
|---|
| 1919 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128,(PRTUINT128U puDst, PCRTUINT128U puSrc));
|
|---|
| 1920 | typedef FNIEMAIMPLMEDIAOPTF2U128 *PFNIEMAIMPLMEDIAOPTF2U128;
|
|---|
| 1921 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2));
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|---|
| 1922 | typedef FNIEMAIMPLMEDIAOPTF3U128 *PFNIEMAIMPLMEDIAOPTF3U128;
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|---|
| 1923 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2));
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|---|
| 1924 | typedef FNIEMAIMPLMEDIAOPTF3U256 *PFNIEMAIMPLMEDIAOPTF3U256;
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| 1925 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U256,(PRTUINT256U puDst, PCRTUINT256U puSrc));
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|---|
| 1926 | typedef FNIEMAIMPLMEDIAOPTF2U256 *PFNIEMAIMPLMEDIAOPTF2U256;
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|---|
| 1927 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pshufb_u64, iemAImpl_pshufb_u64_fallback;
|
|---|
| 1928 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pand_u64, iemAImpl_pandn_u64, iemAImpl_por_u64, iemAImpl_pxor_u64;
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|---|
| 1929 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64;
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|---|
| 1930 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64;
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|---|
| 1931 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64;
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|---|
| 1932 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64;
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|---|
| 1933 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddd_u64;
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|---|
| 1934 | FNIEMAIMPLMEDIAF2U64 iemAImpl_paddq_u64;
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|---|
| 1935 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64;
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|---|
| 1936 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64;
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|---|
| 1937 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubd_u64;
|
|---|
| 1938 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psubq_u64;
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|---|
| 1939 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddwd_u64;
|
|---|
| 1940 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64;
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|---|
| 1941 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminub_u64, iemAImpl_pmaxub_u64;
|
|---|
| 1942 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pminsw_u64, iemAImpl_pmaxsw_u64;
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|---|
| 1943 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsb_u64, iemAImpl_pabsb_u64_fallback;
|
|---|
| 1944 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback;
|
|---|
| 1945 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback;
|
|---|
| 1946 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback;
|
|---|
| 1947 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback;
|
|---|
| 1948 | FNIEMAIMPLMEDIAF2U64 iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback;
|
|---|
| 1949 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddw_u64, iemAImpl_phaddw_u64_fallback;
|
|---|
| 1950 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddd_u64, iemAImpl_phaddd_u64_fallback;
|
|---|
| 1951 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubw_u64, iemAImpl_phsubw_u64_fallback;
|
|---|
| 1952 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubd_u64, iemAImpl_phsubd_u64_fallback;
|
|---|
| 1953 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phaddsw_u64, iemAImpl_phaddsw_u64_fallback;
|
|---|
| 1954 | FNIEMAIMPLMEDIAF2U64 iemAImpl_phsubsw_u64, iemAImpl_phsubsw_u64_fallback;
|
|---|
| 1955 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddubsw_u64, iemAImpl_pmaddubsw_u64_fallback;
|
|---|
| 1956 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmulhrsw_u64, iemAImpl_pmulhrsw_u64_fallback;
|
|---|
| 1957 | FNIEMAIMPLMEDIAF2U64 iemAImpl_pmuludq_u64;
|
|---|
| 1958 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64;
|
|---|
| 1959 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64;
|
|---|
| 1960 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllq_u64, iemAImpl_psrlq_u64;
|
|---|
| 1961 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packsswb_u64, iemAImpl_packuswb_u64;
|
|---|
| 1962 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packssdw_u64;
|
|---|
| 1963 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pmulhuw_u64;
|
|---|
| 1964 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pavgb_u64, iemAImpl_pavgw_u64;
|
|---|
| 1965 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psadbw_u64;
|
|---|
| 1966 |
|
|---|
| 1967 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback;
|
|---|
| 1968 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128;
|
|---|
| 1969 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128;
|
|---|
| 1970 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback;
|
|---|
| 1971 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128;
|
|---|
| 1972 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback;
|
|---|
| 1973 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128;
|
|---|
| 1974 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128;
|
|---|
| 1975 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddd_u128;
|
|---|
| 1976 | FNIEMAIMPLMEDIAF2U128 iemAImpl_paddq_u128;
|
|---|
| 1977 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128;
|
|---|
| 1978 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128;
|
|---|
| 1979 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubd_u128;
|
|---|
| 1980 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psubq_u128;
|
|---|
| 1981 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmullw_u128, iemAImpl_pmullw_u128_fallback;
|
|---|
| 1982 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhw_u128;
|
|---|
| 1983 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulld_u128, iemAImpl_pmulld_u128_fallback;
|
|---|
| 1984 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddwd_u128;
|
|---|
| 1985 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminub_u128;
|
|---|
| 1986 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminud_u128, iemAImpl_pminud_u128_fallback;
|
|---|
| 1987 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminuw_u128, iemAImpl_pminuw_u128_fallback;
|
|---|
| 1988 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsb_u128, iemAImpl_pminsb_u128_fallback;
|
|---|
| 1989 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsd_u128, iemAImpl_pminsd_u128_fallback;
|
|---|
| 1990 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pminsw_u128, iemAImpl_pminsw_u128_fallback;
|
|---|
| 1991 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxub_u128;
|
|---|
| 1992 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxud_u128, iemAImpl_pmaxud_u128_fallback;
|
|---|
| 1993 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxuw_u128, iemAImpl_pmaxuw_u128_fallback;
|
|---|
| 1994 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsb_u128, iemAImpl_pmaxsb_u128_fallback;
|
|---|
| 1995 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsw_u128;
|
|---|
| 1996 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaxsd_u128, iemAImpl_pmaxsd_u128_fallback;
|
|---|
| 1997 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsb_u128, iemAImpl_pabsb_u128_fallback;
|
|---|
| 1998 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback;
|
|---|
| 1999 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback;
|
|---|
| 2000 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback;
|
|---|
| 2001 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback;
|
|---|
| 2002 | FNIEMAIMPLMEDIAF2U128 iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback;
|
|---|
| 2003 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddw_u128, iemAImpl_phaddw_u128_fallback;
|
|---|
| 2004 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddd_u128, iemAImpl_phaddd_u128_fallback;
|
|---|
| 2005 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubw_u128, iemAImpl_phsubw_u128_fallback;
|
|---|
| 2006 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubd_u128, iemAImpl_phsubd_u128_fallback;
|
|---|
| 2007 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phaddsw_u128, iemAImpl_phaddsw_u128_fallback;
|
|---|
| 2008 | FNIEMAIMPLMEDIAF2U128 iemAImpl_phsubsw_u128, iemAImpl_phsubsw_u128_fallback;
|
|---|
| 2009 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddubsw_u128, iemAImpl_pmaddubsw_u128_fallback;
|
|---|
| 2010 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmulhrsw_u128, iemAImpl_pmulhrsw_u128_fallback;
|
|---|
| 2011 | FNIEMAIMPLMEDIAF2U128 iemAImpl_pmuludq_u128;
|
|---|
| 2012 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128;
|
|---|
| 2013 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128;
|
|---|
| 2014 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllw_u128, iemAImpl_psrlw_u128, iemAImpl_psraw_u128;
|
|---|
| 2015 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pslld_u128, iemAImpl_psrld_u128, iemAImpl_psrad_u128;
|
|---|
| 2016 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllq_u128, iemAImpl_psrlq_u128;
|
|---|
| 2017 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmulhuw_u128;
|
|---|
| 2018 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pavgb_u128, iemAImpl_pavgw_u128;
|
|---|
| 2019 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psadbw_u128;
|
|---|
| 2020 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pmuldq_u128, iemAImpl_pmuldq_u128_fallback;
|
|---|
| 2021 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpcklps_u128, iemAImpl_unpcklpd_u128;
|
|---|
| 2022 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_unpckhps_u128, iemAImpl_unpckhpd_u128;
|
|---|
| 2023 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_phminposuw_u128, iemAImpl_phminposuw_u128_fallback;
|
|---|
| 2024 |
|
|---|
| 2025 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback;
|
|---|
| 2026 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback;
|
|---|
| 2027 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpandn_u128, iemAImpl_vpandn_u128_fallback;
|
|---|
| 2028 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpor_u128, iemAImpl_vpor_u128_fallback;
|
|---|
| 2029 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpxor_u128, iemAImpl_vpxor_u128_fallback;
|
|---|
| 2030 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqb_u128, iemAImpl_vpcmpeqb_u128_fallback;
|
|---|
| 2031 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback;
|
|---|
| 2032 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback;
|
|---|
| 2033 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback;
|
|---|
| 2034 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback;
|
|---|
| 2035 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback;
|
|---|
| 2036 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback;
|
|---|
| 2037 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback;
|
|---|
| 2038 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddb_u128, iemAImpl_vpaddb_u128_fallback;
|
|---|
| 2039 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddw_u128, iemAImpl_vpaddw_u128_fallback;
|
|---|
| 2040 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddd_u128, iemAImpl_vpaddd_u128_fallback;
|
|---|
| 2041 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpaddq_u128, iemAImpl_vpaddq_u128_fallback;
|
|---|
| 2042 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubb_u128, iemAImpl_vpsubb_u128_fallback;
|
|---|
| 2043 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubw_u128, iemAImpl_vpsubw_u128_fallback;
|
|---|
| 2044 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubd_u128, iemAImpl_vpsubd_u128_fallback;
|
|---|
| 2045 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpsubq_u128, iemAImpl_vpsubq_u128_fallback;
|
|---|
| 2046 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminub_u128, iemAImpl_vpminub_u128_fallback;
|
|---|
| 2047 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminuw_u128, iemAImpl_vpminuw_u128_fallback;
|
|---|
| 2048 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminud_u128, iemAImpl_vpminud_u128_fallback;
|
|---|
| 2049 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsb_u128, iemAImpl_vpminsb_u128_fallback;
|
|---|
| 2050 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsw_u128, iemAImpl_vpminsw_u128_fallback;
|
|---|
| 2051 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpminsd_u128, iemAImpl_vpminsd_u128_fallback;
|
|---|
| 2052 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxub_u128, iemAImpl_vpmaxub_u128_fallback;
|
|---|
| 2053 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxuw_u128, iemAImpl_vpmaxuw_u128_fallback;
|
|---|
| 2054 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxud_u128, iemAImpl_vpmaxud_u128_fallback;
|
|---|
| 2055 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsb_u128, iemAImpl_vpmaxsb_u128_fallback;
|
|---|
| 2056 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsw_u128, iemAImpl_vpmaxsw_u128_fallback;
|
|---|
| 2057 | FNIEMAIMPLMEDIAF3U128 iemAImpl_vpmaxsd_u128, iemAImpl_vpmaxsd_u128_fallback;
|
|---|
| 2058 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpacksswb_u128, iemAImpl_vpacksswb_u128_fallback;
|
|---|
| 2059 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackssdw_u128, iemAImpl_vpackssdw_u128_fallback;
|
|---|
| 2060 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackuswb_u128, iemAImpl_vpackuswb_u128_fallback;
|
|---|
| 2061 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpackusdw_u128, iemAImpl_vpackusdw_u128_fallback;
|
|---|
| 2062 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmullw_u128, iemAImpl_vpmullw_u128_fallback;
|
|---|
| 2063 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulld_u128, iemAImpl_vpmulld_u128_fallback;
|
|---|
| 2064 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhw_u128, iemAImpl_vpmulhw_u128_fallback;
|
|---|
| 2065 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhuw_u128, iemAImpl_vpmulhuw_u128_fallback;
|
|---|
| 2066 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgb_u128, iemAImpl_vpavgb_u128_fallback;
|
|---|
| 2067 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgw_u128, iemAImpl_vpavgw_u128_fallback;
|
|---|
| 2068 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignb_u128, iemAImpl_vpsignb_u128_fallback;
|
|---|
| 2069 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignw_u128, iemAImpl_vpsignw_u128_fallback;
|
|---|
| 2070 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignd_u128, iemAImpl_vpsignd_u128_fallback;
|
|---|
| 2071 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddw_u128, iemAImpl_vphaddw_u128_fallback;
|
|---|
| 2072 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddd_u128, iemAImpl_vphaddd_u128_fallback;
|
|---|
| 2073 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubw_u128, iemAImpl_vphsubw_u128_fallback;
|
|---|
| 2074 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubd_u128, iemAImpl_vphsubd_u128_fallback;
|
|---|
| 2075 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphaddsw_u128, iemAImpl_vphaddsw_u128_fallback;
|
|---|
| 2076 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vphsubsw_u128, iemAImpl_vphsubsw_u128_fallback;
|
|---|
| 2077 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmaddubsw_u128, iemAImpl_vpmaddubsw_u128_fallback;
|
|---|
| 2078 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmulhrsw_u128, iemAImpl_vpmulhrsw_u128_fallback;
|
|---|
| 2079 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsadbw_u128, iemAImpl_vpsadbw_u128_fallback;
|
|---|
| 2080 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuldq_u128, iemAImpl_vpmuldq_u128_fallback;
|
|---|
| 2081 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpmuludq_u128, iemAImpl_vpmuludq_u128_fallback;
|
|---|
| 2082 |
|
|---|
| 2083 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsb_u128, iemAImpl_vpabsb_u128_fallback;
|
|---|
| 2084 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsw_u128, iemAImpl_vpabsd_u128_fallback;
|
|---|
| 2085 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsd_u128, iemAImpl_vpabsw_u128_fallback;
|
|---|
| 2086 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vphminposuw_u128, iemAImpl_vphminposuw_u128_fallback;
|
|---|
| 2087 |
|
|---|
| 2088 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpshufb_u256, iemAImpl_vpshufb_u256_fallback;
|
|---|
| 2089 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback;
|
|---|
| 2090 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpandn_u256, iemAImpl_vpandn_u256_fallback;
|
|---|
| 2091 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpor_u256, iemAImpl_vpor_u256_fallback;
|
|---|
| 2092 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpxor_u256, iemAImpl_vpxor_u256_fallback;
|
|---|
| 2093 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqb_u256, iemAImpl_vpcmpeqb_u256_fallback;
|
|---|
| 2094 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback;
|
|---|
| 2095 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback;
|
|---|
| 2096 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback;
|
|---|
| 2097 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback;
|
|---|
| 2098 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback;
|
|---|
| 2099 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback;
|
|---|
| 2100 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback;
|
|---|
| 2101 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddb_u256, iemAImpl_vpaddb_u256_fallback;
|
|---|
| 2102 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddw_u256, iemAImpl_vpaddw_u256_fallback;
|
|---|
| 2103 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddd_u256, iemAImpl_vpaddd_u256_fallback;
|
|---|
| 2104 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpaddq_u256, iemAImpl_vpaddq_u256_fallback;
|
|---|
| 2105 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubb_u256, iemAImpl_vpsubb_u256_fallback;
|
|---|
| 2106 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubw_u256, iemAImpl_vpsubw_u256_fallback;
|
|---|
| 2107 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubd_u256, iemAImpl_vpsubd_u256_fallback;
|
|---|
| 2108 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpsubq_u256, iemAImpl_vpsubq_u256_fallback;
|
|---|
| 2109 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminub_u256, iemAImpl_vpminub_u256_fallback;
|
|---|
| 2110 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminuw_u256, iemAImpl_vpminuw_u256_fallback;
|
|---|
| 2111 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminud_u256, iemAImpl_vpminud_u256_fallback;
|
|---|
| 2112 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsb_u256, iemAImpl_vpminsb_u256_fallback;
|
|---|
| 2113 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsw_u256, iemAImpl_vpminsw_u256_fallback;
|
|---|
| 2114 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpminsd_u256, iemAImpl_vpminsd_u256_fallback;
|
|---|
| 2115 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxub_u256, iemAImpl_vpmaxub_u256_fallback;
|
|---|
| 2116 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxuw_u256, iemAImpl_vpmaxuw_u256_fallback;
|
|---|
| 2117 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxud_u256, iemAImpl_vpmaxud_u256_fallback;
|
|---|
| 2118 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsb_u256, iemAImpl_vpmaxsb_u256_fallback;
|
|---|
| 2119 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsw_u256, iemAImpl_vpmaxsw_u256_fallback;
|
|---|
| 2120 | FNIEMAIMPLMEDIAF3U256 iemAImpl_vpmaxsd_u256, iemAImpl_vpmaxsd_u256_fallback;
|
|---|
| 2121 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpacksswb_u256, iemAImpl_vpacksswb_u256_fallback;
|
|---|
| 2122 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackssdw_u256, iemAImpl_vpackssdw_u256_fallback;
|
|---|
| 2123 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackuswb_u256, iemAImpl_vpackuswb_u256_fallback;
|
|---|
| 2124 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpackusdw_u256, iemAImpl_vpackusdw_u256_fallback;
|
|---|
| 2125 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmullw_u256, iemAImpl_vpmullw_u256_fallback;
|
|---|
| 2126 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulld_u256, iemAImpl_vpmulld_u256_fallback;
|
|---|
| 2127 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhw_u256, iemAImpl_vpmulhw_u256_fallback;
|
|---|
| 2128 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhuw_u256, iemAImpl_vpmulhuw_u256_fallback;
|
|---|
| 2129 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgb_u256, iemAImpl_vpavgb_u256_fallback;
|
|---|
| 2130 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgw_u256, iemAImpl_vpavgw_u256_fallback;
|
|---|
| 2131 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignb_u256, iemAImpl_vpsignb_u256_fallback;
|
|---|
| 2132 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignw_u256, iemAImpl_vpsignw_u256_fallback;
|
|---|
| 2133 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignd_u256, iemAImpl_vpsignd_u256_fallback;
|
|---|
| 2134 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddw_u256, iemAImpl_vphaddw_u256_fallback;
|
|---|
| 2135 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddd_u256, iemAImpl_vphaddd_u256_fallback;
|
|---|
| 2136 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubw_u256, iemAImpl_vphsubw_u256_fallback;
|
|---|
| 2137 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubd_u256, iemAImpl_vphsubd_u256_fallback;
|
|---|
| 2138 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphaddsw_u256, iemAImpl_vphaddsw_u256_fallback;
|
|---|
| 2139 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vphsubsw_u256, iemAImpl_vphsubsw_u256_fallback;
|
|---|
| 2140 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmaddubsw_u256, iemAImpl_vpmaddubsw_u256_fallback;
|
|---|
| 2141 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmulhrsw_u256, iemAImpl_vpmulhrsw_u256_fallback;
|
|---|
| 2142 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsadbw_u256, iemAImpl_vpsadbw_u256_fallback;
|
|---|
| 2143 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuldq_u256, iemAImpl_vpmuldq_u256_fallback;
|
|---|
| 2144 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpmuludq_u256, iemAImpl_vpmuludq_u256_fallback;
|
|---|
| 2145 |
|
|---|
| 2146 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsb_u256, iemAImpl_vpabsb_u256_fallback;
|
|---|
| 2147 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsw_u256, iemAImpl_vpabsw_u256_fallback;
|
|---|
| 2148 | FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsd_u256, iemAImpl_vpabsd_u256_fallback;
|
|---|
| 2149 | /** @} */
|
|---|
| 2150 |
|
|---|
| 2151 | /** @name Media (SSE/MMX/AVX) operations: lowhalf1 + lowhalf1 -> full1.
|
|---|
| 2152 | * @{ */
|
|---|
| 2153 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpcklbw_u64, iemAImpl_punpcklwd_u64, iemAImpl_punpckldq_u64;
|
|---|
| 2154 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpcklbw_u128, iemAImpl_punpcklwd_u128, iemAImpl_punpckldq_u128, iemAImpl_punpcklqdq_u128;
|
|---|
| 2155 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpcklbw_u128, iemAImpl_vpunpcklbw_u128_fallback,
|
|---|
| 2156 | iemAImpl_vpunpcklwd_u128, iemAImpl_vpunpcklwd_u128_fallback,
|
|---|
| 2157 | iemAImpl_vpunpckldq_u128, iemAImpl_vpunpckldq_u128_fallback,
|
|---|
| 2158 | iemAImpl_vpunpcklqdq_u128, iemAImpl_vpunpcklqdq_u128_fallback,
|
|---|
| 2159 | iemAImpl_vunpcklps_u128, iemAImpl_vunpcklps_u128_fallback,
|
|---|
| 2160 | iemAImpl_vunpcklpd_u128, iemAImpl_vunpcklpd_u128_fallback,
|
|---|
| 2161 | iemAImpl_vunpckhps_u128, iemAImpl_vunpckhps_u128_fallback,
|
|---|
| 2162 | iemAImpl_vunpckhpd_u128, iemAImpl_vunpckhpd_u128_fallback;
|
|---|
| 2163 |
|
|---|
| 2164 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpcklbw_u256, iemAImpl_vpunpcklbw_u256_fallback,
|
|---|
| 2165 | iemAImpl_vpunpcklwd_u256, iemAImpl_vpunpcklwd_u256_fallback,
|
|---|
| 2166 | iemAImpl_vpunpckldq_u256, iemAImpl_vpunpckldq_u256_fallback,
|
|---|
| 2167 | iemAImpl_vpunpcklqdq_u256, iemAImpl_vpunpcklqdq_u256_fallback,
|
|---|
| 2168 | iemAImpl_vunpcklps_u256, iemAImpl_vunpcklps_u256_fallback,
|
|---|
| 2169 | iemAImpl_vunpcklpd_u256, iemAImpl_vunpcklpd_u256_fallback,
|
|---|
| 2170 | iemAImpl_vunpckhps_u256, iemAImpl_vunpckhps_u256_fallback,
|
|---|
| 2171 | iemAImpl_vunpckhpd_u256, iemAImpl_vunpckhpd_u256_fallback;
|
|---|
| 2172 | /** @} */
|
|---|
| 2173 |
|
|---|
| 2174 | /** @name Media (SSE/MMX/AVX) operations: hihalf1 + hihalf2 -> full1.
|
|---|
| 2175 | * @{ */
|
|---|
| 2176 | FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_punpckhbw_u64, iemAImpl_punpckhwd_u64, iemAImpl_punpckhdq_u64;
|
|---|
| 2177 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_punpckhbw_u128, iemAImpl_punpckhwd_u128, iemAImpl_punpckhdq_u128, iemAImpl_punpckhqdq_u128;
|
|---|
| 2178 | FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpunpckhbw_u128, iemAImpl_vpunpckhbw_u128_fallback,
|
|---|
| 2179 | iemAImpl_vpunpckhwd_u128, iemAImpl_vpunpckhwd_u128_fallback,
|
|---|
| 2180 | iemAImpl_vpunpckhdq_u128, iemAImpl_vpunpckhdq_u128_fallback,
|
|---|
| 2181 | iemAImpl_vpunpckhqdq_u128, iemAImpl_vpunpckhqdq_u128_fallback;
|
|---|
| 2182 | FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpunpckhbw_u256, iemAImpl_vpunpckhbw_u256_fallback,
|
|---|
| 2183 | iemAImpl_vpunpckhwd_u256, iemAImpl_vpunpckhwd_u256_fallback,
|
|---|
| 2184 | iemAImpl_vpunpckhdq_u256, iemAImpl_vpunpckhdq_u256_fallback,
|
|---|
| 2185 | iemAImpl_vpunpckhqdq_u256, iemAImpl_vpunpckhqdq_u256_fallback;
|
|---|
| 2186 | /** @} */
|
|---|
| 2187 |
|
|---|
| 2188 | /** @name Media (SSE/MMX/AVX) operation: Packed Shuffle Stuff (evil)
|
|---|
| 2189 | * @{ */
|
|---|
| 2190 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2191 | typedef FNIEMAIMPLMEDIAPSHUFU128 *PFNIEMAIMPLMEDIAPSHUFU128;
|
|---|
| 2192 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHUFU256,(PRTUINT256U puDst, PCRTUINT256U puSrc, uint8_t bEvil));
|
|---|
| 2193 | typedef FNIEMAIMPLMEDIAPSHUFU256 *PFNIEMAIMPLMEDIAPSHUFU256;
|
|---|
| 2194 | IEM_DECL_IMPL_DEF(void, iemAImpl_pshufw_u64,(uint64_t *puDst, uint64_t const *puSrc, uint8_t bEvil));
|
|---|
| 2195 | FNIEMAIMPLMEDIAPSHUFU128 iemAImpl_pshufhw_u128, iemAImpl_pshuflw_u128, iemAImpl_pshufd_u128;
|
|---|
| 2196 | #ifndef IEM_WITHOUT_ASSEMBLY
|
|---|
| 2197 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256, iemAImpl_vpshuflw_u256, iemAImpl_vpshufd_u256;
|
|---|
| 2198 | #endif
|
|---|
| 2199 | FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256_fallback, iemAImpl_vpshuflw_u256_fallback, iemAImpl_vpshufd_u256_fallback;
|
|---|
| 2200 | /** @} */
|
|---|
| 2201 |
|
|---|
| 2202 | /** @name Media (SSE/MMX/AVX) operation: Shift Immediate Stuff (evil)
|
|---|
| 2203 | * @{ */
|
|---|
| 2204 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU64,(uint64_t *puDst, uint8_t bShift));
|
|---|
| 2205 | typedef FNIEMAIMPLMEDIAPSHIFTU64 *PFNIEMAIMPLMEDIAPSHIFTU64;
|
|---|
| 2206 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU128,(PRTUINT128U puDst, uint8_t bShift));
|
|---|
| 2207 | typedef FNIEMAIMPLMEDIAPSHIFTU128 *PFNIEMAIMPLMEDIAPSHIFTU128;
|
|---|
| 2208 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU256,(PRTUINT256U puDst, uint8_t bShift));
|
|---|
| 2209 | typedef FNIEMAIMPLMEDIAPSHIFTU256 *PFNIEMAIMPLMEDIAPSHIFTU256;
|
|---|
| 2210 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psllw_imm_u64, iemAImpl_pslld_imm_u64, iemAImpl_psllq_imm_u64;
|
|---|
| 2211 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psrlw_imm_u64, iemAImpl_psrld_imm_u64, iemAImpl_psrlq_imm_u64;
|
|---|
| 2212 | FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psraw_imm_u64, iemAImpl_psrad_imm_u64;
|
|---|
| 2213 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psllw_imm_u128, iemAImpl_pslld_imm_u128, iemAImpl_psllq_imm_u128;
|
|---|
| 2214 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psrlw_imm_u128, iemAImpl_psrld_imm_u128, iemAImpl_psrlq_imm_u128;
|
|---|
| 2215 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psraw_imm_u128, iemAImpl_psrad_imm_u128;
|
|---|
| 2216 | FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_pslldq_imm_u128, iemAImpl_psrldq_imm_u128;
|
|---|
| 2217 | /** @} */
|
|---|
| 2218 |
|
|---|
| 2219 | /** @name Media (SSE/MMX/AVX) operation: Move Byte Mask
|
|---|
| 2220 | * @{ */
|
|---|
| 2221 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u64,(uint64_t *pu64Dst, uint64_t const *puSrc));
|
|---|
| 2222 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovmskb_u128,(uint64_t *pu64Dst, PCRTUINT128U puSrc));
|
|---|
| 2223 | #ifndef IEM_WITHOUT_ASSEMBLY
|
|---|
| 2224 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
|---|
| 2225 | #endif
|
|---|
| 2226 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovmskb_u256_fallback,(uint64_t *pu64Dst, PCRTUINT256U puSrc));
|
|---|
| 2227 | /** @} */
|
|---|
| 2228 |
|
|---|
| 2229 | /** @name Media (SSE/MMX/AVX) operations: Variable Blend Packed Bytes/R32/R64.
|
|---|
| 2230 | * @{ */
|
|---|
| 2231 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puMask));
|
|---|
| 2232 | typedef FNIEMAIMPLBLENDU128 *PFNIEMAIMPLBLENDU128;
|
|---|
| 2233 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, PCRTUINT128U puMask));
|
|---|
| 2234 | typedef FNIEMAIMPLAVXBLENDU128 *PFNIEMAIMPLAVXBLENDU128;
|
|---|
| 2235 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLAVXBLENDU256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, PCRTUINT256U puMask));
|
|---|
| 2236 | typedef FNIEMAIMPLAVXBLENDU256 *PFNIEMAIMPLAVXBLENDU256;
|
|---|
| 2237 |
|
|---|
| 2238 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128;
|
|---|
| 2239 | FNIEMAIMPLBLENDU128 iemAImpl_pblendvb_u128_fallback;
|
|---|
| 2240 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128;
|
|---|
| 2241 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vpblendvb_u128_fallback;
|
|---|
| 2242 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256;
|
|---|
| 2243 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vpblendvb_u256_fallback;
|
|---|
| 2244 |
|
|---|
| 2245 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128;
|
|---|
| 2246 | FNIEMAIMPLBLENDU128 iemAImpl_blendvps_u128_fallback;
|
|---|
| 2247 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128;
|
|---|
| 2248 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvps_u128_fallback;
|
|---|
| 2249 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256;
|
|---|
| 2250 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvps_u256_fallback;
|
|---|
| 2251 |
|
|---|
| 2252 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128;
|
|---|
| 2253 | FNIEMAIMPLBLENDU128 iemAImpl_blendvpd_u128_fallback;
|
|---|
| 2254 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128;
|
|---|
| 2255 | FNIEMAIMPLAVXBLENDU128 iemAImpl_vblendvpd_u128_fallback;
|
|---|
| 2256 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256;
|
|---|
| 2257 | FNIEMAIMPLAVXBLENDU256 iemAImpl_vblendvpd_u256_fallback;
|
|---|
| 2258 | /** @} */
|
|---|
| 2259 |
|
|---|
| 2260 |
|
|---|
| 2261 | /** @name Media (SSE/MMX/AVX) operation: Sort this later
|
|---|
| 2262 | * @{ */
|
|---|
| 2263 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
|---|
| 2264 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovsldup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
|---|
| 2265 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
|---|
| 2266 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovshdup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
|---|
| 2267 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rr,(PX86XSAVEAREA pXState, uint8_t iYRegDst, uint8_t iYRegSrc));
|
|---|
| 2268 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovddup_256_rm,(PX86XSAVEAREA pXState, uint8_t iYRegDst, PCRTUINT256U pSrc));
|
|---|
| 2269 |
|
|---|
| 2270 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2271 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2272 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2273 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2274 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2275 |
|
|---|
| 2276 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2277 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2278 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2279 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2280 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2281 |
|
|---|
| 2282 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2283 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2284 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2285 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2286 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2287 |
|
|---|
| 2288 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2289 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2290 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2291 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2292 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2293 |
|
|---|
| 2294 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2295 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2296 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2297 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2298 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2299 |
|
|---|
| 2300 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2301 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2302 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2303 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2304 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovsxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2305 |
|
|---|
| 2306 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2307 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2308 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2309 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2310 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbw_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2311 |
|
|---|
| 2312 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2313 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2314 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2315 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2316 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2317 |
|
|---|
| 2318 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2319 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2320 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u128_fallback,(PRTUINT128U puDst, uint16_t uSrc));
|
|---|
| 2321 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2322 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxbq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2323 |
|
|---|
| 2324 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2325 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2326 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2327 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2328 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwd_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2329 |
|
|---|
| 2330 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2331 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2332 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u128_fallback,(PRTUINT128U puDst, uint32_t uSrc));
|
|---|
| 2333 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2334 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxwq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2335 |
|
|---|
| 2336 | IEM_DECL_IMPL_DEF(void, iemAImpl_pmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2337 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2338 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u128_fallback,(PRTUINT128U puDst, uint64_t uSrc));
|
|---|
| 2339 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2340 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc));
|
|---|
| 2341 |
|
|---|
| 2342 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2343 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
|---|
| 2344 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
|---|
| 2345 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
|---|
| 2346 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
|---|
| 2347 |
|
|---|
| 2348 | IEM_DECL_IMPL_DEF(void, iemAImpl_shufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2349 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
|---|
| 2350 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
|---|
| 2351 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
|---|
| 2352 | IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
|---|
| 2353 |
|
|---|
| 2354 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
|---|
| 2355 | IEM_DECL_IMPL_DEF(void, iemAImpl_palignr_u64_fallback,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t bEvil));
|
|---|
| 2356 |
|
|---|
| 2357 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u64,(uint64_t *pu64Dst, uint16_t u16Src, uint8_t bEvil));
|
|---|
| 2358 | IEM_DECL_IMPL_DEF(void, iemAImpl_pinsrw_u128,(PRTUINT128U puDst, uint16_t u16Src, uint8_t bEvil));
|
|---|
| 2359 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
|---|
| 2360 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpinsrw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint16_t u16Src, uint8_t bEvil));
|
|---|
| 2361 |
|
|---|
| 2362 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u64,(uint16_t *pu16Dst, uint64_t u64Src, uint8_t bEvil));
|
|---|
| 2363 | IEM_DECL_IMPL_DEF(void, iemAImpl_pextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2364 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2365 | IEM_DECL_IMPL_DEF(void, iemAImpl_vpextrw_u128_fallback,(uint16_t *pu16Dst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2366 |
|
|---|
| 2367 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2368 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2369 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2370 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
|---|
| 2371 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskps_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
|---|
| 2372 |
|
|---|
| 2373 | IEM_DECL_IMPL_DEF(void, iemAImpl_movmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2374 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2375 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u128_fallback,(uint8_t *pu8Dst, PCRTUINT128U puSrc));
|
|---|
| 2376 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
|---|
| 2377 | IEM_DECL_IMPL_DEF(void, iemAImpl_vmovmskpd_u256_fallback,(uint8_t *pu8Dst, PCRTUINT256U puSrc));
|
|---|
| 2378 |
|
|---|
| 2379 |
|
|---|
| 2380 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF2U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil));
|
|---|
| 2381 | typedef FNIEMAIMPLMEDIAOPTF2U128IMM8 *PFNIEMAIMPLMEDIAOPTF2U128IMM8;
|
|---|
| 2382 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U128IMM8,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil));
|
|---|
| 2383 | typedef FNIEMAIMPLMEDIAOPTF3U128IMM8 *PFNIEMAIMPLMEDIAOPTF3U128IMM8;
|
|---|
| 2384 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAOPTF3U256IMM8,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil));
|
|---|
| 2385 | typedef FNIEMAIMPLMEDIAOPTF3U256IMM8 *PFNIEMAIMPLMEDIAOPTF3U256IMM8;
|
|---|
| 2386 |
|
|---|
| 2387 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_palignr_u128, iemAImpl_palignr_u128_fallback;
|
|---|
| 2388 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pblendw_u128, iemAImpl_pblendw_u128_fallback;
|
|---|
| 2389 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendps_u128, iemAImpl_blendps_u128_fallback;
|
|---|
| 2390 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_blendpd_u128, iemAImpl_blendpd_u128_fallback;
|
|---|
| 2391 |
|
|---|
| 2392 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpalignr_u128, iemAImpl_vpalignr_u128_fallback;
|
|---|
| 2393 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpblendw_u128, iemAImpl_vpblendw_u128_fallback;
|
|---|
| 2394 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendps_u128, iemAImpl_vblendps_u128_fallback;
|
|---|
| 2395 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vblendpd_u128, iemAImpl_vblendpd_u128_fallback;
|
|---|
| 2396 |
|
|---|
| 2397 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpalignr_u256, iemAImpl_vpalignr_u256_fallback;
|
|---|
| 2398 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vpblendw_u256, iemAImpl_vpblendw_u256_fallback;
|
|---|
| 2399 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendps_u256, iemAImpl_vblendps_u256_fallback;
|
|---|
| 2400 | FNIEMAIMPLMEDIAOPTF3U256IMM8 iemAImpl_vblendpd_u256, iemAImpl_vblendpd_u256_fallback;
|
|---|
| 2401 |
|
|---|
| 2402 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesimc_u128, iemAImpl_aesimc_u128_fallback;
|
|---|
| 2403 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenc_u128, iemAImpl_aesenc_u128_fallback;
|
|---|
| 2404 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesenclast_u128, iemAImpl_aesenclast_u128_fallback;
|
|---|
| 2405 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdec_u128, iemAImpl_aesdec_u128_fallback;
|
|---|
| 2406 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_aesdeclast_u128, iemAImpl_aesdeclast_u128_fallback;
|
|---|
| 2407 |
|
|---|
| 2408 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesimc_u128, iemAImpl_vaesimc_u128_fallback;
|
|---|
| 2409 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenc_u128, iemAImpl_vaesenc_u128_fallback;
|
|---|
| 2410 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesenclast_u128, iemAImpl_vaesenclast_u128_fallback;
|
|---|
| 2411 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdec_u128, iemAImpl_vaesdec_u128_fallback;
|
|---|
| 2412 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vaesdeclast_u128, iemAImpl_vaesdeclast_u128_fallback;
|
|---|
| 2413 |
|
|---|
| 2414 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_aeskeygenassist_u128, iemAImpl_aeskeygenassist_u128_fallback;
|
|---|
| 2415 |
|
|---|
| 2416 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vaeskeygenassist_u128, iemAImpl_vaeskeygenassist_u128_fallback;
|
|---|
| 2417 |
|
|---|
| 2418 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1nexte_u128, iemAImpl_sha1nexte_u128_fallback;
|
|---|
| 2419 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1msg1_u128, iemAImpl_sha1msg1_u128_fallback;
|
|---|
| 2420 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha1msg2_u128, iemAImpl_sha1msg2_u128_fallback;
|
|---|
| 2421 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha256msg1_u128, iemAImpl_sha256msg1_u128_fallback;
|
|---|
| 2422 | FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_sha256msg2_u128, iemAImpl_sha256msg2_u128_fallback;
|
|---|
| 2423 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_sha1rnds4_u128, iemAImpl_sha1rnds4_u128_fallback;
|
|---|
| 2424 | IEM_DECL_IMPL_DEF(void, iemAImpl_sha256rnds2_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puXmm0Constants));
|
|---|
| 2425 | IEM_DECL_IMPL_DEF(void, iemAImpl_sha256rnds2_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puXmm0Constants));
|
|---|
| 2426 |
|
|---|
| 2427 | typedef struct IEMPCMPISTRXSRC
|
|---|
| 2428 | {
|
|---|
| 2429 | RTUINT128U uSrc1;
|
|---|
| 2430 | RTUINT128U uSrc2;
|
|---|
| 2431 | } IEMPCMPISTRXSRC;
|
|---|
| 2432 | typedef IEMPCMPISTRXSRC *PIEMPCMPISTRXSRC;
|
|---|
| 2433 | typedef const IEMPCMPISTRXSRC *PCIEMPCMPISTRXSRC;
|
|---|
| 2434 |
|
|---|
| 2435 | typedef struct IEMPCMPESTRXSRC
|
|---|
| 2436 | {
|
|---|
| 2437 | RTUINT128U uSrc1;
|
|---|
| 2438 | RTUINT128U uSrc2;
|
|---|
| 2439 | uint64_t u64Rax;
|
|---|
| 2440 | uint64_t u64Rdx;
|
|---|
| 2441 | } IEMPCMPESTRXSRC;
|
|---|
| 2442 | typedef IEMPCMPESTRXSRC *PIEMPCMPESTRXSRC;
|
|---|
| 2443 | typedef const IEMPCMPESTRXSRC *PCIEMPCMPESTRXSRC;
|
|---|
| 2444 |
|
|---|
| 2445 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPISTRIU128IMM8,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRXSRC pSrc, uint8_t bEvil));
|
|---|
| 2446 | typedef FNIEMAIMPLPCMPISTRIU128IMM8 *PFNIEMAIMPLPCMPISTRIU128IMM8;
|
|---|
| 2447 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPESTRIU128IMM8,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPESTRXSRC pSrc, uint8_t bEvil));
|
|---|
| 2448 | typedef FNIEMAIMPLPCMPESTRIU128IMM8 *PFNIEMAIMPLPCMPESTRIU128IMM8;
|
|---|
| 2449 |
|
|---|
| 2450 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPISTRMU128IMM8,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPISTRXSRC pSrc, uint8_t bEvil));
|
|---|
| 2451 | typedef FNIEMAIMPLPCMPISTRMU128IMM8 *PFNIEMAIMPLPCMPISTRMU128IMM8;
|
|---|
| 2452 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLPCMPESTRMU128IMM8,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPESTRXSRC pSrc, uint8_t bEvil));
|
|---|
| 2453 | typedef FNIEMAIMPLPCMPESTRMU128IMM8 *PFNIEMAIMPLPCMPESTRMU128IMM8;
|
|---|
| 2454 |
|
|---|
| 2455 | FNIEMAIMPLPCMPISTRIU128IMM8 iemAImpl_pcmpistri_u128, iemAImpl_pcmpistri_u128_fallback;
|
|---|
| 2456 | FNIEMAIMPLPCMPESTRIU128IMM8 iemAImpl_pcmpestri_u128, iemAImpl_pcmpestri_u128_fallback;
|
|---|
| 2457 | FNIEMAIMPLPCMPISTRMU128IMM8 iemAImpl_pcmpistrm_u128, iemAImpl_pcmpistrm_u128_fallback;
|
|---|
| 2458 | FNIEMAIMPLPCMPESTRMU128IMM8 iemAImpl_pcmpestrm_u128, iemAImpl_pcmpestrm_u128_fallback;
|
|---|
| 2459 |
|
|---|
| 2460 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pclmulqdq_u128, iemAImpl_pclmulqdq_u128_fallback;
|
|---|
| 2461 | FNIEMAIMPLMEDIAOPTF3U128IMM8 iemAImpl_vpclmulqdq_u128, iemAImpl_vpclmulqdq_u128_fallback;
|
|---|
| 2462 |
|
|---|
| 2463 | FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_mpsadbw_u128, iemAImpl_mpsadbw_u128_fallback;
|
|---|
| 2464 | /** @} */
|
|---|
| 2465 |
|
|---|
| 2466 | /** @name Media Odds and Ends
|
|---|
| 2467 | * @{ */
|
|---|
| 2468 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U8,(uint32_t *puDst, uint8_t uSrc));
|
|---|
| 2469 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U16,(uint32_t *puDst, uint16_t uSrc));
|
|---|
| 2470 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U32,(uint32_t *puDst, uint32_t uSrc));
|
|---|
| 2471 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLCR32U64,(uint32_t *puDst, uint64_t uSrc));
|
|---|
| 2472 | FNIEMAIMPLCR32U8 iemAImpl_crc32_u8, iemAImpl_crc32_u8_fallback;
|
|---|
| 2473 | FNIEMAIMPLCR32U16 iemAImpl_crc32_u16, iemAImpl_crc32_u16_fallback;
|
|---|
| 2474 | FNIEMAIMPLCR32U32 iemAImpl_crc32_u32, iemAImpl_crc32_u32_fallback;
|
|---|
| 2475 | FNIEMAIMPLCR32U64 iemAImpl_crc32_u64, iemAImpl_crc32_u64_fallback;
|
|---|
| 2476 |
|
|---|
| 2477 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL128,(PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint32_t *pEFlags));
|
|---|
| 2478 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFL256,(PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint32_t *pEFlags));
|
|---|
| 2479 | FNIEMAIMPLF2EFL128 iemAImpl_ptest_u128;
|
|---|
| 2480 | FNIEMAIMPLF2EFL256 iemAImpl_vptest_u256, iemAImpl_vptest_u256_fallback;
|
|---|
| 2481 |
|
|---|
| 2482 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
|---|
| 2483 | typedef FNIEMAIMPLSSEF2I32U64 *PFNIEMAIMPLSSEF2I32U64;
|
|---|
| 2484 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint64_t *pu64Src)); /* pu64Src is a double precision floating point. */
|
|---|
| 2485 | typedef FNIEMAIMPLSSEF2I64U64 *PFNIEMAIMPLSSEF2I64U64;
|
|---|
| 2486 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I32U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int32_t *pi32Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
|---|
| 2487 | typedef FNIEMAIMPLSSEF2I32U32 *PFNIEMAIMPLSSEF2I32U32;
|
|---|
| 2488 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2I64U32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, int64_t *pi64Dst, const uint32_t *pu32Src)); /* pu32Src is a single precision floating point. */
|
|---|
| 2489 | typedef FNIEMAIMPLSSEF2I64U32 *PFNIEMAIMPLSSEF2I64U32;
|
|---|
| 2490 |
|
|---|
| 2491 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvttsd2si_i32_r64;
|
|---|
| 2492 | FNIEMAIMPLSSEF2I32U64 iemAImpl_cvtsd2si_i32_r64;
|
|---|
| 2493 |
|
|---|
| 2494 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvttsd2si_i64_r64;
|
|---|
| 2495 | FNIEMAIMPLSSEF2I64U64 iemAImpl_cvtsd2si_i64_r64;
|
|---|
| 2496 |
|
|---|
| 2497 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvttss2si_i32_r32;
|
|---|
| 2498 | FNIEMAIMPLSSEF2I32U32 iemAImpl_cvtss2si_i32_r32;
|
|---|
| 2499 |
|
|---|
| 2500 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvttss2si_i64_r32;
|
|---|
| 2501 | FNIEMAIMPLSSEF2I64U32 iemAImpl_cvtss2si_i64_r32;
|
|---|
| 2502 |
|
|---|
| 2503 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int32_t *pi32Src));
|
|---|
| 2504 | typedef FNIEMAIMPLSSEF2R32I32 *PFNIEMAIMPLSSEF2R32I32;
|
|---|
| 2505 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R32I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT32U pr32Dst, const int64_t *pi64Src));
|
|---|
| 2506 | typedef FNIEMAIMPLSSEF2R32I64 *PFNIEMAIMPLSSEF2R32I64;
|
|---|
| 2507 |
|
|---|
| 2508 | FNIEMAIMPLSSEF2R32I32 iemAImpl_cvtsi2ss_r32_i32;
|
|---|
| 2509 | FNIEMAIMPLSSEF2R32I64 iemAImpl_cvtsi2ss_r32_i64;
|
|---|
| 2510 |
|
|---|
| 2511 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I32,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int32_t *pi32Src));
|
|---|
| 2512 | typedef FNIEMAIMPLSSEF2R64I32 *PFNIEMAIMPLSSEF2R64I32;
|
|---|
| 2513 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSSEF2R64I64,(PCX86FXSTATE pFpuState, uint32_t *pfMxcsr, PRTFLOAT64U pr64Dst, const int64_t *pi64Src));
|
|---|
| 2514 | typedef FNIEMAIMPLSSEF2R64I64 *PFNIEMAIMPLSSEF2R64I64;
|
|---|
| 2515 |
|
|---|
| 2516 | FNIEMAIMPLSSEF2R64I32 iemAImpl_cvtsi2sd_r64_i32;
|
|---|
| 2517 | FNIEMAIMPLSSEF2R64I64 iemAImpl_cvtsi2sd_r64_i64;
|
|---|
| 2518 |
|
|---|
| 2519 |
|
|---|
| 2520 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLF2EFLMXCSR128,(uint32_t *pfMxcsr, uint32_t *pfEFlags, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
|---|
| 2521 | typedef FNIEMAIMPLF2EFLMXCSR128 *PFNIEMAIMPLF2EFLMXCSR128;
|
|---|
| 2522 |
|
|---|
| 2523 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomiss_u128;
|
|---|
| 2524 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomiss_u128, iemAImpl_vucomiss_u128_fallback;
|
|---|
| 2525 |
|
|---|
| 2526 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_ucomisd_u128;
|
|---|
| 2527 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vucomisd_u128, iemAImpl_vucomisd_u128_fallback;
|
|---|
| 2528 |
|
|---|
| 2529 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comiss_u128;
|
|---|
| 2530 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomiss_u128, iemAImpl_vcomiss_u128_fallback;
|
|---|
| 2531 |
|
|---|
| 2532 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_comisd_u128;
|
|---|
| 2533 | FNIEMAIMPLF2EFLMXCSR128 iemAImpl_vcomisd_u128, iemAImpl_vcomisd_u128_fallback;
|
|---|
| 2534 |
|
|---|
| 2535 |
|
|---|
| 2536 | typedef struct IEMMEDIAF2XMMSRC
|
|---|
| 2537 | {
|
|---|
| 2538 | X86XMMREG uSrc1;
|
|---|
| 2539 | X86XMMREG uSrc2;
|
|---|
| 2540 | } IEMMEDIAF2XMMSRC;
|
|---|
| 2541 | typedef IEMMEDIAF2XMMSRC *PIEMMEDIAF2XMMSRC;
|
|---|
| 2542 | typedef const IEMMEDIAF2XMMSRC *PCIEMMEDIAF2XMMSRC;
|
|---|
| 2543 |
|
|---|
| 2544 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRF2XMMIMM8,(uint32_t *pfMxcsr, PX86XMMREG puDst, PCIEMMEDIAF2XMMSRC puSrc, uint8_t bEvil));
|
|---|
| 2545 | typedef FNIEMAIMPLMXCSRF2XMMIMM8 *PFNIEMAIMPLMXCSRF2XMMIMM8;
|
|---|
| 2546 |
|
|---|
| 2547 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpps_u128;
|
|---|
| 2548 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmppd_u128;
|
|---|
| 2549 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpss_u128;
|
|---|
| 2550 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_cmpsd_u128;
|
|---|
| 2551 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundss_u128;
|
|---|
| 2552 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundsd_u128;
|
|---|
| 2553 |
|
|---|
| 2554 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundps_u128, iemAImpl_roundps_u128_fallback;
|
|---|
| 2555 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_roundpd_u128, iemAImpl_roundpd_u128_fallback;
|
|---|
| 2556 |
|
|---|
| 2557 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_dpps_u128, iemAImpl_dpps_u128_fallback;
|
|---|
| 2558 | FNIEMAIMPLMXCSRF2XMMIMM8 iemAImpl_dppd_u128, iemAImpl_dppd_u128_fallback;
|
|---|
| 2559 |
|
|---|
| 2560 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U128,(uint32_t *pfMxcsr, uint64_t *pu64Dst, PCX86XMMREG pSrc));
|
|---|
| 2561 | typedef FNIEMAIMPLMXCSRU64U128 *PFNIEMAIMPLMXCSRU64U128;
|
|---|
| 2562 |
|
|---|
| 2563 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvtpd2pi_u128;
|
|---|
| 2564 | FNIEMAIMPLMXCSRU64U128 iemAImpl_cvttpd2pi_u128;
|
|---|
| 2565 |
|
|---|
| 2566 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU128U64,(uint32_t *pfMxcsr, PX86XMMREG pDst, uint64_t u64Src));
|
|---|
| 2567 | typedef FNIEMAIMPLMXCSRU128U64 *PFNIEMAIMPLMXCSRU128U64;
|
|---|
| 2568 |
|
|---|
| 2569 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2ps_u128;
|
|---|
| 2570 | FNIEMAIMPLMXCSRU128U64 iemAImpl_cvtpi2pd_u128;
|
|---|
| 2571 |
|
|---|
| 2572 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMXCSRU64U64,(uint32_t *pfMxcsr, uint64_t *pu64Dst, uint64_t u64Src));
|
|---|
| 2573 | typedef FNIEMAIMPLMXCSRU64U64 *PFNIEMAIMPLMXCSRU64U64;
|
|---|
| 2574 |
|
|---|
| 2575 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvtps2pi_u128;
|
|---|
| 2576 | FNIEMAIMPLMXCSRU64U64 iemAImpl_cvttps2pi_u128;
|
|---|
| 2577 |
|
|---|
| 2578 | /** @} */
|
|---|
| 2579 |
|
|---|
| 2580 |
|
|---|
| 2581 | /** @name Function tables.
|
|---|
| 2582 | * @{
|
|---|
| 2583 | */
|
|---|
| 2584 |
|
|---|
| 2585 | /**
|
|---|
| 2586 | * Function table for a binary operator providing implementation based on
|
|---|
| 2587 | * operand size.
|
|---|
| 2588 | */
|
|---|
| 2589 | typedef struct IEMOPBINSIZES
|
|---|
| 2590 | {
|
|---|
| 2591 | PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
|
|---|
| 2592 | PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
|
|---|
| 2593 | PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
|
|---|
| 2594 | PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
|
|---|
| 2595 | } IEMOPBINSIZES;
|
|---|
| 2596 | /** Pointer to a binary operator function table. */
|
|---|
| 2597 | typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
|
|---|
| 2598 |
|
|---|
| 2599 |
|
|---|
| 2600 | /**
|
|---|
| 2601 | * Function table for a unary operator providing implementation based on
|
|---|
| 2602 | * operand size.
|
|---|
| 2603 | */
|
|---|
| 2604 | typedef struct IEMOPUNARYSIZES
|
|---|
| 2605 | {
|
|---|
| 2606 | PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
|
|---|
| 2607 | PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
|
|---|
| 2608 | PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
|
|---|
| 2609 | PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
|
|---|
| 2610 | } IEMOPUNARYSIZES;
|
|---|
| 2611 | /** Pointer to a unary operator function table. */
|
|---|
| 2612 | typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
|
|---|
| 2613 |
|
|---|
| 2614 |
|
|---|
| 2615 | /**
|
|---|
| 2616 | * Function table for a shift operator providing implementation based on
|
|---|
| 2617 | * operand size.
|
|---|
| 2618 | */
|
|---|
| 2619 | typedef struct IEMOPSHIFTSIZES
|
|---|
| 2620 | {
|
|---|
| 2621 | PFNIEMAIMPLSHIFTU8 pfnNormalU8;
|
|---|
| 2622 | PFNIEMAIMPLSHIFTU16 pfnNormalU16;
|
|---|
| 2623 | PFNIEMAIMPLSHIFTU32 pfnNormalU32;
|
|---|
| 2624 | PFNIEMAIMPLSHIFTU64 pfnNormalU64;
|
|---|
| 2625 | } IEMOPSHIFTSIZES;
|
|---|
| 2626 | /** Pointer to a shift operator function table. */
|
|---|
| 2627 | typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
|
|---|
| 2628 |
|
|---|
| 2629 |
|
|---|
| 2630 | /**
|
|---|
| 2631 | * Function table for a multiplication or division operation.
|
|---|
| 2632 | */
|
|---|
| 2633 | typedef struct IEMOPMULDIVSIZES
|
|---|
| 2634 | {
|
|---|
| 2635 | PFNIEMAIMPLMULDIVU8 pfnU8;
|
|---|
| 2636 | PFNIEMAIMPLMULDIVU16 pfnU16;
|
|---|
| 2637 | PFNIEMAIMPLMULDIVU32 pfnU32;
|
|---|
| 2638 | PFNIEMAIMPLMULDIVU64 pfnU64;
|
|---|
| 2639 | } IEMOPMULDIVSIZES;
|
|---|
| 2640 | /** Pointer to a multiplication or division operation function table. */
|
|---|
| 2641 | typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
|
|---|
| 2642 |
|
|---|
| 2643 |
|
|---|
| 2644 | /**
|
|---|
| 2645 | * Function table for a double precision shift operator providing implementation
|
|---|
| 2646 | * based on operand size.
|
|---|
| 2647 | */
|
|---|
| 2648 | typedef struct IEMOPSHIFTDBLSIZES
|
|---|
| 2649 | {
|
|---|
| 2650 | PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
|
|---|
| 2651 | PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
|
|---|
| 2652 | PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
|
|---|
| 2653 | } IEMOPSHIFTDBLSIZES;
|
|---|
| 2654 | /** Pointer to a double precision shift function table. */
|
|---|
| 2655 | typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
|
|---|
| 2656 |
|
|---|
| 2657 |
|
|---|
| 2658 | /**
|
|---|
| 2659 | * Function table for media instruction taking two full sized media source
|
|---|
| 2660 | * registers and one full sized destination register (AVX).
|
|---|
| 2661 | */
|
|---|
| 2662 | typedef struct IEMOPMEDIAF3
|
|---|
| 2663 | {
|
|---|
| 2664 | PFNIEMAIMPLMEDIAF3U128 pfnU128;
|
|---|
| 2665 | PFNIEMAIMPLMEDIAF3U256 pfnU256;
|
|---|
| 2666 | } IEMOPMEDIAF3;
|
|---|
| 2667 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
|---|
| 2668 | typedef IEMOPMEDIAF3 const *PCIEMOPMEDIAF3;
|
|---|
| 2669 |
|
|---|
| 2670 | /** @def IEMOPMEDIAF3_INIT_VARS_EX
|
|---|
| 2671 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
|---|
| 2672 | * given functions as initializers. For use in AVX functions where a pair of
|
|---|
| 2673 | * functions are only used once and the function table need not be public. */
|
|---|
| 2674 | #ifndef TST_IEM_CHECK_MC
|
|---|
| 2675 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
|---|
| 2676 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2677 | static IEMOPMEDIAF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
|---|
| 2678 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2679 | # else
|
|---|
| 2680 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2681 | static IEMOPMEDIAF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2682 | # endif
|
|---|
| 2683 | #else
|
|---|
| 2684 | # define IEMOPMEDIAF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
|---|
| 2685 | #endif
|
|---|
| 2686 | /** @def IEMOPMEDIAF3_INIT_VARS
|
|---|
| 2687 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
|---|
| 2688 | * @sa IEMOPMEDIAF3_INIT_VARS_EX */
|
|---|
| 2689 | #define IEMOPMEDIAF3_INIT_VARS(a_InstrNm) \
|
|---|
| 2690 | IEMOPMEDIAF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
|---|
| 2691 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
|---|
| 2692 |
|
|---|
| 2693 | /**
|
|---|
| 2694 | * Function table for media instruction taking two full sized media source
|
|---|
| 2695 | * registers and one full sized destination register, but no additional state
|
|---|
| 2696 | * (AVX).
|
|---|
| 2697 | */
|
|---|
| 2698 | typedef struct IEMOPMEDIAOPTF3
|
|---|
| 2699 | {
|
|---|
| 2700 | PFNIEMAIMPLMEDIAOPTF3U128 pfnU128;
|
|---|
| 2701 | PFNIEMAIMPLMEDIAOPTF3U256 pfnU256;
|
|---|
| 2702 | } IEMOPMEDIAOPTF3;
|
|---|
| 2703 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
|---|
| 2704 | typedef IEMOPMEDIAOPTF3 const *PCIEMOPMEDIAOPTF3;
|
|---|
| 2705 |
|
|---|
| 2706 | /** @def IEMOPMEDIAOPTF3_INIT_VARS_EX
|
|---|
| 2707 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
|---|
| 2708 | * given functions as initializers. For use in AVX functions where a pair of
|
|---|
| 2709 | * functions are only used once and the function table need not be public. */
|
|---|
| 2710 | #ifndef TST_IEM_CHECK_MC
|
|---|
| 2711 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
|---|
| 2712 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2713 | static IEMOPMEDIAOPTF3 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
|---|
| 2714 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2715 | # else
|
|---|
| 2716 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2717 | static IEMOPMEDIAOPTF3 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2718 | # endif
|
|---|
| 2719 | #else
|
|---|
| 2720 | # define IEMOPMEDIAOPTF3_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
|---|
| 2721 | #endif
|
|---|
| 2722 | /** @def IEMOPMEDIAOPTF3_INIT_VARS
|
|---|
| 2723 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
|---|
| 2724 | * @sa IEMOPMEDIAOPTF3_INIT_VARS_EX */
|
|---|
| 2725 | #define IEMOPMEDIAOPTF3_INIT_VARS(a_InstrNm) \
|
|---|
| 2726 | IEMOPMEDIAOPTF3_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
|---|
| 2727 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
|---|
| 2728 |
|
|---|
| 2729 | /**
|
|---|
| 2730 | * Function table for media instruction taking one full sized media source
|
|---|
| 2731 | * registers and one full sized destination register, but no additional state
|
|---|
| 2732 | * (AVX).
|
|---|
| 2733 | */
|
|---|
| 2734 | typedef struct IEMOPMEDIAOPTF2
|
|---|
| 2735 | {
|
|---|
| 2736 | PFNIEMAIMPLMEDIAOPTF2U128 pfnU128;
|
|---|
| 2737 | PFNIEMAIMPLMEDIAOPTF2U256 pfnU256;
|
|---|
| 2738 | } IEMOPMEDIAOPTF2;
|
|---|
| 2739 | /** Pointer to a media operation function table for 2 full sized ops (AVX). */
|
|---|
| 2740 | typedef IEMOPMEDIAOPTF2 const *PCIEMOPMEDIAOPTF2;
|
|---|
| 2741 |
|
|---|
| 2742 | /** @def IEMOPMEDIAOPTF2_INIT_VARS_EX
|
|---|
| 2743 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
|---|
| 2744 | * given functions as initializers. For use in AVX functions where a pair of
|
|---|
| 2745 | * functions are only used once and the function table need not be public. */
|
|---|
| 2746 | #ifndef TST_IEM_CHECK_MC
|
|---|
| 2747 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
|---|
| 2748 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2749 | static IEMOPMEDIAOPTF2 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
|---|
| 2750 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2751 | # else
|
|---|
| 2752 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2753 | static IEMOPMEDIAOPTF2 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2754 | # endif
|
|---|
| 2755 | #else
|
|---|
| 2756 | # define IEMOPMEDIAOPTF2_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
|---|
| 2757 | #endif
|
|---|
| 2758 | /** @def IEMOPMEDIAOPTF2_INIT_VARS
|
|---|
| 2759 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
|---|
| 2760 | * @sa IEMOPMEDIAOPTF2_INIT_VARS_EX */
|
|---|
| 2761 | #define IEMOPMEDIAOPTF2_INIT_VARS(a_InstrNm) \
|
|---|
| 2762 | IEMOPMEDIAOPTF2_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
|---|
| 2763 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
|---|
| 2764 |
|
|---|
| 2765 | /**
|
|---|
| 2766 | * Function table for media instruction taking two full sized media source
|
|---|
| 2767 | * registers and one full sized destination register and an 8-bit immediate, but no additional state
|
|---|
| 2768 | * (AVX).
|
|---|
| 2769 | */
|
|---|
| 2770 | typedef struct IEMOPMEDIAOPTF3IMM8
|
|---|
| 2771 | {
|
|---|
| 2772 | PFNIEMAIMPLMEDIAOPTF3U128IMM8 pfnU128;
|
|---|
| 2773 | PFNIEMAIMPLMEDIAOPTF3U256IMM8 pfnU256;
|
|---|
| 2774 | } IEMOPMEDIAOPTF3IMM8;
|
|---|
| 2775 | /** Pointer to a media operation function table for 3 full sized ops (AVX). */
|
|---|
| 2776 | typedef IEMOPMEDIAOPTF3IMM8 const *PCIEMOPMEDIAOPTF3IMM8;
|
|---|
| 2777 |
|
|---|
| 2778 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX
|
|---|
| 2779 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
|---|
| 2780 | * given functions as initializers. For use in AVX functions where a pair of
|
|---|
| 2781 | * functions are only used once and the function table need not be public. */
|
|---|
| 2782 | #ifndef TST_IEM_CHECK_MC
|
|---|
| 2783 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
|---|
| 2784 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2785 | static IEMOPMEDIAOPTF3IMM8 const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
|---|
| 2786 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2787 | # else
|
|---|
| 2788 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2789 | static IEMOPMEDIAOPTF3IMM8 const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2790 | # endif
|
|---|
| 2791 | #else
|
|---|
| 2792 | # define IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
|---|
| 2793 | #endif
|
|---|
| 2794 | /** @def IEMOPMEDIAOPTF3IMM8_INIT_VARS
|
|---|
| 2795 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
|---|
| 2796 | * @sa IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX */
|
|---|
| 2797 | #define IEMOPMEDIAOPTF3IMM8_INIT_VARS(a_InstrNm) \
|
|---|
| 2798 | IEMOPMEDIAOPTF3IMM8_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
|---|
| 2799 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
|---|
| 2800 | /** @} */
|
|---|
| 2801 |
|
|---|
| 2802 |
|
|---|
| 2803 | /**
|
|---|
| 2804 | * Function table for blend type instruction taking three full sized media source
|
|---|
| 2805 | * registers and one full sized destination register, but no additional state
|
|---|
| 2806 | * (AVX).
|
|---|
| 2807 | */
|
|---|
| 2808 | typedef struct IEMOPBLENDOP
|
|---|
| 2809 | {
|
|---|
| 2810 | PFNIEMAIMPLAVXBLENDU128 pfnU128;
|
|---|
| 2811 | PFNIEMAIMPLAVXBLENDU256 pfnU256;
|
|---|
| 2812 | } IEMOPBLENDOP;
|
|---|
| 2813 | /** Pointer to a media operation function table for 4 full sized ops (AVX). */
|
|---|
| 2814 | typedef IEMOPBLENDOP const *PCIEMOPBLENDOP;
|
|---|
| 2815 |
|
|---|
| 2816 | /** @def IEMOPBLENDOP_INIT_VARS_EX
|
|---|
| 2817 | * Declares a s_Host (x86 & amd64 only) and a s_Fallback variable with the
|
|---|
| 2818 | * given functions as initializers. For use in AVX functions where a pair of
|
|---|
| 2819 | * functions are only used once and the function table need not be public. */
|
|---|
| 2820 | #ifndef TST_IEM_CHECK_MC
|
|---|
| 2821 | # if (defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)) && !defined(IEM_WITHOUT_ASSEMBLY)
|
|---|
| 2822 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnHostU128, a_pfnHostU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2823 | static IEMOPBLENDOP const s_Host = { a_pfnHostU128, a_pfnHostU256 }; \
|
|---|
| 2824 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2825 | # else
|
|---|
| 2826 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) \
|
|---|
| 2827 | static IEMOPBLENDOP const s_Fallback = { a_pfnFallbackU128, a_pfnFallbackU256 }
|
|---|
| 2828 | # endif
|
|---|
| 2829 | #else
|
|---|
| 2830 | # define IEMOPBLENDOP_INIT_VARS_EX(a_pfnU128, a_pfnU256, a_pfnFallbackU128, a_pfnFallbackU256) (void)0
|
|---|
| 2831 | #endif
|
|---|
| 2832 | /** @def IEMOPBLENDOP_INIT_VARS
|
|---|
| 2833 | * Generate AVX function tables for the @a a_InstrNm instruction.
|
|---|
| 2834 | * @sa IEMOPBLENDOP_INIT_VARS_EX */
|
|---|
| 2835 | #define IEMOPBLENDOP_INIT_VARS(a_InstrNm) \
|
|---|
| 2836 | IEMOPBLENDOP_INIT_VARS_EX(RT_CONCAT3(iemAImpl_,a_InstrNm,_u128), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256),\
|
|---|
| 2837 | RT_CONCAT3(iemAImpl_,a_InstrNm,_u128_fallback), RT_CONCAT3(iemAImpl_,a_InstrNm,_u256_fallback))
|
|---|
| 2838 |
|
|---|
| 2839 |
|
|---|
| 2840 | /** @name SSE/AVX single/double precision floating point operations.
|
|---|
| 2841 | * @{ */
|
|---|
| 2842 | /**
|
|---|
| 2843 | * A SSE result.
|
|---|
| 2844 | */
|
|---|
| 2845 | typedef struct IEMSSERESULT
|
|---|
| 2846 | {
|
|---|
| 2847 | /** The output value. */
|
|---|
| 2848 | X86XMMREG uResult;
|
|---|
| 2849 | /** The output status. */
|
|---|
| 2850 | uint32_t MXCSR;
|
|---|
| 2851 | } IEMSSERESULT;
|
|---|
| 2852 | AssertCompileMemberOffset(IEMSSERESULT, MXCSR, 128 / 8);
|
|---|
| 2853 | /** Pointer to a SSE result. */
|
|---|
| 2854 | typedef IEMSSERESULT *PIEMSSERESULT;
|
|---|
| 2855 | /** Pointer to a const SSE result. */
|
|---|
| 2856 | typedef IEMSSERESULT const *PCIEMSSERESULT;
|
|---|
| 2857 |
|
|---|
| 2858 |
|
|---|
| 2859 | /**
|
|---|
| 2860 | * A AVX128 result.
|
|---|
| 2861 | */
|
|---|
| 2862 | typedef struct IEMAVX128RESULT
|
|---|
| 2863 | {
|
|---|
| 2864 | /** The output value. */
|
|---|
| 2865 | X86XMMREG uResult;
|
|---|
| 2866 | /** The output status. */
|
|---|
| 2867 | uint32_t MXCSR;
|
|---|
| 2868 | } IEMAVX128RESULT;
|
|---|
| 2869 | AssertCompileMemberOffset(IEMAVX128RESULT, MXCSR, 128 / 8);
|
|---|
| 2870 | /** Pointer to a AVX128 result. */
|
|---|
| 2871 | typedef IEMAVX128RESULT *PIEMAVX128RESULT;
|
|---|
| 2872 | /** Pointer to a const AVX128 result. */
|
|---|
| 2873 | typedef IEMAVX128RESULT const *PCIEMAVX128RESULT;
|
|---|
| 2874 |
|
|---|
| 2875 |
|
|---|
| 2876 | /**
|
|---|
| 2877 | * A AVX256 result.
|
|---|
| 2878 | */
|
|---|
| 2879 | typedef struct IEMAVX256RESULT
|
|---|
| 2880 | {
|
|---|
| 2881 | /** The output value. */
|
|---|
| 2882 | X86YMMREG uResult;
|
|---|
| 2883 | /** The output status. */
|
|---|
| 2884 | uint32_t MXCSR;
|
|---|
| 2885 | } IEMAVX256RESULT;
|
|---|
| 2886 | AssertCompileMemberOffset(IEMAVX256RESULT, MXCSR, 256 / 8);
|
|---|
| 2887 | /** Pointer to a AVX256 result. */
|
|---|
| 2888 | typedef IEMAVX256RESULT *PIEMAVX256RESULT;
|
|---|
| 2889 | /** Pointer to a const AVX256 result. */
|
|---|
| 2890 | typedef IEMAVX256RESULT const *PCIEMAVX256RESULT;
|
|---|
| 2891 |
|
|---|
| 2892 |
|
|---|
| 2893 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
|---|
| 2894 | typedef FNIEMAIMPLFPSSEF2U128 *PFNIEMAIMPLFPSSEF2U128;
|
|---|
| 2895 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R32,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
|---|
| 2896 | typedef FNIEMAIMPLFPSSEF2U128R32 *PFNIEMAIMPLFPSSEF2U128R32;
|
|---|
| 2897 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPSSEF2U128R64,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
|---|
| 2898 | typedef FNIEMAIMPLFPSSEF2U128R64 *PFNIEMAIMPLFPSSEF2U128R64;
|
|---|
| 2899 |
|
|---|
| 2900 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2));
|
|---|
| 2901 | typedef FNIEMAIMPLFPAVXF3U128 *PFNIEMAIMPLFPAVXF3U128;
|
|---|
| 2902 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R32,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT32U pr32Src2));
|
|---|
| 2903 | typedef FNIEMAIMPLFPAVXF3U128R32 *PFNIEMAIMPLFPAVXF3U128R32;
|
|---|
| 2904 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U128R64,(PX86XSAVEAREA pExtState, PIEMAVX128RESULT pResult, PCX86XMMREG puSrc1, PCRTFLOAT64U pr64Src2));
|
|---|
| 2905 | typedef FNIEMAIMPLFPAVXF3U128R64 *PFNIEMAIMPLFPAVXF3U128R64;
|
|---|
| 2906 |
|
|---|
| 2907 | typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPAVXF3U256,(PX86XSAVEAREA pExtState, PIEMAVX256RESULT pResult, PCX86YMMREG puSrc1, PCX86YMMREG puSrc2));
|
|---|
| 2908 | typedef FNIEMAIMPLFPAVXF3U256 *PFNIEMAIMPLFPAVXF3U256;
|
|---|
| 2909 |
|
|---|
| 2910 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addps_u128;
|
|---|
| 2911 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addpd_u128;
|
|---|
| 2912 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulps_u128;
|
|---|
| 2913 | FNIEMAIMPLFPSSEF2U128 iemAImpl_mulpd_u128;
|
|---|
| 2914 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subps_u128;
|
|---|
| 2915 | FNIEMAIMPLFPSSEF2U128 iemAImpl_subpd_u128;
|
|---|
| 2916 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minps_u128;
|
|---|
| 2917 | FNIEMAIMPLFPSSEF2U128 iemAImpl_minpd_u128;
|
|---|
| 2918 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divps_u128;
|
|---|
| 2919 | FNIEMAIMPLFPSSEF2U128 iemAImpl_divpd_u128;
|
|---|
| 2920 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxps_u128;
|
|---|
| 2921 | FNIEMAIMPLFPSSEF2U128 iemAImpl_maxpd_u128;
|
|---|
| 2922 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddps_u128;
|
|---|
| 2923 | FNIEMAIMPLFPSSEF2U128 iemAImpl_haddpd_u128;
|
|---|
| 2924 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubps_u128;
|
|---|
| 2925 | FNIEMAIMPLFPSSEF2U128 iemAImpl_hsubpd_u128;
|
|---|
| 2926 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtps_u128;
|
|---|
| 2927 | FNIEMAIMPLFPSSEF2U128 iemAImpl_rsqrtps_u128;
|
|---|
| 2928 | FNIEMAIMPLFPSSEF2U128 iemAImpl_sqrtpd_u128;
|
|---|
| 2929 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubps_u128;
|
|---|
| 2930 | FNIEMAIMPLFPSSEF2U128 iemAImpl_addsubpd_u128;
|
|---|
| 2931 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2ps_u128;
|
|---|
| 2932 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2pd_u128;
|
|---|
| 2933 |
|
|---|
| 2934 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2ps_u128;
|
|---|
| 2935 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtps2dq_u128;
|
|---|
| 2936 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttps2dq_u128;
|
|---|
| 2937 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvttpd2dq_u128;
|
|---|
| 2938 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtdq2pd_u128;
|
|---|
| 2939 | FNIEMAIMPLFPSSEF2U128 iemAImpl_cvtpd2dq_u128;
|
|---|
| 2940 |
|
|---|
| 2941 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_addss_u128_r32;
|
|---|
| 2942 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_addsd_u128_r64;
|
|---|
| 2943 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_mulss_u128_r32;
|
|---|
| 2944 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_mulsd_u128_r64;
|
|---|
| 2945 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_subss_u128_r32;
|
|---|
| 2946 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_subsd_u128_r64;
|
|---|
| 2947 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_minss_u128_r32;
|
|---|
| 2948 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_minsd_u128_r64;
|
|---|
| 2949 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_divss_u128_r32;
|
|---|
| 2950 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_divsd_u128_r64;
|
|---|
| 2951 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_maxss_u128_r32;
|
|---|
| 2952 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_maxsd_u128_r64;
|
|---|
| 2953 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_cvtss2sd_u128_r32;
|
|---|
| 2954 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_cvtsd2ss_u128_r64;
|
|---|
| 2955 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_sqrtss_u128_r32;
|
|---|
| 2956 | FNIEMAIMPLFPSSEF2U128R64 iemAImpl_sqrtsd_u128_r64;
|
|---|
| 2957 | FNIEMAIMPLFPSSEF2U128R32 iemAImpl_rsqrtss_u128_r32;
|
|---|
| 2958 |
|
|---|
| 2959 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddps_u128, iemAImpl_vaddps_u128_fallback;
|
|---|
| 2960 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddpd_u128, iemAImpl_vaddpd_u128_fallback;
|
|---|
| 2961 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulps_u128, iemAImpl_vmulps_u128_fallback;
|
|---|
| 2962 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmulpd_u128, iemAImpl_vmulpd_u128_fallback;
|
|---|
| 2963 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubps_u128, iemAImpl_vsubps_u128_fallback;
|
|---|
| 2964 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsubpd_u128, iemAImpl_vsubpd_u128_fallback;
|
|---|
| 2965 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminps_u128, iemAImpl_vminps_u128_fallback;
|
|---|
| 2966 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vminpd_u128, iemAImpl_vminpd_u128_fallback;
|
|---|
| 2967 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivps_u128, iemAImpl_vdivps_u128_fallback;
|
|---|
| 2968 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivpd_u128, iemAImpl_vdivpd_u128_fallback;
|
|---|
| 2969 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxps_u128, iemAImpl_vmaxps_u128_fallback;
|
|---|
| 2970 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxpd_u128, iemAImpl_vmaxpd_u128_fallback;
|
|---|
| 2971 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddps_u128, iemAImpl_vhaddps_u128_fallback;
|
|---|
| 2972 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhaddpd_u128, iemAImpl_vhaddpd_u128_fallback;
|
|---|
| 2973 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubps_u128, iemAImpl_vhsubps_u128_fallback;
|
|---|
| 2974 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vhsubpd_u128, iemAImpl_vhsubpd_u128_fallback;
|
|---|
| 2975 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtps_u128, iemAImpl_vsqrtps_u128_fallback;
|
|---|
| 2976 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vsqrtpd_u128, iemAImpl_vsqrtpd_u128_fallback;
|
|---|
| 2977 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubps_u128, iemAImpl_vaddsubps_u128_fallback;
|
|---|
| 2978 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddsubpd_u128, iemAImpl_vaddsubpd_u128_fallback;
|
|---|
| 2979 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtpd2ps_u128, iemAImpl_vcvtpd2ps_u128_fallback;
|
|---|
| 2980 | FNIEMAIMPLFPAVXF3U128 iemAImpl_vcvtps2pd_u128, iemAImpl_vcvtps2pd_u128_fallback;
|
|---|
| 2981 |
|
|---|
| 2982 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vaddss_u128_r32, iemAImpl_vaddss_u128_r32_fallback;
|
|---|
| 2983 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vaddsd_u128_r64, iemAImpl_vaddsd_u128_r64_fallback;
|
|---|
| 2984 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmulss_u128_r32, iemAImpl_vmulss_u128_r32_fallback;
|
|---|
| 2985 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmulsd_u128_r64, iemAImpl_vmulsd_u128_r64_fallback;
|
|---|
| 2986 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsubss_u128_r32, iemAImpl_vsubss_u128_r32_fallback;
|
|---|
| 2987 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsubsd_u128_r64, iemAImpl_vsubsd_u128_r64_fallback;
|
|---|
| 2988 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vminss_u128_r32, iemAImpl_vminss_u128_r32_fallback;
|
|---|
| 2989 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vminsd_u128_r64, iemAImpl_vminsd_u128_r64_fallback;
|
|---|
| 2990 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vdivss_u128_r32, iemAImpl_vdivss_u128_r32_fallback;
|
|---|
| 2991 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vdivsd_u128_r64, iemAImpl_vdivsd_u128_r64_fallback;
|
|---|
| 2992 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vmaxss_u128_r32, iemAImpl_vmaxss_u128_r32_fallback;
|
|---|
| 2993 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vmaxsd_u128_r64, iemAImpl_vmaxsd_u128_r64_fallback;
|
|---|
| 2994 | FNIEMAIMPLFPAVXF3U128R32 iemAImpl_vsqrtss_u128_r32, iemAImpl_vsqrtss_u128_r32_fallback;
|
|---|
| 2995 | FNIEMAIMPLFPAVXF3U128R64 iemAImpl_vsqrtsd_u128_r64, iemAImpl_vsqrtsd_u128_r64_fallback;
|
|---|
| 2996 |
|
|---|
| 2997 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddps_u256, iemAImpl_vaddps_u256_fallback;
|
|---|
| 2998 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddpd_u256, iemAImpl_vaddpd_u256_fallback;
|
|---|
| 2999 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulps_u256, iemAImpl_vmulps_u256_fallback;
|
|---|
| 3000 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmulpd_u256, iemAImpl_vmulpd_u256_fallback;
|
|---|
| 3001 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubps_u256, iemAImpl_vsubps_u256_fallback;
|
|---|
| 3002 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vsubpd_u256, iemAImpl_vsubpd_u256_fallback;
|
|---|
| 3003 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminps_u256, iemAImpl_vminps_u256_fallback;
|
|---|
| 3004 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vminpd_u256, iemAImpl_vminpd_u256_fallback;
|
|---|
| 3005 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivps_u256, iemAImpl_vdivps_u256_fallback;
|
|---|
| 3006 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivpd_u256, iemAImpl_vdivpd_u256_fallback;
|
|---|
| 3007 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxps_u256, iemAImpl_vmaxps_u256_fallback;
|
|---|
| 3008 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxpd_u256, iemAImpl_vmaxpd_u256_fallback;
|
|---|
| 3009 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddps_u256, iemAImpl_vhaddps_u256_fallback;
|
|---|
| 3010 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddpd_u256, iemAImpl_vhaddpd_u256_fallback;
|
|---|
| 3011 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubps_u256, iemAImpl_vhsubps_u256_fallback;
|
|---|
| 3012 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhsubpd_u256, iemAImpl_vhsubpd_u256_fallback;
|
|---|
| 3013 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubps_u256, iemAImpl_vhaddsubps_u256_fallback;
|
|---|
| 3014 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vhaddsubpd_u256, iemAImpl_vhaddsubpd_u256_fallback;
|
|---|
| 3015 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtpd2ps_u256, iemAImpl_vcvtpd2ps_u256_fallback;
|
|---|
| 3016 | FNIEMAIMPLFPAVXF3U256 iemAImpl_vcvtps2pd_u256, iemAImpl_vcvtps2pd_u256_fallback;
|
|---|
| 3017 | /** @} */
|
|---|
| 3018 |
|
|---|
| 3019 | /** @name C instruction implementations for anything slightly complicated.
|
|---|
| 3020 | * @{ */
|
|---|
| 3021 |
|
|---|
| 3022 | /**
|
|---|
| 3023 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3024 | * no extra arguments.
|
|---|
| 3025 | *
|
|---|
| 3026 | * @param a_Name The name of the type.
|
|---|
| 3027 | */
|
|---|
| 3028 | # define IEM_CIMPL_DECL_TYPE_0(a_Name) \
|
|---|
| 3029 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
|---|
| 3030 | /**
|
|---|
| 3031 | * For defining a C instruction implementation function taking no extra
|
|---|
| 3032 | * arguments.
|
|---|
| 3033 | *
|
|---|
| 3034 | * @param a_Name The name of the function
|
|---|
| 3035 | */
|
|---|
| 3036 | # define IEM_CIMPL_DEF_0(a_Name) \
|
|---|
| 3037 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
|---|
| 3038 | /**
|
|---|
| 3039 | * Prototype version of IEM_CIMPL_DEF_0.
|
|---|
| 3040 | */
|
|---|
| 3041 | # define IEM_CIMPL_PROTO_0(a_Name) \
|
|---|
| 3042 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr))
|
|---|
| 3043 | /**
|
|---|
| 3044 | * For calling a C instruction implementation function taking no extra
|
|---|
| 3045 | * arguments.
|
|---|
| 3046 | *
|
|---|
| 3047 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3048 | * change these later.
|
|---|
| 3049 | *
|
|---|
| 3050 | * @param a_fn The name of the function.
|
|---|
| 3051 | */
|
|---|
| 3052 | # define IEM_CIMPL_CALL_0(a_fn) a_fn(pVCpu, cbInstr)
|
|---|
| 3053 |
|
|---|
| 3054 | /**
|
|---|
| 3055 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3056 | * one extra argument.
|
|---|
| 3057 | *
|
|---|
| 3058 | * @param a_Name The name of the type.
|
|---|
| 3059 | * @param a_Type0 The argument type.
|
|---|
| 3060 | * @param a_Arg0 The argument name.
|
|---|
| 3061 | */
|
|---|
| 3062 | # define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
|
|---|
| 3063 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
|---|
| 3064 | /**
|
|---|
| 3065 | * For defining a C instruction implementation function taking one extra
|
|---|
| 3066 | * argument.
|
|---|
| 3067 | *
|
|---|
| 3068 | * @param a_Name The name of the function
|
|---|
| 3069 | * @param a_Type0 The argument type.
|
|---|
| 3070 | * @param a_Arg0 The argument name.
|
|---|
| 3071 | */
|
|---|
| 3072 | # define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
|
|---|
| 3073 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
|---|
| 3074 | /**
|
|---|
| 3075 | * Prototype version of IEM_CIMPL_DEF_1.
|
|---|
| 3076 | */
|
|---|
| 3077 | # define IEM_CIMPL_PROTO_1(a_Name, a_Type0, a_Arg0) \
|
|---|
| 3078 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0))
|
|---|
| 3079 | /**
|
|---|
| 3080 | * For calling a C instruction implementation function taking one extra
|
|---|
| 3081 | * argument.
|
|---|
| 3082 | *
|
|---|
| 3083 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3084 | * change these later.
|
|---|
| 3085 | *
|
|---|
| 3086 | * @param a_fn The name of the function.
|
|---|
| 3087 | * @param a0 The name of the 1st argument.
|
|---|
| 3088 | */
|
|---|
| 3089 | # define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pVCpu, cbInstr, (a0))
|
|---|
| 3090 |
|
|---|
| 3091 | /**
|
|---|
| 3092 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3093 | * two extra arguments.
|
|---|
| 3094 | *
|
|---|
| 3095 | * @param a_Name The name of the type.
|
|---|
| 3096 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3097 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3098 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3099 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3100 | */
|
|---|
| 3101 | # define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
|---|
| 3102 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
|---|
| 3103 | /**
|
|---|
| 3104 | * For defining a C instruction implementation function taking two extra
|
|---|
| 3105 | * arguments.
|
|---|
| 3106 | *
|
|---|
| 3107 | * @param a_Name The name of the function.
|
|---|
| 3108 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3109 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3110 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3111 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3112 | */
|
|---|
| 3113 | # define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
|---|
| 3114 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
|---|
| 3115 | /**
|
|---|
| 3116 | * Prototype version of IEM_CIMPL_DEF_2.
|
|---|
| 3117 | */
|
|---|
| 3118 | # define IEM_CIMPL_PROTO_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
|
|---|
| 3119 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
|
|---|
| 3120 | /**
|
|---|
| 3121 | * For calling a C instruction implementation function taking two extra
|
|---|
| 3122 | * arguments.
|
|---|
| 3123 | *
|
|---|
| 3124 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3125 | * change these later.
|
|---|
| 3126 | *
|
|---|
| 3127 | * @param a_fn The name of the function.
|
|---|
| 3128 | * @param a0 The name of the 1st argument.
|
|---|
| 3129 | * @param a1 The name of the 2nd argument.
|
|---|
| 3130 | */
|
|---|
| 3131 | # define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pVCpu, cbInstr, (a0), (a1))
|
|---|
| 3132 |
|
|---|
| 3133 | /**
|
|---|
| 3134 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3135 | * three extra arguments.
|
|---|
| 3136 | *
|
|---|
| 3137 | * @param a_Name The name of the type.
|
|---|
| 3138 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3139 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3140 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3141 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3142 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3143 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3144 | */
|
|---|
| 3145 | # define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
|---|
| 3146 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
|---|
| 3147 | /**
|
|---|
| 3148 | * For defining a C instruction implementation function taking three extra
|
|---|
| 3149 | * arguments.
|
|---|
| 3150 | *
|
|---|
| 3151 | * @param a_Name The name of the function.
|
|---|
| 3152 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3153 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3154 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3155 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3156 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3157 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3158 | */
|
|---|
| 3159 | # define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
|---|
| 3160 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
|---|
| 3161 | /**
|
|---|
| 3162 | * Prototype version of IEM_CIMPL_DEF_3.
|
|---|
| 3163 | */
|
|---|
| 3164 | # define IEM_CIMPL_PROTO_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
|
|---|
| 3165 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
|
|---|
| 3166 | /**
|
|---|
| 3167 | * For calling a C instruction implementation function taking three extra
|
|---|
| 3168 | * arguments.
|
|---|
| 3169 | *
|
|---|
| 3170 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3171 | * change these later.
|
|---|
| 3172 | *
|
|---|
| 3173 | * @param a_fn The name of the function.
|
|---|
| 3174 | * @param a0 The name of the 1st argument.
|
|---|
| 3175 | * @param a1 The name of the 2nd argument.
|
|---|
| 3176 | * @param a2 The name of the 3rd argument.
|
|---|
| 3177 | */
|
|---|
| 3178 | # define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pVCpu, cbInstr, (a0), (a1), (a2))
|
|---|
| 3179 |
|
|---|
| 3180 |
|
|---|
| 3181 | /**
|
|---|
| 3182 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3183 | * four extra arguments.
|
|---|
| 3184 | *
|
|---|
| 3185 | * @param a_Name The name of the type.
|
|---|
| 3186 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3187 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3188 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3189 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3190 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3191 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3192 | * @param a_Type3 The type of the 4th argument.
|
|---|
| 3193 | * @param a_Arg3 The name of the 4th argument.
|
|---|
| 3194 | */
|
|---|
| 3195 | # define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
|---|
| 3196 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
|
|---|
| 3197 | /**
|
|---|
| 3198 | * For defining a C instruction implementation function taking four extra
|
|---|
| 3199 | * arguments.
|
|---|
| 3200 | *
|
|---|
| 3201 | * @param a_Name The name of the function.
|
|---|
| 3202 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3203 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3204 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3205 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3206 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3207 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3208 | * @param a_Type3 The type of the 4th argument.
|
|---|
| 3209 | * @param a_Arg3 The name of the 4th argument.
|
|---|
| 3210 | */
|
|---|
| 3211 | # define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
|---|
| 3212 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
|---|
| 3213 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
|---|
| 3214 | /**
|
|---|
| 3215 | * Prototype version of IEM_CIMPL_DEF_4.
|
|---|
| 3216 | */
|
|---|
| 3217 | # define IEM_CIMPL_PROTO_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
|
|---|
| 3218 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
|---|
| 3219 | a_Type2 a_Arg2, a_Type3 a_Arg3))
|
|---|
| 3220 | /**
|
|---|
| 3221 | * For calling a C instruction implementation function taking four extra
|
|---|
| 3222 | * arguments.
|
|---|
| 3223 | *
|
|---|
| 3224 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3225 | * change these later.
|
|---|
| 3226 | *
|
|---|
| 3227 | * @param a_fn The name of the function.
|
|---|
| 3228 | * @param a0 The name of the 1st argument.
|
|---|
| 3229 | * @param a1 The name of the 2nd argument.
|
|---|
| 3230 | * @param a2 The name of the 3rd argument.
|
|---|
| 3231 | * @param a3 The name of the 4th argument.
|
|---|
| 3232 | */
|
|---|
| 3233 | # define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3))
|
|---|
| 3234 |
|
|---|
| 3235 |
|
|---|
| 3236 | /**
|
|---|
| 3237 | * For typedef'ing or declaring a C instruction implementation function taking
|
|---|
| 3238 | * five extra arguments.
|
|---|
| 3239 | *
|
|---|
| 3240 | * @param a_Name The name of the type.
|
|---|
| 3241 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3242 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3243 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3244 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3245 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3246 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3247 | * @param a_Type3 The type of the 4th argument.
|
|---|
| 3248 | * @param a_Arg3 The name of the 4th argument.
|
|---|
| 3249 | * @param a_Type4 The type of the 5th argument.
|
|---|
| 3250 | * @param a_Arg4 The name of the 5th argument.
|
|---|
| 3251 | */
|
|---|
| 3252 | # define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
|---|
| 3253 | IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, \
|
|---|
| 3254 | a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
|
|---|
| 3255 | a_Type3 a_Arg3, a_Type4 a_Arg4))
|
|---|
| 3256 | /**
|
|---|
| 3257 | * For defining a C instruction implementation function taking five extra
|
|---|
| 3258 | * arguments.
|
|---|
| 3259 | *
|
|---|
| 3260 | * @param a_Name The name of the function.
|
|---|
| 3261 | * @param a_Type0 The type of the 1st argument
|
|---|
| 3262 | * @param a_Arg0 The name of the 1st argument.
|
|---|
| 3263 | * @param a_Type1 The type of the 2nd argument.
|
|---|
| 3264 | * @param a_Arg1 The name of the 2nd argument.
|
|---|
| 3265 | * @param a_Type2 The type of the 3rd argument.
|
|---|
| 3266 | * @param a_Arg2 The name of the 3rd argument.
|
|---|
| 3267 | * @param a_Type3 The type of the 4th argument.
|
|---|
| 3268 | * @param a_Arg3 The name of the 4th argument.
|
|---|
| 3269 | * @param a_Type4 The type of the 5th argument.
|
|---|
| 3270 | * @param a_Arg4 The name of the 5th argument.
|
|---|
| 3271 | */
|
|---|
| 3272 | # define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
|---|
| 3273 | IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
|---|
| 3274 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
|---|
| 3275 | /**
|
|---|
| 3276 | * Prototype version of IEM_CIMPL_DEF_5.
|
|---|
| 3277 | */
|
|---|
| 3278 | # define IEM_CIMPL_PROTO_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
|
|---|
| 3279 | IEM_DECL_IMPL_PROTO(VBOXSTRICTRC, a_Name, (PVMCPUCC pVCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
|
|---|
| 3280 | a_Type2 a_Arg2, a_Type3 a_Arg3, a_Type4 a_Arg4))
|
|---|
| 3281 | /**
|
|---|
| 3282 | * For calling a C instruction implementation function taking five extra
|
|---|
| 3283 | * arguments.
|
|---|
| 3284 | *
|
|---|
| 3285 | * This special call macro adds default arguments to the call and allow us to
|
|---|
| 3286 | * change these later.
|
|---|
| 3287 | *
|
|---|
| 3288 | * @param a_fn The name of the function.
|
|---|
| 3289 | * @param a0 The name of the 1st argument.
|
|---|
| 3290 | * @param a1 The name of the 2nd argument.
|
|---|
| 3291 | * @param a2 The name of the 3rd argument.
|
|---|
| 3292 | * @param a3 The name of the 4th argument.
|
|---|
| 3293 | * @param a4 The name of the 5th argument.
|
|---|
| 3294 | */
|
|---|
| 3295 | # define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pVCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
|
|---|
| 3296 |
|
|---|
| 3297 | /** @} */
|
|---|
| 3298 |
|
|---|
| 3299 |
|
|---|
| 3300 | /** @name Opcode Decoder Function Types.
|
|---|
| 3301 | * @{ */
|
|---|
| 3302 |
|
|---|
| 3303 | /** @typedef PFNIEMOP
|
|---|
| 3304 | * Pointer to an opcode decoder function.
|
|---|
| 3305 | */
|
|---|
| 3306 |
|
|---|
| 3307 | /** @def FNIEMOP_DEF
|
|---|
| 3308 | * Define an opcode decoder function.
|
|---|
| 3309 | *
|
|---|
| 3310 | * We're using macors for this so that adding and removing parameters as well as
|
|---|
| 3311 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL
|
|---|
| 3312 | *
|
|---|
| 3313 | * @param a_Name The function name.
|
|---|
| 3314 | */
|
|---|
| 3315 |
|
|---|
| 3316 | /** @typedef PFNIEMOPRM
|
|---|
| 3317 | * Pointer to an opcode decoder function with RM byte.
|
|---|
| 3318 | */
|
|---|
| 3319 |
|
|---|
| 3320 | /** @def FNIEMOPRM_DEF
|
|---|
| 3321 | * Define an opcode decoder function with RM byte.
|
|---|
| 3322 | *
|
|---|
| 3323 | * We're using macors for this so that adding and removing parameters as well as
|
|---|
| 3324 | * tweaking compiler specific attributes becomes easier. See FNIEMOP_CALL_1
|
|---|
| 3325 | *
|
|---|
| 3326 | * @param a_Name The function name.
|
|---|
| 3327 | */
|
|---|
| 3328 |
|
|---|
| 3329 | #if defined(__GNUC__) && defined(RT_ARCH_X86)
|
|---|
| 3330 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOP)(PVMCPUCC pVCpu);
|
|---|
| 3331 | typedef VBOXSTRICTRC (__attribute__((__fastcall__)) * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
|---|
| 3332 | # define FNIEMOP_DEF(a_Name) \
|
|---|
| 3333 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu)
|
|---|
| 3334 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
|---|
| 3335 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
|---|
| 3336 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
|---|
| 3337 | IEM_STATIC VBOXSTRICTRC __attribute__((__fastcall__, __nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
|---|
| 3338 |
|
|---|
| 3339 | #elif defined(_MSC_VER) && defined(RT_ARCH_X86)
|
|---|
| 3340 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOP)(PVMCPUCC pVCpu);
|
|---|
| 3341 | typedef VBOXSTRICTRC (__fastcall * PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
|---|
| 3342 | # define FNIEMOP_DEF(a_Name) \
|
|---|
| 3343 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3344 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
|---|
| 3345 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3346 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
|---|
| 3347 | IEM_STATIC /*__declspec(naked)*/ VBOXSTRICTRC __fastcall a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3348 |
|
|---|
| 3349 | #elif defined(__GNUC__) && !defined(IEM_WITH_THROW_CATCH)
|
|---|
| 3350 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
|---|
| 3351 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
|---|
| 3352 | # define FNIEMOP_DEF(a_Name) \
|
|---|
| 3353 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu)
|
|---|
| 3354 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
|---|
| 3355 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0)
|
|---|
| 3356 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
|---|
| 3357 | IEM_STATIC VBOXSTRICTRC __attribute__((__nothrow__)) a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1)
|
|---|
| 3358 |
|
|---|
| 3359 | #else
|
|---|
| 3360 | typedef VBOXSTRICTRC (* PFNIEMOP)(PVMCPUCC pVCpu);
|
|---|
| 3361 | typedef VBOXSTRICTRC (* PFNIEMOPRM)(PVMCPUCC pVCpu, uint8_t bRm);
|
|---|
| 3362 | # define FNIEMOP_DEF(a_Name) \
|
|---|
| 3363 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3364 | # define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
|
|---|
| 3365 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3366 | # define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
|
|---|
| 3367 | IEM_STATIC VBOXSTRICTRC a_Name(PVMCPUCC pVCpu, a_Type0 a_Name0, a_Type1 a_Name1) IEM_NOEXCEPT_MAY_LONGJMP
|
|---|
| 3368 |
|
|---|
| 3369 | #endif
|
|---|
| 3370 | #define FNIEMOPRM_DEF(a_Name) FNIEMOP_DEF_1(a_Name, uint8_t, bRm)
|
|---|
| 3371 |
|
|---|
| 3372 | /**
|
|---|
| 3373 | * Call an opcode decoder function.
|
|---|
| 3374 | *
|
|---|
| 3375 | * We're using macors for this so that adding and removing parameters can be
|
|---|
| 3376 | * done as we please. See FNIEMOP_DEF.
|
|---|
| 3377 | */
|
|---|
| 3378 | #define FNIEMOP_CALL(a_pfn) (a_pfn)(pVCpu)
|
|---|
| 3379 |
|
|---|
| 3380 | /**
|
|---|
| 3381 | * Call a common opcode decoder function taking one extra argument.
|
|---|
| 3382 | *
|
|---|
| 3383 | * We're using macors for this so that adding and removing parameters can be
|
|---|
| 3384 | * done as we please. See FNIEMOP_DEF_1.
|
|---|
| 3385 | */
|
|---|
| 3386 | #define FNIEMOP_CALL_1(a_pfn, a0) (a_pfn)(pVCpu, a0)
|
|---|
| 3387 |
|
|---|
| 3388 | /**
|
|---|
| 3389 | * Call a common opcode decoder function taking one extra argument.
|
|---|
| 3390 | *
|
|---|
| 3391 | * We're using macors for this so that adding and removing parameters can be
|
|---|
| 3392 | * done as we please. See FNIEMOP_DEF_1.
|
|---|
| 3393 | */
|
|---|
| 3394 | #define FNIEMOP_CALL_2(a_pfn, a0, a1) (a_pfn)(pVCpu, a0, a1)
|
|---|
| 3395 | /** @} */
|
|---|
| 3396 |
|
|---|
| 3397 |
|
|---|
| 3398 | /** @name Misc Helpers
|
|---|
| 3399 | * @{ */
|
|---|
| 3400 |
|
|---|
| 3401 | /** Used to shut up GCC warnings about variables that 'may be used uninitialized'
|
|---|
| 3402 | * due to GCC lacking knowledge about the value range of a switch. */
|
|---|
| 3403 | #if RT_CPLUSPLUS_PREREQ(202000)
|
|---|
| 3404 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: [[unlikely]] AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
|---|
| 3405 | #else
|
|---|
| 3406 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
|
|---|
| 3407 | #endif
|
|---|
| 3408 |
|
|---|
| 3409 | /** Variant of IEM_NOT_REACHED_DEFAULT_CASE_RET that returns a custom value. */
|
|---|
| 3410 | #if RT_CPLUSPLUS_PREREQ(202000)
|
|---|
| 3411 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: [[unlikely]] AssertFailedReturn(a_RetValue)
|
|---|
| 3412 | #else
|
|---|
| 3413 | # define IEM_NOT_REACHED_DEFAULT_CASE_RET2(a_RetValue) default: AssertFailedReturn(a_RetValue)
|
|---|
| 3414 | #endif
|
|---|
| 3415 |
|
|---|
| 3416 | /**
|
|---|
| 3417 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
|---|
| 3418 | * occation.
|
|---|
| 3419 | */
|
|---|
| 3420 | #ifdef LOG_ENABLED
|
|---|
| 3421 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
|---|
| 3422 | do { \
|
|---|
| 3423 | /*Log*/ LogAlways(("%s: returning IEM_RETURN_ASPECT_NOT_IMPLEMENTED (line %d)\n", __FUNCTION__, __LINE__)); \
|
|---|
| 3424 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
|---|
| 3425 | } while (0)
|
|---|
| 3426 | #else
|
|---|
| 3427 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED() \
|
|---|
| 3428 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
|---|
| 3429 | #endif
|
|---|
| 3430 |
|
|---|
| 3431 | /**
|
|---|
| 3432 | * Returns IEM_RETURN_ASPECT_NOT_IMPLEMENTED, and in debug builds logs the
|
|---|
| 3433 | * occation using the supplied logger statement.
|
|---|
| 3434 | *
|
|---|
| 3435 | * @param a_LoggerArgs What to log on failure.
|
|---|
| 3436 | */
|
|---|
| 3437 | #ifdef LOG_ENABLED
|
|---|
| 3438 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
|---|
| 3439 | do { \
|
|---|
| 3440 | LogAlways((LOG_FN_FMT ": ", __PRETTY_FUNCTION__)); LogAlways(a_LoggerArgs); \
|
|---|
| 3441 | /*LogFunc(a_LoggerArgs);*/ \
|
|---|
| 3442 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED; \
|
|---|
| 3443 | } while (0)
|
|---|
| 3444 | #else
|
|---|
| 3445 | # define IEM_RETURN_ASPECT_NOT_IMPLEMENTED_LOG(a_LoggerArgs) \
|
|---|
| 3446 | return VERR_IEM_ASPECT_NOT_IMPLEMENTED
|
|---|
| 3447 | #endif
|
|---|
| 3448 |
|
|---|
| 3449 | /**
|
|---|
| 3450 | * Check if we're currently executing in real or virtual 8086 mode.
|
|---|
| 3451 | *
|
|---|
| 3452 | * @returns @c true if it is, @c false if not.
|
|---|
| 3453 | * @param a_pVCpu The IEM state of the current CPU.
|
|---|
| 3454 | */
|
|---|
| 3455 | #define IEM_IS_REAL_OR_V86_MODE(a_pVCpu) (CPUMIsGuestInRealOrV86ModeEx(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3456 |
|
|---|
| 3457 | /**
|
|---|
| 3458 | * Check if we're currently executing in virtual 8086 mode.
|
|---|
| 3459 | *
|
|---|
| 3460 | * @returns @c true if it is, @c false if not.
|
|---|
| 3461 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3462 | */
|
|---|
| 3463 | #define IEM_IS_V86_MODE(a_pVCpu) (CPUMIsGuestInV86ModeEx(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3464 |
|
|---|
| 3465 | /**
|
|---|
| 3466 | * Check if we're currently executing in long mode.
|
|---|
| 3467 | *
|
|---|
| 3468 | * @returns @c true if it is, @c false if not.
|
|---|
| 3469 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3470 | */
|
|---|
| 3471 | #define IEM_IS_LONG_MODE(a_pVCpu) (CPUMIsGuestInLongModeEx(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3472 |
|
|---|
| 3473 | /**
|
|---|
| 3474 | * Check if we're currently executing in a 64-bit code segment.
|
|---|
| 3475 | *
|
|---|
| 3476 | * @returns @c true if it is, @c false if not.
|
|---|
| 3477 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3478 | */
|
|---|
| 3479 | #define IEM_IS_64BIT_CODE(a_pVCpu) (CPUMIsGuestIn64BitCodeEx(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3480 |
|
|---|
| 3481 | /**
|
|---|
| 3482 | * Check if we're currently executing in real mode.
|
|---|
| 3483 | *
|
|---|
| 3484 | * @returns @c true if it is, @c false if not.
|
|---|
| 3485 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3486 | */
|
|---|
| 3487 | #define IEM_IS_REAL_MODE(a_pVCpu) (CPUMIsGuestInRealModeEx(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3488 |
|
|---|
| 3489 | /**
|
|---|
| 3490 | * Returns a (const) pointer to the CPUMFEATURES for the guest CPU.
|
|---|
| 3491 | * @returns PCCPUMFEATURES
|
|---|
| 3492 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3493 | */
|
|---|
| 3494 | #define IEM_GET_GUEST_CPU_FEATURES(a_pVCpu) (&((a_pVCpu)->CTX_SUFF(pVM)->cpum.ro.GuestFeatures))
|
|---|
| 3495 |
|
|---|
| 3496 | /**
|
|---|
| 3497 | * Returns a (const) pointer to the CPUMFEATURES for the host CPU.
|
|---|
| 3498 | * @returns PCCPUMFEATURES
|
|---|
| 3499 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3500 | */
|
|---|
| 3501 | #define IEM_GET_HOST_CPU_FEATURES(a_pVCpu) (&g_CpumHostFeatures.s)
|
|---|
| 3502 |
|
|---|
| 3503 | /**
|
|---|
| 3504 | * Evaluates to true if we're presenting an Intel CPU to the guest.
|
|---|
| 3505 | */
|
|---|
| 3506 | #define IEM_IS_GUEST_CPU_INTEL(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_INTEL )
|
|---|
| 3507 |
|
|---|
| 3508 | /**
|
|---|
| 3509 | * Evaluates to true if we're presenting an AMD CPU to the guest.
|
|---|
| 3510 | */
|
|---|
| 3511 | #define IEM_IS_GUEST_CPU_AMD(a_pVCpu) ( (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_AMD || (a_pVCpu)->iem.s.enmCpuVendor == CPUMCPUVENDOR_HYGON )
|
|---|
| 3512 |
|
|---|
| 3513 | /**
|
|---|
| 3514 | * Check if the address is canonical.
|
|---|
| 3515 | */
|
|---|
| 3516 | #define IEM_IS_CANONICAL(a_u64Addr) X86_IS_CANONICAL(a_u64Addr)
|
|---|
| 3517 |
|
|---|
| 3518 | /** Checks if the ModR/M byte is in register mode or not. */
|
|---|
| 3519 | #define IEM_IS_MODRM_REG_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT) )
|
|---|
| 3520 | /** Checks if the ModR/M byte is in memory mode or not. */
|
|---|
| 3521 | #define IEM_IS_MODRM_MEM_MODE(a_bRm) ( ((a_bRm) & X86_MODRM_MOD_MASK) != (3 << X86_MODRM_MOD_SHIFT) )
|
|---|
| 3522 |
|
|---|
| 3523 | /**
|
|---|
| 3524 | * Gets the register (reg) part of a ModR/M encoding, with REX.R added in.
|
|---|
| 3525 | *
|
|---|
| 3526 | * For use during decoding.
|
|---|
| 3527 | */
|
|---|
| 3528 | #define IEM_GET_MODRM_REG(a_pVCpu, a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | (a_pVCpu)->iem.s.uRexReg )
|
|---|
| 3529 | /**
|
|---|
| 3530 | * Gets the r/m part of a ModR/M encoding as a register index, with REX.B added in.
|
|---|
| 3531 | *
|
|---|
| 3532 | * For use during decoding.
|
|---|
| 3533 | */
|
|---|
| 3534 | #define IEM_GET_MODRM_RM(a_pVCpu, a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) | (a_pVCpu)->iem.s.uRexB )
|
|---|
| 3535 |
|
|---|
| 3536 | /**
|
|---|
| 3537 | * Gets the register (reg) part of a ModR/M encoding, without REX.R.
|
|---|
| 3538 | *
|
|---|
| 3539 | * For use during decoding.
|
|---|
| 3540 | */
|
|---|
| 3541 | #define IEM_GET_MODRM_REG_8(a_bRm) ( (((a_bRm) >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) )
|
|---|
| 3542 | /**
|
|---|
| 3543 | * Gets the r/m part of a ModR/M encoding as a register index, without REX.B.
|
|---|
| 3544 | *
|
|---|
| 3545 | * For use during decoding.
|
|---|
| 3546 | */
|
|---|
| 3547 | #define IEM_GET_MODRM_RM_8(a_bRm) ( ((a_bRm) & X86_MODRM_RM_MASK) )
|
|---|
| 3548 |
|
|---|
| 3549 | /**
|
|---|
| 3550 | * Combines the prefix REX and ModR/M byte for passing to
|
|---|
| 3551 | * iemOpHlpCalcRmEffAddrThreadedAddr64().
|
|---|
| 3552 | *
|
|---|
| 3553 | * @returns The ModRM byte but with bit 3 set to REX.B and bit 4 to REX.X.
|
|---|
| 3554 | * The two bits are part of the REG sub-field, which isn't needed in
|
|---|
| 3555 | * iemOpHlpCalcRmEffAddrThreadedAddr64().
|
|---|
| 3556 | *
|
|---|
| 3557 | * For use during decoding/recompiling.
|
|---|
| 3558 | */
|
|---|
| 3559 | #define IEM_GET_MODRM_EX(a_pVCpu, a_bRm) \
|
|---|
| 3560 | ( ((a_bRm) & ~X86_MODRM_REG_MASK) \
|
|---|
| 3561 | | (uint8_t)( (pVCpu->iem.s.fPrefixes & (IEM_OP_PRF_REX_B | IEM_OP_PRF_REX_X)) >> (26 - 3) ) )
|
|---|
| 3562 | AssertCompile(IEM_OP_PRF_REX_B == RT_BIT_32(26));
|
|---|
| 3563 | AssertCompile(IEM_OP_PRF_REX_X == RT_BIT_32(27));
|
|---|
| 3564 |
|
|---|
| 3565 | /**
|
|---|
| 3566 | * Gets the effective VEX.VVVV value.
|
|---|
| 3567 | *
|
|---|
| 3568 | * The 4th bit is ignored if not 64-bit code.
|
|---|
| 3569 | * @returns effective V-register value.
|
|---|
| 3570 | * @param a_pVCpu The cross context virtual CPU structure of the calling thread.
|
|---|
| 3571 | */
|
|---|
| 3572 | #define IEM_GET_EFFECTIVE_VVVV(a_pVCpu) \
|
|---|
| 3573 | ((a_pVCpu)->iem.s.enmCpuMode == IEMMODE_64BIT ? (a_pVCpu)->iem.s.uVex3rdReg : (a_pVCpu)->iem.s.uVex3rdReg & 7)
|
|---|
| 3574 |
|
|---|
| 3575 |
|
|---|
| 3576 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
|---|
| 3577 |
|
|---|
| 3578 | /**
|
|---|
| 3579 | * Check if the guest has entered VMX root operation.
|
|---|
| 3580 | */
|
|---|
| 3581 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (CPUMIsGuestInVmxRootMode(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3582 |
|
|---|
| 3583 | /**
|
|---|
| 3584 | * Check if the guest has entered VMX non-root operation.
|
|---|
| 3585 | */
|
|---|
| 3586 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) (CPUMIsGuestInVmxNonRootMode(IEM_GET_CTX(a_pVCpu)))
|
|---|
| 3587 |
|
|---|
| 3588 | /**
|
|---|
| 3589 | * Check if the nested-guest has the given Pin-based VM-execution control set.
|
|---|
| 3590 | */
|
|---|
| 3591 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_PinCtl) \
|
|---|
| 3592 | (CPUMIsGuestVmxPinCtlsSet(IEM_GET_CTX(a_pVCpu), (a_PinCtl)))
|
|---|
| 3593 |
|
|---|
| 3594 | /**
|
|---|
| 3595 | * Check if the nested-guest has the given Processor-based VM-execution control set.
|
|---|
| 3596 | */
|
|---|
| 3597 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_ProcCtl) \
|
|---|
| 3598 | (CPUMIsGuestVmxProcCtlsSet(IEM_GET_CTX(a_pVCpu), (a_ProcCtl)))
|
|---|
| 3599 |
|
|---|
| 3600 | /**
|
|---|
| 3601 | * Check if the nested-guest has the given Secondary Processor-based VM-execution
|
|---|
| 3602 | * control set.
|
|---|
| 3603 | */
|
|---|
| 3604 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_ProcCtl2) \
|
|---|
| 3605 | (CPUMIsGuestVmxProcCtls2Set(IEM_GET_CTX(a_pVCpu), (a_ProcCtl2)))
|
|---|
| 3606 |
|
|---|
| 3607 | /** Gets the guest-physical address of the shadows VMCS for the given VCPU. */
|
|---|
| 3608 | # define IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysShadowVmcs)
|
|---|
| 3609 |
|
|---|
| 3610 | /** Whether a shadow VMCS is present for the given VCPU. */
|
|---|
| 3611 | # define IEM_VMX_HAS_SHADOW_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
|---|
| 3612 |
|
|---|
| 3613 | /** Gets the VMXON region pointer. */
|
|---|
| 3614 | # define IEM_VMX_GET_VMXON_PTR(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmxon)
|
|---|
| 3615 |
|
|---|
| 3616 | /** Gets the guest-physical address of the current VMCS for the given VCPU. */
|
|---|
| 3617 | # define IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs)
|
|---|
| 3618 |
|
|---|
| 3619 | /** Whether a current VMCS is present for the given VCPU. */
|
|---|
| 3620 | # define IEM_VMX_HAS_CURRENT_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_CURRENT_VMCS(a_pVCpu) != NIL_RTGCPHYS)
|
|---|
| 3621 |
|
|---|
| 3622 | /** Assigns the guest-physical address of the current VMCS for the given VCPU. */
|
|---|
| 3623 | # define IEM_VMX_SET_CURRENT_VMCS(a_pVCpu, a_GCPhysVmcs) \
|
|---|
| 3624 | do \
|
|---|
| 3625 | { \
|
|---|
| 3626 | Assert((a_GCPhysVmcs) != NIL_RTGCPHYS); \
|
|---|
| 3627 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = (a_GCPhysVmcs); \
|
|---|
| 3628 | } while (0)
|
|---|
| 3629 |
|
|---|
| 3630 | /** Clears any current VMCS for the given VCPU. */
|
|---|
| 3631 | # define IEM_VMX_CLEAR_CURRENT_VMCS(a_pVCpu) \
|
|---|
| 3632 | do \
|
|---|
| 3633 | { \
|
|---|
| 3634 | (a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmcs = NIL_RTGCPHYS; \
|
|---|
| 3635 | } while (0)
|
|---|
| 3636 |
|
|---|
| 3637 | /**
|
|---|
| 3638 | * Invokes the VMX VM-exit handler for an instruction intercept.
|
|---|
| 3639 | */
|
|---|
| 3640 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) \
|
|---|
| 3641 | do { return iemVmxVmexitInstr((a_pVCpu), (a_uExitReason), (a_cbInstr)); } while (0)
|
|---|
| 3642 |
|
|---|
| 3643 | /**
|
|---|
| 3644 | * Invokes the VMX VM-exit handler for an instruction intercept where the
|
|---|
| 3645 | * instruction provides additional VM-exit information.
|
|---|
| 3646 | */
|
|---|
| 3647 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) \
|
|---|
| 3648 | do { return iemVmxVmexitInstrNeedsInfo((a_pVCpu), (a_uExitReason), (a_uInstrId), (a_cbInstr)); } while (0)
|
|---|
| 3649 |
|
|---|
| 3650 | /**
|
|---|
| 3651 | * Invokes the VMX VM-exit handler for a task switch.
|
|---|
| 3652 | */
|
|---|
| 3653 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) \
|
|---|
| 3654 | do { return iemVmxVmexitTaskSwitch((a_pVCpu), (a_enmTaskSwitch), (a_SelNewTss), (a_cbInstr)); } while (0)
|
|---|
| 3655 |
|
|---|
| 3656 | /**
|
|---|
| 3657 | * Invokes the VMX VM-exit handler for MWAIT.
|
|---|
| 3658 | */
|
|---|
| 3659 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) \
|
|---|
| 3660 | do { return iemVmxVmexitInstrMwait((a_pVCpu), (a_fMonitorArmed), (a_cbInstr)); } while (0)
|
|---|
| 3661 |
|
|---|
| 3662 | /**
|
|---|
| 3663 | * Invokes the VMX VM-exit handler for EPT faults.
|
|---|
| 3664 | */
|
|---|
| 3665 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) \
|
|---|
| 3666 | do { return iemVmxVmexitEpt(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr); } while (0)
|
|---|
| 3667 |
|
|---|
| 3668 | /**
|
|---|
| 3669 | * Invokes the VMX VM-exit handler.
|
|---|
| 3670 | */
|
|---|
| 3671 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) \
|
|---|
| 3672 | do { return iemVmxVmexit((a_pVCpu), (a_uExitReason), (a_uExitQual)); } while (0)
|
|---|
| 3673 |
|
|---|
| 3674 | #else
|
|---|
| 3675 | # define IEM_VMX_IS_ROOT_MODE(a_pVCpu) (false)
|
|---|
| 3676 | # define IEM_VMX_IS_NON_ROOT_MODE(a_pVCpu) (false)
|
|---|
| 3677 | # define IEM_VMX_IS_PINCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
|---|
| 3678 | # define IEM_VMX_IS_PROCCTLS_SET(a_pVCpu, a_cbInstr) (false)
|
|---|
| 3679 | # define IEM_VMX_IS_PROCCTLS2_SET(a_pVCpu, a_cbInstr) (false)
|
|---|
| 3680 | # define IEM_VMX_VMEXIT_INSTR_RET(a_pVCpu, a_uExitReason, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3681 | # define IEM_VMX_VMEXIT_INSTR_NEEDS_INFO_RET(a_pVCpu, a_uExitReason, a_uInstrId, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3682 | # define IEM_VMX_VMEXIT_TASK_SWITCH_RET(a_pVCpu, a_enmTaskSwitch, a_SelNewTss, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3683 | # define IEM_VMX_VMEXIT_MWAIT_RET(a_pVCpu, a_fMonitorArmed, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3684 | # define IEM_VMX_VMEXIT_EPT_RET(a_pVCpu, a_pPtWalk, a_fAccess, a_fSlatFail, a_cbInstr) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3685 | # define IEM_VMX_VMEXIT_TRIPLE_FAULT_RET(a_pVCpu, a_uExitReason, a_uExitQual) do { return VERR_VMX_IPE_1; } while (0)
|
|---|
| 3686 |
|
|---|
| 3687 | #endif
|
|---|
| 3688 |
|
|---|
| 3689 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
|---|
| 3690 | /**
|
|---|
| 3691 | * Check if an SVM control/instruction intercept is set.
|
|---|
| 3692 | */
|
|---|
| 3693 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) \
|
|---|
| 3694 | (CPUMIsGuestSvmCtrlInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_Intercept)))
|
|---|
| 3695 |
|
|---|
| 3696 | /**
|
|---|
| 3697 | * Check if an SVM read CRx intercept is set.
|
|---|
| 3698 | */
|
|---|
| 3699 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
|---|
| 3700 | (CPUMIsGuestSvmReadCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
|---|
| 3701 |
|
|---|
| 3702 | /**
|
|---|
| 3703 | * Check if an SVM write CRx intercept is set.
|
|---|
| 3704 | */
|
|---|
| 3705 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) \
|
|---|
| 3706 | (CPUMIsGuestSvmWriteCRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uCr)))
|
|---|
| 3707 |
|
|---|
| 3708 | /**
|
|---|
| 3709 | * Check if an SVM read DRx intercept is set.
|
|---|
| 3710 | */
|
|---|
| 3711 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
|---|
| 3712 | (CPUMIsGuestSvmReadDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
|---|
| 3713 |
|
|---|
| 3714 | /**
|
|---|
| 3715 | * Check if an SVM write DRx intercept is set.
|
|---|
| 3716 | */
|
|---|
| 3717 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) \
|
|---|
| 3718 | (CPUMIsGuestSvmWriteDRxInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uDr)))
|
|---|
| 3719 |
|
|---|
| 3720 | /**
|
|---|
| 3721 | * Check if an SVM exception intercept is set.
|
|---|
| 3722 | */
|
|---|
| 3723 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) \
|
|---|
| 3724 | (CPUMIsGuestSvmXcptInterceptSet(a_pVCpu, IEM_GET_CTX(a_pVCpu), (a_uVector)))
|
|---|
| 3725 |
|
|---|
| 3726 | /**
|
|---|
| 3727 | * Invokes the SVM \#VMEXIT handler for the nested-guest.
|
|---|
| 3728 | */
|
|---|
| 3729 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \
|
|---|
| 3730 | do { return iemSvmVmexit((a_pVCpu), (a_uExitCode), (a_uExitInfo1), (a_uExitInfo2)); } while (0)
|
|---|
| 3731 |
|
|---|
| 3732 | /**
|
|---|
| 3733 | * Invokes the 'MOV CRx' SVM \#VMEXIT handler after constructing the
|
|---|
| 3734 | * corresponding decode assist information.
|
|---|
| 3735 | */
|
|---|
| 3736 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) \
|
|---|
| 3737 | do \
|
|---|
| 3738 | { \
|
|---|
| 3739 | uint64_t uExitInfo1; \
|
|---|
| 3740 | if ( IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmDecodeAssists \
|
|---|
| 3741 | && (a_enmAccessCrX) == IEMACCESSCRX_MOV_CRX) \
|
|---|
| 3742 | uExitInfo1 = SVM_EXIT1_MOV_CRX_MASK | ((a_iGReg) & 7); \
|
|---|
| 3743 | else \
|
|---|
| 3744 | uExitInfo1 = 0; \
|
|---|
| 3745 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, uExitInfo1, 0); \
|
|---|
| 3746 | } while (0)
|
|---|
| 3747 |
|
|---|
| 3748 | /** Check and handles SVM nested-guest instruction intercept and updates
|
|---|
| 3749 | * NRIP if needed.
|
|---|
| 3750 | */
|
|---|
| 3751 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, a_uExitInfo1, a_uExitInfo2) \
|
|---|
| 3752 | do \
|
|---|
| 3753 | { \
|
|---|
| 3754 | if (IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept)) \
|
|---|
| 3755 | { \
|
|---|
| 3756 | IEM_SVM_UPDATE_NRIP(a_pVCpu); \
|
|---|
| 3757 | IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2); \
|
|---|
| 3758 | } \
|
|---|
| 3759 | } while (0)
|
|---|
| 3760 |
|
|---|
| 3761 | /** Checks and handles SVM nested-guest CR0 read intercept. */
|
|---|
| 3762 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2) \
|
|---|
| 3763 | do \
|
|---|
| 3764 | { \
|
|---|
| 3765 | if (!IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, 0)) \
|
|---|
| 3766 | { /* probably likely */ } \
|
|---|
| 3767 | else \
|
|---|
| 3768 | { \
|
|---|
| 3769 | IEM_SVM_UPDATE_NRIP(a_pVCpu); \
|
|---|
| 3770 | IEM_SVM_VMEXIT_RET(a_pVCpu, SVM_EXIT_READ_CR0, a_uExitInfo1, a_uExitInfo2); \
|
|---|
| 3771 | } \
|
|---|
| 3772 | } while (0)
|
|---|
| 3773 |
|
|---|
| 3774 | /**
|
|---|
| 3775 | * Updates the NextRIP (NRI) field in the nested-guest VMCB.
|
|---|
| 3776 | */
|
|---|
| 3777 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu) \
|
|---|
| 3778 | do { \
|
|---|
| 3779 | if (IEM_GET_GUEST_CPU_FEATURES(a_pVCpu)->fSvmNextRipSave) \
|
|---|
| 3780 | CPUMGuestSvmUpdateNRip(a_pVCpu, IEM_GET_CTX(a_pVCpu), IEM_GET_INSTR_LEN(a_pVCpu)); \
|
|---|
| 3781 | } while (0)
|
|---|
| 3782 |
|
|---|
| 3783 | #else
|
|---|
| 3784 | # define IEM_SVM_IS_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) (false)
|
|---|
| 3785 | # define IEM_SVM_IS_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
|---|
| 3786 | # define IEM_SVM_IS_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (false)
|
|---|
| 3787 | # define IEM_SVM_IS_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
|---|
| 3788 | # define IEM_SVM_IS_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (false)
|
|---|
| 3789 | # define IEM_SVM_IS_XCPT_INTERCEPT_SET(a_pVCpu, a_uVector) (false)
|
|---|
| 3790 | # define IEM_SVM_VMEXIT_RET(a_pVCpu, a_uExitCode, a_uExitInfo1, a_uExitInfo2) do { return VERR_SVM_IPE_1; } while (0)
|
|---|
| 3791 | # define IEM_SVM_CRX_VMEXIT_RET(a_pVCpu, a_uExitCode, a_enmAccessCrX, a_iGReg) do { return VERR_SVM_IPE_1; } while (0)
|
|---|
| 3792 | # define IEM_SVM_CHECK_INSTR_INTERCEPT(a_pVCpu, a_Intercept, a_uExitCode, a_uExitInfo1, a_uExitInfo2) do { } while (0)
|
|---|
| 3793 | # define IEM_SVM_CHECK_READ_CR0_INTERCEPT(a_pVCpu, a_uExitInfo1, a_uExitInfo2) do { } while (0)
|
|---|
| 3794 | # define IEM_SVM_UPDATE_NRIP(a_pVCpu) do { } while (0)
|
|---|
| 3795 |
|
|---|
| 3796 | #endif
|
|---|
| 3797 |
|
|---|
| 3798 | /** @} */
|
|---|
| 3799 |
|
|---|
| 3800 | void iemInitPendingBreakpointsSlow(PVMCPUCC pVCpu);
|
|---|
| 3801 |
|
|---|
| 3802 |
|
|---|
| 3803 | /**
|
|---|
| 3804 | * Selector descriptor table entry as fetched by iemMemFetchSelDesc.
|
|---|
| 3805 | */
|
|---|
| 3806 | typedef union IEMSELDESC
|
|---|
| 3807 | {
|
|---|
| 3808 | /** The legacy view. */
|
|---|
| 3809 | X86DESC Legacy;
|
|---|
| 3810 | /** The long mode view. */
|
|---|
| 3811 | X86DESC64 Long;
|
|---|
| 3812 | } IEMSELDESC;
|
|---|
| 3813 | /** Pointer to a selector descriptor table entry. */
|
|---|
| 3814 | typedef IEMSELDESC *PIEMSELDESC;
|
|---|
| 3815 |
|
|---|
| 3816 | /** @name Raising Exceptions.
|
|---|
| 3817 | * @{ */
|
|---|
| 3818 | VBOXSTRICTRC iemTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, uint32_t uNextEip, uint32_t fFlags,
|
|---|
| 3819 | uint16_t uErr, uint64_t uCr2, RTSEL SelTSS, PIEMSELDESC pNewDescTSS) RT_NOEXCEPT;
|
|---|
| 3820 |
|
|---|
| 3821 | VBOXSTRICTRC iemRaiseXcptOrInt(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector, uint32_t fFlags,
|
|---|
| 3822 | uint16_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
|---|
| 3823 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3824 | DECL_NO_RETURN(void) iemRaiseXcptOrIntJmp(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t u8Vector,
|
|---|
| 3825 | uint32_t fFlags, uint16_t uErr, uint64_t uCr2) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3826 | #endif
|
|---|
| 3827 | VBOXSTRICTRC iemRaiseDivideError(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3828 | VBOXSTRICTRC iemRaiseDebugException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3829 | VBOXSTRICTRC iemRaiseBoundRangeExceeded(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3830 | VBOXSTRICTRC iemRaiseUndefinedOpcode(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3831 | VBOXSTRICTRC iemRaiseDeviceNotAvailable(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3832 | VBOXSTRICTRC iemRaiseTaskSwitchFaultWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
|---|
| 3833 | VBOXSTRICTRC iemRaiseTaskSwitchFaultCurrentTSS(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3834 | VBOXSTRICTRC iemRaiseTaskSwitchFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3835 | VBOXSTRICTRC iemRaiseTaskSwitchFaultBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
|---|
| 3836 | /*VBOXSTRICTRC iemRaiseSelectorNotPresent(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;*/
|
|---|
| 3837 | VBOXSTRICTRC iemRaiseSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
|---|
| 3838 | VBOXSTRICTRC iemRaiseSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
|---|
| 3839 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentBySelector(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
|---|
| 3840 | VBOXSTRICTRC iemRaiseStackSelectorNotPresentWithErr(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
|---|
| 3841 | VBOXSTRICTRC iemRaiseGeneralProtectionFault(PVMCPUCC pVCpu, uint16_t uErr) RT_NOEXCEPT;
|
|---|
| 3842 | VBOXSTRICTRC iemRaiseGeneralProtectionFault0(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3843 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3844 | DECL_NO_RETURN(void) iemRaiseGeneralProtectionFault0Jmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3845 | #endif
|
|---|
| 3846 | VBOXSTRICTRC iemRaiseGeneralProtectionFaultBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
|---|
| 3847 | VBOXSTRICTRC iemRaiseNotCanonical(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3848 | VBOXSTRICTRC iemRaiseSelectorBounds(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
|---|
| 3849 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3850 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3851 | #endif
|
|---|
| 3852 | VBOXSTRICTRC iemRaiseSelectorBoundsBySelector(PVMCPUCC pVCpu, RTSEL Sel) RT_NOEXCEPT;
|
|---|
| 3853 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3854 | DECL_NO_RETURN(void) iemRaiseSelectorBoundsBySelectorJmp(PVMCPUCC pVCpu, RTSEL Sel) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3855 | #endif
|
|---|
| 3856 | VBOXSTRICTRC iemRaiseSelectorInvalidAccess(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) RT_NOEXCEPT;
|
|---|
| 3857 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3858 | DECL_NO_RETURN(void) iemRaiseSelectorInvalidAccessJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3859 | #endif
|
|---|
| 3860 | VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) RT_NOEXCEPT;
|
|---|
| 3861 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3862 | DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3863 | #endif
|
|---|
| 3864 | VBOXSTRICTRC iemRaiseMathFault(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3865 | VBOXSTRICTRC iemRaiseAlignmentCheckException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3866 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3867 | DECL_NO_RETURN(void) iemRaiseAlignmentCheckExceptionJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3868 | #endif
|
|---|
| 3869 | VBOXSTRICTRC iemRaiseSimdFpException(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3870 |
|
|---|
| 3871 | IEM_CIMPL_DEF_0(iemCImplRaiseDivideError);
|
|---|
| 3872 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidLockPrefix);
|
|---|
| 3873 | IEM_CIMPL_DEF_0(iemCImplRaiseInvalidOpcode);
|
|---|
| 3874 |
|
|---|
| 3875 | /**
|
|---|
| 3876 | * Macro for calling iemCImplRaiseDivideError().
|
|---|
| 3877 | *
|
|---|
| 3878 | * This enables us to add/remove arguments and force different levels of
|
|---|
| 3879 | * inlining as we wish.
|
|---|
| 3880 | *
|
|---|
| 3881 | * @return Strict VBox status code.
|
|---|
| 3882 | */
|
|---|
| 3883 | #define IEMOP_RAISE_DIVIDE_ERROR() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseDivideError)
|
|---|
| 3884 |
|
|---|
| 3885 | /**
|
|---|
| 3886 | * Macro for calling iemCImplRaiseInvalidLockPrefix().
|
|---|
| 3887 | *
|
|---|
| 3888 | * This enables us to add/remove arguments and force different levels of
|
|---|
| 3889 | * inlining as we wish.
|
|---|
| 3890 | *
|
|---|
| 3891 | * @return Strict VBox status code.
|
|---|
| 3892 | */
|
|---|
| 3893 | #define IEMOP_RAISE_INVALID_LOCK_PREFIX() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseInvalidLockPrefix)
|
|---|
| 3894 |
|
|---|
| 3895 | /**
|
|---|
| 3896 | * Macro for calling iemCImplRaiseInvalidOpcode().
|
|---|
| 3897 | *
|
|---|
| 3898 | * This enables us to add/remove arguments and force different levels of
|
|---|
| 3899 | * inlining as we wish.
|
|---|
| 3900 | *
|
|---|
| 3901 | * @return Strict VBox status code.
|
|---|
| 3902 | */
|
|---|
| 3903 | #define IEMOP_RAISE_INVALID_OPCODE() IEM_MC_DEFER_TO_CIMPL_0(iemCImplRaiseInvalidOpcode)
|
|---|
| 3904 | /** @} */
|
|---|
| 3905 |
|
|---|
| 3906 | /** @name Register Access.
|
|---|
| 3907 | * @{ */
|
|---|
| 3908 | VBOXSTRICTRC iemRegRipRelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr,
|
|---|
| 3909 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
|---|
| 3910 | VBOXSTRICTRC iemRegRipRelativeJumpS16AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int16_t offNextInstr) RT_NOEXCEPT;
|
|---|
| 3911 | VBOXSTRICTRC iemRegRipRelativeJumpS32AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int32_t offNextInstr,
|
|---|
| 3912 | IEMMODE enmEffOpSize) RT_NOEXCEPT;
|
|---|
| 3913 | VBOXSTRICTRC iemRegRipJumpU16AndFinishClearningRF(PVMCPUCC pVCpu, uint16_t uNewRip) RT_NOEXCEPT;
|
|---|
| 3914 | VBOXSTRICTRC iemRegRipJumpU32AndFinishClearningRF(PVMCPUCC pVCpu, uint32_t uNewRip) RT_NOEXCEPT;
|
|---|
| 3915 | VBOXSTRICTRC iemRegRipJumpU64AndFinishClearningRF(PVMCPUCC pVCpu, uint64_t uNewRip) RT_NOEXCEPT;
|
|---|
| 3916 | /** @} */
|
|---|
| 3917 |
|
|---|
| 3918 | /** @name FPU access and helpers.
|
|---|
| 3919 | * @{ */
|
|---|
| 3920 | void iemFpuPushResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult) RT_NOEXCEPT;
|
|---|
| 3921 | void iemFpuPushResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3922 | void iemFpuPushResultTwo(PVMCPUCC pVCpu, PIEMFPURESULTTWO pResult) RT_NOEXCEPT;
|
|---|
| 3923 | void iemFpuStoreResult(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg) RT_NOEXCEPT;
|
|---|
| 3924 | void iemFpuStoreResultThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg) RT_NOEXCEPT;
|
|---|
| 3925 | void iemFpuStoreResultWithMemOp(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
|---|
| 3926 | uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3927 | void iemFpuStoreResultWithMemOpThenPop(PVMCPUCC pVCpu, PIEMFPURESULT pResult, uint8_t iStReg,
|
|---|
| 3928 | uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3929 | void iemFpuUpdateOpcodeAndIp(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3930 | void iemFpuUpdateFSW(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
|---|
| 3931 | void iemFpuUpdateFSWThenPop(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
|---|
| 3932 | void iemFpuUpdateFSWWithMemOp(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3933 | void iemFpuUpdateFSWThenPopPop(PVMCPUCC pVCpu, uint16_t u16FSW) RT_NOEXCEPT;
|
|---|
| 3934 | void iemFpuUpdateFSWWithMemOpThenPop(PVMCPUCC pVCpu, uint16_t u16FSW, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3935 | void iemFpuStackUnderflow(PVMCPUCC pVCpu, uint8_t iStReg) RT_NOEXCEPT;
|
|---|
| 3936 | void iemFpuStackUnderflowWithMemOp(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3937 | void iemFpuStackUnderflowThenPop(PVMCPUCC pVCpu, uint8_t iStReg) RT_NOEXCEPT;
|
|---|
| 3938 | void iemFpuStackUnderflowWithMemOpThenPop(PVMCPUCC pVCpu, uint8_t iStReg, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3939 | void iemFpuStackUnderflowThenPopPop(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3940 | void iemFpuStackPushUnderflow(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3941 | void iemFpuStackPushUnderflowTwo(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3942 | void iemFpuStackPushOverflow(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3943 | void iemFpuStackPushOverflowWithMemOp(PVMCPUCC pVCpu, uint8_t iEffSeg, RTGCPTR GCPtrEff) RT_NOEXCEPT;
|
|---|
| 3944 | /** @} */
|
|---|
| 3945 |
|
|---|
| 3946 | /** @name SSE+AVX SIMD access and helpers.
|
|---|
| 3947 | * @{ */
|
|---|
| 3948 | void iemSseStoreResult(PVMCPUCC pVCpu, PCIEMSSERESULT pResult, uint8_t iXmmReg) RT_NOEXCEPT;
|
|---|
| 3949 | void iemSseUpdateMxcsr(PVMCPUCC pVCpu, uint32_t fMxcsr) RT_NOEXCEPT;
|
|---|
| 3950 | /** @} */
|
|---|
| 3951 |
|
|---|
| 3952 | /** @name Memory access.
|
|---|
| 3953 | * @{ */
|
|---|
| 3954 |
|
|---|
| 3955 | /** Report a \#GP instead of \#AC and do not restrict to ring-3 */
|
|---|
| 3956 | #define IEM_MEMMAP_F_ALIGN_GP RT_BIT_32(16)
|
|---|
| 3957 | /** SSE access that should report a \#GP instead of \#AC, unless MXCSR.MM=1
|
|---|
| 3958 | * when it works like normal \#AC. Always used with IEM_MEMMAP_F_ALIGN_GP. */
|
|---|
| 3959 | #define IEM_MEMMAP_F_ALIGN_SSE RT_BIT_32(17)
|
|---|
| 3960 | /** If \#AC is applicable, raise it. Always used with IEM_MEMMAP_F_ALIGN_GP.
|
|---|
| 3961 | * Users include FXSAVE & FXRSTOR. */
|
|---|
| 3962 | #define IEM_MEMMAP_F_ALIGN_GP_OR_AC RT_BIT_32(18)
|
|---|
| 3963 |
|
|---|
| 3964 | VBOXSTRICTRC iemMemMap(PVMCPUCC pVCpu, void **ppvMem, size_t cbMem, uint8_t iSegReg, RTGCPTR GCPtrMem,
|
|---|
| 3965 | uint32_t fAccess, uint32_t uAlignCtl) RT_NOEXCEPT;
|
|---|
| 3966 | VBOXSTRICTRC iemMemCommitAndUnmap(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
|---|
| 3967 | #ifndef IN_RING3
|
|---|
| 3968 | VBOXSTRICTRC iemMemCommitAndUnmapPostponeTroubleToR3(PVMCPUCC pVCpu, void *pvMem, uint32_t fAccess) RT_NOEXCEPT;
|
|---|
| 3969 | #endif
|
|---|
| 3970 | void iemMemRollback(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 3971 | VBOXSTRICTRC iemMemApplySegment(PVMCPUCC pVCpu, uint32_t fAccess, uint8_t iSegReg, size_t cbMem, PRTGCPTR pGCPtrMem) RT_NOEXCEPT;
|
|---|
| 3972 | VBOXSTRICTRC iemMemMarkSelDescAccessed(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT;
|
|---|
| 3973 | VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t cbAccess, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT;
|
|---|
| 3974 |
|
|---|
| 3975 | #ifdef IEM_WITH_CODE_TLB
|
|---|
| 3976 | void iemOpcodeFetchBytesJmp(PVMCPUCC pVCpu, size_t cbDst, void *pvDst) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3977 | #else
|
|---|
| 3978 | VBOXSTRICTRC iemOpcodeFetchMoreBytes(PVMCPUCC pVCpu, size_t cbMin) RT_NOEXCEPT;
|
|---|
| 3979 | #endif
|
|---|
| 3980 | #ifdef IEM_WITH_SETJMP
|
|---|
| 3981 | uint8_t iemOpcodeGetNextU8SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3982 | uint16_t iemOpcodeGetNextU16SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3983 | uint32_t iemOpcodeGetNextU32SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3984 | uint64_t iemOpcodeGetNextU64SlowJmp(PVMCPUCC pVCpu) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 3985 | #else
|
|---|
| 3986 | VBOXSTRICTRC iemOpcodeGetNextU8Slow(PVMCPUCC pVCpu, uint8_t *pb) RT_NOEXCEPT;
|
|---|
| 3987 | VBOXSTRICTRC iemOpcodeGetNextS8SxU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
|---|
| 3988 | VBOXSTRICTRC iemOpcodeGetNextS8SxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
|---|
| 3989 | VBOXSTRICTRC iemOpcodeGetNextS8SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
|---|
| 3990 | VBOXSTRICTRC iemOpcodeGetNextU16Slow(PVMCPUCC pVCpu, uint16_t *pu16) RT_NOEXCEPT;
|
|---|
| 3991 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
|---|
| 3992 | VBOXSTRICTRC iemOpcodeGetNextU16ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
|---|
| 3993 | VBOXSTRICTRC iemOpcodeGetNextU32Slow(PVMCPUCC pVCpu, uint32_t *pu32) RT_NOEXCEPT;
|
|---|
| 3994 | VBOXSTRICTRC iemOpcodeGetNextU32ZxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
|---|
| 3995 | VBOXSTRICTRC iemOpcodeGetNextS32SxU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
|---|
| 3996 | VBOXSTRICTRC iemOpcodeGetNextU64Slow(PVMCPUCC pVCpu, uint64_t *pu64) RT_NOEXCEPT;
|
|---|
| 3997 | #endif
|
|---|
| 3998 |
|
|---|
| 3999 | VBOXSTRICTRC iemMemFetchDataU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4000 | VBOXSTRICTRC iemMemFetchDataU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4001 | VBOXSTRICTRC iemMemFetchDataU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4002 | VBOXSTRICTRC iemMemFetchDataU32_ZX_U64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4003 | VBOXSTRICTRC iemMemFetchDataU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4004 | VBOXSTRICTRC iemMemFetchDataU64AlignedU128(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4005 | VBOXSTRICTRC iemMemFetchDataR80(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4006 | VBOXSTRICTRC iemMemFetchDataD80(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4007 | VBOXSTRICTRC iemMemFetchDataU128(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4008 | VBOXSTRICTRC iemMemFetchDataU128AlignedSse(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4009 | VBOXSTRICTRC iemMemFetchDataU256(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4010 | VBOXSTRICTRC iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4011 | VBOXSTRICTRC iemMemFetchDataXdtr(PVMCPUCC pVCpu, uint16_t *pcbLimit, PRTGCPTR pGCPtrBase, uint8_t iSegReg,
|
|---|
| 4012 | RTGCPTR GCPtrMem, IEMMODE enmOpSize) RT_NOEXCEPT;
|
|---|
| 4013 | #ifdef IEM_WITH_SETJMP
|
|---|
| 4014 | uint8_t iemMemFetchDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4015 | uint16_t iemMemFetchDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4016 | uint32_t iemMemFetchDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4017 | uint64_t iemMemFetchDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4018 | uint64_t iemMemFetchDataU64AlignedU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4019 | void iemMemFetchDataR80Jmp(PVMCPUCC pVCpu, PRTFLOAT80U pr80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4020 | void iemMemFetchDataD80Jmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4021 | void iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4022 | void iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4023 | void iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4024 | void iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4025 | #endif
|
|---|
| 4026 |
|
|---|
| 4027 | VBOXSTRICTRC iemMemFetchSysU8(PVMCPUCC pVCpu, uint8_t *pu8Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4028 | VBOXSTRICTRC iemMemFetchSysU16(PVMCPUCC pVCpu, uint16_t *pu16Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4029 | VBOXSTRICTRC iemMemFetchSysU32(PVMCPUCC pVCpu, uint32_t *pu32Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4030 | VBOXSTRICTRC iemMemFetchSysU64(PVMCPUCC pVCpu, uint64_t *pu64Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4031 | VBOXSTRICTRC iemMemFetchSelDesc(PVMCPUCC pVCpu, PIEMSELDESC pDesc, uint16_t uSel, uint8_t uXcpt) RT_NOEXCEPT;
|
|---|
| 4032 |
|
|---|
| 4033 | VBOXSTRICTRC iemMemStoreDataU8(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) RT_NOEXCEPT;
|
|---|
| 4034 | VBOXSTRICTRC iemMemStoreDataU16(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) RT_NOEXCEPT;
|
|---|
| 4035 | VBOXSTRICTRC iemMemStoreDataU32(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) RT_NOEXCEPT;
|
|---|
| 4036 | VBOXSTRICTRC iemMemStoreDataU64(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) RT_NOEXCEPT;
|
|---|
| 4037 | VBOXSTRICTRC iemMemStoreDataU128(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
|---|
| 4038 | VBOXSTRICTRC iemMemStoreDataU128AlignedSse(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT;
|
|---|
| 4039 | VBOXSTRICTRC iemMemStoreDataU256(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
|---|
| 4040 | VBOXSTRICTRC iemMemStoreDataU256AlignedAvx(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT;
|
|---|
| 4041 | VBOXSTRICTRC iemMemStoreDataXdtr(PVMCPUCC pVCpu, uint16_t cbLimit, RTGCPTR GCPtrBase, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT;
|
|---|
| 4042 | #ifdef IEM_WITH_SETJMP
|
|---|
| 4043 | void iemMemStoreDataU8Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint8_t u8Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4044 | void iemMemStoreDataU16Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint16_t u16Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4045 | void iemMemStoreDataU32Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint32_t u32Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4046 | void iemMemStoreDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4047 | void iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4048 | void iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4049 | void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4050 | void iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP;
|
|---|
| 4051 | #endif
|
|---|
| 4052 |
|
|---|
| 4053 | VBOXSTRICTRC iemMemStackPushBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
|---|
| 4054 | void **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
|---|
| 4055 | VBOXSTRICTRC iemMemStackPushCommitSpecial(PVMCPUCC pVCpu, void *pvMem, uint64_t uNewRsp) RT_NOEXCEPT;
|
|---|
| 4056 | VBOXSTRICTRC iemMemStackPushU16(PVMCPUCC pVCpu, uint16_t u16Value) RT_NOEXCEPT;
|
|---|
| 4057 | VBOXSTRICTRC iemMemStackPushU32(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
|---|
| 4058 | VBOXSTRICTRC iemMemStackPushU64(PVMCPUCC pVCpu, uint64_t u64Value) RT_NOEXCEPT;
|
|---|
| 4059 | VBOXSTRICTRC iemMemStackPushU16Ex(PVMCPUCC pVCpu, uint16_t u16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4060 | VBOXSTRICTRC iemMemStackPushU32Ex(PVMCPUCC pVCpu, uint32_t u32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4061 | VBOXSTRICTRC iemMemStackPushU64Ex(PVMCPUCC pVCpu, uint64_t u64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4062 | VBOXSTRICTRC iemMemStackPushU32SReg(PVMCPUCC pVCpu, uint32_t u32Value) RT_NOEXCEPT;
|
|---|
| 4063 | VBOXSTRICTRC iemMemStackPopBeginSpecial(PVMCPUCC pVCpu, size_t cbMem, uint32_t cbAlign,
|
|---|
| 4064 | void const **ppvMem, uint64_t *puNewRsp) RT_NOEXCEPT;
|
|---|
| 4065 | VBOXSTRICTRC iemMemStackPopContinueSpecial(PVMCPUCC pVCpu, size_t off, size_t cbMem,
|
|---|
| 4066 | void const **ppvMem, uint64_t uCurNewRsp) RT_NOEXCEPT;
|
|---|
| 4067 | VBOXSTRICTRC iemMemStackPopDoneSpecial(PVMCPUCC pVCpu, void const *pvMem) RT_NOEXCEPT;
|
|---|
| 4068 | VBOXSTRICTRC iemMemStackPopU16(PVMCPUCC pVCpu, uint16_t *pu16Value) RT_NOEXCEPT;
|
|---|
| 4069 | VBOXSTRICTRC iemMemStackPopU32(PVMCPUCC pVCpu, uint32_t *pu32Value) RT_NOEXCEPT;
|
|---|
| 4070 | VBOXSTRICTRC iemMemStackPopU64(PVMCPUCC pVCpu, uint64_t *pu64Value) RT_NOEXCEPT;
|
|---|
| 4071 | VBOXSTRICTRC iemMemStackPopU16Ex(PVMCPUCC pVCpu, uint16_t *pu16Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4072 | VBOXSTRICTRC iemMemStackPopU32Ex(PVMCPUCC pVCpu, uint32_t *pu32Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4073 | VBOXSTRICTRC iemMemStackPopU64Ex(PVMCPUCC pVCpu, uint64_t *pu64Value, PRTUINT64U pTmpRsp) RT_NOEXCEPT;
|
|---|
| 4074 | /** @} */
|
|---|
| 4075 |
|
|---|
| 4076 | /** @name IEMAllCImpl.cpp
|
|---|
| 4077 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/'
|
|---|
| 4078 | * @{ */
|
|---|
| 4079 | IEM_CIMPL_PROTO_0(iemCImpl_popa_16);
|
|---|
| 4080 | IEM_CIMPL_PROTO_0(iemCImpl_popa_32);
|
|---|
| 4081 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_16);
|
|---|
| 4082 | IEM_CIMPL_PROTO_0(iemCImpl_pusha_32);
|
|---|
| 4083 | IEM_CIMPL_PROTO_1(iemCImpl_pushf, IEMMODE, enmEffOpSize);
|
|---|
| 4084 | IEM_CIMPL_PROTO_1(iemCImpl_popf, IEMMODE, enmEffOpSize);
|
|---|
| 4085 | IEM_CIMPL_PROTO_1(iemCImpl_call_16, uint16_t, uNewPC);
|
|---|
| 4086 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_16, int16_t, offDisp);
|
|---|
| 4087 | IEM_CIMPL_PROTO_1(iemCImpl_call_32, uint32_t, uNewPC);
|
|---|
| 4088 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_32, int32_t, offDisp);
|
|---|
| 4089 | IEM_CIMPL_PROTO_1(iemCImpl_call_64, uint64_t, uNewPC);
|
|---|
| 4090 | IEM_CIMPL_PROTO_1(iemCImpl_call_rel_64, int64_t, offDisp);
|
|---|
| 4091 | IEM_CIMPL_PROTO_3(iemCImpl_FarJmp, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
|---|
| 4092 | IEM_CIMPL_PROTO_3(iemCImpl_callf, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
|---|
| 4093 | typedef IEM_CIMPL_DECL_TYPE_3(FNIEMCIMPLFARBRANCH, uint16_t, uSel, uint64_t, offSeg, IEMMODE, enmEffOpSize);
|
|---|
| 4094 | typedef FNIEMCIMPLFARBRANCH *PFNIEMCIMPLFARBRANCH;
|
|---|
| 4095 | IEM_CIMPL_PROTO_2(iemCImpl_retf, IEMMODE, enmEffOpSize, uint16_t, cbPop);
|
|---|
| 4096 | IEM_CIMPL_PROTO_0(iemCImpl_retn_16);
|
|---|
| 4097 | IEM_CIMPL_PROTO_0(iemCImpl_retn_32);
|
|---|
| 4098 | IEM_CIMPL_PROTO_0(iemCImpl_retn_64);
|
|---|
| 4099 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_16, uint16_t, cbPop);
|
|---|
| 4100 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_32, uint16_t, cbPop);
|
|---|
| 4101 | IEM_CIMPL_PROTO_1(iemCImpl_retn_iw_64, uint16_t, cbPop);
|
|---|
| 4102 | IEM_CIMPL_PROTO_3(iemCImpl_enter, IEMMODE, enmEffOpSize, uint16_t, cbFrame, uint8_t, cParameters);
|
|---|
| 4103 | IEM_CIMPL_PROTO_1(iemCImpl_leave, IEMMODE, enmEffOpSize);
|
|---|
| 4104 | IEM_CIMPL_PROTO_2(iemCImpl_int, uint8_t, u8Int, IEMINT, enmInt);
|
|---|
| 4105 | IEM_CIMPL_PROTO_1(iemCImpl_iret_real_v8086, IEMMODE, enmEffOpSize);
|
|---|
| 4106 | IEM_CIMPL_PROTO_4(iemCImpl_iret_prot_v8086, uint32_t, uNewEip, uint16_t, uNewCs, uint32_t, uNewFlags, uint64_t, uNewRsp);
|
|---|
| 4107 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot_NestedTask, IEMMODE, enmEffOpSize);
|
|---|
| 4108 | IEM_CIMPL_PROTO_1(iemCImpl_iret_prot, IEMMODE, enmEffOpSize);
|
|---|
| 4109 | IEM_CIMPL_PROTO_1(iemCImpl_iret_64bit, IEMMODE, enmEffOpSize);
|
|---|
| 4110 | IEM_CIMPL_PROTO_1(iemCImpl_iret, IEMMODE, enmEffOpSize);
|
|---|
| 4111 | IEM_CIMPL_PROTO_0(iemCImpl_loadall286);
|
|---|
| 4112 | IEM_CIMPL_PROTO_0(iemCImpl_syscall);
|
|---|
| 4113 | IEM_CIMPL_PROTO_0(iemCImpl_sysret);
|
|---|
| 4114 | IEM_CIMPL_PROTO_0(iemCImpl_sysenter);
|
|---|
| 4115 | IEM_CIMPL_PROTO_1(iemCImpl_sysexit, IEMMODE, enmEffOpSize);
|
|---|
| 4116 | IEM_CIMPL_PROTO_2(iemCImpl_LoadSReg, uint8_t, iSegReg, uint16_t, uSel);
|
|---|
| 4117 | IEM_CIMPL_PROTO_2(iemCImpl_load_SReg, uint8_t, iSegReg, uint16_t, uSel);
|
|---|
| 4118 | IEM_CIMPL_PROTO_2(iemCImpl_pop_Sreg, uint8_t, iSegReg, IEMMODE, enmEffOpSize);
|
|---|
| 4119 | IEM_CIMPL_PROTO_5(iemCImpl_load_SReg_Greg, uint16_t, uSel, uint64_t, offSeg, uint8_t, iSegReg, uint8_t, iGReg, IEMMODE, enmEffOpSize);
|
|---|
| 4120 | IEM_CIMPL_PROTO_2(iemCImpl_VerX, uint16_t, uSel, bool, fWrite);
|
|---|
| 4121 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u64, uint64_t *, pu64Dst, uint16_t, uSel, bool, fIsLar);
|
|---|
| 4122 | IEM_CIMPL_PROTO_3(iemCImpl_LarLsl_u16, uint16_t *, pu16Dst, uint16_t, uSel, bool, fIsLar);
|
|---|
| 4123 | IEM_CIMPL_PROTO_3(iemCImpl_lgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
|---|
| 4124 | IEM_CIMPL_PROTO_2(iemCImpl_sgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4125 | IEM_CIMPL_PROTO_3(iemCImpl_lidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc, IEMMODE, enmEffOpSize);
|
|---|
| 4126 | IEM_CIMPL_PROTO_2(iemCImpl_sidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4127 | IEM_CIMPL_PROTO_1(iemCImpl_lldt, uint16_t, uNewLdt);
|
|---|
| 4128 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
|---|
| 4129 | IEM_CIMPL_PROTO_2(iemCImpl_sldt_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4130 | IEM_CIMPL_PROTO_1(iemCImpl_ltr, uint16_t, uNewTr);
|
|---|
| 4131 | IEM_CIMPL_PROTO_2(iemCImpl_str_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
|---|
| 4132 | IEM_CIMPL_PROTO_2(iemCImpl_str_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4133 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Cd, uint8_t, iGReg, uint8_t, iCrReg);
|
|---|
| 4134 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_reg, uint8_t, iGReg, uint8_t, enmEffOpSize);
|
|---|
| 4135 | IEM_CIMPL_PROTO_2(iemCImpl_smsw_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4136 | IEM_CIMPL_PROTO_4(iemCImpl_load_CrX, uint8_t, iCrReg, uint64_t, uNewCrX, IEMACCESSCRX, enmAccessCrX, uint8_t, iGReg);
|
|---|
| 4137 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Cd_Rd, uint8_t, iCrReg, uint8_t, iGReg);
|
|---|
| 4138 | IEM_CIMPL_PROTO_2(iemCImpl_lmsw, uint16_t, u16NewMsw, RTGCPTR, GCPtrEffDst);
|
|---|
| 4139 | IEM_CIMPL_PROTO_0(iemCImpl_clts);
|
|---|
| 4140 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Dd, uint8_t, iGReg, uint8_t, iDrReg);
|
|---|
| 4141 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Dd_Rd, uint8_t, iDrReg, uint8_t, iGReg);
|
|---|
| 4142 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Rd_Td, uint8_t, iGReg, uint8_t, iTrReg);
|
|---|
| 4143 | IEM_CIMPL_PROTO_2(iemCImpl_mov_Td_Rd, uint8_t, iTrReg, uint8_t, iGReg);
|
|---|
| 4144 | IEM_CIMPL_PROTO_1(iemCImpl_invlpg, RTGCPTR, GCPtrPage);
|
|---|
| 4145 | IEM_CIMPL_PROTO_3(iemCImpl_invpcid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvpcidDesc, uint64_t, uInvpcidType);
|
|---|
| 4146 | IEM_CIMPL_PROTO_0(iemCImpl_invd);
|
|---|
| 4147 | IEM_CIMPL_PROTO_0(iemCImpl_wbinvd);
|
|---|
| 4148 | IEM_CIMPL_PROTO_0(iemCImpl_rsm);
|
|---|
| 4149 | IEM_CIMPL_PROTO_0(iemCImpl_rdtsc);
|
|---|
| 4150 | IEM_CIMPL_PROTO_0(iemCImpl_rdtscp);
|
|---|
| 4151 | IEM_CIMPL_PROTO_0(iemCImpl_rdpmc);
|
|---|
| 4152 | IEM_CIMPL_PROTO_0(iemCImpl_rdmsr);
|
|---|
| 4153 | IEM_CIMPL_PROTO_0(iemCImpl_wrmsr);
|
|---|
| 4154 | IEM_CIMPL_PROTO_3(iemCImpl_in, uint16_t, u16Port, bool, fImm, uint8_t, cbReg);
|
|---|
| 4155 | IEM_CIMPL_PROTO_1(iemCImpl_in_eAX_DX, uint8_t, cbReg);
|
|---|
| 4156 | IEM_CIMPL_PROTO_3(iemCImpl_out, uint16_t, u16Port, bool, fImm, uint8_t, cbReg);
|
|---|
| 4157 | IEM_CIMPL_PROTO_1(iemCImpl_out_DX_eAX, uint8_t, cbReg);
|
|---|
| 4158 | IEM_CIMPL_PROTO_0(iemCImpl_cli);
|
|---|
| 4159 | IEM_CIMPL_PROTO_0(iemCImpl_sti);
|
|---|
| 4160 | IEM_CIMPL_PROTO_0(iemCImpl_hlt);
|
|---|
| 4161 | IEM_CIMPL_PROTO_1(iemCImpl_monitor, uint8_t, iEffSeg);
|
|---|
| 4162 | IEM_CIMPL_PROTO_0(iemCImpl_mwait);
|
|---|
| 4163 | IEM_CIMPL_PROTO_0(iemCImpl_swapgs);
|
|---|
| 4164 | IEM_CIMPL_PROTO_0(iemCImpl_cpuid);
|
|---|
| 4165 | IEM_CIMPL_PROTO_1(iemCImpl_aad, uint8_t, bImm);
|
|---|
| 4166 | IEM_CIMPL_PROTO_1(iemCImpl_aam, uint8_t, bImm);
|
|---|
| 4167 | IEM_CIMPL_PROTO_0(iemCImpl_daa);
|
|---|
| 4168 | IEM_CIMPL_PROTO_0(iemCImpl_das);
|
|---|
| 4169 | IEM_CIMPL_PROTO_0(iemCImpl_aaa);
|
|---|
| 4170 | IEM_CIMPL_PROTO_0(iemCImpl_aas);
|
|---|
| 4171 | IEM_CIMPL_PROTO_3(iemCImpl_bound_16, int16_t, idxArray, int16_t, idxLowerBound, int16_t, idxUpperBound);
|
|---|
| 4172 | IEM_CIMPL_PROTO_3(iemCImpl_bound_32, int32_t, idxArray, int32_t, idxLowerBound, int32_t, idxUpperBound);
|
|---|
| 4173 | IEM_CIMPL_PROTO_0(iemCImpl_xgetbv);
|
|---|
| 4174 | IEM_CIMPL_PROTO_0(iemCImpl_xsetbv);
|
|---|
| 4175 | IEM_CIMPL_PROTO_4(iemCImpl_cmpxchg16b_fallback_rendezvous, PRTUINT128U, pu128Dst, PRTUINT128U, pu128RaxRdx,
|
|---|
| 4176 | PRTUINT128U, pu128RbxRcx, uint32_t *, pEFlags);
|
|---|
| 4177 | IEM_CIMPL_PROTO_2(iemCImpl_clflush_clflushopt, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
|---|
| 4178 | IEM_CIMPL_PROTO_1(iemCImpl_finit, bool, fCheckXcpts);
|
|---|
| 4179 | IEM_CIMPL_PROTO_3(iemCImpl_fxsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
|---|
| 4180 | IEM_CIMPL_PROTO_3(iemCImpl_fxrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
|---|
| 4181 | IEM_CIMPL_PROTO_3(iemCImpl_xsave, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
|---|
| 4182 | IEM_CIMPL_PROTO_3(iemCImpl_xrstor, uint8_t, iEffSeg, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize);
|
|---|
| 4183 | IEM_CIMPL_PROTO_2(iemCImpl_stmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
|---|
| 4184 | IEM_CIMPL_PROTO_2(iemCImpl_vstmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
|---|
| 4185 | IEM_CIMPL_PROTO_2(iemCImpl_ldmxcsr, uint8_t, iEffSeg, RTGCPTR, GCPtrEff);
|
|---|
| 4186 | IEM_CIMPL_PROTO_3(iemCImpl_fnstenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4187 | IEM_CIMPL_PROTO_3(iemCImpl_fnsave, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst);
|
|---|
| 4188 | IEM_CIMPL_PROTO_3(iemCImpl_fldenv, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
|---|
| 4189 | IEM_CIMPL_PROTO_3(iemCImpl_frstor, IEMMODE, enmEffOpSize, uint8_t, iEffSeg, RTGCPTR, GCPtrEffSrc);
|
|---|
| 4190 | IEM_CIMPL_PROTO_1(iemCImpl_fldcw, uint16_t, u16Fcw);
|
|---|
| 4191 | IEM_CIMPL_PROTO_1(iemCImpl_fxch_underflow, uint8_t, iStReg);
|
|---|
| 4192 | IEM_CIMPL_PROTO_3(iemCImpl_fcomi_fucomi, uint8_t, iStReg, PFNIEMAIMPLFPUR80EFL, pfnAImpl, bool, fPop);
|
|---|
| 4193 | /** @} */
|
|---|
| 4194 |
|
|---|
| 4195 | /** @name IEMAllCImplStrInstr.cpp.h
|
|---|
| 4196 | * @note sed -e '/IEM_CIMPL_DEF_/!d' -e 's/IEM_CIMPL_DEF_/IEM_CIMPL_PROTO_/' -e 's/$/;/' -e 's/RT_CONCAT4(//' \
|
|---|
| 4197 | * -e 's/,ADDR_SIZE)/64/g' -e 's/,OP_SIZE,/64/g' -e 's/,OP_rAX,/rax/g' IEMAllCImplStrInstr.cpp.h
|
|---|
| 4198 | * @{ */
|
|---|
| 4199 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr16, uint8_t, iEffSeg);
|
|---|
| 4200 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr16, uint8_t, iEffSeg);
|
|---|
| 4201 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m16);
|
|---|
| 4202 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m16);
|
|---|
| 4203 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr16, uint8_t, iEffSeg);
|
|---|
| 4204 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m16);
|
|---|
| 4205 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m16, int8_t, iEffSeg);
|
|---|
| 4206 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr16, bool, fIoChecked);
|
|---|
| 4207 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr16, bool, fIoChecked);
|
|---|
| 4208 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4209 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4210 |
|
|---|
| 4211 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr16, uint8_t, iEffSeg);
|
|---|
| 4212 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr16, uint8_t, iEffSeg);
|
|---|
| 4213 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m16);
|
|---|
| 4214 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m16);
|
|---|
| 4215 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr16, uint8_t, iEffSeg);
|
|---|
| 4216 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m16);
|
|---|
| 4217 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m16, int8_t, iEffSeg);
|
|---|
| 4218 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr16, bool, fIoChecked);
|
|---|
| 4219 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr16, bool, fIoChecked);
|
|---|
| 4220 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4221 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4222 |
|
|---|
| 4223 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr16, uint8_t, iEffSeg);
|
|---|
| 4224 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr16, uint8_t, iEffSeg);
|
|---|
| 4225 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m16);
|
|---|
| 4226 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m16);
|
|---|
| 4227 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr16, uint8_t, iEffSeg);
|
|---|
| 4228 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m16);
|
|---|
| 4229 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m16, int8_t, iEffSeg);
|
|---|
| 4230 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr16, bool, fIoChecked);
|
|---|
| 4231 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr16, bool, fIoChecked);
|
|---|
| 4232 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4233 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr16, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4234 |
|
|---|
| 4235 |
|
|---|
| 4236 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr32, uint8_t, iEffSeg);
|
|---|
| 4237 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr32, uint8_t, iEffSeg);
|
|---|
| 4238 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m32);
|
|---|
| 4239 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m32);
|
|---|
| 4240 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr32, uint8_t, iEffSeg);
|
|---|
| 4241 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m32);
|
|---|
| 4242 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m32, int8_t, iEffSeg);
|
|---|
| 4243 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr32, bool, fIoChecked);
|
|---|
| 4244 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr32, bool, fIoChecked);
|
|---|
| 4245 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4246 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4247 |
|
|---|
| 4248 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr32, uint8_t, iEffSeg);
|
|---|
| 4249 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr32, uint8_t, iEffSeg);
|
|---|
| 4250 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m32);
|
|---|
| 4251 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m32);
|
|---|
| 4252 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr32, uint8_t, iEffSeg);
|
|---|
| 4253 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m32);
|
|---|
| 4254 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m32, int8_t, iEffSeg);
|
|---|
| 4255 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr32, bool, fIoChecked);
|
|---|
| 4256 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr32, bool, fIoChecked);
|
|---|
| 4257 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4258 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4259 |
|
|---|
| 4260 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr32, uint8_t, iEffSeg);
|
|---|
| 4261 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr32, uint8_t, iEffSeg);
|
|---|
| 4262 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m32);
|
|---|
| 4263 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m32);
|
|---|
| 4264 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr32, uint8_t, iEffSeg);
|
|---|
| 4265 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m32);
|
|---|
| 4266 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m32, int8_t, iEffSeg);
|
|---|
| 4267 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr32, bool, fIoChecked);
|
|---|
| 4268 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr32, bool, fIoChecked);
|
|---|
| 4269 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4270 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4271 |
|
|---|
| 4272 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr32, uint8_t, iEffSeg);
|
|---|
| 4273 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr32, uint8_t, iEffSeg);
|
|---|
| 4274 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m32);
|
|---|
| 4275 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m32);
|
|---|
| 4276 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr32, uint8_t, iEffSeg);
|
|---|
| 4277 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m32);
|
|---|
| 4278 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m32, int8_t, iEffSeg);
|
|---|
| 4279 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr32, bool, fIoChecked);
|
|---|
| 4280 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr32, bool, fIoChecked);
|
|---|
| 4281 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4282 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr32, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4283 |
|
|---|
| 4284 |
|
|---|
| 4285 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op8_addr64, uint8_t, iEffSeg);
|
|---|
| 4286 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op8_addr64, uint8_t, iEffSeg);
|
|---|
| 4287 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_al_m64);
|
|---|
| 4288 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_al_m64);
|
|---|
| 4289 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op8_addr64, uint8_t, iEffSeg);
|
|---|
| 4290 | IEM_CIMPL_PROTO_0(iemCImpl_stos_al_m64);
|
|---|
| 4291 | IEM_CIMPL_PROTO_1(iemCImpl_lods_al_m64, int8_t, iEffSeg);
|
|---|
| 4292 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op8_addr64, bool, fIoChecked);
|
|---|
| 4293 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op8_addr64, bool, fIoChecked);
|
|---|
| 4294 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4295 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op8_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4296 |
|
|---|
| 4297 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op16_addr64, uint8_t, iEffSeg);
|
|---|
| 4298 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op16_addr64, uint8_t, iEffSeg);
|
|---|
| 4299 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_ax_m64);
|
|---|
| 4300 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_ax_m64);
|
|---|
| 4301 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op16_addr64, uint8_t, iEffSeg);
|
|---|
| 4302 | IEM_CIMPL_PROTO_0(iemCImpl_stos_ax_m64);
|
|---|
| 4303 | IEM_CIMPL_PROTO_1(iemCImpl_lods_ax_m64, int8_t, iEffSeg);
|
|---|
| 4304 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op16_addr64, bool, fIoChecked);
|
|---|
| 4305 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op16_addr64, bool, fIoChecked);
|
|---|
| 4306 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4307 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op16_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4308 |
|
|---|
| 4309 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op32_addr64, uint8_t, iEffSeg);
|
|---|
| 4310 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op32_addr64, uint8_t, iEffSeg);
|
|---|
| 4311 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_eax_m64);
|
|---|
| 4312 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_eax_m64);
|
|---|
| 4313 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op32_addr64, uint8_t, iEffSeg);
|
|---|
| 4314 | IEM_CIMPL_PROTO_0(iemCImpl_stos_eax_m64);
|
|---|
| 4315 | IEM_CIMPL_PROTO_1(iemCImpl_lods_eax_m64, int8_t, iEffSeg);
|
|---|
| 4316 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op32_addr64, bool, fIoChecked);
|
|---|
| 4317 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op32_addr64, bool, fIoChecked);
|
|---|
| 4318 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4319 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op32_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4320 |
|
|---|
| 4321 | IEM_CIMPL_PROTO_1(iemCImpl_repe_cmps_op64_addr64, uint8_t, iEffSeg);
|
|---|
| 4322 | IEM_CIMPL_PROTO_1(iemCImpl_repne_cmps_op64_addr64, uint8_t, iEffSeg);
|
|---|
| 4323 | IEM_CIMPL_PROTO_0(iemCImpl_repe_scas_rax_m64);
|
|---|
| 4324 | IEM_CIMPL_PROTO_0(iemCImpl_repne_scas_rax_m64);
|
|---|
| 4325 | IEM_CIMPL_PROTO_1(iemCImpl_rep_movs_op64_addr64, uint8_t, iEffSeg);
|
|---|
| 4326 | IEM_CIMPL_PROTO_0(iemCImpl_stos_rax_m64);
|
|---|
| 4327 | IEM_CIMPL_PROTO_1(iemCImpl_lods_rax_m64, int8_t, iEffSeg);
|
|---|
| 4328 | IEM_CIMPL_PROTO_1(iemCImpl_ins_op64_addr64, bool, fIoChecked);
|
|---|
| 4329 | IEM_CIMPL_PROTO_1(iemCImpl_rep_ins_op64_addr64, bool, fIoChecked);
|
|---|
| 4330 | IEM_CIMPL_PROTO_2(iemCImpl_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4331 | IEM_CIMPL_PROTO_2(iemCImpl_rep_outs_op64_addr64, uint8_t, iEffSeg, bool, fIoChecked);
|
|---|
| 4332 | /** @} */
|
|---|
| 4333 |
|
|---|
| 4334 | #ifdef VBOX_WITH_NESTED_HWVIRT_VMX
|
|---|
| 4335 | VBOXSTRICTRC iemVmxVmexit(PVMCPUCC pVCpu, uint32_t uExitReason, uint64_t u64ExitQual) RT_NOEXCEPT;
|
|---|
| 4336 | VBOXSTRICTRC iemVmxVmexitInstr(PVMCPUCC pVCpu, uint32_t uExitReason, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4337 | VBOXSTRICTRC iemVmxVmexitInstrNeedsInfo(PVMCPUCC pVCpu, uint32_t uExitReason, VMXINSTRID uInstrId, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4338 | VBOXSTRICTRC iemVmxVmexitTaskSwitch(PVMCPUCC pVCpu, IEMTASKSWITCH enmTaskSwitch, RTSEL SelNewTss, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4339 | VBOXSTRICTRC iemVmxVmexitEvent(PVMCPUCC pVCpu, uint8_t uVector, uint32_t fFlags, uint32_t uErrCode, uint64_t uCr2, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4340 | VBOXSTRICTRC iemVmxVmexitEventDoubleFault(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 4341 | VBOXSTRICTRC iemVmxVmexitEpt(PVMCPUCC pVCpu, PPGMPTWALK pWalk, uint32_t fAccess, uint32_t fSlatFail, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4342 | VBOXSTRICTRC iemVmxVmexitPreemptTimer(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 4343 | VBOXSTRICTRC iemVmxVmexitInstrMwait(PVMCPUCC pVCpu, bool fMonitorHwArmed, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4344 | VBOXSTRICTRC iemVmxVmexitInstrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port,
|
|---|
| 4345 | bool fImm, uint8_t cbAccess, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4346 | VBOXSTRICTRC iemVmxVmexitInstrStrIo(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint16_t u16Port, uint8_t cbAccess,
|
|---|
| 4347 | bool fRep, VMXEXITINSTRINFO ExitInstrInfo, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4348 | VBOXSTRICTRC iemVmxVmexitInstrMovDrX(PVMCPUCC pVCpu, VMXINSTRID uInstrId, uint8_t iDrReg, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4349 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4350 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr8(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4351 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr3(PVMCPUCC pVCpu, uint64_t uNewCr3, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4352 | VBOXSTRICTRC iemVmxVmexitInstrMovFromCr3(PVMCPUCC pVCpu, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4353 | VBOXSTRICTRC iemVmxVmexitInstrMovToCr0Cr4(PVMCPUCC pVCpu, uint8_t iCrReg, uint64_t *puNewCrX, uint8_t iGReg, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4354 | VBOXSTRICTRC iemVmxVmexitInstrClts(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4355 | VBOXSTRICTRC iemVmxVmexitInstrLmsw(PVMCPUCC pVCpu, uint32_t uGuestCr0, uint16_t *pu16NewMsw,
|
|---|
| 4356 | RTGCPTR GCPtrEffDst, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4357 | VBOXSTRICTRC iemVmxVmexitInstrInvlpg(PVMCPUCC pVCpu, RTGCPTR GCPtrPage, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4358 | VBOXSTRICTRC iemVmxApicWriteEmulation(PVMCPUCC pVCpu) RT_NOEXCEPT;
|
|---|
| 4359 | VBOXSTRICTRC iemVmxVirtApicAccessUnused(PVMCPUCC pVCpu, PRTGCPHYS pGCPhysAccess, size_t cbAccess, uint32_t fAccess) RT_NOEXCEPT;
|
|---|
| 4360 | uint32_t iemVmxVirtApicReadRaw32(PVMCPUCC pVCpu, uint16_t offReg) RT_NOEXCEPT;
|
|---|
| 4361 | void iemVmxVirtApicWriteRaw32(PVMCPUCC pVCpu, uint16_t offReg, uint32_t uReg) RT_NOEXCEPT;
|
|---|
| 4362 | VBOXSTRICTRC iemVmxInvvpid(PVMCPUCC pVCpu, uint8_t cbInstr, uint8_t iEffSeg, RTGCPTR GCPtrInvvpidDesc,
|
|---|
| 4363 | uint64_t u64InvvpidType, PCVMXVEXITINFO pExitInfo) RT_NOEXCEPT;
|
|---|
| 4364 | bool iemVmxIsRdmsrWrmsrInterceptSet(PCVMCPU pVCpu, uint32_t uExitReason, uint32_t idMsr) RT_NOEXCEPT;
|
|---|
| 4365 | IEM_CIMPL_PROTO_0(iemCImpl_vmxoff);
|
|---|
| 4366 | IEM_CIMPL_PROTO_2(iemCImpl_vmxon, uint8_t, iEffSeg, RTGCPTR, GCPtrVmxon);
|
|---|
| 4367 | IEM_CIMPL_PROTO_0(iemCImpl_vmlaunch);
|
|---|
| 4368 | IEM_CIMPL_PROTO_0(iemCImpl_vmresume);
|
|---|
| 4369 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrld, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
|---|
| 4370 | IEM_CIMPL_PROTO_2(iemCImpl_vmptrst, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
|---|
| 4371 | IEM_CIMPL_PROTO_2(iemCImpl_vmclear, uint8_t, iEffSeg, RTGCPTR, GCPtrVmcs);
|
|---|
| 4372 | IEM_CIMPL_PROTO_2(iemCImpl_vmwrite_reg, uint64_t, u64Val, uint64_t, u64VmcsField);
|
|---|
| 4373 | IEM_CIMPL_PROTO_3(iemCImpl_vmwrite_mem, uint8_t, iEffSeg, RTGCPTR, GCPtrVal, uint32_t, u64VmcsField);
|
|---|
| 4374 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg64, uint64_t *, pu64Dst, uint64_t, u64VmcsField);
|
|---|
| 4375 | IEM_CIMPL_PROTO_2(iemCImpl_vmread_reg32, uint64_t *, pu32Dst, uint32_t, u32VmcsField);
|
|---|
| 4376 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg64, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u64VmcsField);
|
|---|
| 4377 | IEM_CIMPL_PROTO_3(iemCImpl_vmread_mem_reg32, uint8_t, iEffSeg, RTGCPTR, GCPtrDst, uint32_t, u32VmcsField);
|
|---|
| 4378 | IEM_CIMPL_PROTO_3(iemCImpl_invvpid, uint8_t, iEffSeg, RTGCPTR, GCPtrInvvpidDesc, uint64_t, uInvvpidType);
|
|---|
| 4379 | IEM_CIMPL_PROTO_3(iemCImpl_invept, uint8_t, iEffSeg, RTGCPTR, GCPtrInveptDesc, uint64_t, uInveptType);
|
|---|
| 4380 | IEM_CIMPL_PROTO_0(iemCImpl_vmx_pause);
|
|---|
| 4381 | #endif
|
|---|
| 4382 |
|
|---|
| 4383 | #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
|
|---|
| 4384 | VBOXSTRICTRC iemSvmVmexit(PVMCPUCC pVCpu, uint64_t uExitCode, uint64_t uExitInfo1, uint64_t uExitInfo2) RT_NOEXCEPT;
|
|---|
| 4385 | VBOXSTRICTRC iemHandleSvmEventIntercept(PVMCPUCC pVCpu, uint8_t u8Vector, uint32_t fFlags, uint32_t uErr, uint64_t uCr2) RT_NOEXCEPT;
|
|---|
| 4386 | VBOXSTRICTRC iemSvmHandleIOIntercept(PVMCPUCC pVCpu, uint16_t u16Port, SVMIOIOTYPE enmIoType, uint8_t cbReg,
|
|---|
| 4387 | uint8_t cAddrSizeBits, uint8_t iEffSeg, bool fRep, bool fStrIo, uint8_t cbInstr) RT_NOEXCEPT;
|
|---|
| 4388 | VBOXSTRICTRC iemSvmHandleMsrIntercept(PVMCPUCC pVCpu, uint32_t idMsr, bool fWrite) RT_NOEXCEPT;
|
|---|
| 4389 | IEM_CIMPL_PROTO_0(iemCImpl_vmrun);
|
|---|
| 4390 | IEM_CIMPL_PROTO_0(iemCImpl_vmload);
|
|---|
| 4391 | IEM_CIMPL_PROTO_0(iemCImpl_vmsave);
|
|---|
| 4392 | IEM_CIMPL_PROTO_0(iemCImpl_clgi);
|
|---|
| 4393 | IEM_CIMPL_PROTO_0(iemCImpl_stgi);
|
|---|
| 4394 | IEM_CIMPL_PROTO_0(iemCImpl_invlpga);
|
|---|
| 4395 | IEM_CIMPL_PROTO_0(iemCImpl_skinit);
|
|---|
| 4396 | IEM_CIMPL_PROTO_0(iemCImpl_svm_pause);
|
|---|
| 4397 | #endif
|
|---|
| 4398 |
|
|---|
| 4399 | IEM_CIMPL_PROTO_0(iemCImpl_vmcall); /* vmx */
|
|---|
| 4400 | IEM_CIMPL_PROTO_0(iemCImpl_vmmcall); /* svm */
|
|---|
| 4401 | IEM_CIMPL_PROTO_1(iemCImpl_Hypercall, uint16_t, uDisOpcode); /* both */
|
|---|
| 4402 |
|
|---|
| 4403 |
|
|---|
| 4404 | extern const PFNIEMOP g_apfnIemInterpretOnlyOneByteMap[256];
|
|---|
| 4405 |
|
|---|
| 4406 | /** @} */
|
|---|
| 4407 |
|
|---|
| 4408 | RT_C_DECLS_END
|
|---|
| 4409 |
|
|---|
| 4410 | #endif /* !VMM_INCLUDED_SRC_include_IEMInternal_h */
|
|---|
| 4411 |
|
|---|
