IEMN8veRecompiler.h@ 102388

Last change on this file since 102388 was 102388, checked in by vboxsync, 17 months ago
VMM/IEM: x86 build fix. bugref:10371
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1	/* $Id: IEMN8veRecompiler.h 102388 2023-11-29 22:31:22Z vboxsync $ */
2	/** @file
3	* IEM - Interpreted Execution Manager - Native Recompiler Internals.
4	*/
5
6	/*
7	* Copyright (C) 2011-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	#ifndef VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h
29	#define VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h
30	#ifndef RT_WITHOUT_PRAGMA_ONCE
31	# pragma once
32	#endif
33
34
35	/** @defgroup grp_iem_n8ve_re Native Recompiler Internals.
36	* @ingroup grp_iem_int
37	* @{
38	*/
39
40	/** @def IEMNATIVE_WITH_TB_DEBUG_INFO
41	* Enables generating internal debug info for better TB disassembly dumping. */
42	#if defined(DEBUG) \|\| defined(DOXYGEN_RUNNING)
43	# define IEMNATIVE_WITH_TB_DEBUG_INFO
44	#endif
45
46
47	/** @name Stack Frame Layout
48	*
49	* @{ */
50	/** The size of the area for stack variables and spills and stuff.
51	* @note This limit is duplicated in the python script(s). We add 0x40 for
52	* alignment padding. */
53	#define IEMNATIVE_FRAME_VAR_SIZE (0xc0 + 0x40)
54	/** Number of 64-bit variable slots (0x100 / 8 = 32. */
55	#define IEMNATIVE_FRAME_VAR_SLOTS (IEMNATIVE_FRAME_VAR_SIZE / 8)
56	AssertCompile(IEMNATIVE_FRAME_VAR_SLOTS == 32);
57
58	#ifdef RT_ARCH_AMD64
59	/** An stack alignment adjustment (between non-volatile register pushes and
60	* the stack variable area, so the latter better aligned). */
61	# define IEMNATIVE_FRAME_ALIGN_SIZE 8
62
63	/** Number of stack arguments slots for calls made from the frame. */
64	# ifdef RT_OS_WINDOWS
65	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 4
66	# else
67	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 2
68	# endif
69	/** Number of any shadow arguments (spill area) for calls we make. */
70	# ifdef RT_OS_WINDOWS
71	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 4
72	# else
73	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 0
74	# endif
75
76	/** Frame pointer (RBP) relative offset of the last push. */
77	# ifdef RT_OS_WINDOWS
78	# define IEMNATIVE_FP_OFF_LAST_PUSH (7 * -8)
79	# else
80	# define IEMNATIVE_FP_OFF_LAST_PUSH (5 * -8)
81	# endif
82	/** Frame pointer (RBP) relative offset of the stack variable area (the lowest
83	* address for it). */
84	# define IEMNATIVE_FP_OFF_STACK_VARS (IEMNATIVE_FP_OFF_LAST_PUSH - IEMNATIVE_FRAME_ALIGN_SIZE - IEMNATIVE_FRAME_VAR_SIZE)
85	/** Frame pointer (RBP) relative offset of the first stack argument for calls. */
86	# define IEMNATIVE_FP_OFF_STACK_ARG0 (IEMNATIVE_FP_OFF_STACK_VARS - IEMNATIVE_FRAME_STACK_ARG_COUNT * 8)
87	/** Frame pointer (RBP) relative offset of the second stack argument for calls. */
88	# define IEMNATIVE_FP_OFF_STACK_ARG1 (IEMNATIVE_FP_OFF_STACK_ARG0 + 8)
89	# ifdef RT_OS_WINDOWS
90	/** Frame pointer (RBP) relative offset of the third stack argument for calls. */
91	# define IEMNATIVE_FP_OFF_STACK_ARG2 (IEMNATIVE_FP_OFF_STACK_ARG0 + 16)
92	/** Frame pointer (RBP) relative offset of the fourth stack argument for calls. */
93	# define IEMNATIVE_FP_OFF_STACK_ARG3 (IEMNATIVE_FP_OFF_STACK_ARG0 + 24)
94	# endif
95
96	# ifdef RT_OS_WINDOWS
97	/** Frame pointer (RBP) relative offset of the first incoming shadow argument. */
98	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG0 (16)
99	/** Frame pointer (RBP) relative offset of the second incoming shadow argument. */
100	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG1 (24)
101	/** Frame pointer (RBP) relative offset of the third incoming shadow argument. */
102	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG2 (32)
103	/** Frame pointer (RBP) relative offset of the fourth incoming shadow argument. */
104	# define IEMNATIVE_FP_OFF_IN_SHADOW_ARG3 (40)
105	# endif
106
107	#elif RT_ARCH_ARM64
108	/** No alignment padding needed for arm64. */
109	# define IEMNATIVE_FRAME_ALIGN_SIZE 0
110	/** No stack argument slots, got 8 registers for arguments will suffice. */
111	# define IEMNATIVE_FRAME_STACK_ARG_COUNT 0
112	/** There are no argument spill area. */
113	# define IEMNATIVE_FRAME_SHADOW_ARG_COUNT 0
114
115	/** Number of saved registers at the top of our stack frame.
116	* This includes the return address and old frame pointer, so x19 thru x30. */
117	# define IEMNATIVE_FRAME_SAVE_REG_COUNT (12)
118	/** The size of the save registered (IEMNATIVE_FRAME_SAVE_REG_COUNT). */
119	# define IEMNATIVE_FRAME_SAVE_REG_SIZE (IEMNATIVE_FRAME_SAVE_REG_COUNT * 8)
120
121	/** Frame pointer (BP) relative offset of the last push. */
122	# define IEMNATIVE_FP_OFF_LAST_PUSH (7 * -8)
123
124	/** Frame pointer (BP) relative offset of the stack variable area (the lowest
125	* address for it). */
126	# define IEMNATIVE_FP_OFF_STACK_VARS (IEMNATIVE_FP_OFF_LAST_PUSH - IEMNATIVE_FRAME_ALIGN_SIZE - IEMNATIVE_FRAME_VAR_SIZE)
127
128	#else
129	# error "port me"
130	#endif
131	/** @} */
132
133
134	/** @name Fixed Register Allocation(s)
135	* @{ */
136	/** @def IEMNATIVE_REG_FIXED_PVMCPU
137	* The number of the register holding the pVCpu pointer. */
138	/** @def IEMNATIVE_REG_FIXED_PCPUMCTX
139	* The number of the register holding the &pVCpu->cpum.GstCtx pointer.
140	* @note This not available on AMD64, only ARM64. */
141	/** @def IEMNATIVE_REG_FIXED_TMP0
142	* Dedicated temporary register.
143	* @todo replace this by a register allocator and content tracker. */
144	/** @def IEMNATIVE_REG_FIXED_MASK
145	* Mask GPRs with fixes assignments, either by us or dictated by the CPU/OS
146	* architecture. */
147	#if defined(RT_ARCH_AMD64) && !defined(DOXYGEN_RUNNING)
148	# define IEMNATIVE_REG_FIXED_PVMCPU X86_GREG_xBX
149	# define IEMNATIVE_REG_FIXED_TMP0 X86_GREG_x11
150	# define IEMNATIVE_REG_FIXED_MASK ( RT_BIT_32(IEMNATIVE_REG_FIXED_PVMCPU) \
151	\| RT_BIT_32(IEMNATIVE_REG_FIXED_TMP0) \
152	\| RT_BIT_32(X86_GREG_xSP) \
153	\| RT_BIT_32(X86_GREG_xBP) )
154
155	#elif defined(RT_ARCH_ARM64) \|\| defined(DOXYGEN_RUNNING)
156	# define IEMNATIVE_REG_FIXED_PVMCPU ARMV8_A64_REG_X28
157	# define IEMNATIVE_REG_FIXED_PCPUMCTX ARMV8_A64_REG_X27
158	# define IEMNATIVE_REG_FIXED_TMP0 ARMV8_A64_REG_X15
159	# define IEMNATIVE_REG_FIXED_MASK ( RT_BIT_32(ARMV8_A64_REG_SP) \
160	\| RT_BIT_32(ARMV8_A64_REG_LR) \
161	\| RT_BIT_32(ARMV8_A64_REG_BP) \
162	\| RT_BIT_32(IEMNATIVE_REG_FIXED_PVMCPU) \
163	\| RT_BIT_32(IEMNATIVE_REG_FIXED_PCPUMCTX) \
164	\| RT_BIT_32(ARMV8_A64_REG_X18) \
165	\| RT_BIT_32(IEMNATIVE_REG_FIXED_TMP0) )
166
167	#else
168	# error "port me"
169	#endif
170	/** @} */
171
172	/** @name Call related registers.
173	* @{ */
174	/** @def IEMNATIVE_CALL_RET_GREG
175	* The return value register. */
176	/** @def IEMNATIVE_CALL_ARG_GREG_COUNT
177	* Number of arguments in registers. */
178	/** @def IEMNATIVE_CALL_ARG0_GREG
179	* The general purpose register carrying argument \#0. */
180	/** @def IEMNATIVE_CALL_ARG1_GREG
181	* The general purpose register carrying argument \#1. */
182	/** @def IEMNATIVE_CALL_ARG2_GREG
183	* The general purpose register carrying argument \#2. */
184	/** @def IEMNATIVE_CALL_ARG3_GREG
185	* The general purpose register carrying argument \#3. */
186	/** @def IEMNATIVE_CALL_VOLATILE_GREG_MASK
187	* Mask of registers the callee will not save and may trash. */
188	#ifdef RT_ARCH_AMD64
189	# define IEMNATIVE_CALL_RET_GREG X86_GREG_xAX
190
191	# ifdef RT_OS_WINDOWS
192	# define IEMNATIVE_CALL_ARG_GREG_COUNT 4
193	# define IEMNATIVE_CALL_ARG0_GREG X86_GREG_xCX
194	# define IEMNATIVE_CALL_ARG1_GREG X86_GREG_xDX
195	# define IEMNATIVE_CALL_ARG2_GREG X86_GREG_x8
196	# define IEMNATIVE_CALL_ARG3_GREG X86_GREG_x9
197	# define IEMNATIVE_CALL_ARGS_GREG_MASK ( RT_BIT_32(IEMNATIVE_CALL_ARG0_GREG) \
198	\| RT_BIT_32(IEMNATIVE_CALL_ARG1_GREG) \
199	\| RT_BIT_32(IEMNATIVE_CALL_ARG2_GREG) \
200	\| RT_BIT_32(IEMNATIVE_CALL_ARG3_GREG) )
201	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(X86_GREG_xAX) \
202	\| RT_BIT_32(X86_GREG_xCX) \
203	\| RT_BIT_32(X86_GREG_xDX) \
204	\| RT_BIT_32(X86_GREG_x8) \
205	\| RT_BIT_32(X86_GREG_x9) \
206	\| RT_BIT_32(X86_GREG_x10) \
207	\| RT_BIT_32(X86_GREG_x11) )
208	# else
209	# define IEMNATIVE_CALL_ARG_GREG_COUNT 6
210	# define IEMNATIVE_CALL_ARG0_GREG X86_GREG_xDI
211	# define IEMNATIVE_CALL_ARG1_GREG X86_GREG_xSI
212	# define IEMNATIVE_CALL_ARG2_GREG X86_GREG_xDX
213	# define IEMNATIVE_CALL_ARG3_GREG X86_GREG_xCX
214	# define IEMNATIVE_CALL_ARG4_GREG X86_GREG_x8
215	# define IEMNATIVE_CALL_ARG5_GREG X86_GREG_x9
216	# define IEMNATIVE_CALL_ARGS_GREG_MASK ( RT_BIT_32(IEMNATIVE_CALL_ARG0_GREG) \
217	\| RT_BIT_32(IEMNATIVE_CALL_ARG1_GREG) \
218	\| RT_BIT_32(IEMNATIVE_CALL_ARG2_GREG) \
219	\| RT_BIT_32(IEMNATIVE_CALL_ARG3_GREG) \
220	\| RT_BIT_32(IEMNATIVE_CALL_ARG4_GREG) \
221	\| RT_BIT_32(IEMNATIVE_CALL_ARG5_GREG) )
222	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(X86_GREG_xAX) \
223	\| RT_BIT_32(X86_GREG_xCX) \
224	\| RT_BIT_32(X86_GREG_xDX) \
225	\| RT_BIT_32(X86_GREG_xDI) \
226	\| RT_BIT_32(X86_GREG_xSI) \
227	\| RT_BIT_32(X86_GREG_x8) \
228	\| RT_BIT_32(X86_GREG_x9) \
229	\| RT_BIT_32(X86_GREG_x10) \
230	\| RT_BIT_32(X86_GREG_x11) )
231	# endif
232
233	#elif defined(RT_ARCH_ARM64)
234	# define IEMNATIVE_CALL_RET_GREG ARMV8_A64_REG_X0
235	# define IEMNATIVE_CALL_ARG_GREG_COUNT 8
236	# define IEMNATIVE_CALL_ARG0_GREG ARMV8_A64_REG_X0
237	# define IEMNATIVE_CALL_ARG1_GREG ARMV8_A64_REG_X1
238	# define IEMNATIVE_CALL_ARG2_GREG ARMV8_A64_REG_X2
239	# define IEMNATIVE_CALL_ARG3_GREG ARMV8_A64_REG_X3
240	# define IEMNATIVE_CALL_ARG4_GREG ARMV8_A64_REG_X4
241	# define IEMNATIVE_CALL_ARG5_GREG ARMV8_A64_REG_X5
242	# define IEMNATIVE_CALL_ARG6_GREG ARMV8_A64_REG_X6
243	# define IEMNATIVE_CALL_ARG7_GREG ARMV8_A64_REG_X7
244	# define IEMNATIVE_CALL_ARGS_GREG_MASK ( RT_BIT_32(ARMV8_A64_REG_X0) \
245	\| RT_BIT_32(ARMV8_A64_REG_X1) \
246	\| RT_BIT_32(ARMV8_A64_REG_X2) \
247	\| RT_BIT_32(ARMV8_A64_REG_X3) \
248	\| RT_BIT_32(ARMV8_A64_REG_X4) \
249	\| RT_BIT_32(ARMV8_A64_REG_X5) \
250	\| RT_BIT_32(ARMV8_A64_REG_X6) \
251	\| RT_BIT_32(ARMV8_A64_REG_X7) )
252	# define IEMNATIVE_CALL_VOLATILE_GREG_MASK ( RT_BIT_32(ARMV8_A64_REG_X0) \
253	\| RT_BIT_32(ARMV8_A64_REG_X1) \
254	\| RT_BIT_32(ARMV8_A64_REG_X2) \
255	\| RT_BIT_32(ARMV8_A64_REG_X3) \
256	\| RT_BIT_32(ARMV8_A64_REG_X4) \
257	\| RT_BIT_32(ARMV8_A64_REG_X5) \
258	\| RT_BIT_32(ARMV8_A64_REG_X6) \
259	\| RT_BIT_32(ARMV8_A64_REG_X7) \
260	\| RT_BIT_32(ARMV8_A64_REG_X8) \
261	\| RT_BIT_32(ARMV8_A64_REG_X9) \
262	\| RT_BIT_32(ARMV8_A64_REG_X10) \
263	\| RT_BIT_32(ARMV8_A64_REG_X11) \
264	\| RT_BIT_32(ARMV8_A64_REG_X12) \
265	\| RT_BIT_32(ARMV8_A64_REG_X13) \
266	\| RT_BIT_32(ARMV8_A64_REG_X14) \
267	\| RT_BIT_32(ARMV8_A64_REG_X15) \
268	\| RT_BIT_32(ARMV8_A64_REG_X16) \
269	\| RT_BIT_32(ARMV8_A64_REG_X17) )
270
271	#endif
272
273	/** This is the maximum argument count we'll ever be needing. */
274	#if defined(RT_OS_WINDOWS) && defined(VBOXSTRICTRC_STRICT_ENABLED)
275	# define IEMNATIVE_CALL_MAX_ARG_COUNT 8
276	#else
277	# define IEMNATIVE_CALL_MAX_ARG_COUNT 7
278	#endif
279	/** @} */
280
281
282	/** @def IEMNATIVE_HST_GREG_COUNT
283	* Number of host general purpose registers we tracker. */
284	/** @def IEMNATIVE_HST_GREG_MASK
285	* Mask corresponding to IEMNATIVE_HST_GREG_COUNT that can be applied to
286	* inverted register masks and such to get down to a correct set of regs. */
287	#ifdef RT_ARCH_AMD64
288	# define IEMNATIVE_HST_GREG_COUNT 16
289	# define IEMNATIVE_HST_GREG_MASK UINT32_C(0xffff)
290
291	#elif defined(RT_ARCH_ARM64)
292	# define IEMNATIVE_HST_GREG_COUNT 32
293	# define IEMNATIVE_HST_GREG_MASK UINT32_MAX
294	#else
295	# error "Port me!"
296	#endif
297
298
299	/** Native code generator label types. */
300	typedef enum
301	{
302	kIemNativeLabelType_Invalid = 0,
303	/* Labels w/o data, only once instance per TB: */
304	kIemNativeLabelType_Return,
305	kIemNativeLabelType_ReturnBreak,
306	kIemNativeLabelType_ReturnWithFlags,
307	kIemNativeLabelType_NonZeroRetOrPassUp,
308	kIemNativeLabelType_RaiseGp0,
309	/* Labels with data, potentially multiple instances per TB: */
310	kIemNativeLabelType_FirstWithMultipleInstances,
311	kIemNativeLabelType_If = kIemNativeLabelType_FirstWithMultipleInstances,
312	kIemNativeLabelType_Else,
313	kIemNativeLabelType_Endif,
314	kIemNativeLabelType_CheckIrq,
315	kIemNativeLabelType_TlbMiss,
316	kIemNativeLabelType_TlbDone,
317	kIemNativeLabelType_End
318	} IEMNATIVELABELTYPE;
319
320	/** Native code generator label definition. */
321	typedef struct IEMNATIVELABEL
322	{
323	/** Code offset if defined, UINT32_MAX if it needs to be generated after/in
324	* the epilog. */
325	uint32_t off;
326	/** The type of label (IEMNATIVELABELTYPE). */
327	uint16_t enmType;
328	/** Additional label data, type specific. */
329	uint16_t uData;
330	} IEMNATIVELABEL;
331	/** Pointer to a label. */
332	typedef IEMNATIVELABEL *PIEMNATIVELABEL;
333
334
335	/** Native code generator fixup types. */
336	typedef enum
337	{
338	kIemNativeFixupType_Invalid = 0,
339	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
340	/** AMD64 fixup: PC relative 32-bit with addend in bData. */
341	kIemNativeFixupType_Rel32,
342	#elif defined(RT_ARCH_ARM64)
343	/** ARM64 fixup: PC relative offset at bits 25:0 (B, BL). */
344	kIemNativeFixupType_RelImm26At0,
345	/** ARM64 fixup: PC relative offset at bits 23:5 (CBZ, CBNZ, B.CC). */
346	kIemNativeFixupType_RelImm19At5,
347	/** ARM64 fixup: PC relative offset at bits 18:5 (TBZ, TBNZ). */
348	kIemNativeFixupType_RelImm14At5,
349	#endif
350	kIemNativeFixupType_End
351	} IEMNATIVEFIXUPTYPE;
352
353	/** Native code generator fixup. */
354	typedef struct IEMNATIVEFIXUP
355	{
356	/** Code offset of the fixup location. */
357	uint32_t off;
358	/** The IEMNATIVELABEL this is a fixup for. */
359	uint16_t idxLabel;
360	/** The fixup type (IEMNATIVEFIXUPTYPE). */
361	uint8_t enmType;
362	/** Addend or other data. */
363	int8_t offAddend;
364	} IEMNATIVEFIXUP;
365	/** Pointer to a native code generator fixup. */
366	typedef IEMNATIVEFIXUP *PIEMNATIVEFIXUP;
367
368
369	/**
370	* Guest registers that can be shadowed in GPRs.
371	*/
372	typedef enum IEMNATIVEGSTREG : uint8_t
373	{
374	kIemNativeGstReg_GprFirst = 0,
375	kIemNativeGstReg_GprLast = kIemNativeGstReg_GprFirst + 15,
376	kIemNativeGstReg_Pc,
377	kIemNativeGstReg_EFlags, /*< 32-bit, includes internal flags. /
378	kIemNativeGstReg_SegSelFirst,
379	kIemNativeGstReg_SegSelLast = kIemNativeGstReg_SegSelFirst + 5,
380	kIemNativeGstReg_SegBaseFirst,
381	kIemNativeGstReg_SegBaseLast = kIemNativeGstReg_SegBaseFirst + 5,
382	kIemNativeGstReg_SegLimitFirst,
383	kIemNativeGstReg_SegLimitLast = kIemNativeGstReg_SegLimitFirst + 5,
384	kIemNativeGstReg_End
385	} IEMNATIVEGSTREG;
386
387	/** @name Helpers for converting register numbers to IEMNATIVEGSTREG values.
388	* @{ */
389	#define IEMNATIVEGSTREG_GPR(a_iGpr) ((IEMNATIVEGSTREG)(kIemNativeGstReg_GprFirst + (a_iGpr) ))
390	#define IEMNATIVEGSTREG_SEG_SEL(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegSelFirst + (a_iSegReg) ))
391	#define IEMNATIVEGSTREG_SEG_BASE(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegBaseFirst + (a_iSegReg) ))
392	#define IEMNATIVEGSTREG_SEG_LIMIT(a_iSegReg) ((IEMNATIVEGSTREG)(kIemNativeGstReg_SegLimitFirst + (a_iSegReg) ))
393	/** @} */
394
395	/**
396	* Intended use statement for iemNativeRegAllocTmpForGuestReg().
397	*/
398	typedef enum IEMNATIVEGSTREGUSE
399	{
400	/** The usage is read-only, the register holding the guest register
401	* shadow copy will not be modified by the caller. */
402	kIemNativeGstRegUse_ReadOnly = 0,
403	/** The caller will update the guest register (think: PC += cbInstr).
404	* The guest shadow copy will follow the returned register. */
405	kIemNativeGstRegUse_ForUpdate,
406	/** The call will put an entirely new value in the guest register, so
407	* if new register is allocate it will be returned uninitialized. */
408	kIemNativeGstRegUse_ForFullWrite,
409	/** The caller will use the guest register value as input in a calculation
410	* and the host register will be modified.
411	* This means that the returned host register will not be marked as a shadow
412	* copy of the guest register. */
413	kIemNativeGstRegUse_Calculation
414	} IEMNATIVEGSTREGUSE;
415
416	/**
417	* Guest registers (classes) that can be referenced.
418	*/
419	typedef enum IEMNATIVEGSTREGREF : uint8_t
420	{
421	kIemNativeGstRegRef_Invalid = 0,
422	kIemNativeGstRegRef_Gpr,
423	kIemNativeGstRegRef_GprHighByte, /*< AH, CH, DH, BH/
424	kIemNativeGstRegRef_EFlags,
425	kIemNativeGstRegRef_MxCsr,
426	kIemNativeGstRegRef_FpuReg,
427	kIemNativeGstRegRef_MReg,
428	kIemNativeGstRegRef_XReg,
429	//kIemNativeGstRegRef_YReg, - doesn't work.
430	kIemNativeGstRegRef_End
431	} IEMNATIVEGSTREGREF;
432
433
434	/** Variable kinds. */
435	typedef enum IEMNATIVEVARKIND : uint8_t
436	{
437	/** Customary invalid zero value. */
438	kIemNativeVarKind_Invalid = 0,
439	/** This is either in a register or on the stack. */
440	kIemNativeVarKind_Stack,
441	/** Immediate value - loaded into register when needed, or can live on the
442	* stack if referenced (in theory). */
443	kIemNativeVarKind_Immediate,
444	/** Variable reference - loaded into register when needed, never stack. */
445	kIemNativeVarKind_VarRef,
446	/** Guest register reference - loaded into register when needed, never stack. */
447	kIemNativeVarKind_GstRegRef,
448	/** End of valid values. */
449	kIemNativeVarKind_End
450	} IEMNATIVEVARKIND;
451
452
453	/** Variable or argument. */
454	typedef struct IEMNATIVEVAR
455	{
456	/** The kind of variable. */
457	IEMNATIVEVARKIND enmKind;
458	/** The variable size in bytes. */
459	uint8_t cbVar;
460	/** The first stack slot (uint64_t), except for immediate and references
461	* where it usually is UINT8_MAX. This is allocated lazily, so if a variable
462	* has a stack slot it has been initialized and has a value. Unused variables
463	* has neither a stack slot nor a host register assignment. */
464	uint8_t idxStackSlot;
465	/** The host register allocated for the variable, UINT8_MAX if not. */
466	uint8_t idxReg;
467	/** The argument number if argument, UINT8_MAX if regular variable. */
468	uint8_t uArgNo;
469	/** If referenced, the index of the variable referencing this one, otherwise
470	* UINT8_MAX. A referenced variable must only be placed on the stack and
471	* must be either kIemNativeVarKind_Stack or kIemNativeVarKind_Immediate. */
472	uint8_t idxReferrerVar;
473	/** Guest register being shadowed here, kIemNativeGstReg_End(/UINT8_MAX) if not.
474	* @todo not sure what this really is for... */
475	IEMNATIVEGSTREG enmGstReg;
476	uint8_t bAlign;
477
478	union
479	{
480	/** kIemNativeVarKind_Immediate: The immediate value. */
481	uint64_t uValue;
482	/** kIemNativeVarKind_VarRef: The index of the variable being referenced. */
483	uint8_t idxRefVar;
484	/** kIemNativeVarKind_GstRegRef: The guest register being referrenced. */
485	struct
486	{
487	/** The class of register. */
488	IEMNATIVEGSTREGREF enmClass;
489	/** Index within the class. */
490	uint8_t idx;
491	} GstRegRef;
492	} u;
493	} IEMNATIVEVAR;
494
495	/** What is being kept in a host register. */
496	typedef enum IEMNATIVEWHAT : uint8_t
497	{
498	/** The traditional invalid zero value. */
499	kIemNativeWhat_Invalid = 0,
500	/** Mapping a variable (IEMNATIVEHSTREG::idxVar). */
501	kIemNativeWhat_Var,
502	/** Temporary register, this is typically freed when a MC completes. */
503	kIemNativeWhat_Tmp,
504	/** Call argument w/o a variable mapping. This is free (via
505	* IEMNATIVE_CALL_VOLATILE_GREG_MASK) after the call is emitted. */
506	kIemNativeWhat_Arg,
507	/** Return status code.
508	* @todo not sure if we need this... */
509	kIemNativeWhat_rc,
510	/** The fixed pVCpu (PVMCPUCC) register.
511	* @todo consider offsetting this on amd64 to use negative offsets to access
512	* more members using 8-byte disp. */
513	kIemNativeWhat_pVCpuFixed,
514	/** The fixed pCtx (PCPUMCTX) register.
515	* @todo consider offsetting this on amd64 to use negative offsets to access
516	* more members using 8-byte disp. */
517	kIemNativeWhat_pCtxFixed,
518	/** Fixed temporary register. */
519	kIemNativeWhat_FixedTmp,
520	/** Register reserved by the CPU or OS architecture. */
521	kIemNativeWhat_FixedReserved,
522	/** End of valid values. */
523	kIemNativeWhat_End
524	} IEMNATIVEWHAT;
525
526	/**
527	* Host general register entry.
528	*
529	* The actual allocation status is kept in IEMRECOMPILERSTATE::bmHstRegs.
530	*
531	* @todo Track immediate values in host registers similarlly to how we track the
532	* guest register shadow copies. For it to be real helpful, though,
533	* we probably need to know which will be reused and put them into
534	* non-volatile registers, otherwise it's going to be more or less
535	* restricted to an instruction or two.
536	*/
537	typedef struct IEMNATIVEHSTREG
538	{
539	/** Set of guest registers this one shadows.
540	*
541	* Using a bitmap here so we can designate the same host register as a copy
542	* for more than one guest register. This is expected to be useful in
543	* situations where one value is copied to several registers in a sequence.
544	* If the mapping is 1:1, then we'd have to pick which side of a 'MOV SRC,DST'
545	* sequence we'd want to let this register follow to be a copy of and there
546	* will always be places where we'd be picking the wrong one.
547	*/
548	uint64_t fGstRegShadows;
549	/** What is being kept in this register. */
550	IEMNATIVEWHAT enmWhat;
551	/** Variable index if holding a variable, otherwise UINT8_MAX. */
552	uint8_t idxVar;
553	/** Alignment padding. */
554	uint8_t abAlign[6];
555	} IEMNATIVEHSTREG;
556
557
558	/**
559	* Core state for the native recompiler, that is, things that needs careful
560	* handling when dealing with branches.
561	*/
562	typedef struct IEMNATIVECORESTATE
563	{
564	/** Allocation bitmap for aHstRegs. */
565	uint32_t bmHstRegs;
566
567	/** Bitmap marking which host register contains guest register shadow copies.
568	* This is used during register allocation to try preserve copies. */
569	uint32_t bmHstRegsWithGstShadow;
570	/** Bitmap marking valid entries in aidxGstRegShadows. */
571	uint64_t bmGstRegShadows;
572
573	union
574	{
575	/** Index of variable arguments, UINT8_MAX if not valid. */
576	uint8_t aidxArgVars[8];
577	/** For more efficient resetting. */
578	uint64_t u64ArgVars;
579	};
580
581	/** Allocation bitmap for the stack. */
582	uint32_t bmStack;
583	/** Allocation bitmap for aVars. */
584	uint32_t bmVars;
585
586	/** Maps a guest register to a host GPR (index by IEMNATIVEGSTREG).
587	* Entries are only valid if the corresponding bit in bmGstRegShadows is set.
588	* (A shadow copy of a guest register can only be held in a one host register,
589	* there are no duplicate copies or ambiguities like that). */
590	uint8_t aidxGstRegShadows[kIemNativeGstReg_End];
591
592	/** Host register allocation tracking. */
593	IEMNATIVEHSTREG aHstRegs[IEMNATIVE_HST_GREG_COUNT];
594
595	/** Variables and arguments. */
596	IEMNATIVEVAR aVars[9];
597	} IEMNATIVECORESTATE;
598	/** Pointer to core state. */
599	typedef IEMNATIVECORESTATE *PIEMNATIVECORESTATE;
600	/** Pointer to const core state. */
601	typedef IEMNATIVECORESTATE const *PCIEMNATIVECORESTATE;
602
603
604	/**
605	* Conditional stack entry.
606	*/
607	typedef struct IEMNATIVECOND
608	{
609	/** Set if we're in the "else" part, clear if we're in the "if" before it. */
610	bool fInElse;
611	/** The label for the IEM_MC_ELSE. */
612	uint32_t idxLabelElse;
613	/** The label for the IEM_MC_ENDIF. */
614	uint32_t idxLabelEndIf;
615	/** The initial state snapshot as the if-block starts executing. */
616	IEMNATIVECORESTATE InitialState;
617	/** The state snapshot at the end of the if-block. */
618	IEMNATIVECORESTATE IfFinalState;
619	} IEMNATIVECOND;
620	/** Pointer to a condition stack entry. */
621	typedef IEMNATIVECOND *PIEMNATIVECOND;
622
623
624	/**
625	* Native recompiler state.
626	*/
627	typedef struct IEMRECOMPILERSTATE
628	{
629	/** Size of the buffer that pbNativeRecompileBufR3 points to in
630	* IEMNATIVEINSTR units. */
631	uint32_t cInstrBufAlloc;
632	#ifdef VBOX_STRICT
633	/** Strict: How far the last iemNativeInstrBufEnsure() checked. */
634	uint32_t offInstrBufChecked;
635	#else
636	uint32_t uPadding1; /* We don't keep track of the size here... */
637	#endif
638	/** Fixed temporary code buffer for native recompilation. */
639	PIEMNATIVEINSTR pInstrBuf;
640
641	/** Bitmaps with the label types used. */
642	uint64_t bmLabelTypes;
643	/** Actual number of labels in paLabels. */
644	uint32_t cLabels;
645	/** Max number of entries allowed in paLabels before reallocating it. */
646	uint32_t cLabelsAlloc;
647	/** Labels defined while recompiling (referenced by fixups). */
648	PIEMNATIVELABEL paLabels;
649	/** Array with indexes of unique labels (uData always 0). */
650	uint32_t aidxUniqueLabels[kIemNativeLabelType_FirstWithMultipleInstances];
651
652	/** Actual number of fixups paFixups. */
653	uint32_t cFixups;
654	/** Max number of entries allowed in paFixups before reallocating it. */
655	uint32_t cFixupsAlloc;
656	/** Buffer used by the recompiler for recording fixups when generating code. */
657	PIEMNATIVEFIXUP paFixups;
658
659	#ifdef IEMNATIVE_WITH_TB_DEBUG_INFO
660	/** Number of debug info entries allocated for pDbgInfo. */
661	uint32_t cDbgInfoAlloc;
662	uint32_t uPadding;
663	/** Debug info. */
664	PIEMTBDBG pDbgInfo;
665	#endif
666
667	/** The translation block being recompiled. */
668	PCIEMTB pTbOrg;
669
670	/** Condition sequence number (for generating unique labels). */
671	uint16_t uCondSeqNo;
672	/** Check IRQ seqeunce number (for generating unique labels). */
673	uint16_t uCheckIrqSeqNo;
674	/** TLB load sequence number (for generating unique labels). */
675	uint16_t uTlbSeqNo;
676	/** The current condition stack depth (aCondStack). */
677	uint8_t cCondDepth;
678
679	/** The argument count + hidden regs from the IEM_MC_BEGIN statement. */
680	uint8_t cArgs;
681	/** The IEM_CIMPL_F_XXX flags from the IEM_MC_BEGIN statement. */
682	uint32_t fCImpl;
683	/** The IEM_MC_F_XXX flags from the IEM_MC_BEGIN statement. */
684	uint32_t fMc;
685	/** The expected IEMCPU::fExec value for the current call/instruction. */
686	uint32_t fExec;
687
688	/** Core state requiring care with branches. */
689	IEMNATIVECORESTATE Core;
690
691	/** The condition nesting stack. */
692	IEMNATIVECOND aCondStack[2];
693
694	#ifndef IEM_WITH_THROW_CATCH
695	/** Pointer to the setjmp/longjmp buffer if we're not using C++ exceptions
696	* for recompilation error handling. */
697	jmp_buf JmpBuf;
698	#endif
699	} IEMRECOMPILERSTATE;
700	/** Pointer to a native recompiler state. */
701	typedef IEMRECOMPILERSTATE *PIEMRECOMPILERSTATE;
702
703
704	/** @def IEMNATIVE_TRY_SETJMP
705	* Wrapper around setjmp / try, hiding all the ugly differences.
706	*
707	* @note Use with extreme care as this is a fragile macro.
708	* @param a_pReNative The native recompile state.
709	* @param a_rcTarget The variable that should receive the status code in case
710	* of a longjmp/throw.
711	*/
712	/** @def IEMNATIVE_CATCH_LONGJMP_BEGIN
713	* Start wrapper for catch / setjmp-else.
714	*
715	* This will set up a scope.
716	*
717	* @note Use with extreme care as this is a fragile macro.
718	* @param a_pReNative The native recompile state.
719	* @param a_rcTarget The variable that should receive the status code in case
720	* of a longjmp/throw.
721	*/
722	/** @def IEMNATIVE_CATCH_LONGJMP_END
723	* End wrapper for catch / setjmp-else.
724	*
725	* This will close the scope set up by IEMNATIVE_CATCH_LONGJMP_BEGIN and clean
726	* up the state.
727	*
728	* @note Use with extreme care as this is a fragile macro.
729	* @param a_pReNative The native recompile state.
730	*/
731	/** @def IEMNATIVE_DO_LONGJMP
732	*
733	* Wrapper around longjmp / throw.
734	*
735	* @param a_pReNative The native recompile state.
736	* @param a_rc The status code jump back with / throw.
737	*/
738	#ifdef IEM_WITH_THROW_CATCH
739	# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
740	a_rcTarget = VINF_SUCCESS; \
741	try
742	# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
743	catch (int rcThrown) \
744	{ \
745	a_rcTarget = rcThrown
746	# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
747	} \
748	((void)0)
749	# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc) throw int(a_rc)
750	#else /* !IEM_WITH_THROW_CATCH */
751	# define IEMNATIVE_TRY_SETJMP(a_pReNative, a_rcTarget) \
752	if ((a_rcTarget = setjmp((a_pReNative)->JmpBuf)) == 0)
753	# define IEMNATIVE_CATCH_LONGJMP_BEGIN(a_pReNative, a_rcTarget) \
754	else \
755	{ \
756	((void)0)
757	# define IEMNATIVE_CATCH_LONGJMP_END(a_pReNative) \
758	}
759	# define IEMNATIVE_DO_LONGJMP(a_pReNative, a_rc) longjmp((a_pReNative)->JmpBuf, (a_rc))
760	#endif /* !IEM_WITH_THROW_CATCH */
761
762
763	/**
764	* Native recompiler worker for a threaded function.
765	*
766	* @returns New code buffer offset; throws VBox status code in case of a failure.
767	* @param pReNative The native recompiler state.
768	* @param off The current code buffer offset.
769	* @param pCallEntry The threaded call entry.
770	*
771	* @note This may throw/longjmp VBox status codes (int) to abort compilation, so no RT_NOEXCEPT!
772	*/
773	typedef uint32_t (VBOXCALL FNIEMNATIVERECOMPFUNC)(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry);
774	/** Pointer to a native recompiler worker for a threaded function. */
775	typedef FNIEMNATIVERECOMPFUNC *PFNIEMNATIVERECOMPFUNC;
776
777	/** Defines a native recompiler worker for a threaded function.
778	* @see FNIEMNATIVERECOMPFUNC */
779	#define IEM_DECL_IEMNATIVERECOMPFUNC_DEF(a_Name) \
780	uint32_t VBOXCALL a_Name(PIEMRECOMPILERSTATE pReNative, uint32_t off, PCIEMTHRDEDCALLENTRY pCallEntry)
781
782	/** Prototypes a native recompiler function for a threaded function.
783	* @see FNIEMNATIVERECOMPFUNC */
784	#define IEM_DECL_IEMNATIVERECOMPFUNC_PROTO(a_Name) FNIEMNATIVERECOMPFUNC a_Name
785
786
787	/** Define a native recompiler helper function, safe to call from the TB code. */
788	#define IEM_DECL_NATIVE_HLP_DEF(a_RetType, a_Name, a_ArgList) \
789	DECL_HIDDEN_THROW(a_RetType) VBOXCALL a_Name a_ArgList
790	/** Prototype a native recompiler helper function, safe to call from the TB code. */
791	#define IEM_DECL_NATIVE_HLP_PROTO(a_RetType, a_Name, a_ArgList) \
792	DECL_HIDDEN_THROW(a_RetType) VBOXCALL a_Name a_ArgList
793
794
795	DECL_HIDDEN_THROW(uint32_t) iemNativeLabelCreate(PIEMRECOMPILERSTATE pReNative, IEMNATIVELABELTYPE enmType,
796	uint32_t offWhere = UINT32_MAX, uint16_t uData = 0);
797	DECL_HIDDEN_THROW(void) iemNativeLabelDefine(PIEMRECOMPILERSTATE pReNative, uint32_t idxLabel, uint32_t offWhere);
798	DECL_HIDDEN_THROW(void) iemNativeAddFixup(PIEMRECOMPILERSTATE pReNative, uint32_t offWhere, uint32_t idxLabel,
799	IEMNATIVEFIXUPTYPE enmType, int8_t offAddend = 0);
800	DECL_HIDDEN_THROW(PIEMNATIVEINSTR) iemNativeInstrBufEnsureSlow(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq);
801
802	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmp(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, bool fPreferVolatile = true);
803	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpImm(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint64_t uImm,
804	bool fPreferVolatile = true);
805	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpForGuestReg(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
806	IEMNATIVEGSTREG enmGstReg, IEMNATIVEGSTREGUSE enmIntendedUse);
807	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocTmpForGuestRegIfAlreadyPresent(PIEMRECOMPILERSTATE pReNative, uint32_t *poff,
808	IEMNATIVEGSTREG enmGstReg);
809
810	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAllocVar(PIEMRECOMPILERSTATE pReNative, uint32_t *poff, uint8_t idxVar);
811	DECL_HIDDEN_THROW(uint32_t) iemNativeRegAllocArgs(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t cArgs);
812	DECL_HIDDEN_THROW(uint8_t) iemNativeRegAssignRc(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg);
813	DECLHIDDEN(void) iemNativeRegFree(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
814	DECLHIDDEN(void) iemNativeRegFreeTmp(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
815	DECLHIDDEN(void) iemNativeRegFreeTmpImm(PIEMRECOMPILERSTATE pReNative, uint8_t idxHstReg) RT_NOEXCEPT;
816	DECLHIDDEN(void) iemNativeRegFreeAndFlushMask(PIEMRECOMPILERSTATE pReNative, uint32_t fHstRegMask) RT_NOEXCEPT;
817	DECL_HIDDEN_THROW(uint32_t) iemNativeRegFlushPendingWrites(PIEMRECOMPILERSTATE pReNative, uint32_t off);
818
819	DECL_HIDDEN_THROW(uint32_t) iemNativeEmitLoadGprWithGstShadowReg(PIEMRECOMPILERSTATE pReNative, uint32_t off,
820	uint8_t idxHstReg, IEMNATIVEGSTREG enmGstReg);
821	DECL_HIDDEN_THROW(uint32_t) iemNativeEmitCheckCallRetAndPassUp(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr);
822
823	extern DECL_HIDDEN_DATA(const char * const) g_apszIemNativeHstRegNames[];
824
825
826	/**
827	* Ensures that there is sufficient space in the instruction output buffer.
828	*
829	* This will reallocate the buffer if needed and allowed.
830	*
831	* @note Always use IEMNATIVE_ASSERT_INSTR_BUF_ENSURE when done to check the
832	* allocation size.
833	*
834	* @returns Pointer to the instruction output buffer on success; throws VBox
835	* status code on failure, so no need to check it.
836	* @param pReNative The native recompile state.
837	* @param off Current instruction offset. Works safely for UINT32_MAX
838	* as well.
839	* @param cInstrReq Number of instruction about to be added. It's okay to
840	* overestimate this a bit.
841	*/
842	DECL_FORCE_INLINE_THROW(PIEMNATIVEINSTR)
843	iemNativeInstrBufEnsure(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t cInstrReq)
844	{
845	uint64_t const offChecked = off + (uint64_t)cInstrReq; /** @todo may reconsider the need for UINT32_MAX safety... */
846	if (RT_LIKELY(offChecked <= pReNative->cInstrBufAlloc))
847	{
848	#ifdef VBOX_STRICT
849	pReNative->offInstrBufChecked = offChecked;
850	#endif
851	return pReNative->pInstrBuf;
852	}
853	return iemNativeInstrBufEnsureSlow(pReNative, off, cInstrReq);
854	}
855
856	/**
857	* Checks that we didn't exceed the space requested in the last
858	* iemNativeInstrBufEnsure() call.
859	*/
860	#define IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(a_pReNative, a_off) \
861	AssertMsg((a_off) <= (a_pReNative)->offInstrBufChecked, \
862	("off=%#x offInstrBufChecked=%#x\n", (a_off), (a_pReNative)->offInstrBufChecked))
863
864	/**
865	* Checks that a variable index is valid.
866	*/
867	#define IEMNATIVE_ASSERT_VAR_IDX(a_pReNative, a_idxVar) \
868	AssertMsg( (unsigned)(a_idxVar) < RT_ELEMENTS((a_pReNative)->Core.aVars) \
869	&& ((a_pReNative)->Core.bmVars & RT_BIT_32(a_idxVar)), ("%s=%d\n", #a_idxVar, a_idxVar))
870
871	/**
872	* Checks that a variable index is valid and that the variable is assigned the
873	* correct argument number.
874	* This also adds a RT_NOREF of a_idxVar.
875	*/
876	#define IEMNATIVE_ASSERT_ARG_VAR_IDX(a_pReNative, a_idxVar, a_uArgNo) do { \
877	RT_NOREF_PV(a_idxVar); \
878	AssertMsg( (unsigned)(a_idxVar) < RT_ELEMENTS((a_pReNative)->Core.aVars) \
879	&& ((a_pReNative)->Core.bmVars & RT_BIT_32(a_idxVar))\
880	&& (a_pReNative)->Core.aVars[a_idxVar].uArgNo == (a_uArgNo) \
881	, ("%s=%d; uArgNo=%d, expected %u\n", #a_idxVar, a_idxVar, \
882	(a_pReNative)->Core.aVars[RT_MAX(a_idxVar, RT_ELEMENTS((a_pReNative)->Core.aVars)) - 1].uArgNo, a_uArgNo)); \
883	} while (0)
884
885	/**
886	* Calculates the stack address of a variable as a [r]BP displacement value.
887	*/
888	DECL_FORCE_INLINE(int32_t)
889	iemNativeStackCalcBpDisp(uint8_t idxStackSlot)
890	{
891	Assert(idxStackSlot < IEMNATIVE_FRAME_VAR_SLOTS);
892	return idxStackSlot * sizeof(uint64_t) + IEMNATIVE_FP_OFF_STACK_VARS;
893	}
894
895	/** @} */
896
897	#endif /* !VMM_INCLUDED_SRC_include_IEMN8veRecompiler_h */
898

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source: vbox/trunk/src/VBox/VMM/include/IEMN8veRecompiler.h@ 102388

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