VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 83878

Last change on this file since 83878 was 83850, checked in by vboxsync, 5 years ago

AMD IOMMU: bugref:9654 R0 registration bits.
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1/* $Id: PDMInternal.h 83850 2020-04-20 11:35:14Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_PDMInternal_h
19#define VMM_INCLUDED_SRC_include_PDMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <VBox/types.h>
25#include <VBox/param.h>
26#include <VBox/vmm/cfgm.h>
27#include <VBox/vmm/stam.h>
28#include <VBox/vusb.h>
29#include <VBox/vmm/pdmasynccompletion.h>
30#ifdef VBOX_WITH_NETSHAPER
31# include <VBox/vmm/pdmnetshaper.h>
32#endif
33#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
34# include <VBox/vmm/pdmasynccompletion.h>
35#endif
36#include <VBox/vmm/pdmblkcache.h>
37#include <VBox/vmm/pdmcommon.h>
38#include <VBox/vmm/pdmtask.h>
39#include <VBox/sup.h>
40#include <iprt/assert.h>
41#include <iprt/critsect.h>
42#ifdef IN_RING3
43# include <iprt/thread.h>
44#endif
45
46RT_C_DECLS_BEGIN
47
48
49/** @defgroup grp_pdm_int Internal
50 * @ingroup grp_pdm
51 * @internal
52 * @{
53 */
54
55/** @def PDM_WITH_R3R0_CRIT_SECT
56 * Enables or disabled ring-3/ring-0 critical sections. */
57#if defined(DOXYGEN_RUNNING) || 1
58# define PDM_WITH_R3R0_CRIT_SECT
59#endif
60
61/** @def PDMCRITSECT_STRICT
62 * Enables/disables PDM critsect strictness like deadlock detection. */
63#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
64 || defined(DOXYGEN_RUNNING)
65# define PDMCRITSECT_STRICT
66#endif
67
68/** @def PDMCRITSECT_STRICT
69 * Enables/disables PDM read/write critsect strictness like deadlock
70 * detection. */
71#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
72 || defined(DOXYGEN_RUNNING)
73# define PDMCRITSECTRW_STRICT
74#endif
75
76/** The maximum device instance (total) size, ring-0/raw-mode capable devices. */
77#define PDM_MAX_DEVICE_INSTANCE_SIZE _4M
78/** The maximum device instance (total) size, ring-3 only devices. */
79#define PDM_MAX_DEVICE_INSTANCE_SIZE_R3 _8M
80
81
82
83/*******************************************************************************
84* Structures and Typedefs *
85*******************************************************************************/
86
87/** Pointer to a PDM Device. */
88typedef struct PDMDEV *PPDMDEV;
89/** Pointer to a pointer to a PDM Device. */
90typedef PPDMDEV *PPPDMDEV;
91
92/** Pointer to a PDM USB Device. */
93typedef struct PDMUSB *PPDMUSB;
94/** Pointer to a pointer to a PDM USB Device. */
95typedef PPDMUSB *PPPDMUSB;
96
97/** Pointer to a PDM Driver. */
98typedef struct PDMDRV *PPDMDRV;
99/** Pointer to a pointer to a PDM Driver. */
100typedef PPDMDRV *PPPDMDRV;
101
102/** Pointer to a PDM Logical Unit. */
103typedef struct PDMLUN *PPDMLUN;
104/** Pointer to a pointer to a PDM Logical Unit. */
105typedef PPDMLUN *PPPDMLUN;
106
107/** Pointer to a PDM PCI Bus instance. */
108typedef struct PDMPCIBUS *PPDMPCIBUS;
109/** Pointer to a PDM IOMMU instance. */
110typedef struct PDMIOMMU *PPDMIOMMU;
111/** Pointer to a DMAC instance. */
112typedef struct PDMDMAC *PPDMDMAC;
113/** Pointer to a RTC instance. */
114typedef struct PDMRTC *PPDMRTC;
115
116/** Pointer to an USB HUB registration record. */
117typedef struct PDMUSBHUB *PPDMUSBHUB;
118
119/**
120 * Supported asynchronous completion endpoint classes.
121 */
122typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
123{
124 /** File class. */
125 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
126 /** Number of supported classes. */
127 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
128 /** 32bit hack. */
129 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
130} PDMASYNCCOMPLETIONEPCLASSTYPE;
131
132/**
133 * Private device instance data, ring-3.
134 */
135typedef struct PDMDEVINSINTR3
136{
137 /** Pointer to the next instance.
138 * (Head is pointed to by PDM::pDevInstances.) */
139 R3PTRTYPE(PPDMDEVINS) pNextR3;
140 /** Pointer to the next per device instance.
141 * (Head is pointed to by PDMDEV::pInstances.) */
142 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
143 /** Pointer to device structure. */
144 R3PTRTYPE(PPDMDEV) pDevR3;
145 /** Pointer to the list of logical units associated with the device. (FIFO) */
146 R3PTRTYPE(PPDMLUN) pLunsR3;
147 /** Pointer to the asynchronous notification callback set while in
148 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
149 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
150 /** Configuration handle to the instance node. */
151 R3PTRTYPE(PCFGMNODE) pCfgHandle;
152
153 /** R3 pointer to the VM this instance was created for. */
154 PVMR3 pVMR3;
155
156 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
157 uint32_t fIntFlags;
158 /** The last IRQ tag (for tracing it thru clearing). */
159 uint32_t uLastIrqTag;
160 /** The ring-0 device index (for making ring-0 calls). */
161 uint32_t idxR0Device;
162} PDMDEVINSINTR3;
163
164
165/**
166 * Private device instance data, ring-0.
167 */
168typedef struct PDMDEVINSINTR0
169{
170 /** Pointer to the VM this instance was created for. */
171 R0PTRTYPE(PGVM) pGVM;
172 /** Pointer to device structure. */
173 R0PTRTYPE(struct PDMDEVREGR0 const *) pRegR0;
174 /** The ring-0 module reference. */
175 RTR0PTR hMod;
176 /** Pointer to the ring-0 mapping of the ring-3 internal data (for uLastIrqTag). */
177 R0PTRTYPE(PDMDEVINSINTR3 *) pIntR3R0;
178 /** Pointer to the ring-0 mapping of the ring-3 instance (for idTracing). */
179 R0PTRTYPE(struct PDMDEVINSR3 *) pInsR3R0;
180 /** The device instance memory. */
181 RTR0MEMOBJ hMemObj;
182 /** The ring-3 mapping object. */
183 RTR0MEMOBJ hMapObj;
184 /** Index into PDMR0PERVM::apDevInstances. */
185 uint32_t idxR0Device;
186} PDMDEVINSINTR0;
187
188
189/**
190 * Private device instance data, raw-mode
191 */
192typedef struct PDMDEVINSINTRC
193{
194 /** Pointer to the VM this instance was created for. */
195 RGPTRTYPE(PVM) pVMRC;
196} PDMDEVINSINTRC;
197
198
199/**
200 * Private device instance data.
201 */
202typedef struct PDMDEVINSINT
203{
204 /** Pointer to the next instance (HC Ptr).
205 * (Head is pointed to by PDM::pDevInstances.) */
206 R3PTRTYPE(PPDMDEVINS) pNextR3;
207 /** Pointer to the next per device instance (HC Ptr).
208 * (Head is pointed to by PDMDEV::pInstances.) */
209 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
210 /** Pointer to device structure - HC Ptr. */
211 R3PTRTYPE(PPDMDEV) pDevR3;
212 /** Pointer to the list of logical units associated with the device. (FIFO) */
213 R3PTRTYPE(PPDMLUN) pLunsR3;
214 /** Pointer to the asynchronous notification callback set while in
215 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
216 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
217 /** Configuration handle to the instance node. */
218 R3PTRTYPE(PCFGMNODE) pCfgHandle;
219
220 /** R3 pointer to the VM this instance was created for. */
221 PVMR3 pVMR3;
222
223 /** R0 pointer to the VM this instance was created for. */
224 R0PTRTYPE(PVMCC) pVMR0;
225
226 /** RC pointer to the VM this instance was created for. */
227 PVMRC pVMRC;
228
229 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
230 uint32_t fIntFlags;
231 /** The last IRQ tag (for tracing it thru clearing). */
232 uint32_t uLastIrqTag;
233} PDMDEVINSINT;
234
235/** @name PDMDEVINSINT::fIntFlags
236 * @{ */
237/** Used by pdmR3Load to mark device instances it found in the saved state. */
238#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
239/** Indicates that the device hasn't been powered on or resumed.
240 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
241 * to make sure each device gets exactly one notification for each of those
242 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
243 * a failure (already resumed/powered-on devices are suspended).
244 * PDMR3PowerOff resets this flag once before going through the devices to make sure
245 * every device gets the power off notification even if it was suspended before with
246 * PDMR3Suspend.
247 */
248#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
249/** Indicates that the device has been reset already. Used by PDMR3Reset. */
250#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
251#define PDMDEVINSINT_FLAGS_R0_ENABLED RT_BIT_32(3)
252#define PDMDEVINSINT_FLAGS_RC_ENABLED RT_BIT_32(4)
253/** Set if we've called the ring-0 constructor. */
254#define PDMDEVINSINT_FLAGS_R0_CONTRUCT RT_BIT_32(5)
255/** Set if using non-default critical section. */
256#define PDMDEVINSINT_FLAGS_CHANGED_CRITSECT RT_BIT_32(6)
257/** @} */
258
259
260/**
261 * Private USB device instance data.
262 */
263typedef struct PDMUSBINSINT
264{
265 /** The UUID of this instance. */
266 RTUUID Uuid;
267 /** Pointer to the next instance.
268 * (Head is pointed to by PDM::pUsbInstances.) */
269 R3PTRTYPE(PPDMUSBINS) pNext;
270 /** Pointer to the next per USB device instance.
271 * (Head is pointed to by PDMUSB::pInstances.) */
272 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
273
274 /** Pointer to device structure. */
275 R3PTRTYPE(PPDMUSB) pUsbDev;
276
277 /** Pointer to the VM this instance was created for. */
278 PVMR3 pVM;
279 /** Pointer to the list of logical units associated with the device. (FIFO) */
280 R3PTRTYPE(PPDMLUN) pLuns;
281 /** The per instance device configuration. */
282 R3PTRTYPE(PCFGMNODE) pCfg;
283 /** Same as pCfg if the configuration should be deleted when detaching the device. */
284 R3PTRTYPE(PCFGMNODE) pCfgDelete;
285 /** The global device configuration. */
286 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
287
288 /** Pointer to the USB hub this device is attached to.
289 * This is NULL if the device isn't connected to any HUB. */
290 R3PTRTYPE(PPDMUSBHUB) pHub;
291 /** The port number that we're connected to. */
292 uint32_t iPort;
293 /** Indicates that the USB device hasn't been powered on or resumed.
294 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
295 bool fVMSuspended;
296 /** Indicates that the USB device has been reset. */
297 bool fVMReset;
298 /** Pointer to the asynchronous notification callback set while in
299 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
300 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
301} PDMUSBINSINT;
302
303
304/**
305 * Private driver instance data.
306 */
307typedef struct PDMDRVINSINT
308{
309 /** Pointer to the driver instance above.
310 * This is NULL for the topmost drive. */
311 R3PTRTYPE(PPDMDRVINS) pUp;
312 /** Pointer to the driver instance below.
313 * This is NULL for the bottommost driver. */
314 R3PTRTYPE(PPDMDRVINS) pDown;
315 /** Pointer to the logical unit this driver chained on. */
316 R3PTRTYPE(PPDMLUN) pLun;
317 /** Pointer to driver structure from which this was instantiated. */
318 R3PTRTYPE(PPDMDRV) pDrv;
319 /** Pointer to the VM this instance was created for, ring-3 context. */
320 PVMR3 pVMR3;
321 /** Pointer to the VM this instance was created for, ring-0 context. */
322 R0PTRTYPE(PVMCC) pVMR0;
323 /** Pointer to the VM this instance was created for, raw-mode context. */
324 PVMRC pVMRC;
325 /** Flag indicating that the driver is being detached and destroyed.
326 * (Helps detect potential recursive detaching.) */
327 bool fDetaching;
328 /** Indicates that the driver hasn't been powered on or resumed.
329 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
330 bool fVMSuspended;
331 /** Indicates that the driver has been reset already. */
332 bool fVMReset;
333 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
334 bool fHyperHeap;
335 /** Pointer to the asynchronous notification callback set while in
336 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
337 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
338 /** Configuration handle to the instance node. */
339 R3PTRTYPE(PCFGMNODE) pCfgHandle;
340 /** Pointer to the ring-0 request handler function. */
341 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
342} PDMDRVINSINT;
343
344
345/**
346 * Private critical section data.
347 */
348typedef struct PDMCRITSECTINT
349{
350 /** The critical section core which is shared with IPRT.
351 * @note The semaphore is a SUPSEMEVENT. */
352 RTCRITSECT Core;
353 /** Pointer to the next critical section.
354 * This chain is used for relocating pVMRC and device cleanup. */
355 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
356 /** Owner identifier.
357 * This is pDevIns if the owner is a device. Similarly for a driver or service.
358 * PDMR3CritSectInit() sets this to point to the critsect itself. */
359 RTR3PTR pvKey;
360 /** Pointer to the VM - R3Ptr. */
361 PVMR3 pVMR3;
362 /** Pointer to the VM - R0Ptr. */
363 R0PTRTYPE(PVMCC) pVMR0;
364 /** Pointer to the VM - GCPtr. */
365 PVMRC pVMRC;
366 /** Set if this critical section is the automatically created default
367 * section of a device. */
368 bool fAutomaticDefaultCritsect;
369 /** Set if the critical section is used by a timer or similar.
370 * See PDMR3DevGetCritSect. */
371 bool fUsedByTimerOrSimilar;
372 /** Alignment padding. */
373 bool afPadding[2];
374 /** Support driver event semaphore that is scheduled to be signaled upon leaving
375 * the critical section. This is only for Ring-3 and Ring-0. */
376 SUPSEMEVENT hEventToSignal;
377 /** The lock name. */
378 R3PTRTYPE(const char *) pszName;
379 /** R0/RC lock contention. */
380 STAMCOUNTER StatContentionRZLock;
381 /** R0/RC unlock contention. */
382 STAMCOUNTER StatContentionRZUnlock;
383 /** R3 lock contention. */
384 STAMCOUNTER StatContentionR3;
385 /** Profiling the time the section is locked. */
386 STAMPROFILEADV StatLocked;
387} PDMCRITSECTINT;
388AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
389/** Pointer to private critical section data. */
390typedef PDMCRITSECTINT *PPDMCRITSECTINT;
391
392/** Indicates that the critical section is queued for unlock.
393 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
394#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
395
396
397/**
398 * Private critical section data.
399 */
400typedef struct PDMCRITSECTRWINT
401{
402 /** The read/write critical section core which is shared with IPRT.
403 * @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
404 RTCRITSECTRW Core;
405
406 /** Pointer to the next critical section.
407 * This chain is used for relocating pVMRC and device cleanup. */
408 R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
409 /** Owner identifier.
410 * This is pDevIns if the owner is a device. Similarly for a driver or service.
411 * PDMR3CritSectInit() sets this to point to the critsect itself. */
412 RTR3PTR pvKey;
413 /** Pointer to the VM - R3Ptr. */
414 PVMR3 pVMR3;
415 /** Pointer to the VM - R0Ptr. */
416 R0PTRTYPE(PVMCC) pVMR0;
417 /** Pointer to the VM - GCPtr. */
418 PVMRC pVMRC;
419#if HC_ARCH_BITS == 64
420 /** Alignment padding. */
421 RTRCPTR RCPtrPadding;
422#endif
423 /** The lock name. */
424 R3PTRTYPE(const char *) pszName;
425 /** R0/RC write lock contention. */
426 STAMCOUNTER StatContentionRZEnterExcl;
427 /** R0/RC write unlock contention. */
428 STAMCOUNTER StatContentionRZLeaveExcl;
429 /** R0/RC read lock contention. */
430 STAMCOUNTER StatContentionRZEnterShared;
431 /** R0/RC read unlock contention. */
432 STAMCOUNTER StatContentionRZLeaveShared;
433 /** R0/RC writes. */
434 STAMCOUNTER StatRZEnterExcl;
435 /** R0/RC reads. */
436 STAMCOUNTER StatRZEnterShared;
437 /** R3 write lock contention. */
438 STAMCOUNTER StatContentionR3EnterExcl;
439 /** R3 read lock contention. */
440 STAMCOUNTER StatContentionR3EnterShared;
441 /** R3 writes. */
442 STAMCOUNTER StatR3EnterExcl;
443 /** R3 reads. */
444 STAMCOUNTER StatR3EnterShared;
445 /** Profiling the time the section is write locked. */
446 STAMPROFILEADV StatWriteLocked;
447} PDMCRITSECTRWINT;
448AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
449AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
450/** Pointer to private critical section data. */
451typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
452
453
454
455/**
456 * The usual device/driver/internal/external stuff.
457 */
458typedef enum
459{
460 /** The usual invalid entry. */
461 PDMTHREADTYPE_INVALID = 0,
462 /** Device type. */
463 PDMTHREADTYPE_DEVICE,
464 /** USB Device type. */
465 PDMTHREADTYPE_USB,
466 /** Driver type. */
467 PDMTHREADTYPE_DRIVER,
468 /** Internal type. */
469 PDMTHREADTYPE_INTERNAL,
470 /** External type. */
471 PDMTHREADTYPE_EXTERNAL,
472 /** The usual 32-bit hack. */
473 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
474} PDMTHREADTYPE;
475
476
477/**
478 * The internal structure for the thread.
479 */
480typedef struct PDMTHREADINT
481{
482 /** The VM pointer. */
483 PVMR3 pVM;
484 /** The event semaphore the thread blocks on when not running. */
485 RTSEMEVENTMULTI BlockEvent;
486 /** The event semaphore the thread sleeps on while running. */
487 RTSEMEVENTMULTI SleepEvent;
488 /** Pointer to the next thread. */
489 R3PTRTYPE(struct PDMTHREAD *) pNext;
490 /** The thread type. */
491 PDMTHREADTYPE enmType;
492} PDMTHREADINT;
493
494
495
496/* Must be included after PDMDEVINSINT is defined. */
497#define PDMDEVINSINT_DECLARED
498#define PDMUSBINSINT_DECLARED
499#define PDMDRVINSINT_DECLARED
500#define PDMCRITSECTINT_DECLARED
501#define PDMCRITSECTRWINT_DECLARED
502#define PDMTHREADINT_DECLARED
503#ifdef ___VBox_pdm_h
504# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
505#endif
506RT_C_DECLS_END
507#include <VBox/vmm/pdm.h>
508RT_C_DECLS_BEGIN
509
510/**
511 * PDM Logical Unit.
512 *
513 * This typically the representation of a physical port on a
514 * device, like for instance the PS/2 keyboard port on the
515 * keyboard controller device. The LUNs are chained on the
516 * device they belong to (PDMDEVINSINT::pLunsR3).
517 */
518typedef struct PDMLUN
519{
520 /** The LUN - The Logical Unit Number. */
521 RTUINT iLun;
522 /** Pointer to the next LUN. */
523 PPDMLUN pNext;
524 /** Pointer to the top driver in the driver chain. */
525 PPDMDRVINS pTop;
526 /** Pointer to the bottom driver in the driver chain. */
527 PPDMDRVINS pBottom;
528 /** Pointer to the device instance which the LUN belongs to.
529 * Either this is set or pUsbIns is set. Both is never set at the same time. */
530 PPDMDEVINS pDevIns;
531 /** Pointer to the USB device instance which the LUN belongs to. */
532 PPDMUSBINS pUsbIns;
533 /** Pointer to the device base interface. */
534 PPDMIBASE pBase;
535 /** Description of this LUN. */
536 const char *pszDesc;
537} PDMLUN;
538
539
540/**
541 * PDM Device, ring-3.
542 */
543typedef struct PDMDEV
544{
545 /** Pointer to the next device (R3 Ptr). */
546 R3PTRTYPE(PPDMDEV) pNext;
547 /** Device name length. (search optimization) */
548 uint32_t cchName;
549 /** Registration structure. */
550 R3PTRTYPE(const struct PDMDEVREGR3 *) pReg;
551 /** Number of instances. */
552 uint32_t cInstances;
553 /** Pointer to chain of instances (R3 Ptr). */
554 PPDMDEVINSR3 pInstances;
555 /** The search path for raw-mode context modules (';' as separator). */
556 char *pszRCSearchPath;
557 /** The search path for ring-0 context modules (';' as separator). */
558 char *pszR0SearchPath;
559} PDMDEV;
560
561
562#if 0
563/**
564 * PDM Device, ring-0.
565 */
566typedef struct PDMDEVR0
567{
568 /** Pointer to the next device. */
569 R0PTRTYPE(PPDMDEVR0) pNext;
570 /** Device name length. (search optimization) */
571 uint32_t cchName;
572 /** Registration structure. */
573 R3PTRTYPE(const struct PDMDEVREGR0 *) pReg;
574 /** Number of instances. */
575 uint32_t cInstances;
576 /** Pointer to chain of instances. */
577 PPDMDEVINSR0 pInstances;
578} PDMDEVR0;
579#endif
580
581
582/**
583 * PDM USB Device.
584 */
585typedef struct PDMUSB
586{
587 /** Pointer to the next device (R3 Ptr). */
588 R3PTRTYPE(PPDMUSB) pNext;
589 /** Device name length. (search optimization) */
590 RTUINT cchName;
591 /** Registration structure. */
592 R3PTRTYPE(const struct PDMUSBREG *) pReg;
593 /** Next instance number. */
594 uint32_t iNextInstance;
595 /** Pointer to chain of instances (R3 Ptr). */
596 R3PTRTYPE(PPDMUSBINS) pInstances;
597} PDMUSB;
598
599
600/**
601 * PDM Driver.
602 */
603typedef struct PDMDRV
604{
605 /** Pointer to the next device. */
606 PPDMDRV pNext;
607 /** Registration structure. */
608 const struct PDMDRVREG * pReg;
609 /** Current number of instances. */
610 uint32_t cInstances;
611 /** The next instance number. */
612 uint32_t iNextInstance;
613 /** The search path for raw-mode context modules (';' as separator). */
614 char *pszRCSearchPath;
615 /** The search path for ring-0 context modules (';' as separator). */
616 char *pszR0SearchPath;
617} PDMDRV;
618
619
620/**
621 * PDM registered IOMMU device.
622 */
623typedef struct PDMIOMMU
624{
625 /** IOMMU index. */
626 uint32_t idxIommu;
627 uint32_t uPadding0; /**< Alignment padding.*/
628
629 /** Pointer to the IOMMU device instance - R3. */
630 PPDMDEVINSR3 pDevInsR3;
631
632 /** Pointer to the IOMMU device instance - R0. */
633 PPDMDEVINSR0 pDevInsR0;
634
635 /** Pointer to the IOMMU device instance - RC. */
636 PPDMDEVINSRC pDevInsRC;
637 RTRCPTR RCPtrPadding;
638} PDMIOMMU;
639
640
641/**
642 * Ring-0 PDM IOMMU instance data.
643 */
644typedef struct PDMIOMMUR0
645{
646 /** IOMMU index. */
647 uint32_t idxIommu;
648 uint32_t uPadding0; /**< Alignment padding.*/
649
650 /** Pointer to IOMMU device instance. */
651 PPDMDEVINSR0 pDevInsR0;
652} PDMIOMMUR0;
653/** Pointer to the ring-0 IOMMU data. */
654typedef PDMIOMMUR0 *PPDMIOMMUR0;
655
656
657/**
658 * PDM registered PIC device.
659 */
660typedef struct PDMPIC
661{
662 /** Pointer to the PIC device instance - R3. */
663 PPDMDEVINSR3 pDevInsR3;
664 /** @copydoc PDMPICREG::pfnSetIrq */
665 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
666 /** @copydoc PDMPICREG::pfnGetInterrupt */
667 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
668
669 /** Pointer to the PIC device instance - R0. */
670 PPDMDEVINSR0 pDevInsR0;
671 /** @copydoc PDMPICREG::pfnSetIrq */
672 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
673 /** @copydoc PDMPICREG::pfnGetInterrupt */
674 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
675
676 /** Pointer to the PIC device instance - RC. */
677 PPDMDEVINSRC pDevInsRC;
678 /** @copydoc PDMPICREG::pfnSetIrq */
679 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
680 /** @copydoc PDMPICREG::pfnGetInterrupt */
681 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
682 /** Alignment padding. */
683 RTRCPTR RCPtrPadding;
684} PDMPIC;
685
686
687/**
688 * PDM registered APIC device.
689 */
690typedef struct PDMAPIC
691{
692 /** Pointer to the APIC device instance - R3 Ptr. */
693 PPDMDEVINSR3 pDevInsR3;
694 /** Pointer to the APIC device instance - R0 Ptr. */
695 PPDMDEVINSR0 pDevInsR0;
696 /** Pointer to the APIC device instance - RC Ptr. */
697 PPDMDEVINSRC pDevInsRC;
698 uint8_t Alignment[4];
699} PDMAPIC;
700
701
702/**
703 * PDM registered I/O APIC device.
704 */
705typedef struct PDMIOAPIC
706{
707 /** Pointer to the APIC device instance - R3 Ptr. */
708 PPDMDEVINSR3 pDevInsR3;
709 /** @copydoc PDMIOAPICREG::pfnSetIrq */
710 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
711 /** @copydoc PDMIOAPICREG::pfnSendMsi */
712 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
713 /** @copydoc PDMIOAPICREG::pfnSetEoi */
714 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
715
716 /** Pointer to the PIC device instance - R0. */
717 PPDMDEVINSR0 pDevInsR0;
718 /** @copydoc PDMIOAPICREG::pfnSetIrq */
719 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
720 /** @copydoc PDMIOAPICREG::pfnSendMsi */
721 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
722 /** @copydoc PDMIOAPICREG::pfnSetEoi */
723 DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
724
725 /** Pointer to the APIC device instance - RC Ptr. */
726 PPDMDEVINSRC pDevInsRC;
727 /** @copydoc PDMIOAPICREG::pfnSetIrq */
728 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
729 /** @copydoc PDMIOAPICREG::pfnSendMsi */
730 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
731 /** @copydoc PDMIOAPICREG::pfnSendMsi */
732 DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
733} PDMIOAPIC;
734
735/** Maximum number of PCI busses for a VM. */
736#define PDM_PCI_BUSSES_MAX 8
737/** Maximum number of IOMMUs (at most one per PCI bus). */
738#define PDM_IOMMUS_MAX PDM_PCI_BUSSES_MAX
739
740
741#ifdef IN_RING3
742/**
743 * PDM registered firmware device.
744 */
745typedef struct PDMFW
746{
747 /** Pointer to the firmware device instance. */
748 PPDMDEVINSR3 pDevIns;
749 /** Copy of the registration structure. */
750 PDMFWREG Reg;
751} PDMFW;
752/** Pointer to a firmware instance. */
753typedef PDMFW *PPDMFW;
754#endif
755
756
757/**
758 * PDM PCI bus instance.
759 */
760typedef struct PDMPCIBUS
761{
762 /** PCI bus number. */
763 uint32_t iBus;
764 uint32_t uPadding0; /**< Alignment padding.*/
765
766 /** Pointer to PCI bus device instance. */
767 PPDMDEVINSR3 pDevInsR3;
768 /** @copydoc PDMPCIBUSREGR3::pfnSetIrqR3 */
769 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
770
771 /** @copydoc PDMPCIBUSREGR3::pfnRegisterR3 */
772 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
773 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
774 /** @copydoc PDMPCIBUSREGR3::pfnRegisterMsiR3 */
775 DECLR3CALLBACKMEMBER(int, pfnRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
776 /** @copydoc PDMPCIBUSREGR3::pfnIORegionRegisterR3 */
777 DECLR3CALLBACKMEMBER(int, pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
778 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
779 uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback));
780 /** @copydoc PDMPCIBUSREGR3::pfnInterceptConfigAccesses */
781 DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
782 PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
783 /** @copydoc PDMPCIBUSREGR3::pfnConfigWrite */
784 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
785 uint32_t uAddress, unsigned cb, uint32_t u32Value));
786 /** @copydoc PDMPCIBUSREGR3::pfnConfigRead */
787 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
788 uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
789} PDMPCIBUS;
790
791
792/**
793 * Ring-0 PDM PCI bus instance data.
794 */
795typedef struct PDMPCIBUSR0
796{
797 /** PCI bus number. */
798 uint32_t iBus;
799 uint32_t uPadding0; /**< Alignment padding.*/
800 /** Pointer to PCI bus device instance. */
801 PPDMDEVINSR0 pDevInsR0;
802 /** @copydoc PDMPCIBUSREGR0::pfnSetIrq */
803 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
804} PDMPCIBUSR0;
805/** Pointer to the ring-0 PCI bus data. */
806typedef PDMPCIBUSR0 *PPDMPCIBUSR0;
807
808
809#ifdef IN_RING3
810/**
811 * PDM registered DMAC (DMA Controller) device.
812 */
813typedef struct PDMDMAC
814{
815 /** Pointer to the DMAC device instance. */
816 PPDMDEVINSR3 pDevIns;
817 /** Copy of the registration structure. */
818 PDMDMACREG Reg;
819} PDMDMAC;
820
821
822/**
823 * PDM registered RTC (Real Time Clock) device.
824 */
825typedef struct PDMRTC
826{
827 /** Pointer to the RTC device instance. */
828 PPDMDEVINSR3 pDevIns;
829 /** Copy of the registration structure. */
830 PDMRTCREG Reg;
831} PDMRTC;
832
833#endif /* IN_RING3 */
834
835/**
836 * Module type.
837 */
838typedef enum PDMMODTYPE
839{
840 /** Raw-mode (RC) context module. */
841 PDMMOD_TYPE_RC,
842 /** Ring-0 (host) context module. */
843 PDMMOD_TYPE_R0,
844 /** Ring-3 (host) context module. */
845 PDMMOD_TYPE_R3
846} PDMMODTYPE;
847
848
849/** The module name length including the terminator. */
850#define PDMMOD_NAME_LEN 32
851
852/**
853 * Loaded module instance.
854 */
855typedef struct PDMMOD
856{
857 /** Module name. This is used for referring to
858 * the module internally, sort of like a handle. */
859 char szName[PDMMOD_NAME_LEN];
860 /** Module type. */
861 PDMMODTYPE eType;
862 /** Loader module handle. Not used for R0 modules. */
863 RTLDRMOD hLdrMod;
864 /** Loaded address.
865 * This is the 'handle' for R0 modules. */
866 RTUINTPTR ImageBase;
867 /** Old loaded address.
868 * This is used during relocation of GC modules. Not used for R0 modules. */
869 RTUINTPTR OldImageBase;
870 /** Where the R3 HC bits are stored.
871 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
872 void *pvBits;
873
874 /** Pointer to next module. */
875 struct PDMMOD *pNext;
876 /** Module filename. */
877 char szFilename[1];
878} PDMMOD;
879/** Pointer to loaded module instance. */
880typedef PDMMOD *PPDMMOD;
881
882
883
884/** Extra space in the free array. */
885#define PDMQUEUE_FREE_SLACK 16
886
887/**
888 * Queue type.
889 */
890typedef enum PDMQUEUETYPE
891{
892 /** Device consumer. */
893 PDMQUEUETYPE_DEV = 1,
894 /** Driver consumer. */
895 PDMQUEUETYPE_DRV,
896 /** Internal consumer. */
897 PDMQUEUETYPE_INTERNAL,
898 /** External consumer. */
899 PDMQUEUETYPE_EXTERNAL
900} PDMQUEUETYPE;
901
902/** Pointer to a PDM Queue. */
903typedef struct PDMQUEUE *PPDMQUEUE;
904
905/**
906 * PDM Queue.
907 */
908typedef struct PDMQUEUE
909{
910 /** Pointer to the next queue in the list. */
911 R3PTRTYPE(PPDMQUEUE) pNext;
912 /** Type specific data. */
913 union
914 {
915 /** PDMQUEUETYPE_DEV */
916 struct
917 {
918 /** Pointer to consumer function. */
919 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
920 /** Pointer to the device instance owning the queue. */
921 R3PTRTYPE(PPDMDEVINS) pDevIns;
922 } Dev;
923 /** PDMQUEUETYPE_DRV */
924 struct
925 {
926 /** Pointer to consumer function. */
927 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
928 /** Pointer to the driver instance owning the queue. */
929 R3PTRTYPE(PPDMDRVINS) pDrvIns;
930 } Drv;
931 /** PDMQUEUETYPE_INTERNAL */
932 struct
933 {
934 /** Pointer to consumer function. */
935 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
936 } Int;
937 /** PDMQUEUETYPE_EXTERNAL */
938 struct
939 {
940 /** Pointer to consumer function. */
941 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
942 /** Pointer to user argument. */
943 R3PTRTYPE(void *) pvUser;
944 } Ext;
945 } u;
946 /** Queue type. */
947 PDMQUEUETYPE enmType;
948 /** The interval between checking the queue for events.
949 * The realtime timer below is used to do the waiting.
950 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
951 uint32_t cMilliesInterval;
952 /** Interval timer. Only used if cMilliesInterval is non-zero. */
953 PTMTIMERR3 pTimer;
954 /** Pointer to the VM - R3. */
955 PVMR3 pVMR3;
956 /** LIFO of pending items - R3. */
957 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
958 /** Pointer to the VM - R0. */
959 PVMR0 pVMR0;
960 /** LIFO of pending items - R0. */
961 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
962 /** Pointer to the GC VM and indicator for GC enabled queue.
963 * If this is NULL, the queue cannot be used in GC.
964 */
965 PVMRC pVMRC;
966 /** LIFO of pending items - GC. */
967 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
968
969 /** Item size (bytes). */
970 uint32_t cbItem;
971 /** Number of items in the queue. */
972 uint32_t cItems;
973 /** Index to the free head (where we insert). */
974 uint32_t volatile iFreeHead;
975 /** Index to the free tail (where we remove). */
976 uint32_t volatile iFreeTail;
977
978 /** Unique queue name. */
979 R3PTRTYPE(const char *) pszName;
980#if HC_ARCH_BITS == 32
981 RTR3PTR Alignment1;
982#endif
983 /** Stat: Times PDMQueueAlloc fails. */
984 STAMCOUNTER StatAllocFailures;
985 /** Stat: PDMQueueInsert calls. */
986 STAMCOUNTER StatInsert;
987 /** Stat: Queue flushes. */
988 STAMCOUNTER StatFlush;
989 /** Stat: Queue flushes with pending items left over. */
990 STAMCOUNTER StatFlushLeftovers;
991#ifdef VBOX_WITH_STATISTICS
992 /** State: Profiling the flushing. */
993 STAMPROFILE StatFlushPrf;
994 /** State: Pending items. */
995 uint32_t volatile cStatPending;
996 uint32_t volatile cAlignment;
997#endif
998
999 /** Array of pointers to free items. Variable size. */
1000 struct PDMQUEUEFREEITEM
1001 {
1002 /** Pointer to the free item - HC Ptr. */
1003 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
1004 /** Pointer to the free item - HC Ptr. */
1005 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
1006 /** Pointer to the free item - GC Ptr. */
1007 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
1008#if HC_ARCH_BITS == 64
1009 RTRCPTR Alignment0;
1010#endif
1011 } aFreeItems[1];
1012} PDMQUEUE;
1013
1014/** @name PDM::fQueueFlushing
1015 * @{ */
1016/** Used to make sure only one EMT will flush the queues.
1017 * Set when an EMT is flushing queues, clear otherwise. */
1018#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
1019/** Indicating there are queues with items pending.
1020 * This is make sure we don't miss inserts happening during flushing. The FF
1021 * cannot be used for this since it has to be cleared immediately to prevent
1022 * other EMTs from spinning. */
1023#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
1024/** @} */
1025
1026
1027/** @name PDM task structures.
1028 * @{ */
1029
1030/**
1031 * A asynchronous user mode task.
1032 */
1033typedef struct PDMTASK
1034{
1035 /** Task owner type. */
1036 PDMTASKTYPE volatile enmType;
1037 /** Queue flags. */
1038 uint32_t volatile fFlags;
1039 /** User argument for the callback. */
1040 R3PTRTYPE(void *) volatile pvUser;
1041 /** The callback (will be cast according to enmType before callout). */
1042 R3PTRTYPE(PFNRT) volatile pfnCallback;
1043 /** The owner identifier. */
1044 R3PTRTYPE(void *) volatile pvOwner;
1045 /** Task name. */
1046 R3PTRTYPE(const char *) pszName;
1047 /** Number of times already triggered when PDMTaskTrigger was called. */
1048 uint32_t volatile cAlreadyTrigged;
1049 /** Number of runs. */
1050 uint32_t cRuns;
1051} PDMTASK;
1052/** Pointer to a PDM task. */
1053typedef PDMTASK *PPDMTASK;
1054
1055/**
1056 * A task set.
1057 *
1058 * This is served by one task executor thread.
1059 */
1060typedef struct PDMTASKSET
1061{
1062 /** Magic value (PDMTASKSET_MAGIC). */
1063 uint32_t u32Magic;
1064 /** Set if this task set works for ring-0 and raw-mode. */
1065 bool fRZEnabled;
1066 /** Number of allocated taks. */
1067 uint8_t volatile cAllocated;
1068 /** Base handle value for this set. */
1069 uint16_t uHandleBase;
1070 /** The task executor thread. */
1071 R3PTRTYPE(RTTHREAD) hThread;
1072 /** Event semaphore for waking up the thread when fRZEnabled is set. */
1073 SUPSEMEVENT hEventR0;
1074 /** Event semaphore for waking up the thread when fRZEnabled is clear. */
1075 R3PTRTYPE(RTSEMEVENT) hEventR3;
1076 /** The VM pointer. */
1077 PVM pVM;
1078 /** Padding so fTriggered is in its own cacheline. */
1079 uint64_t au64Padding2[3];
1080
1081 /** Bitmask of triggered tasks. */
1082 uint64_t volatile fTriggered;
1083 /** Shutdown thread indicator. */
1084 bool volatile fShutdown;
1085 /** Padding. */
1086 bool volatile afPadding3[3];
1087 /** Task currently running, UINT32_MAX if idle. */
1088 uint32_t volatile idxRunning;
1089 /** Padding so fTriggered and fShutdown are in their own cacheline. */
1090 uint64_t volatile au64Padding3[6];
1091
1092 /** The individual tasks. (Unallocated tasks have NULL pvOwner.) */
1093 PDMTASK aTasks[64];
1094} PDMTASKSET;
1095AssertCompileMemberAlignment(PDMTASKSET, fTriggered, 64);
1096AssertCompileMemberAlignment(PDMTASKSET, aTasks, 64);
1097/** Magic value for PDMTASKSET::u32Magic. */
1098#define PDMTASKSET_MAGIC UINT32_C(0x19320314)
1099/** Pointer to a task set. */
1100typedef PDMTASKSET *PPDMTASKSET;
1101
1102/** @} */
1103
1104
1105/**
1106 * Queue device helper task operation.
1107 */
1108typedef enum PDMDEVHLPTASKOP
1109{
1110 /** The usual invalid 0 entry. */
1111 PDMDEVHLPTASKOP_INVALID = 0,
1112 /** ISASetIrq */
1113 PDMDEVHLPTASKOP_ISA_SET_IRQ,
1114 /** PCISetIrq */
1115 PDMDEVHLPTASKOP_PCI_SET_IRQ,
1116 /** PCISetIrq */
1117 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
1118 /** The usual 32-bit hack. */
1119 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
1120} PDMDEVHLPTASKOP;
1121
1122/**
1123 * Queued Device Helper Task.
1124 */
1125typedef struct PDMDEVHLPTASK
1126{
1127 /** The queue item core (don't touch). */
1128 PDMQUEUEITEMCORE Core;
1129 /** Pointer to the device instance (R3 Ptr). */
1130 PPDMDEVINSR3 pDevInsR3;
1131 /** This operation to perform. */
1132 PDMDEVHLPTASKOP enmOp;
1133#if HC_ARCH_BITS == 64
1134 uint32_t Alignment0;
1135#endif
1136 /** Parameters to the operation. */
1137 union PDMDEVHLPTASKPARAMS
1138 {
1139 /**
1140 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
1141 */
1142 struct PDMDEVHLPTASKISASETIRQ
1143 {
1144 /** The IRQ */
1145 int iIrq;
1146 /** The new level. */
1147 int iLevel;
1148 /** The IRQ tag and source. */
1149 uint32_t uTagSrc;
1150 } IsaSetIRQ, IoApicSetIRQ;
1151
1152 /**
1153 * PDMDEVHLPTASKOP_PCI_SET_IRQ
1154 */
1155 struct PDMDEVHLPTASKPCISETIRQ
1156 {
1157 /** Pointer to the PCI device (R3 Ptr). */
1158 R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
1159 /** The IRQ */
1160 int iIrq;
1161 /** The new level. */
1162 int iLevel;
1163 /** The IRQ tag and source. */
1164 uint32_t uTagSrc;
1165 } PciSetIRQ;
1166
1167 /** Expanding the structure. */
1168 uint64_t au64[3];
1169 } u;
1170} PDMDEVHLPTASK;
1171/** Pointer to a queued Device Helper Task. */
1172typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
1173/** Pointer to a const queued Device Helper Task. */
1174typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
1175
1176
1177
1178/**
1179 * An USB hub registration record.
1180 */
1181typedef struct PDMUSBHUB
1182{
1183 /** The USB versions this hub support.
1184 * Note that 1.1 hubs can take on 2.0 devices. */
1185 uint32_t fVersions;
1186 /** The number of ports on the hub. */
1187 uint32_t cPorts;
1188 /** The number of available ports (0..cPorts). */
1189 uint32_t cAvailablePorts;
1190 /** The driver instance of the hub. */
1191 PPDMDRVINS pDrvIns;
1192 /** Copy of the to the registration structure. */
1193 PDMUSBHUBREG Reg;
1194
1195 /** Pointer to the next hub in the list. */
1196 struct PDMUSBHUB *pNext;
1197} PDMUSBHUB;
1198
1199/** Pointer to a const USB HUB registration record. */
1200typedef const PDMUSBHUB *PCPDMUSBHUB;
1201
1202/** Pointer to a PDM Async I/O template. */
1203typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
1204
1205/** Pointer to the main PDM Async completion endpoint class. */
1206typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
1207
1208/** Pointer to the global block cache structure. */
1209typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
1210
1211/**
1212 * PDM VMCPU Instance data.
1213 * Changes to this must checked against the padding of the pdm union in VMCPU!
1214 */
1215typedef struct PDMCPU
1216{
1217 /** The number of entries in the apQueuedCritSectsLeaves table that's currently
1218 * in use. */
1219 uint32_t cQueuedCritSectLeaves;
1220 uint32_t uPadding0; /**< Alignment padding.*/
1221 /** Critical sections queued in RC/R0 because of contention preventing leave to
1222 * complete. (R3 Ptrs)
1223 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1224 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
1225
1226 /** The number of entries in the apQueuedCritSectRwExclLeaves table that's
1227 * currently in use. */
1228 uint32_t cQueuedCritSectRwExclLeaves;
1229 uint32_t uPadding1; /**< Alignment padding.*/
1230 /** Read/write critical sections queued in RC/R0 because of contention
1231 * preventing exclusive leave to complete. (R3 Ptrs)
1232 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1233 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1234
1235 /** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1236 * currently in use. */
1237 uint32_t cQueuedCritSectRwShrdLeaves;
1238 uint32_t uPadding2; /**< Alignment padding.*/
1239 /** Read/write critical sections queued in RC/R0 because of contention
1240 * preventing shared leave to complete. (R3 Ptrs)
1241 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1242 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1243} PDMCPU;
1244
1245
1246/**
1247 * PDM VM Instance data.
1248 * Changes to this must checked against the padding of the cfgm union in VM!
1249 */
1250typedef struct PDM
1251{
1252 /** The PDM lock.
1253 * This is used to protect everything that deals with interrupts, i.e.
1254 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1255 PDMCRITSECT CritSect;
1256 /** The NOP critical section.
1257 * This is a dummy critical section that will not do any thread
1258 * serialization but instead let all threads enter immediately and
1259 * concurrently. */
1260 PDMCRITSECT NopCritSect;
1261
1262 /** The ring-0 capable task sets (max 128). */
1263 PDMTASKSET aTaskSets[2];
1264 /** Pointer to task sets (max 512). */
1265 R3PTRTYPE(PPDMTASKSET) apTaskSets[8];
1266
1267 /** PCI Buses. */
1268 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1269 /** IOMMU devices. */
1270 PDMIOMMU aIommus[PDM_IOMMUS_MAX];
1271 /** The register PIC device. */
1272 PDMPIC Pic;
1273 /** The registered APIC device. */
1274 PDMAPIC Apic;
1275 /** The registered I/O APIC device. */
1276 PDMIOAPIC IoApic;
1277 /** The registered HPET device. */
1278 PPDMDEVINSR3 pHpet;
1279
1280 /** List of registered devices. (FIFO) */
1281 R3PTRTYPE(PPDMDEV) pDevs;
1282 /** List of devices instances. (FIFO) */
1283 R3PTRTYPE(PPDMDEVINS) pDevInstances;
1284 /** List of registered USB devices. (FIFO) */
1285 R3PTRTYPE(PPDMUSB) pUsbDevs;
1286 /** List of USB devices instances. (FIFO) */
1287 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1288 /** List of registered drivers. (FIFO) */
1289 R3PTRTYPE(PPDMDRV) pDrvs;
1290 /** The registered firmware device (can be NULL). */
1291 R3PTRTYPE(PPDMFW) pFirmware;
1292 /** The registered DMAC device. */
1293 R3PTRTYPE(PPDMDMAC) pDmac;
1294 /** The registered RTC device. */
1295 R3PTRTYPE(PPDMRTC) pRtc;
1296 /** The registered USB HUBs. (FIFO) */
1297 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1298
1299 /** @name Queues
1300 * @{ */
1301 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1302 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1303 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1304 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1305 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1306 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1307 /** Pointer to the queue which should be manually flushed - RC Ptr.
1308 * Only touched by EMT. */
1309 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1310 /** Pointer to the queue which should be manually flushed - R0 Ptr.
1311 * Only touched by EMT. */
1312 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1313 /** Bitmask controlling the queue flushing.
1314 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1315 uint32_t volatile fQueueFlushing;
1316 /** @} */
1317
1318 /** The current IRQ tag (tracing purposes). */
1319 uint32_t volatile uIrqTag;
1320
1321 /** Pending reset flags (PDMVMRESET_F_XXX). */
1322 uint32_t volatile fResetFlags;
1323
1324 /** Set by pdmR3LoadExec for use in assertions. */
1325 bool fStateLoaded;
1326 /** Alignment padding. */
1327 bool afPadding[3];
1328
1329 /** The tracing ID of the next device instance.
1330 *
1331 * @remarks We keep the device tracing ID seperate from the rest as these are
1332 * then more likely to end up with the same ID from one run to
1333 * another, making analysis somewhat easier. Drivers and USB devices
1334 * are more volatile and can be changed at runtime, thus these are much
1335 * less likely to remain stable, so just heap them all together. */
1336 uint32_t idTracingDev;
1337 /** The tracing ID of the next driver instance, USB device instance or other
1338 * PDM entity requiring an ID. */
1339 uint32_t idTracingOther;
1340
1341 /** @name VMM device heap
1342 * @{ */
1343 /** The heap size. */
1344 uint32_t cbVMMDevHeap;
1345 /** Free space. */
1346 uint32_t cbVMMDevHeapLeft;
1347 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1348 RTR3PTR pvVMMDevHeap;
1349 /** Ring-3 mapping/unmapping notification callback for the user. */
1350 PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1351 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1352 RTGCPHYS GCPhysVMMDevHeap;
1353 /** @} */
1354
1355 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1356 STAMCOUNTER StatQueuedCritSectLeaves;
1357} PDM;
1358AssertCompileMemberAlignment(PDM, CritSect, 8);
1359AssertCompileMemberAlignment(PDM, aTaskSets, 64);
1360AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1361AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1362/** Pointer to PDM VM instance data. */
1363typedef PDM *PPDM;
1364
1365
1366/**
1367 * PDM data kept in the ring-0 GVM.
1368 */
1369typedef struct PDMR0PERVM
1370{
1371 /** PCI Buses, ring-0 data. */
1372 PDMPCIBUSR0 aPciBuses[PDM_PCI_BUSSES_MAX];
1373 /** IOMMUs, ring-0 data. */
1374 PDMIOMMUR0 aIommus[PDM_IOMMUS_MAX];
1375 /** Number of valid ring-0 device instances (apDevInstances). */
1376 uint32_t cDevInstances;
1377 uint32_t u32Padding;
1378 /** Pointer to ring-0 device instances. */
1379 R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[190];
1380} PDMR0PERVM;
1381
1382
1383/**
1384 * PDM data kept in the UVM.
1385 */
1386typedef struct PDMUSERPERVM
1387{
1388 /** @todo move more stuff over here. */
1389
1390 /** Linked list of timer driven PDM queues.
1391 * Currently serialized by PDM::CritSect. */
1392 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1393 /** Linked list of force action driven PDM queues.
1394 * Currently serialized by PDM::CritSect. */
1395 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1396
1397 /** Lock protecting the lists below it. */
1398 RTCRITSECT ListCritSect;
1399 /** Pointer to list of loaded modules. */
1400 PPDMMOD pModules;
1401 /** List of initialized critical sections. (LIFO) */
1402 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1403 /** List of initialized read/write critical sections. (LIFO) */
1404 R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1405 /** Head of the PDM Thread list. (singly linked) */
1406 R3PTRTYPE(PPDMTHREAD) pThreads;
1407 /** Tail of the PDM Thread list. (singly linked) */
1408 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1409
1410 /** @name PDM Async Completion
1411 * @{ */
1412 /** Pointer to the array of supported endpoint classes. */
1413 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1414 /** Head of the templates. Singly linked, protected by ListCritSect. */
1415 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1416 /** @} */
1417
1418 /** Global block cache data. */
1419 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1420#ifdef VBOX_WITH_NETSHAPER
1421 /** Pointer to network shaper instance. */
1422 R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1423#endif /* VBOX_WITH_NETSHAPER */
1424
1425} PDMUSERPERVM;
1426/** Pointer to the PDM data kept in the UVM. */
1427typedef PDMUSERPERVM *PPDMUSERPERVM;
1428
1429
1430
1431/*******************************************************************************
1432* Global Variables *
1433*******************************************************************************/
1434#ifdef IN_RING3
1435extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1436extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1437extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1438extern const PDMPICHLP g_pdmR3DevPicHlp;
1439extern const PDMIOAPICHLP g_pdmR3DevIoApicHlp;
1440extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1441extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1442extern const PDMIOMMUHLPR3 g_pdmR3DevIommuHlp;
1443extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1444extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1445extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1446extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1447#endif
1448
1449
1450/*******************************************************************************
1451* Defined Constants And Macros *
1452*******************************************************************************/
1453/** @def PDMDEV_ASSERT_DEVINS
1454 * Asserts the validity of the device instance.
1455 */
1456#ifdef VBOX_STRICT
1457# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1458 do { \
1459 AssertPtr(pDevIns); \
1460 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1461 Assert(pDevIns->CTX_SUFF(pvInstanceDataFor) == (void *)&pDevIns->achInstanceData[0]); \
1462 } while (0)
1463#else
1464# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1465#endif
1466
1467/** @def PDMDRV_ASSERT_DRVINS
1468 * Asserts the validity of the driver instance.
1469 */
1470#ifdef VBOX_STRICT
1471# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1472 do { \
1473 AssertPtr(pDrvIns); \
1474 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1475 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1476 } while (0)
1477#else
1478# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1479#endif
1480
1481
1482/*******************************************************************************
1483* Internal Functions *
1484*******************************************************************************/
1485#ifdef IN_RING3
1486bool pdmR3IsValidName(const char *pszName);
1487
1488int pdmR3CritSectBothInitStats(PVM pVM);
1489void pdmR3CritSectBothRelocate(PVM pVM);
1490int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1491int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1492int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1493 const char *pszNameFmt, va_list va);
1494int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1495 const char *pszNameFmt, ...);
1496int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1497 const char *pszNameFmt, ...);
1498int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1499 const char *pszNameFmt, va_list va);
1500int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1501 const char *pszNameFmt, ...);
1502int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1503 const char *pszNameFmt, ...);
1504
1505int pdmR3DevInit(PVM pVM);
1506int pdmR3DevInitComplete(PVM pVM);
1507PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1508int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1509DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1510
1511int pdmR3UsbLoadModules(PVM pVM);
1512int pdmR3UsbInstantiateDevices(PVM pVM);
1513PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1514int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1515int pdmR3UsbVMInitComplete(PVM pVM);
1516
1517int pdmR3DrvInit(PVM pVM);
1518int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1519 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1520int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1521void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1522PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1523
1524int pdmR3LdrInitU(PUVM pUVM);
1525void pdmR3LdrTermU(PUVM pUVM);
1526char *pdmR3FileR3(const char *pszFile, bool fShared);
1527int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1528
1529void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1530
1531int pdmR3TaskInit(PVM pVM);
1532void pdmR3TaskTerm(PVM pVM);
1533
1534int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1535 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1536int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1537 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1538int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1539 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1540int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1541int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1542int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1543void pdmR3ThreadDestroyAll(PVM pVM);
1544int pdmR3ThreadResumeAll(PVM pVM);
1545int pdmR3ThreadSuspendAll(PVM pVM);
1546
1547#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1548int pdmR3AsyncCompletionInit(PVM pVM);
1549int pdmR3AsyncCompletionTerm(PVM pVM);
1550void pdmR3AsyncCompletionResume(PVM pVM);
1551int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1552int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1553 PFNPDMASYNCCOMPLETEDRV pfnCompleted, void *pvTemplateUser, const char *pszDesc);
1554int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1555int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1556int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1557int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1558#endif
1559
1560#ifdef VBOX_WITH_NETSHAPER
1561int pdmR3NetShaperInit(PVM pVM);
1562int pdmR3NetShaperTerm(PVM pVM);
1563#endif
1564
1565int pdmR3BlkCacheInit(PVM pVM);
1566void pdmR3BlkCacheTerm(PVM pVM);
1567int pdmR3BlkCacheResume(PVM pVM);
1568
1569#endif /* IN_RING3 */
1570
1571void pdmLock(PVMCC pVM);
1572int pdmLockEx(PVMCC pVM, int rc);
1573void pdmUnlock(PVMCC pVM);
1574
1575#if defined(IN_RING3) || defined(IN_RING0)
1576void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1577void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1578#endif
1579
1580/** @} */
1581
1582RT_C_DECLS_END
1583
1584#endif /* !VMM_INCLUDED_SRC_include_PDMInternal_h */
1585
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