PDMInternal.h@ 44397

Last change on this file since 44397 was 44358, checked in by vboxsync, 12 years ago
PDMAsyncCompletion: PVM -> PUVM (one instance), internalize internal APIs where possible (not all because of test cases). API docs lives where the implmentation lives, NOT in headers (IPRT is the exception).
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File size: 49.1 KB

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1	/* $Id: PDMInternal.h 44358 2013-01-24 16:05:55Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2011 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___PDMInternal_h
19	#define ___PDMInternal_h
20
21	#include <VBox/types.h>
22	#include <VBox/param.h>
23	#include <VBox/vmm/cfgm.h>
24	#include <VBox/vmm/stam.h>
25	#include <VBox/vusb.h>
26	#include <VBox/vmm/pdmasynccompletion.h>
27	#ifdef VBOX_WITH_NETSHAPER
28	# include <VBox/vmm/pdmnetshaper.h>
29	#endif
30	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
31	# include <VBox/vmm/pdmasynccompletion.h>
32	#endif
33	#include <VBox/vmm/pdmblkcache.h>
34	#include <VBox/vmm/pdmcommon.h>
35	#include <iprt/assert.h>
36	#include <iprt/critsect.h>
37	#ifdef IN_RING3
38	# include <iprt/thread.h>
39	#endif
40
41	RT_C_DECLS_BEGIN
42
43
44	/** @defgroup grp_pdm_int Internal
45	* @ingroup grp_pdm
46	* @internal
47	* @{
48	*/
49
50	/** @def PDM_WITH_R3R0_CRIT_SECT
51	* Enables or disabled ring-3/ring-0 critical sections. */
52	#if defined(DOXYGEN_RUNNING) \|\| 1
53	# define PDM_WITH_R3R0_CRIT_SECT
54	#endif
55
56	/** @def PDMCRITSECT_STRICT
57	* Enables/disables PDM critsect strictness like deadlock detection. */
58	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(IEM_VERIFICATION_MODE)) \|\| defined(DOXYGEN_RUNNING)
59	# define PDMCRITSECT_STRICT
60	#endif
61
62
63	/*******************************************************************************
64	* Structures and Typedefs *
65	*******************************************************************************/
66
67	/** Pointer to a PDM Device. */
68	typedef struct PDMDEV *PPDMDEV;
69	/** Pointer to a pointer to a PDM Device. */
70	typedef PPDMDEV *PPPDMDEV;
71
72	/** Pointer to a PDM USB Device. */
73	typedef struct PDMUSB *PPDMUSB;
74	/** Pointer to a pointer to a PDM USB Device. */
75	typedef PPDMUSB *PPPDMUSB;
76
77	/** Pointer to a PDM Driver. */
78	typedef struct PDMDRV *PPDMDRV;
79	/** Pointer to a pointer to a PDM Driver. */
80	typedef PPDMDRV *PPPDMDRV;
81
82	/** Pointer to a PDM Logical Unit. */
83	typedef struct PDMLUN *PPDMLUN;
84	/** Pointer to a pointer to a PDM Logical Unit. */
85	typedef PPDMLUN *PPPDMLUN;
86
87	/** Pointer to a PDM PCI Bus instance. */
88	typedef struct PDMPCIBUS *PPDMPCIBUS;
89	/** Pointer to a DMAC instance. */
90	typedef struct PDMDMAC *PPDMDMAC;
91	/** Pointer to a RTC instance. */
92	typedef struct PDMRTC *PPDMRTC;
93
94	/** Pointer to an USB HUB registration record. */
95	typedef struct PDMUSBHUB *PPDMUSBHUB;
96
97	/**
98	* Supported asynchronous completion endpoint classes.
99	*/
100	typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
101	{
102	/** File class. */
103	PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
104	/** Number of supported classes. */
105	PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
106	/** 32bit hack. */
107	PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
108	} PDMASYNCCOMPLETIONEPCLASSTYPE;
109
110	/**
111	* Private device instance data.
112	*/
113	typedef struct PDMDEVINSINT
114	{
115	/** Pointer to the next instance (HC Ptr).
116	* (Head is pointed to by PDM::pDevInstances.) */
117	R3PTRTYPE(PPDMDEVINS) pNextR3;
118	/** Pointer to the next per device instance (HC Ptr).
119	* (Head is pointed to by PDMDEV::pInstances.) */
120	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
121	/** Pointer to device structure - HC Ptr. */
122	R3PTRTYPE(PPDMDEV) pDevR3;
123	/** Pointer to the list of logical units associated with the device. (FIFO) */
124	R3PTRTYPE(PPDMLUN) pLunsR3;
125	/** Pointer to the asynchronous notification callback set while in
126	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
127	R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
128	/** Configuration handle to the instance node. */
129	R3PTRTYPE(PCFGMNODE) pCfgHandle;
130
131	/** R3 pointer to the VM this instance was created for. */
132	PVMR3 pVMR3;
133	/** R3 pointer to associated PCI device structure. */
134	R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
135	/** R3 pointer to associated PCI bus structure. */
136	R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
137
138	/** R0 pointer to the VM this instance was created for. */
139	PVMR0 pVMR0;
140	/** R0 pointer to associated PCI device structure. */
141	R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
142	/** R0 pointer to associated PCI bus structure. */
143	R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
144
145	/** RC pointer to the VM this instance was created for. */
146	PVMRC pVMRC;
147	/** RC pointer to associated PCI device structure. */
148	RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
149	/** RC pointer to associated PCI bus structure. */
150	RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
151
152	/** Flags, see PDMDEVINSINT_FLAGS_XXX. */
153	uint32_t fIntFlags;
154	/** The last IRQ tag (for tracing it thru clearing). */
155	uint32_t uLastIrqTag;
156	/** Size padding. */
157	uint32_t u32Padding;
158	} PDMDEVINSINT;
159
160	/** @name PDMDEVINSINT::fIntFlags
161	* @{ */
162	/** Used by pdmR3Load to mark device instances it found in the saved state. */
163	#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
164	/** Indicates that the device hasn't been powered on or resumed.
165	* This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
166	* to make sure each device gets exactly one notification for each of those
167	* events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
168	* a failure (already resumed/powered-on devices are suspended). */
169	#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
170	/** Indicates that the device has been reset already. Used by PDMR3Reset. */
171	#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
172	/** @} */
173
174
175	/**
176	* Private USB device instance data.
177	*/
178	typedef struct PDMUSBINSINT
179	{
180	/** The UUID of this instance. */
181	RTUUID Uuid;
182	/** Pointer to the next instance.
183	* (Head is pointed to by PDM::pUsbInstances.) */
184	R3PTRTYPE(PPDMUSBINS) pNext;
185	/** Pointer to the next per USB device instance.
186	* (Head is pointed to by PDMUSB::pInstances.) */
187	R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
188
189	/** Pointer to device structure. */
190	R3PTRTYPE(PPDMUSB) pUsbDev;
191
192	/** Pointer to the VM this instance was created for. */
193	PVMR3 pVM;
194	/** Pointer to the list of logical units associated with the device. (FIFO) */
195	R3PTRTYPE(PPDMLUN) pLuns;
196	/** The per instance device configuration. */
197	R3PTRTYPE(PCFGMNODE) pCfg;
198	/** Same as pCfg if the configuration should be deleted when detaching the device. */
199	R3PTRTYPE(PCFGMNODE) pCfgDelete;
200	/** The global device configuration. */
201	R3PTRTYPE(PCFGMNODE) pCfgGlobal;
202
203	/** Pointer to the USB hub this device is attached to.
204	* This is NULL if the device isn't connected to any HUB. */
205	R3PTRTYPE(PPDMUSBHUB) pHub;
206	/** The port number that we're connected to. */
207	uint32_t iPort;
208	/** Indicates that the USB device hasn't been powered on or resumed.
209	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
210	bool fVMSuspended;
211	/** Indicates that the USB device has been reset. */
212	bool fVMReset;
213	/** Pointer to the asynchronous notification callback set while in
214	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
215	R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
216	} PDMUSBINSINT;
217
218
219	/**
220	* Private driver instance data.
221	*/
222	typedef struct PDMDRVINSINT
223	{
224	/** Pointer to the driver instance above.
225	* This is NULL for the topmost drive. */
226	R3PTRTYPE(PPDMDRVINS) pUp;
227	/** Pointer to the driver instance below.
228	* This is NULL for the bottommost driver. */
229	R3PTRTYPE(PPDMDRVINS) pDown;
230	/** Pointer to the logical unit this driver chained on. */
231	R3PTRTYPE(PPDMLUN) pLun;
232	/** Pointer to driver structure from which this was instantiated. */
233	R3PTRTYPE(PPDMDRV) pDrv;
234	/** Pointer to the VM this instance was created for, ring-3 context. */
235	PVMR3 pVMR3;
236	/** Pointer to the VM this instance was created for, ring-0 context. */
237	PVMR0 pVMR0;
238	/** Pointer to the VM this instance was created for, raw-mode context. */
239	PVMRC pVMRC;
240	/** Flag indicating that the driver is being detached and destroyed.
241	* (Helps detect potential recursive detaching.) */
242	bool fDetaching;
243	/** Indicates that the driver hasn't been powered on or resumed.
244	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
245	bool fVMSuspended;
246	/** Indicates that the driver has been reset already. */
247	bool fVMReset;
248	/** Set if allocated on the hyper heap, false if on the ring-3 heap. */
249	bool fHyperHeap;
250	/** Pointer to the asynchronous notification callback set while in
251	* PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
252	R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
253	/** Configuration handle to the instance node. */
254	R3PTRTYPE(PCFGMNODE) pCfgHandle;
255	/** Pointer to the ring-0 request handler function. */
256	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
257	} PDMDRVINSINT;
258
259
260	/**
261	* Private critical section data.
262	*/
263	typedef struct PDMCRITSECTINT
264	{
265	/** The critical section core which is shared with IPRT. */
266	RTCRITSECT Core;
267	/** Pointer to the next critical section.
268	* This chain is used for relocating pVMRC and device cleanup. */
269	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
270	/** Owner identifier.
271	* This is pDevIns if the owner is a device. Similarly for a driver or service.
272	* PDMR3CritSectInit() sets this to point to the critsect itself. */
273	RTR3PTR pvKey;
274	/** Pointer to the VM - R3Ptr. */
275	PVMR3 pVMR3;
276	/** Pointer to the VM - R0Ptr. */
277	PVMR0 pVMR0;
278	/** Pointer to the VM - GCPtr. */
279	PVMRC pVMRC;
280	/** Set if this critical section is the automatically created default
281	* section of a device.. */
282	bool fAutomaticDefaultCritsect;
283	/** Set if the critical section is used by a timer or similar.
284	* See PDMR3DevGetCritSect. */
285	bool fUsedByTimerOrSimilar;
286	/** Alignment padding. */
287	bool afPadding[2];
288	/** Event semaphore that is scheduled to be signaled upon leaving the
289	* critical section. This is Ring-3 only of course. */
290	RTSEMEVENT EventToSignal;
291	/** The lock name. */
292	R3PTRTYPE(const char *) pszName;
293	/** R0/RC lock contention. */
294	STAMCOUNTER StatContentionRZLock;
295	/** R0/RC unlock contention. */
296	STAMCOUNTER StatContentionRZUnlock;
297	/** R3 lock contention. */
298	STAMCOUNTER StatContentionR3;
299	/** Profiling the time the section is locked. */
300	STAMPROFILEADV StatLocked;
301	} PDMCRITSECTINT;
302	AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
303	/** Pointer to private critical section data. */
304	typedef PDMCRITSECTINT *PPDMCRITSECTINT;
305
306	/** Indicates that the critical section is queued for unlock.
307	* PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
308	#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
309
310
311	/**
312	* The usual device/driver/internal/external stuff.
313	*/
314	typedef enum
315	{
316	/** The usual invalid entry. */
317	PDMTHREADTYPE_INVALID = 0,
318	/** Device type. */
319	PDMTHREADTYPE_DEVICE,
320	/** USB Device type. */
321	PDMTHREADTYPE_USB,
322	/** Driver type. */
323	PDMTHREADTYPE_DRIVER,
324	/** Internal type. */
325	PDMTHREADTYPE_INTERNAL,
326	/** External type. */
327	PDMTHREADTYPE_EXTERNAL,
328	/** The usual 32-bit hack. */
329	PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
330	} PDMTHREADTYPE;
331
332
333	/**
334	* The internal structure for the thread.
335	*/
336	typedef struct PDMTHREADINT
337	{
338	/** The VM pointer. */
339	PVMR3 pVM;
340	/** The event semaphore the thread blocks on when not running. */
341	RTSEMEVENTMULTI BlockEvent;
342	/** The event semaphore the thread sleeps on while running. */
343	RTSEMEVENTMULTI SleepEvent;
344	/** Pointer to the next thread. */
345	R3PTRTYPE(struct PDMTHREAD *) pNext;
346	/** The thread type. */
347	PDMTHREADTYPE enmType;
348	} PDMTHREADINT;
349
350
351
352	/* Must be included after PDMDEVINSINT is defined. */
353	#define PDMDEVINSINT_DECLARED
354	#define PDMUSBINSINT_DECLARED
355	#define PDMDRVINSINT_DECLARED
356	#define PDMCRITSECTINT_DECLARED
357	#define PDMTHREADINT_DECLARED
358	#ifdef ___VBox_pdm_h
359	# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
360	#endif
361	RT_C_DECLS_END
362	#include <VBox/vmm/pdm.h>
363	RT_C_DECLS_BEGIN
364
365	/**
366	* PDM Logical Unit.
367	*
368	* This typically the representation of a physical port on a
369	* device, like for instance the PS/2 keyboard port on the
370	* keyboard controller device. The LUNs are chained on the
371	* device the belong to (PDMDEVINSINT::pLunsR3).
372	*/
373	typedef struct PDMLUN
374	{
375	/** The LUN - The Logical Unit Number. */
376	RTUINT iLun;
377	/** Pointer to the next LUN. */
378	PPDMLUN pNext;
379	/** Pointer to the top driver in the driver chain. */
380	PPDMDRVINS pTop;
381	/** Pointer to the bottom driver in the driver chain. */
382	PPDMDRVINS pBottom;
383	/** Pointer to the device instance which the LUN belongs to.
384	* Either this is set or pUsbIns is set. Both is never set at the same time. */
385	PPDMDEVINS pDevIns;
386	/** Pointer to the USB device instance which the LUN belongs to. */
387	PPDMUSBINS pUsbIns;
388	/** Pointer to the device base interface. */
389	PPDMIBASE pBase;
390	/** Description of this LUN. */
391	const char *pszDesc;
392	} PDMLUN;
393
394
395	/**
396	* PDM Device.
397	*/
398	typedef struct PDMDEV
399	{
400	/** Pointer to the next device (R3 Ptr). */
401	R3PTRTYPE(PPDMDEV) pNext;
402	/** Device name length. (search optimization) */
403	RTUINT cchName;
404	/** Registration structure. */
405	R3PTRTYPE(const struct PDMDEVREG *) pReg;
406	/** Number of instances. */
407	uint32_t cInstances;
408	/** Pointer to chain of instances (R3 Ptr). */
409	PPDMDEVINSR3 pInstances;
410	/** The search path for raw-mode context modules (';' as separator). */
411	char *pszRCSearchPath;
412	/** The search path for ring-0 context modules (';' as separator). */
413	char *pszR0SearchPath;
414	} PDMDEV;
415
416
417	/**
418	* PDM USB Device.
419	*/
420	typedef struct PDMUSB
421	{
422	/** Pointer to the next device (R3 Ptr). */
423	R3PTRTYPE(PPDMUSB) pNext;
424	/** Device name length. (search optimization) */
425	RTUINT cchName;
426	/** Registration structure. */
427	R3PTRTYPE(const struct PDMUSBREG *) pReg;
428	/** Next instance number. */
429	uint32_t iNextInstance;
430	/** Pointer to chain of instances (R3 Ptr). */
431	R3PTRTYPE(PPDMUSBINS) pInstances;
432	} PDMUSB;
433
434
435	/**
436	* PDM Driver.
437	*/
438	typedef struct PDMDRV
439	{
440	/** Pointer to the next device. */
441	PPDMDRV pNext;
442	/** Registration structure. */
443	const struct PDMDRVREG * pReg;
444	/** Current number of instances. */
445	uint32_t cInstances;
446	/** The next instance number. */
447	uint32_t iNextInstance;
448	/** The search path for raw-mode context modules (';' as separator). */
449	char *pszRCSearchPath;
450	/** The search path for ring-0 context modules (';' as separator). */
451	char *pszR0SearchPath;
452	} PDMDRV;
453
454
455	/**
456	* PDM registered PIC device.
457	*/
458	typedef struct PDMPIC
459	{
460	/** Pointer to the PIC device instance - R3. */
461	PPDMDEVINSR3 pDevInsR3;
462	/** @copydoc PDMPICREG::pfnSetIrqR3 */
463	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
464	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
465	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
466
467	/** Pointer to the PIC device instance - R0. */
468	PPDMDEVINSR0 pDevInsR0;
469	/** @copydoc PDMPICREG::pfnSetIrqR3 */
470	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
471	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
472	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
473
474	/** Pointer to the PIC device instance - RC. */
475	PPDMDEVINSRC pDevInsRC;
476	/** @copydoc PDMPICREG::pfnSetIrqR3 */
477	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
478	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
479	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
480	/** Alignment padding. */
481	RTRCPTR RCPtrPadding;
482	} PDMPIC;
483
484
485	/**
486	* PDM registered APIC device.
487	*/
488	typedef struct PDMAPIC
489	{
490	/** Pointer to the APIC device instance - R3 Ptr. */
491	PPDMDEVINSR3 pDevInsR3;
492	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
493	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
494	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
495	DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
496	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
497	DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
498	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
499	DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
500	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
501	DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
502	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
503	DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
504	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
505	DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
506	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
507	DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
508	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
509	DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
510	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
511	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
512	DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
513
514	/** Pointer to the APIC device instance - R0 Ptr. */
515	PPDMDEVINSR0 pDevInsR0;
516	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
517	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
518	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
519	DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
520	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
521	DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
522	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
523	DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
524	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
525	DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
526	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
527	DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
528	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
529	DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
530	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
531	DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
532	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
533	DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
534	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
535	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
536	DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
537
538	/** Pointer to the APIC device instance - RC Ptr. */
539	PPDMDEVINSRC pDevInsRC;
540	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
541	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
542	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
543	DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
544	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
545	DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
546	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
547	DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
548	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
549	DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
550	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
551	DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
552	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
553	DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
554	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
555	DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
556	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
557	DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
558	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
559	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
560	DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
561	RTRCPTR RCPtrAlignment;
562
563	} PDMAPIC;
564
565
566	/**
567	* PDM registered I/O APIC device.
568	*/
569	typedef struct PDMIOAPIC
570	{
571	/** Pointer to the APIC device instance - R3 Ptr. */
572	PPDMDEVINSR3 pDevInsR3;
573	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
574	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
575	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
576	DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
577
578	/** Pointer to the PIC device instance - R0. */
579	PPDMDEVINSR0 pDevInsR0;
580	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
581	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
582	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
583	DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
584
585	/** Pointer to the APIC device instance - RC Ptr. */
586	PPDMDEVINSRC pDevInsRC;
587	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
588	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
589	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
590	DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
591
592	uint8_t Alignment[4];
593	} PDMIOAPIC;
594
595	/** Maximum number of PCI busses for a VM. */
596	#define PDM_PCI_BUSSES_MAX 8
597
598	/**
599	* PDM PCI Bus instance.
600	*/
601	typedef struct PDMPCIBUS
602	{
603	/** PCI bus number. */
604	RTUINT iBus;
605	RTUINT uPadding0; /*< Alignment padding./
606
607	/** Pointer to PCI Bus device instance. */
608	PPDMDEVINSR3 pDevInsR3;
609	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
610	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
611	/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
612	DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
613	/** @copydoc PDMPCIBUSREG::pfnPCIRegisterMsiR3 */
614	DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
615	/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
616	DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
617	PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
618	/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
619	DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
620	PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
621	/** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
622	DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
623	/** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
624	DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
625	/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
626	DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
627
628	/** Pointer to the PIC device instance - R0. */
629	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
630	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
631	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
632
633	/** Pointer to PCI Bus device instance. */
634	PPDMDEVINSRC pDevInsRC;
635	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
636	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
637	} PDMPCIBUS;
638
639
640	#ifdef IN_RING3
641	/**
642	* PDM registered DMAC (DMA Controller) device.
643	*/
644	typedef struct PDMDMAC
645	{
646	/** Pointer to the DMAC device instance. */
647	PPDMDEVINSR3 pDevIns;
648	/** Copy of the registration structure. */
649	PDMDMACREG Reg;
650	} PDMDMAC;
651
652
653	/**
654	* PDM registered RTC (Real Time Clock) device.
655	*/
656	typedef struct PDMRTC
657	{
658	/** Pointer to the RTC device instance. */
659	PPDMDEVINSR3 pDevIns;
660	/** Copy of the registration structure. */
661	PDMRTCREG Reg;
662	} PDMRTC;
663
664	#endif /* IN_RING3 */
665
666	/**
667	* Module type.
668	*/
669	typedef enum PDMMODTYPE
670	{
671	/** Raw-mode (RC) context module. */
672	PDMMOD_TYPE_RC,
673	/** Ring-0 (host) context module. */
674	PDMMOD_TYPE_R0,
675	/** Ring-3 (host) context module. */
676	PDMMOD_TYPE_R3
677	} PDMMODTYPE;
678
679
680	/** The module name length including the terminator. */
681	#define PDMMOD_NAME_LEN 32
682
683	/**
684	* Loaded module instance.
685	*/
686	typedef struct PDMMOD
687	{
688	/** Module name. This is used for referring to
689	* the module internally, sort of like a handle. */
690	char szName[PDMMOD_NAME_LEN];
691	/** Module type. */
692	PDMMODTYPE eType;
693	/** Loader module handle. Not used for R0 modules. */
694	RTLDRMOD hLdrMod;
695	/** Loaded address.
696	* This is the 'handle' for R0 modules. */
697	RTUINTPTR ImageBase;
698	/** Old loaded address.
699	* This is used during relocation of GC modules. Not used for R0 modules. */
700	RTUINTPTR OldImageBase;
701	/** Where the R3 HC bits are stored.
702	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
703	void *pvBits;
704
705	/** Pointer to next module. */
706	struct PDMMOD *pNext;
707	/** Module filename. */
708	char szFilename[1];
709	} PDMMOD;
710	/** Pointer to loaded module instance. */
711	typedef PDMMOD *PPDMMOD;
712
713
714
715	/** Extra space in the free array. */
716	#define PDMQUEUE_FREE_SLACK 16
717
718	/**
719	* Queue type.
720	*/
721	typedef enum PDMQUEUETYPE
722	{
723	/** Device consumer. */
724	PDMQUEUETYPE_DEV = 1,
725	/** Driver consumer. */
726	PDMQUEUETYPE_DRV,
727	/** Internal consumer. */
728	PDMQUEUETYPE_INTERNAL,
729	/** External consumer. */
730	PDMQUEUETYPE_EXTERNAL
731	} PDMQUEUETYPE;
732
733	/** Pointer to a PDM Queue. */
734	typedef struct PDMQUEUE *PPDMQUEUE;
735
736	/**
737	* PDM Queue.
738	*/
739	typedef struct PDMQUEUE
740	{
741	/** Pointer to the next queue in the list. */
742	R3PTRTYPE(PPDMQUEUE) pNext;
743	/** Type specific data. */
744	union
745	{
746	/** PDMQUEUETYPE_DEV */
747	struct
748	{
749	/** Pointer to consumer function. */
750	R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
751	/** Pointer to the device instance owning the queue. */
752	R3PTRTYPE(PPDMDEVINS) pDevIns;
753	} Dev;
754	/** PDMQUEUETYPE_DRV */
755	struct
756	{
757	/** Pointer to consumer function. */
758	R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
759	/** Pointer to the driver instance owning the queue. */
760	R3PTRTYPE(PPDMDRVINS) pDrvIns;
761	} Drv;
762	/** PDMQUEUETYPE_INTERNAL */
763	struct
764	{
765	/** Pointer to consumer function. */
766	R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
767	} Int;
768	/** PDMQUEUETYPE_EXTERNAL */
769	struct
770	{
771	/** Pointer to consumer function. */
772	R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
773	/** Pointer to user argument. */
774	R3PTRTYPE(void *) pvUser;
775	} Ext;
776	} u;
777	/** Queue type. */
778	PDMQUEUETYPE enmType;
779	/** The interval between checking the queue for events.
780	* The realtime timer below is used to do the waiting.
781	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
782	uint32_t cMilliesInterval;
783	/** Interval timer. Only used if cMilliesInterval is non-zero. */
784	PTMTIMERR3 pTimer;
785	/** Pointer to the VM - R3. */
786	PVMR3 pVMR3;
787	/** LIFO of pending items - R3. */
788	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
789	/** Pointer to the VM - R0. */
790	PVMR0 pVMR0;
791	/** LIFO of pending items - R0. */
792	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
793	/** Pointer to the GC VM and indicator for GC enabled queue.
794	* If this is NULL, the queue cannot be used in GC.
795	*/
796	PVMRC pVMRC;
797	/** LIFO of pending items - GC. */
798	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
799
800	/** Item size (bytes). */
801	uint32_t cbItem;
802	/** Number of items in the queue. */
803	uint32_t cItems;
804	/** Index to the free head (where we insert). */
805	uint32_t volatile iFreeHead;
806	/** Index to the free tail (where we remove). */
807	uint32_t volatile iFreeTail;
808
809	/** Unique queue name. */
810	R3PTRTYPE(const char *) pszName;
811	#if HC_ARCH_BITS == 32
812	RTR3PTR Alignment1;
813	#endif
814	/** Stat: Times PDMQueueAlloc fails. */
815	STAMCOUNTER StatAllocFailures;
816	/** Stat: PDMQueueInsert calls. */
817	STAMCOUNTER StatInsert;
818	/** Stat: Queue flushes. */
819	STAMCOUNTER StatFlush;
820	/** Stat: Queue flushes with pending items left over. */
821	STAMCOUNTER StatFlushLeftovers;
822	#ifdef VBOX_WITH_STATISTICS
823	/** State: Profiling the flushing. */
824	STAMPROFILE StatFlushPrf;
825	/** State: Pending items. */
826	uint32_t volatile cStatPending;
827	uint32_t volatile cAlignment;
828	#endif
829
830	/** Array of pointers to free items. Variable size. */
831	struct PDMQUEUEFREEITEM
832	{
833	/** Pointer to the free item - HC Ptr. */
834	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
835	/** Pointer to the free item - HC Ptr. */
836	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
837	/** Pointer to the free item - GC Ptr. */
838	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
839	#if HC_ARCH_BITS == 64
840	RTRCPTR Alignment0;
841	#endif
842	} aFreeItems[1];
843	} PDMQUEUE;
844
845	/** @name PDM::fQueueFlushing
846	* @{ */
847	/** Used to make sure only one EMT will flush the queues.
848	* Set when an EMT is flushing queues, clear otherwise. */
849	#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
850	/** Indicating there are queues with items pending.
851	* This is make sure we don't miss inserts happening during flushing. The FF
852	* cannot be used for this since it has to be cleared immediately to prevent
853	* other EMTs from spinning. */
854	#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
855	/** }@ */
856
857
858	/**
859	* Queue device helper task operation.
860	*/
861	typedef enum PDMDEVHLPTASKOP
862	{
863	/** The usual invalid 0 entry. */
864	PDMDEVHLPTASKOP_INVALID = 0,
865	/** ISASetIrq */
866	PDMDEVHLPTASKOP_ISA_SET_IRQ,
867	/** PCISetIrq */
868	PDMDEVHLPTASKOP_PCI_SET_IRQ,
869	/** PCISetIrq */
870	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
871	/** The usual 32-bit hack. */
872	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
873	} PDMDEVHLPTASKOP;
874
875	/**
876	* Queued Device Helper Task.
877	*/
878	typedef struct PDMDEVHLPTASK
879	{
880	/** The queue item core (don't touch). */
881	PDMQUEUEITEMCORE Core;
882	/** Pointer to the device instance (R3 Ptr). */
883	PPDMDEVINSR3 pDevInsR3;
884	/** This operation to perform. */
885	PDMDEVHLPTASKOP enmOp;
886	#if HC_ARCH_BITS == 64
887	uint32_t Alignment0;
888	#endif
889	/** Parameters to the operation. */
890	union PDMDEVHLPTASKPARAMS
891	{
892	/**
893	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
894	*/
895	struct PDMDEVHLPTASKSETIRQ
896	{
897	/** The IRQ */
898	int iIrq;
899	/** The new level. */
900	int iLevel;
901	/** The IRQ tag and source. */
902	uint32_t uTagSrc;
903	} SetIRQ;
904
905	/** Expanding the structure.. */
906	uint64_t au64[2];
907	} u;
908	} PDMDEVHLPTASK;
909	/** Pointer to a queued Device Helper Task. */
910	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
911	/** Pointer to a const queued Device Helper Task. */
912	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
913
914
915
916	/**
917	* An USB hub registration record.
918	*/
919	typedef struct PDMUSBHUB
920	{
921	/** The USB versions this hub support.
922	* Note that 1.1 hubs can take on 2.0 devices. */
923	uint32_t fVersions;
924	/** The number of ports on the hub. */
925	uint32_t cPorts;
926	/** The number of available ports (0..cPorts). */
927	uint32_t cAvailablePorts;
928	/** The driver instance of the hub. */
929	PPDMDRVINS pDrvIns;
930	/** Copy of the to the registration structure. */
931	PDMUSBHUBREG Reg;
932
933	/** Pointer to the next hub in the list. */
934	struct PDMUSBHUB *pNext;
935	} PDMUSBHUB;
936
937	/** Pointer to a const USB HUB registration record. */
938	typedef const PDMUSBHUB *PCPDMUSBHUB;
939
940	/** Pointer to a PDM Async I/O template. */
941	typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
942
943	/** Pointer to the main PDM Async completion endpoint class. */
944	typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
945
946	/** Pointer to the global block cache structure. */
947	typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
948
949	/**
950	* PDM VMCPU Instance data.
951	* Changes to this must checked against the padding of the cfgm union in VMCPU!
952	*/
953	typedef struct PDMCPU
954	{
955	/** The number of entries in the apQueuedCritSectsLeaves table that's currently in use. */
956	uint32_t cQueuedCritSectLeaves;
957	uint32_t uPadding0; /*< Alignment padding./
958	/** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
959	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
960	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
961	} PDMCPU;
962
963
964	/**
965	* PDM VM Instance data.
966	* Changes to this must checked against the padding of the cfgm union in VM!
967	*/
968	typedef struct PDM
969	{
970	/** The PDM lock.
971	* This is used to protect everything that deals with interrupts, i.e.
972	* the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
973	PDMCRITSECT CritSect;
974	/** The NOP critical section.
975	* This is a dummy critical section that will not do any thread
976	* serialization but instead let all threads enter immediately and
977	* concurrently. */
978	PDMCRITSECT NopCritSect;
979
980	/** List of registered devices. (FIFO) */
981	R3PTRTYPE(PPDMDEV) pDevs;
982	/** List of devices instances. (FIFO) */
983	R3PTRTYPE(PPDMDEVINS) pDevInstances;
984	/** List of registered USB devices. (FIFO) */
985	R3PTRTYPE(PPDMUSB) pUsbDevs;
986	/** List of USB devices instances. (FIFO) */
987	R3PTRTYPE(PPDMUSBINS) pUsbInstances;
988	/** List of registered drivers. (FIFO) */
989	R3PTRTYPE(PPDMDRV) pDrvs;
990	/** PCI Buses. */
991	PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
992	/** The register PIC device. */
993	PDMPIC Pic;
994	/** The registered APIC device. */
995	PDMAPIC Apic;
996	/** The registered I/O APIC device. */
997	PDMIOAPIC IoApic;
998	/** The registered DMAC device. */
999	R3PTRTYPE(PPDMDMAC) pDmac;
1000	/** The registered RTC device. */
1001	R3PTRTYPE(PPDMRTC) pRtc;
1002	/** The registered USB HUBs. (FIFO) */
1003	R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1004
1005	/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1006	R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1007	/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1008	R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1009	/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1010	RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1011	/** Pointer to the queue which should be manually flushed - RC Ptr.
1012	* Only touched by EMT. */
1013	RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1014	/** Pointer to the queue which should be manually flushed - R0 Ptr.
1015	* Only touched by EMT. */
1016	R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1017	/** Bitmask controlling the queue flushing.
1018	* See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1019	uint32_t volatile fQueueFlushing;
1020
1021	/** The current IRQ tag (tracing purposes). */
1022	uint32_t volatile uIrqTag;
1023
1024	/** The tracing ID of the next device instance.
1025	*
1026	* @remarks We keep the device tracing ID seperate from the rest as these are
1027	* then more likely to end up with the same ID from one run to
1028	* another, making analysis somewhat easier. Drivers and USB devices
1029	* are more volatile and can be changed at runtime, thus these are much
1030	* less likely to remain stable, so just heap them all together. */
1031	uint32_t idTracingDev;
1032	/** The tracing ID of the next driver instance, USB device instance or other
1033	* PDM entity requiring an ID. */
1034	uint32_t idTracingOther;
1035
1036	/** @name VMM device heap
1037	* @{ */
1038	/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1039	RTR3PTR pvVMMDevHeap;
1040	/** The heap size. */
1041	uint32_t cbVMMDevHeap;
1042	/** Free space. */
1043	uint32_t cbVMMDevHeapLeft;
1044	/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1045	RTGCPHYS GCPhysVMMDevHeap;
1046	/** @} */
1047
1048	/** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1049	STAMCOUNTER StatQueuedCritSectLeaves;
1050	} PDM;
1051	AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1052	AssertCompileMemberAlignment(PDM, CritSect, 8);
1053	AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1054	/** Pointer to PDM VM instance data. */
1055	typedef PDM *PPDM;
1056
1057
1058
1059	/**
1060	* PDM data kept in the UVM.
1061	*/
1062	typedef struct PDMUSERPERVM
1063	{
1064	/** @todo move more stuff over here. */
1065
1066	/** Linked list of timer driven PDM queues.
1067	* Currently serialized by PDM::CritSect. */
1068	R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1069	/** Linked list of force action driven PDM queues.
1070	* Currently serialized by PDM::CritSect. */
1071	R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1072
1073	/** Lock protecting the lists below it. */
1074	RTCRITSECT ListCritSect;
1075	/** Pointer to list of loaded modules. */
1076	PPDMMOD pModules;
1077	/** List of initialized critical sections. (LIFO) */
1078	R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1079	/** Head of the PDM Thread list. (singly linked) */
1080	R3PTRTYPE(PPDMTHREAD) pThreads;
1081	/** Tail of the PDM Thread list. (singly linked) */
1082	R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1083
1084	/** @name PDM Async Completion
1085	* @{ */
1086	/** Pointer to the array of supported endpoint classes. */
1087	PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1088	/** Head of the templates. Singly linked, protected by ListCritSect. */
1089	R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1090	/** @} */
1091
1092	/** Global block cache data. */
1093	R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1094	#ifdef VBOX_WITH_NETSHAPER
1095	/** Pointer to network shaper instance. */
1096	R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1097	#endif /* VBOX_WITH_NETSHAPER */
1098
1099	} PDMUSERPERVM;
1100	/** Pointer to the PDM data kept in the UVM. */
1101	typedef PDMUSERPERVM *PPDMUSERPERVM;
1102
1103
1104
1105	/*******************************************************************************
1106	* Global Variables *
1107	*******************************************************************************/
1108	#ifdef IN_RING3
1109	extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1110	extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1111	extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1112	extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1113	extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1114	extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1115	extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1116	extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1117	extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1118	extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1119	extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1120	#endif
1121
1122
1123	/*******************************************************************************
1124	* Defined Constants And Macros *
1125	*******************************************************************************/
1126	/** @def PDMDEV_ASSERT_DEVINS
1127	* Asserts the validity of the device instance.
1128	*/
1129	#ifdef VBOX_STRICT
1130	# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1131	do { \
1132	AssertPtr(pDevIns); \
1133	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1134	Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1135	} while (0)
1136	#else
1137	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1138	#endif
1139
1140	/** @def PDMDRV_ASSERT_DRVINS
1141	* Asserts the validity of the driver instance.
1142	*/
1143	#ifdef VBOX_STRICT
1144	# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1145	do { \
1146	AssertPtr(pDrvIns); \
1147	Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1148	Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1149	} while (0)
1150	#else
1151	# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1152	#endif
1153
1154
1155	/*******************************************************************************
1156	* Internal Functions *
1157	*******************************************************************************/
1158	#ifdef IN_RING3
1159	bool pdmR3IsValidName(const char *pszName);
1160
1161	int pdmR3CritSectInitStats(PVM pVM);
1162	void pdmR3CritSectRelocate(PVM pVM);
1163	int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1164	int pdmR3CritSectInitDeviceAuto(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1165	const char *pszNameFmt, ...);
1166	int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1167	int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1168	int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1169
1170	int pdmR3DevInit(PVM pVM);
1171	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1172	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1173	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1174
1175	int pdmR3UsbLoadModules(PVM pVM);
1176	int pdmR3UsbInstantiateDevices(PVM pVM);
1177	PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1178	int pdmR3UsbFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1179	int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1180	int pdmR3UsbVMInitComplete(PVM pVM);
1181
1182	int pdmR3DrvInit(PVM pVM);
1183	int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1184	PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1185	int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1186	void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1187	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1188
1189	int pdmR3LdrInitU(PUVM pUVM);
1190	void pdmR3LdrTermU(PUVM pUVM);
1191	char pdmR3FileR3(const char pszFile, bool fShared);
1192	int pdmR3LoadR3U(PUVM pUVM, const char pszFilename, const char pszName);
1193
1194	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1195
1196	int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1197	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1198	int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1199	PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1200	int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1201	PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1202	int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1203	int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1204	int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1205	void pdmR3ThreadDestroyAll(PVM pVM);
1206	int pdmR3ThreadResumeAll(PVM pVM);
1207	int pdmR3ThreadSuspendAll(PVM pVM);
1208
1209	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1210	int pdmR3AsyncCompletionInit(PVM pVM);
1211	int pdmR3AsyncCompletionTerm(PVM pVM);
1212	void pdmR3AsyncCompletionResume(PVM pVM);
1213	int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1214	int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1215	PFNPDMASYNCCOMPLETEDRV pfnCompleted, void pvTemplateUser, const char pszDesc);
1216	int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1217	int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1218	int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1219	int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1220	#endif
1221
1222	#ifdef VBOX_WITH_NETSHAPER
1223	int pdmR3NetShaperInit(PVM pVM);
1224	int pdmR3NetShaperTerm(PVM pVM);
1225	#endif
1226
1227	int pdmR3BlkCacheInit(PVM pVM);
1228	void pdmR3BlkCacheTerm(PVM pVM);
1229	int pdmR3BlkCacheResume(PVM pVM);
1230
1231	#endif /* IN_RING3 */
1232
1233	void pdmLock(PVM pVM);
1234	int pdmLockEx(PVM pVM, int rc);
1235	void pdmUnlock(PVM pVM);
1236
1237	/** @} */
1238
1239	RT_C_DECLS_END
1240
1241	#endif
1242

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source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 44397

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