PDMInternal.h@ 44509

Last change on this file since 44509 was 44508, checked in by vboxsync, 12 years ago
Drop the pfnSaveExecR3 and pfnLoadExecR3 interfaces of the PCI buses (never used). Synced pciR3CommonRestoreConfig between the two PCI buses, dropping the constants in the table as they make double checking sizes and offsets harder. Also removing the pfnIOCtl device registration structure member, putting a pfnReserved in it's place.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 48.8 KB

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1	/* $Id: PDMInternal.h 44508 2013-02-01 12:46:33Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2011 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___PDMInternal_h
19	#define ___PDMInternal_h
20
21	#include <VBox/types.h>
22	#include <VBox/param.h>
23	#include <VBox/vmm/cfgm.h>
24	#include <VBox/vmm/stam.h>
25	#include <VBox/vusb.h>
26	#include <VBox/vmm/pdmasynccompletion.h>
27	#ifdef VBOX_WITH_NETSHAPER
28	# include <VBox/vmm/pdmnetshaper.h>
29	#endif
30	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
31	# include <VBox/vmm/pdmasynccompletion.h>
32	#endif
33	#include <VBox/vmm/pdmblkcache.h>
34	#include <VBox/vmm/pdmcommon.h>
35	#include <iprt/assert.h>
36	#include <iprt/critsect.h>
37	#ifdef IN_RING3
38	# include <iprt/thread.h>
39	#endif
40
41	RT_C_DECLS_BEGIN
42
43
44	/** @defgroup grp_pdm_int Internal
45	* @ingroup grp_pdm
46	* @internal
47	* @{
48	*/
49
50	/** @def PDM_WITH_R3R0_CRIT_SECT
51	* Enables or disabled ring-3/ring-0 critical sections. */
52	#if defined(DOXYGEN_RUNNING) \|\| 1
53	# define PDM_WITH_R3R0_CRIT_SECT
54	#endif
55
56	/** @def PDMCRITSECT_STRICT
57	* Enables/disables PDM critsect strictness like deadlock detection. */
58	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(IEM_VERIFICATION_MODE)) \|\| defined(DOXYGEN_RUNNING)
59	# define PDMCRITSECT_STRICT
60	#endif
61
62
63	/*******************************************************************************
64	* Structures and Typedefs *
65	*******************************************************************************/
66
67	/** Pointer to a PDM Device. */
68	typedef struct PDMDEV *PPDMDEV;
69	/** Pointer to a pointer to a PDM Device. */
70	typedef PPDMDEV *PPPDMDEV;
71
72	/** Pointer to a PDM USB Device. */
73	typedef struct PDMUSB *PPDMUSB;
74	/** Pointer to a pointer to a PDM USB Device. */
75	typedef PPDMUSB *PPPDMUSB;
76
77	/** Pointer to a PDM Driver. */
78	typedef struct PDMDRV *PPDMDRV;
79	/** Pointer to a pointer to a PDM Driver. */
80	typedef PPDMDRV *PPPDMDRV;
81
82	/** Pointer to a PDM Logical Unit. */
83	typedef struct PDMLUN *PPDMLUN;
84	/** Pointer to a pointer to a PDM Logical Unit. */
85	typedef PPDMLUN *PPPDMLUN;
86
87	/** Pointer to a PDM PCI Bus instance. */
88	typedef struct PDMPCIBUS *PPDMPCIBUS;
89	/** Pointer to a DMAC instance. */
90	typedef struct PDMDMAC *PPDMDMAC;
91	/** Pointer to a RTC instance. */
92	typedef struct PDMRTC *PPDMRTC;
93
94	/** Pointer to an USB HUB registration record. */
95	typedef struct PDMUSBHUB *PPDMUSBHUB;
96
97	/**
98	* Supported asynchronous completion endpoint classes.
99	*/
100	typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
101	{
102	/** File class. */
103	PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
104	/** Number of supported classes. */
105	PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
106	/** 32bit hack. */
107	PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
108	} PDMASYNCCOMPLETIONEPCLASSTYPE;
109
110	/**
111	* Private device instance data.
112	*/
113	typedef struct PDMDEVINSINT
114	{
115	/** Pointer to the next instance (HC Ptr).
116	* (Head is pointed to by PDM::pDevInstances.) */
117	R3PTRTYPE(PPDMDEVINS) pNextR3;
118	/** Pointer to the next per device instance (HC Ptr).
119	* (Head is pointed to by PDMDEV::pInstances.) */
120	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
121	/** Pointer to device structure - HC Ptr. */
122	R3PTRTYPE(PPDMDEV) pDevR3;
123	/** Pointer to the list of logical units associated with the device. (FIFO) */
124	R3PTRTYPE(PPDMLUN) pLunsR3;
125	/** Pointer to the asynchronous notification callback set while in
126	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
127	R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
128	/** Configuration handle to the instance node. */
129	R3PTRTYPE(PCFGMNODE) pCfgHandle;
130
131	/** R3 pointer to the VM this instance was created for. */
132	PVMR3 pVMR3;
133	/** R3 pointer to associated PCI device structure. */
134	R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
135	/** R3 pointer to associated PCI bus structure. */
136	R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
137
138	/** R0 pointer to the VM this instance was created for. */
139	PVMR0 pVMR0;
140	/** R0 pointer to associated PCI device structure. */
141	R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
142	/** R0 pointer to associated PCI bus structure. */
143	R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
144
145	/** RC pointer to the VM this instance was created for. */
146	PVMRC pVMRC;
147	/** RC pointer to associated PCI device structure. */
148	RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
149	/** RC pointer to associated PCI bus structure. */
150	RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
151
152	/** Flags, see PDMDEVINSINT_FLAGS_XXX. */
153	uint32_t fIntFlags;
154	/** The last IRQ tag (for tracing it thru clearing). */
155	uint32_t uLastIrqTag;
156	/** Size padding. */
157	uint32_t u32Padding;
158	} PDMDEVINSINT;
159
160	/** @name PDMDEVINSINT::fIntFlags
161	* @{ */
162	/** Used by pdmR3Load to mark device instances it found in the saved state. */
163	#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
164	/** Indicates that the device hasn't been powered on or resumed.
165	* This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
166	* to make sure each device gets exactly one notification for each of those
167	* events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
168	* a failure (already resumed/powered-on devices are suspended). */
169	#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
170	/** Indicates that the device has been reset already. Used by PDMR3Reset. */
171	#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
172	/** @} */
173
174
175	/**
176	* Private USB device instance data.
177	*/
178	typedef struct PDMUSBINSINT
179	{
180	/** The UUID of this instance. */
181	RTUUID Uuid;
182	/** Pointer to the next instance.
183	* (Head is pointed to by PDM::pUsbInstances.) */
184	R3PTRTYPE(PPDMUSBINS) pNext;
185	/** Pointer to the next per USB device instance.
186	* (Head is pointed to by PDMUSB::pInstances.) */
187	R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
188
189	/** Pointer to device structure. */
190	R3PTRTYPE(PPDMUSB) pUsbDev;
191
192	/** Pointer to the VM this instance was created for. */
193	PVMR3 pVM;
194	/** Pointer to the list of logical units associated with the device. (FIFO) */
195	R3PTRTYPE(PPDMLUN) pLuns;
196	/** The per instance device configuration. */
197	R3PTRTYPE(PCFGMNODE) pCfg;
198	/** Same as pCfg if the configuration should be deleted when detaching the device. */
199	R3PTRTYPE(PCFGMNODE) pCfgDelete;
200	/** The global device configuration. */
201	R3PTRTYPE(PCFGMNODE) pCfgGlobal;
202
203	/** Pointer to the USB hub this device is attached to.
204	* This is NULL if the device isn't connected to any HUB. */
205	R3PTRTYPE(PPDMUSBHUB) pHub;
206	/** The port number that we're connected to. */
207	uint32_t iPort;
208	/** Indicates that the USB device hasn't been powered on or resumed.
209	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
210	bool fVMSuspended;
211	/** Indicates that the USB device has been reset. */
212	bool fVMReset;
213	/** Pointer to the asynchronous notification callback set while in
214	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
215	R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
216	} PDMUSBINSINT;
217
218
219	/**
220	* Private driver instance data.
221	*/
222	typedef struct PDMDRVINSINT
223	{
224	/** Pointer to the driver instance above.
225	* This is NULL for the topmost drive. */
226	R3PTRTYPE(PPDMDRVINS) pUp;
227	/** Pointer to the driver instance below.
228	* This is NULL for the bottommost driver. */
229	R3PTRTYPE(PPDMDRVINS) pDown;
230	/** Pointer to the logical unit this driver chained on. */
231	R3PTRTYPE(PPDMLUN) pLun;
232	/** Pointer to driver structure from which this was instantiated. */
233	R3PTRTYPE(PPDMDRV) pDrv;
234	/** Pointer to the VM this instance was created for, ring-3 context. */
235	PVMR3 pVMR3;
236	/** Pointer to the VM this instance was created for, ring-0 context. */
237	PVMR0 pVMR0;
238	/** Pointer to the VM this instance was created for, raw-mode context. */
239	PVMRC pVMRC;
240	/** Flag indicating that the driver is being detached and destroyed.
241	* (Helps detect potential recursive detaching.) */
242	bool fDetaching;
243	/** Indicates that the driver hasn't been powered on or resumed.
244	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
245	bool fVMSuspended;
246	/** Indicates that the driver has been reset already. */
247	bool fVMReset;
248	/** Set if allocated on the hyper heap, false if on the ring-3 heap. */
249	bool fHyperHeap;
250	/** Pointer to the asynchronous notification callback set while in
251	* PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
252	R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
253	/** Configuration handle to the instance node. */
254	R3PTRTYPE(PCFGMNODE) pCfgHandle;
255	/** Pointer to the ring-0 request handler function. */
256	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
257	} PDMDRVINSINT;
258
259
260	/**
261	* Private critical section data.
262	*/
263	typedef struct PDMCRITSECTINT
264	{
265	/** The critical section core which is shared with IPRT. */
266	RTCRITSECT Core;
267	/** Pointer to the next critical section.
268	* This chain is used for relocating pVMRC and device cleanup. */
269	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
270	/** Owner identifier.
271	* This is pDevIns if the owner is a device. Similarly for a driver or service.
272	* PDMR3CritSectInit() sets this to point to the critsect itself. */
273	RTR3PTR pvKey;
274	/** Pointer to the VM - R3Ptr. */
275	PVMR3 pVMR3;
276	/** Pointer to the VM - R0Ptr. */
277	PVMR0 pVMR0;
278	/** Pointer to the VM - GCPtr. */
279	PVMRC pVMRC;
280	/** Set if this critical section is the automatically created default
281	* section of a device.. */
282	bool fAutomaticDefaultCritsect;
283	/** Set if the critical section is used by a timer or similar.
284	* See PDMR3DevGetCritSect. */
285	bool fUsedByTimerOrSimilar;
286	/** Alignment padding. */
287	bool afPadding[2];
288	/** Event semaphore that is scheduled to be signaled upon leaving the
289	* critical section. This is Ring-3 only of course. */
290	RTSEMEVENT EventToSignal;
291	/** The lock name. */
292	R3PTRTYPE(const char *) pszName;
293	/** R0/RC lock contention. */
294	STAMCOUNTER StatContentionRZLock;
295	/** R0/RC unlock contention. */
296	STAMCOUNTER StatContentionRZUnlock;
297	/** R3 lock contention. */
298	STAMCOUNTER StatContentionR3;
299	/** Profiling the time the section is locked. */
300	STAMPROFILEADV StatLocked;
301	} PDMCRITSECTINT;
302	AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
303	/** Pointer to private critical section data. */
304	typedef PDMCRITSECTINT *PPDMCRITSECTINT;
305
306	/** Indicates that the critical section is queued for unlock.
307	* PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
308	#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
309
310
311	/**
312	* The usual device/driver/internal/external stuff.
313	*/
314	typedef enum
315	{
316	/** The usual invalid entry. */
317	PDMTHREADTYPE_INVALID = 0,
318	/** Device type. */
319	PDMTHREADTYPE_DEVICE,
320	/** USB Device type. */
321	PDMTHREADTYPE_USB,
322	/** Driver type. */
323	PDMTHREADTYPE_DRIVER,
324	/** Internal type. */
325	PDMTHREADTYPE_INTERNAL,
326	/** External type. */
327	PDMTHREADTYPE_EXTERNAL,
328	/** The usual 32-bit hack. */
329	PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
330	} PDMTHREADTYPE;
331
332
333	/**
334	* The internal structure for the thread.
335	*/
336	typedef struct PDMTHREADINT
337	{
338	/** The VM pointer. */
339	PVMR3 pVM;
340	/** The event semaphore the thread blocks on when not running. */
341	RTSEMEVENTMULTI BlockEvent;
342	/** The event semaphore the thread sleeps on while running. */
343	RTSEMEVENTMULTI SleepEvent;
344	/** Pointer to the next thread. */
345	R3PTRTYPE(struct PDMTHREAD *) pNext;
346	/** The thread type. */
347	PDMTHREADTYPE enmType;
348	} PDMTHREADINT;
349
350
351
352	/* Must be included after PDMDEVINSINT is defined. */
353	#define PDMDEVINSINT_DECLARED
354	#define PDMUSBINSINT_DECLARED
355	#define PDMDRVINSINT_DECLARED
356	#define PDMCRITSECTINT_DECLARED
357	#define PDMTHREADINT_DECLARED
358	#ifdef ___VBox_pdm_h
359	# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
360	#endif
361	RT_C_DECLS_END
362	#include <VBox/vmm/pdm.h>
363	RT_C_DECLS_BEGIN
364
365	/**
366	* PDM Logical Unit.
367	*
368	* This typically the representation of a physical port on a
369	* device, like for instance the PS/2 keyboard port on the
370	* keyboard controller device. The LUNs are chained on the
371	* device the belong to (PDMDEVINSINT::pLunsR3).
372	*/
373	typedef struct PDMLUN
374	{
375	/** The LUN - The Logical Unit Number. */
376	RTUINT iLun;
377	/** Pointer to the next LUN. */
378	PPDMLUN pNext;
379	/** Pointer to the top driver in the driver chain. */
380	PPDMDRVINS pTop;
381	/** Pointer to the bottom driver in the driver chain. */
382	PPDMDRVINS pBottom;
383	/** Pointer to the device instance which the LUN belongs to.
384	* Either this is set or pUsbIns is set. Both is never set at the same time. */
385	PPDMDEVINS pDevIns;
386	/** Pointer to the USB device instance which the LUN belongs to. */
387	PPDMUSBINS pUsbIns;
388	/** Pointer to the device base interface. */
389	PPDMIBASE pBase;
390	/** Description of this LUN. */
391	const char *pszDesc;
392	} PDMLUN;
393
394
395	/**
396	* PDM Device.
397	*/
398	typedef struct PDMDEV
399	{
400	/** Pointer to the next device (R3 Ptr). */
401	R3PTRTYPE(PPDMDEV) pNext;
402	/** Device name length. (search optimization) */
403	RTUINT cchName;
404	/** Registration structure. */
405	R3PTRTYPE(const struct PDMDEVREG *) pReg;
406	/** Number of instances. */
407	uint32_t cInstances;
408	/** Pointer to chain of instances (R3 Ptr). */
409	PPDMDEVINSR3 pInstances;
410	/** The search path for raw-mode context modules (';' as separator). */
411	char *pszRCSearchPath;
412	/** The search path for ring-0 context modules (';' as separator). */
413	char *pszR0SearchPath;
414	} PDMDEV;
415
416
417	/**
418	* PDM USB Device.
419	*/
420	typedef struct PDMUSB
421	{
422	/** Pointer to the next device (R3 Ptr). */
423	R3PTRTYPE(PPDMUSB) pNext;
424	/** Device name length. (search optimization) */
425	RTUINT cchName;
426	/** Registration structure. */
427	R3PTRTYPE(const struct PDMUSBREG *) pReg;
428	/** Next instance number. */
429	uint32_t iNextInstance;
430	/** Pointer to chain of instances (R3 Ptr). */
431	R3PTRTYPE(PPDMUSBINS) pInstances;
432	} PDMUSB;
433
434
435	/**
436	* PDM Driver.
437	*/
438	typedef struct PDMDRV
439	{
440	/** Pointer to the next device. */
441	PPDMDRV pNext;
442	/** Registration structure. */
443	const struct PDMDRVREG * pReg;
444	/** Current number of instances. */
445	uint32_t cInstances;
446	/** The next instance number. */
447	uint32_t iNextInstance;
448	/** The search path for raw-mode context modules (';' as separator). */
449	char *pszRCSearchPath;
450	/** The search path for ring-0 context modules (';' as separator). */
451	char *pszR0SearchPath;
452	} PDMDRV;
453
454
455	/**
456	* PDM registered PIC device.
457	*/
458	typedef struct PDMPIC
459	{
460	/** Pointer to the PIC device instance - R3. */
461	PPDMDEVINSR3 pDevInsR3;
462	/** @copydoc PDMPICREG::pfnSetIrqR3 */
463	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
464	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
465	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
466
467	/** Pointer to the PIC device instance - R0. */
468	PPDMDEVINSR0 pDevInsR0;
469	/** @copydoc PDMPICREG::pfnSetIrqR3 */
470	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
471	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
472	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
473
474	/** Pointer to the PIC device instance - RC. */
475	PPDMDEVINSRC pDevInsRC;
476	/** @copydoc PDMPICREG::pfnSetIrqR3 */
477	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
478	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
479	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
480	/** Alignment padding. */
481	RTRCPTR RCPtrPadding;
482	} PDMPIC;
483
484
485	/**
486	* PDM registered APIC device.
487	*/
488	typedef struct PDMAPIC
489	{
490	/** Pointer to the APIC device instance - R3 Ptr. */
491	PPDMDEVINSR3 pDevInsR3;
492	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
493	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
494	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
495	DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
496	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
497	DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
498	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
499	DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
500	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
501	DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
502	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
503	DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
504	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
505	DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
506	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
507	DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
508	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
509	DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
510	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
511	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
512	DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
513
514	/** Pointer to the APIC device instance - R0 Ptr. */
515	PPDMDEVINSR0 pDevInsR0;
516	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
517	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
518	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
519	DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
520	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
521	DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
522	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
523	DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
524	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
525	DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
526	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
527	DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
528	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
529	DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
530	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
531	DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
532	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
533	DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
534	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
535	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
536	DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
537
538	/** Pointer to the APIC device instance - RC Ptr. */
539	PPDMDEVINSRC pDevInsRC;
540	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
541	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
542	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
543	DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
544	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
545	DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
546	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
547	DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
548	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
549	DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
550	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
551	DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
552	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
553	DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
554	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
555	DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
556	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
557	DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
558	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
559	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
560	DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
561	RTRCPTR RCPtrAlignment;
562
563	} PDMAPIC;
564
565
566	/**
567	* PDM registered I/O APIC device.
568	*/
569	typedef struct PDMIOAPIC
570	{
571	/** Pointer to the APIC device instance - R3 Ptr. */
572	PPDMDEVINSR3 pDevInsR3;
573	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
574	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
575	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
576	DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
577
578	/** Pointer to the PIC device instance - R0. */
579	PPDMDEVINSR0 pDevInsR0;
580	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
581	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
582	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
583	DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
584
585	/** Pointer to the APIC device instance - RC Ptr. */
586	PPDMDEVINSRC pDevInsRC;
587	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
588	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
589	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
590	DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
591
592	uint8_t Alignment[4];
593	} PDMIOAPIC;
594
595	/** Maximum number of PCI busses for a VM. */
596	#define PDM_PCI_BUSSES_MAX 8
597
598	/**
599	* PDM PCI Bus instance.
600	*/
601	typedef struct PDMPCIBUS
602	{
603	/** PCI bus number. */
604	RTUINT iBus;
605	RTUINT uPadding0; /*< Alignment padding./
606
607	/** Pointer to PCI Bus device instance. */
608	PPDMDEVINSR3 pDevInsR3;
609	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
610	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
611	/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
612	DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
613	/** @copydoc PDMPCIBUSREG::pfnPCIRegisterMsiR3 */
614	DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
615	/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
616	DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
617	PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
618	/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
619	DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
620	PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
621	/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
622	DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
623
624	/** Pointer to the PIC device instance - R0. */
625	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
626	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
627	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
628
629	/** Pointer to PCI Bus device instance. */
630	PPDMDEVINSRC pDevInsRC;
631	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
632	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
633	} PDMPCIBUS;
634
635
636	#ifdef IN_RING3
637	/**
638	* PDM registered DMAC (DMA Controller) device.
639	*/
640	typedef struct PDMDMAC
641	{
642	/** Pointer to the DMAC device instance. */
643	PPDMDEVINSR3 pDevIns;
644	/** Copy of the registration structure. */
645	PDMDMACREG Reg;
646	} PDMDMAC;
647
648
649	/**
650	* PDM registered RTC (Real Time Clock) device.
651	*/
652	typedef struct PDMRTC
653	{
654	/** Pointer to the RTC device instance. */
655	PPDMDEVINSR3 pDevIns;
656	/** Copy of the registration structure. */
657	PDMRTCREG Reg;
658	} PDMRTC;
659
660	#endif /* IN_RING3 */
661
662	/**
663	* Module type.
664	*/
665	typedef enum PDMMODTYPE
666	{
667	/** Raw-mode (RC) context module. */
668	PDMMOD_TYPE_RC,
669	/** Ring-0 (host) context module. */
670	PDMMOD_TYPE_R0,
671	/** Ring-3 (host) context module. */
672	PDMMOD_TYPE_R3
673	} PDMMODTYPE;
674
675
676	/** The module name length including the terminator. */
677	#define PDMMOD_NAME_LEN 32
678
679	/**
680	* Loaded module instance.
681	*/
682	typedef struct PDMMOD
683	{
684	/** Module name. This is used for referring to
685	* the module internally, sort of like a handle. */
686	char szName[PDMMOD_NAME_LEN];
687	/** Module type. */
688	PDMMODTYPE eType;
689	/** Loader module handle. Not used for R0 modules. */
690	RTLDRMOD hLdrMod;
691	/** Loaded address.
692	* This is the 'handle' for R0 modules. */
693	RTUINTPTR ImageBase;
694	/** Old loaded address.
695	* This is used during relocation of GC modules. Not used for R0 modules. */
696	RTUINTPTR OldImageBase;
697	/** Where the R3 HC bits are stored.
698	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
699	void *pvBits;
700
701	/** Pointer to next module. */
702	struct PDMMOD *pNext;
703	/** Module filename. */
704	char szFilename[1];
705	} PDMMOD;
706	/** Pointer to loaded module instance. */
707	typedef PDMMOD *PPDMMOD;
708
709
710
711	/** Extra space in the free array. */
712	#define PDMQUEUE_FREE_SLACK 16
713
714	/**
715	* Queue type.
716	*/
717	typedef enum PDMQUEUETYPE
718	{
719	/** Device consumer. */
720	PDMQUEUETYPE_DEV = 1,
721	/** Driver consumer. */
722	PDMQUEUETYPE_DRV,
723	/** Internal consumer. */
724	PDMQUEUETYPE_INTERNAL,
725	/** External consumer. */
726	PDMQUEUETYPE_EXTERNAL
727	} PDMQUEUETYPE;
728
729	/** Pointer to a PDM Queue. */
730	typedef struct PDMQUEUE *PPDMQUEUE;
731
732	/**
733	* PDM Queue.
734	*/
735	typedef struct PDMQUEUE
736	{
737	/** Pointer to the next queue in the list. */
738	R3PTRTYPE(PPDMQUEUE) pNext;
739	/** Type specific data. */
740	union
741	{
742	/** PDMQUEUETYPE_DEV */
743	struct
744	{
745	/** Pointer to consumer function. */
746	R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
747	/** Pointer to the device instance owning the queue. */
748	R3PTRTYPE(PPDMDEVINS) pDevIns;
749	} Dev;
750	/** PDMQUEUETYPE_DRV */
751	struct
752	{
753	/** Pointer to consumer function. */
754	R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
755	/** Pointer to the driver instance owning the queue. */
756	R3PTRTYPE(PPDMDRVINS) pDrvIns;
757	} Drv;
758	/** PDMQUEUETYPE_INTERNAL */
759	struct
760	{
761	/** Pointer to consumer function. */
762	R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
763	} Int;
764	/** PDMQUEUETYPE_EXTERNAL */
765	struct
766	{
767	/** Pointer to consumer function. */
768	R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
769	/** Pointer to user argument. */
770	R3PTRTYPE(void *) pvUser;
771	} Ext;
772	} u;
773	/** Queue type. */
774	PDMQUEUETYPE enmType;
775	/** The interval between checking the queue for events.
776	* The realtime timer below is used to do the waiting.
777	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
778	uint32_t cMilliesInterval;
779	/** Interval timer. Only used if cMilliesInterval is non-zero. */
780	PTMTIMERR3 pTimer;
781	/** Pointer to the VM - R3. */
782	PVMR3 pVMR3;
783	/** LIFO of pending items - R3. */
784	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
785	/** Pointer to the VM - R0. */
786	PVMR0 pVMR0;
787	/** LIFO of pending items - R0. */
788	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
789	/** Pointer to the GC VM and indicator for GC enabled queue.
790	* If this is NULL, the queue cannot be used in GC.
791	*/
792	PVMRC pVMRC;
793	/** LIFO of pending items - GC. */
794	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
795
796	/** Item size (bytes). */
797	uint32_t cbItem;
798	/** Number of items in the queue. */
799	uint32_t cItems;
800	/** Index to the free head (where we insert). */
801	uint32_t volatile iFreeHead;
802	/** Index to the free tail (where we remove). */
803	uint32_t volatile iFreeTail;
804
805	/** Unique queue name. */
806	R3PTRTYPE(const char *) pszName;
807	#if HC_ARCH_BITS == 32
808	RTR3PTR Alignment1;
809	#endif
810	/** Stat: Times PDMQueueAlloc fails. */
811	STAMCOUNTER StatAllocFailures;
812	/** Stat: PDMQueueInsert calls. */
813	STAMCOUNTER StatInsert;
814	/** Stat: Queue flushes. */
815	STAMCOUNTER StatFlush;
816	/** Stat: Queue flushes with pending items left over. */
817	STAMCOUNTER StatFlushLeftovers;
818	#ifdef VBOX_WITH_STATISTICS
819	/** State: Profiling the flushing. */
820	STAMPROFILE StatFlushPrf;
821	/** State: Pending items. */
822	uint32_t volatile cStatPending;
823	uint32_t volatile cAlignment;
824	#endif
825
826	/** Array of pointers to free items. Variable size. */
827	struct PDMQUEUEFREEITEM
828	{
829	/** Pointer to the free item - HC Ptr. */
830	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
831	/** Pointer to the free item - HC Ptr. */
832	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
833	/** Pointer to the free item - GC Ptr. */
834	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
835	#if HC_ARCH_BITS == 64
836	RTRCPTR Alignment0;
837	#endif
838	} aFreeItems[1];
839	} PDMQUEUE;
840
841	/** @name PDM::fQueueFlushing
842	* @{ */
843	/** Used to make sure only one EMT will flush the queues.
844	* Set when an EMT is flushing queues, clear otherwise. */
845	#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
846	/** Indicating there are queues with items pending.
847	* This is make sure we don't miss inserts happening during flushing. The FF
848	* cannot be used for this since it has to be cleared immediately to prevent
849	* other EMTs from spinning. */
850	#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
851	/** }@ */
852
853
854	/**
855	* Queue device helper task operation.
856	*/
857	typedef enum PDMDEVHLPTASKOP
858	{
859	/** The usual invalid 0 entry. */
860	PDMDEVHLPTASKOP_INVALID = 0,
861	/** ISASetIrq */
862	PDMDEVHLPTASKOP_ISA_SET_IRQ,
863	/** PCISetIrq */
864	PDMDEVHLPTASKOP_PCI_SET_IRQ,
865	/** PCISetIrq */
866	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
867	/** The usual 32-bit hack. */
868	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
869	} PDMDEVHLPTASKOP;
870
871	/**
872	* Queued Device Helper Task.
873	*/
874	typedef struct PDMDEVHLPTASK
875	{
876	/** The queue item core (don't touch). */
877	PDMQUEUEITEMCORE Core;
878	/** Pointer to the device instance (R3 Ptr). */
879	PPDMDEVINSR3 pDevInsR3;
880	/** This operation to perform. */
881	PDMDEVHLPTASKOP enmOp;
882	#if HC_ARCH_BITS == 64
883	uint32_t Alignment0;
884	#endif
885	/** Parameters to the operation. */
886	union PDMDEVHLPTASKPARAMS
887	{
888	/**
889	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
890	*/
891	struct PDMDEVHLPTASKSETIRQ
892	{
893	/** The IRQ */
894	int iIrq;
895	/** The new level. */
896	int iLevel;
897	/** The IRQ tag and source. */
898	uint32_t uTagSrc;
899	} SetIRQ;
900
901	/** Expanding the structure.. */
902	uint64_t au64[2];
903	} u;
904	} PDMDEVHLPTASK;
905	/** Pointer to a queued Device Helper Task. */
906	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
907	/** Pointer to a const queued Device Helper Task. */
908	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
909
910
911
912	/**
913	* An USB hub registration record.
914	*/
915	typedef struct PDMUSBHUB
916	{
917	/** The USB versions this hub support.
918	* Note that 1.1 hubs can take on 2.0 devices. */
919	uint32_t fVersions;
920	/** The number of ports on the hub. */
921	uint32_t cPorts;
922	/** The number of available ports (0..cPorts). */
923	uint32_t cAvailablePorts;
924	/** The driver instance of the hub. */
925	PPDMDRVINS pDrvIns;
926	/** Copy of the to the registration structure. */
927	PDMUSBHUBREG Reg;
928
929	/** Pointer to the next hub in the list. */
930	struct PDMUSBHUB *pNext;
931	} PDMUSBHUB;
932
933	/** Pointer to a const USB HUB registration record. */
934	typedef const PDMUSBHUB *PCPDMUSBHUB;
935
936	/** Pointer to a PDM Async I/O template. */
937	typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
938
939	/** Pointer to the main PDM Async completion endpoint class. */
940	typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
941
942	/** Pointer to the global block cache structure. */
943	typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
944
945	/**
946	* PDM VMCPU Instance data.
947	* Changes to this must checked against the padding of the cfgm union in VMCPU!
948	*/
949	typedef struct PDMCPU
950	{
951	/** The number of entries in the apQueuedCritSectsLeaves table that's currently in use. */
952	uint32_t cQueuedCritSectLeaves;
953	uint32_t uPadding0; /*< Alignment padding./
954	/** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
955	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
956	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
957	} PDMCPU;
958
959
960	/**
961	* PDM VM Instance data.
962	* Changes to this must checked against the padding of the cfgm union in VM!
963	*/
964	typedef struct PDM
965	{
966	/** The PDM lock.
967	* This is used to protect everything that deals with interrupts, i.e.
968	* the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
969	PDMCRITSECT CritSect;
970	/** The NOP critical section.
971	* This is a dummy critical section that will not do any thread
972	* serialization but instead let all threads enter immediately and
973	* concurrently. */
974	PDMCRITSECT NopCritSect;
975
976	/** List of registered devices. (FIFO) */
977	R3PTRTYPE(PPDMDEV) pDevs;
978	/** List of devices instances. (FIFO) */
979	R3PTRTYPE(PPDMDEVINS) pDevInstances;
980	/** List of registered USB devices. (FIFO) */
981	R3PTRTYPE(PPDMUSB) pUsbDevs;
982	/** List of USB devices instances. (FIFO) */
983	R3PTRTYPE(PPDMUSBINS) pUsbInstances;
984	/** List of registered drivers. (FIFO) */
985	R3PTRTYPE(PPDMDRV) pDrvs;
986	/** PCI Buses. */
987	PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
988	/** The register PIC device. */
989	PDMPIC Pic;
990	/** The registered APIC device. */
991	PDMAPIC Apic;
992	/** The registered I/O APIC device. */
993	PDMIOAPIC IoApic;
994	/** The registered DMAC device. */
995	R3PTRTYPE(PPDMDMAC) pDmac;
996	/** The registered RTC device. */
997	R3PTRTYPE(PPDMRTC) pRtc;
998	/** The registered USB HUBs. (FIFO) */
999	R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1000
1001	/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1002	R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1003	/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1004	R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1005	/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1006	RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1007	/** Pointer to the queue which should be manually flushed - RC Ptr.
1008	* Only touched by EMT. */
1009	RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1010	/** Pointer to the queue which should be manually flushed - R0 Ptr.
1011	* Only touched by EMT. */
1012	R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1013	/** Bitmask controlling the queue flushing.
1014	* See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1015	uint32_t volatile fQueueFlushing;
1016
1017	/** The current IRQ tag (tracing purposes). */
1018	uint32_t volatile uIrqTag;
1019
1020	/** The tracing ID of the next device instance.
1021	*
1022	* @remarks We keep the device tracing ID seperate from the rest as these are
1023	* then more likely to end up with the same ID from one run to
1024	* another, making analysis somewhat easier. Drivers and USB devices
1025	* are more volatile and can be changed at runtime, thus these are much
1026	* less likely to remain stable, so just heap them all together. */
1027	uint32_t idTracingDev;
1028	/** The tracing ID of the next driver instance, USB device instance or other
1029	* PDM entity requiring an ID. */
1030	uint32_t idTracingOther;
1031
1032	/** @name VMM device heap
1033	* @{ */
1034	/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1035	RTR3PTR pvVMMDevHeap;
1036	/** The heap size. */
1037	uint32_t cbVMMDevHeap;
1038	/** Free space. */
1039	uint32_t cbVMMDevHeapLeft;
1040	/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1041	RTGCPHYS GCPhysVMMDevHeap;
1042	/** @} */
1043
1044	/** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1045	STAMCOUNTER StatQueuedCritSectLeaves;
1046	} PDM;
1047	AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1048	AssertCompileMemberAlignment(PDM, CritSect, 8);
1049	AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1050	/** Pointer to PDM VM instance data. */
1051	typedef PDM *PPDM;
1052
1053
1054
1055	/**
1056	* PDM data kept in the UVM.
1057	*/
1058	typedef struct PDMUSERPERVM
1059	{
1060	/** @todo move more stuff over here. */
1061
1062	/** Linked list of timer driven PDM queues.
1063	* Currently serialized by PDM::CritSect. */
1064	R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1065	/** Linked list of force action driven PDM queues.
1066	* Currently serialized by PDM::CritSect. */
1067	R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1068
1069	/** Lock protecting the lists below it. */
1070	RTCRITSECT ListCritSect;
1071	/** Pointer to list of loaded modules. */
1072	PPDMMOD pModules;
1073	/** List of initialized critical sections. (LIFO) */
1074	R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1075	/** Head of the PDM Thread list. (singly linked) */
1076	R3PTRTYPE(PPDMTHREAD) pThreads;
1077	/** Tail of the PDM Thread list. (singly linked) */
1078	R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1079
1080	/** @name PDM Async Completion
1081	* @{ */
1082	/** Pointer to the array of supported endpoint classes. */
1083	PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1084	/** Head of the templates. Singly linked, protected by ListCritSect. */
1085	R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1086	/** @} */
1087
1088	/** Global block cache data. */
1089	R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1090	#ifdef VBOX_WITH_NETSHAPER
1091	/** Pointer to network shaper instance. */
1092	R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1093	#endif /* VBOX_WITH_NETSHAPER */
1094
1095	} PDMUSERPERVM;
1096	/** Pointer to the PDM data kept in the UVM. */
1097	typedef PDMUSERPERVM *PPDMUSERPERVM;
1098
1099
1100
1101	/*******************************************************************************
1102	* Global Variables *
1103	*******************************************************************************/
1104	#ifdef IN_RING3
1105	extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1106	extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1107	extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1108	extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1109	extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1110	extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1111	extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1112	extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1113	extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1114	extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1115	extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1116	#endif
1117
1118
1119	/*******************************************************************************
1120	* Defined Constants And Macros *
1121	*******************************************************************************/
1122	/** @def PDMDEV_ASSERT_DEVINS
1123	* Asserts the validity of the device instance.
1124	*/
1125	#ifdef VBOX_STRICT
1126	# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1127	do { \
1128	AssertPtr(pDevIns); \
1129	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1130	Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1131	} while (0)
1132	#else
1133	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1134	#endif
1135
1136	/** @def PDMDRV_ASSERT_DRVINS
1137	* Asserts the validity of the driver instance.
1138	*/
1139	#ifdef VBOX_STRICT
1140	# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1141	do { \
1142	AssertPtr(pDrvIns); \
1143	Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1144	Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1145	} while (0)
1146	#else
1147	# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1148	#endif
1149
1150
1151	/*******************************************************************************
1152	* Internal Functions *
1153	*******************************************************************************/
1154	#ifdef IN_RING3
1155	bool pdmR3IsValidName(const char *pszName);
1156
1157	int pdmR3CritSectInitStats(PVM pVM);
1158	void pdmR3CritSectRelocate(PVM pVM);
1159	int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1160	int pdmR3CritSectInitDeviceAuto(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1161	const char *pszNameFmt, ...);
1162	int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1163	int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1164	int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1165
1166	int pdmR3DevInit(PVM pVM);
1167	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1168	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1169	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1170
1171	int pdmR3UsbLoadModules(PVM pVM);
1172	int pdmR3UsbInstantiateDevices(PVM pVM);
1173	PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1174	int pdmR3UsbFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1175	int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1176	int pdmR3UsbVMInitComplete(PVM pVM);
1177
1178	int pdmR3DrvInit(PVM pVM);
1179	int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1180	PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1181	int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1182	void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1183	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1184
1185	int pdmR3LdrInitU(PUVM pUVM);
1186	void pdmR3LdrTermU(PUVM pUVM);
1187	char pdmR3FileR3(const char pszFile, bool fShared);
1188	int pdmR3LoadR3U(PUVM pUVM, const char pszFilename, const char pszName);
1189
1190	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1191
1192	int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1193	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1194	int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1195	PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1196	int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1197	PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1198	int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1199	int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1200	int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1201	void pdmR3ThreadDestroyAll(PVM pVM);
1202	int pdmR3ThreadResumeAll(PVM pVM);
1203	int pdmR3ThreadSuspendAll(PVM pVM);
1204
1205	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1206	int pdmR3AsyncCompletionInit(PVM pVM);
1207	int pdmR3AsyncCompletionTerm(PVM pVM);
1208	void pdmR3AsyncCompletionResume(PVM pVM);
1209	int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1210	int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1211	PFNPDMASYNCCOMPLETEDRV pfnCompleted, void pvTemplateUser, const char pszDesc);
1212	int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1213	int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1214	int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1215	int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1216	#endif
1217
1218	#ifdef VBOX_WITH_NETSHAPER
1219	int pdmR3NetShaperInit(PVM pVM);
1220	int pdmR3NetShaperTerm(PVM pVM);
1221	#endif
1222
1223	int pdmR3BlkCacheInit(PVM pVM);
1224	void pdmR3BlkCacheTerm(PVM pVM);
1225	int pdmR3BlkCacheResume(PVM pVM);
1226
1227	#endif /* IN_RING3 */
1228
1229	void pdmLock(PVM pVM);
1230	int pdmLockEx(PVM pVM, int rc);
1231	void pdmUnlock(PVM pVM);
1232
1233	/** @} */
1234
1235	RT_C_DECLS_END
1236
1237	#endif
1238

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source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 44509

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