PDMInternal.h@ 64374

Last change on this file since 64374 was 64374, checked in by vboxsync, 8 years ago
PDM,Devices: Support for multiple PCI devices/function in a single PDM device.
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1	/* $Id: PDMInternal.h 64374 2016-10-23 19:07:51Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2016 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___PDMInternal_h
19	#define ___PDMInternal_h
20
21	#include <VBox/types.h>
22	#include <VBox/param.h>
23	#include <VBox/vmm/cfgm.h>
24	#include <VBox/vmm/stam.h>
25	#include <VBox/vusb.h>
26	#include <VBox/vmm/pdmasynccompletion.h>
27	#ifdef VBOX_WITH_NETSHAPER
28	# include <VBox/vmm/pdmnetshaper.h>
29	#endif
30	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
31	# include <VBox/vmm/pdmasynccompletion.h>
32	#endif
33	#include <VBox/vmm/pdmblkcache.h>
34	#include <VBox/vmm/pdmcommon.h>
35	#include <VBox/sup.h>
36	#include <iprt/assert.h>
37	#include <iprt/critsect.h>
38	#ifdef IN_RING3
39	# include <iprt/thread.h>
40	#endif
41
42	RT_C_DECLS_BEGIN
43
44
45	/** @defgroup grp_pdm_int Internal
46	* @ingroup grp_pdm
47	* @internal
48	* @{
49	*/
50
51	/** @def PDM_WITH_R3R0_CRIT_SECT
52	* Enables or disabled ring-3/ring-0 critical sections. */
53	#if defined(DOXYGEN_RUNNING) \|\| 1
54	# define PDM_WITH_R3R0_CRIT_SECT
55	#endif
56
57	/** @def PDMCRITSECT_STRICT
58	* Enables/disables PDM critsect strictness like deadlock detection. */
59	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(IEM_VERIFICATION_MODE) && !defined(PDMCRITSECT_STRICT)) \
60	\|\| defined(DOXYGEN_RUNNING)
61	# define PDMCRITSECT_STRICT
62	#endif
63
64	/** @def PDMCRITSECT_STRICT
65	* Enables/disables PDM read/write critsect strictness like deadlock
66	* detection. */
67	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(IEM_VERIFICATION_MODE) && !defined(PDMCRITSECTRW_STRICT)) \
68	\|\| defined(DOXYGEN_RUNNING)
69	# define PDMCRITSECTRW_STRICT
70	#endif
71
72
73	/*******************************************************************************
74	* Structures and Typedefs *
75	*******************************************************************************/
76
77	/** Pointer to a PDM Device. */
78	typedef struct PDMDEV *PPDMDEV;
79	/** Pointer to a pointer to a PDM Device. */
80	typedef PPDMDEV *PPPDMDEV;
81
82	/** Pointer to a PDM USB Device. */
83	typedef struct PDMUSB *PPDMUSB;
84	/** Pointer to a pointer to a PDM USB Device. */
85	typedef PPDMUSB *PPPDMUSB;
86
87	/** Pointer to a PDM Driver. */
88	typedef struct PDMDRV *PPDMDRV;
89	/** Pointer to a pointer to a PDM Driver. */
90	typedef PPDMDRV *PPPDMDRV;
91
92	/** Pointer to a PDM Logical Unit. */
93	typedef struct PDMLUN *PPDMLUN;
94	/** Pointer to a pointer to a PDM Logical Unit. */
95	typedef PPDMLUN *PPPDMLUN;
96
97	/** Pointer to a PDM PCI Bus instance. */
98	typedef struct PDMPCIBUS *PPDMPCIBUS;
99	/** Pointer to a DMAC instance. */
100	typedef struct PDMDMAC *PPDMDMAC;
101	/** Pointer to a RTC instance. */
102	typedef struct PDMRTC *PPDMRTC;
103
104	/** Pointer to an USB HUB registration record. */
105	typedef struct PDMUSBHUB *PPDMUSBHUB;
106
107	/**
108	* Supported asynchronous completion endpoint classes.
109	*/
110	typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
111	{
112	/** File class. */
113	PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
114	/** Number of supported classes. */
115	PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
116	/** 32bit hack. */
117	PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
118	} PDMASYNCCOMPLETIONEPCLASSTYPE;
119
120	/**
121	* Private device instance data.
122	*/
123	typedef struct PDMDEVINSINT
124	{
125	/** Pointer to the next instance (HC Ptr).
126	* (Head is pointed to by PDM::pDevInstances.) */
127	R3PTRTYPE(PPDMDEVINS) pNextR3;
128	/** Pointer to the next per device instance (HC Ptr).
129	* (Head is pointed to by PDMDEV::pInstances.) */
130	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
131	/** Pointer to device structure - HC Ptr. */
132	R3PTRTYPE(PPDMDEV) pDevR3;
133	/** Pointer to the list of logical units associated with the device. (FIFO) */
134	R3PTRTYPE(PPDMLUN) pLunsR3;
135	/** Pointer to the asynchronous notification callback set while in
136	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
137	R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
138	/** Configuration handle to the instance node. */
139	R3PTRTYPE(PCFGMNODE) pCfgHandle;
140
141	/** R3 pointer to the VM this instance was created for. */
142	PVMR3 pVMR3;
143	/** Associated PCI device list head (first is default). (R3 ptr) */
144	R3PTRTYPE(PPDMPCIDEV) pHeadPciDevR3;
145
146	/** R0 pointer to the VM this instance was created for. */
147	PVMR0 pVMR0;
148	/** Associated PCI device list head (first is default). (R0 ptr) */
149	R0PTRTYPE(PPDMPCIDEV) pHeadPciDevR0;
150
151	/** RC pointer to the VM this instance was created for. */
152	PVMRC pVMRC;
153	/** Associated PCI device list head (first is default). (RC ptr) */
154	RCPTRTYPE(PPDMPCIDEV) pHeadPciDevRC;
155
156	/** Flags, see PDMDEVINSINT_FLAGS_XXX. */
157	uint32_t fIntFlags;
158	/** The last IRQ tag (for tracing it thru clearing). */
159	uint32_t uLastIrqTag;
160	} PDMDEVINSINT;
161
162	/** @name PDMDEVINSINT::fIntFlags
163	* @{ */
164	/** Used by pdmR3Load to mark device instances it found in the saved state. */
165	#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
166	/** Indicates that the device hasn't been powered on or resumed.
167	* This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
168	* to make sure each device gets exactly one notification for each of those
169	* events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
170	* a failure (already resumed/powered-on devices are suspended).
171	* PDMR3PowerOff resets this flag once before going through the devices to make sure
172	* every device gets the power off notification even if it was suspended before with
173	* PDMR3Suspend.
174	*/
175	#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
176	/** Indicates that the device has been reset already. Used by PDMR3Reset. */
177	#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
178	/** @} */
179
180
181	/**
182	* Private USB device instance data.
183	*/
184	typedef struct PDMUSBINSINT
185	{
186	/** The UUID of this instance. */
187	RTUUID Uuid;
188	/** Pointer to the next instance.
189	* (Head is pointed to by PDM::pUsbInstances.) */
190	R3PTRTYPE(PPDMUSBINS) pNext;
191	/** Pointer to the next per USB device instance.
192	* (Head is pointed to by PDMUSB::pInstances.) */
193	R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
194
195	/** Pointer to device structure. */
196	R3PTRTYPE(PPDMUSB) pUsbDev;
197
198	/** Pointer to the VM this instance was created for. */
199	PVMR3 pVM;
200	/** Pointer to the list of logical units associated with the device. (FIFO) */
201	R3PTRTYPE(PPDMLUN) pLuns;
202	/** The per instance device configuration. */
203	R3PTRTYPE(PCFGMNODE) pCfg;
204	/** Same as pCfg if the configuration should be deleted when detaching the device. */
205	R3PTRTYPE(PCFGMNODE) pCfgDelete;
206	/** The global device configuration. */
207	R3PTRTYPE(PCFGMNODE) pCfgGlobal;
208
209	/** Pointer to the USB hub this device is attached to.
210	* This is NULL if the device isn't connected to any HUB. */
211	R3PTRTYPE(PPDMUSBHUB) pHub;
212	/** The port number that we're connected to. */
213	uint32_t iPort;
214	/** Indicates that the USB device hasn't been powered on or resumed.
215	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
216	bool fVMSuspended;
217	/** Indicates that the USB device has been reset. */
218	bool fVMReset;
219	/** Pointer to the asynchronous notification callback set while in
220	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
221	R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
222	} PDMUSBINSINT;
223
224
225	/**
226	* Private driver instance data.
227	*/
228	typedef struct PDMDRVINSINT
229	{
230	/** Pointer to the driver instance above.
231	* This is NULL for the topmost drive. */
232	R3PTRTYPE(PPDMDRVINS) pUp;
233	/** Pointer to the driver instance below.
234	* This is NULL for the bottommost driver. */
235	R3PTRTYPE(PPDMDRVINS) pDown;
236	/** Pointer to the logical unit this driver chained on. */
237	R3PTRTYPE(PPDMLUN) pLun;
238	/** Pointer to driver structure from which this was instantiated. */
239	R3PTRTYPE(PPDMDRV) pDrv;
240	/** Pointer to the VM this instance was created for, ring-3 context. */
241	PVMR3 pVMR3;
242	/** Pointer to the VM this instance was created for, ring-0 context. */
243	PVMR0 pVMR0;
244	/** Pointer to the VM this instance was created for, raw-mode context. */
245	PVMRC pVMRC;
246	/** Flag indicating that the driver is being detached and destroyed.
247	* (Helps detect potential recursive detaching.) */
248	bool fDetaching;
249	/** Indicates that the driver hasn't been powered on or resumed.
250	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
251	bool fVMSuspended;
252	/** Indicates that the driver has been reset already. */
253	bool fVMReset;
254	/** Set if allocated on the hyper heap, false if on the ring-3 heap. */
255	bool fHyperHeap;
256	/** Pointer to the asynchronous notification callback set while in
257	* PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
258	R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
259	/** Configuration handle to the instance node. */
260	R3PTRTYPE(PCFGMNODE) pCfgHandle;
261	/** Pointer to the ring-0 request handler function. */
262	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
263	} PDMDRVINSINT;
264
265
266	/**
267	* Private critical section data.
268	*/
269	typedef struct PDMCRITSECTINT
270	{
271	/** The critical section core which is shared with IPRT.
272	* @note The semaphore is a SUPSEMEVENT. */
273	RTCRITSECT Core;
274	/** Pointer to the next critical section.
275	* This chain is used for relocating pVMRC and device cleanup. */
276	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
277	/** Owner identifier.
278	* This is pDevIns if the owner is a device. Similarly for a driver or service.
279	* PDMR3CritSectInit() sets this to point to the critsect itself. */
280	RTR3PTR pvKey;
281	/** Pointer to the VM - R3Ptr. */
282	PVMR3 pVMR3;
283	/** Pointer to the VM - R0Ptr. */
284	PVMR0 pVMR0;
285	/** Pointer to the VM - GCPtr. */
286	PVMRC pVMRC;
287	/** Set if this critical section is the automatically created default
288	* section of a device. */
289	bool fAutomaticDefaultCritsect;
290	/** Set if the critical section is used by a timer or similar.
291	* See PDMR3DevGetCritSect. */
292	bool fUsedByTimerOrSimilar;
293	/** Alignment padding. */
294	bool afPadding[2];
295	/** Support driver event semaphore that is scheduled to be signaled upon leaving
296	* the critical section. This is only for Ring-3 and Ring-0. */
297	SUPSEMEVENT hEventToSignal;
298	/** The lock name. */
299	R3PTRTYPE(const char *) pszName;
300	/** R0/RC lock contention. */
301	STAMCOUNTER StatContentionRZLock;
302	/** R0/RC unlock contention. */
303	STAMCOUNTER StatContentionRZUnlock;
304	/** R3 lock contention. */
305	STAMCOUNTER StatContentionR3;
306	/** Profiling the time the section is locked. */
307	STAMPROFILEADV StatLocked;
308	} PDMCRITSECTINT;
309	AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
310	/** Pointer to private critical section data. */
311	typedef PDMCRITSECTINT *PPDMCRITSECTINT;
312
313	/** Indicates that the critical section is queued for unlock.
314	* PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
315	#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
316
317
318	/**
319	* Private critical section data.
320	*/
321	typedef struct PDMCRITSECTRWINT
322	{
323	/** The read/write critical section core which is shared with IPRT.
324	* @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
325	RTCRITSECTRW Core;
326
327	/** Pointer to the next critical section.
328	* This chain is used for relocating pVMRC and device cleanup. */
329	R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
330	/** Owner identifier.
331	* This is pDevIns if the owner is a device. Similarly for a driver or service.
332	* PDMR3CritSectInit() sets this to point to the critsect itself. */
333	RTR3PTR pvKey;
334	/** Pointer to the VM - R3Ptr. */
335	PVMR3 pVMR3;
336	/** Pointer to the VM - R0Ptr. */
337	PVMR0 pVMR0;
338	/** Pointer to the VM - GCPtr. */
339	PVMRC pVMRC;
340	#if HC_ARCH_BITS == 64
341	/** Alignment padding. */
342	RTRCPTR RCPtrPadding;
343	#endif
344	/** The lock name. */
345	R3PTRTYPE(const char *) pszName;
346	/** R0/RC write lock contention. */
347	STAMCOUNTER StatContentionRZEnterExcl;
348	/** R0/RC write unlock contention. */
349	STAMCOUNTER StatContentionRZLeaveExcl;
350	/** R0/RC read lock contention. */
351	STAMCOUNTER StatContentionRZEnterShared;
352	/** R0/RC read unlock contention. */
353	STAMCOUNTER StatContentionRZLeaveShared;
354	/** R0/RC writes. */
355	STAMCOUNTER StatRZEnterExcl;
356	/** R0/RC reads. */
357	STAMCOUNTER StatRZEnterShared;
358	/** R3 write lock contention. */
359	STAMCOUNTER StatContentionR3EnterExcl;
360	/** R3 read lock contention. */
361	STAMCOUNTER StatContentionR3EnterShared;
362	/** R3 writes. */
363	STAMCOUNTER StatR3EnterExcl;
364	/** R3 reads. */
365	STAMCOUNTER StatR3EnterShared;
366	/** Profiling the time the section is write locked. */
367	STAMPROFILEADV StatWriteLocked;
368	} PDMCRITSECTRWINT;
369	AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
370	AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
371	/** Pointer to private critical section data. */
372	typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
373
374
375
376	/**
377	* The usual device/driver/internal/external stuff.
378	*/
379	typedef enum
380	{
381	/** The usual invalid entry. */
382	PDMTHREADTYPE_INVALID = 0,
383	/** Device type. */
384	PDMTHREADTYPE_DEVICE,
385	/** USB Device type. */
386	PDMTHREADTYPE_USB,
387	/** Driver type. */
388	PDMTHREADTYPE_DRIVER,
389	/** Internal type. */
390	PDMTHREADTYPE_INTERNAL,
391	/** External type. */
392	PDMTHREADTYPE_EXTERNAL,
393	/** The usual 32-bit hack. */
394	PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
395	} PDMTHREADTYPE;
396
397
398	/**
399	* The internal structure for the thread.
400	*/
401	typedef struct PDMTHREADINT
402	{
403	/** The VM pointer. */
404	PVMR3 pVM;
405	/** The event semaphore the thread blocks on when not running. */
406	RTSEMEVENTMULTI BlockEvent;
407	/** The event semaphore the thread sleeps on while running. */
408	RTSEMEVENTMULTI SleepEvent;
409	/** Pointer to the next thread. */
410	R3PTRTYPE(struct PDMTHREAD *) pNext;
411	/** The thread type. */
412	PDMTHREADTYPE enmType;
413	} PDMTHREADINT;
414
415
416
417	/* Must be included after PDMDEVINSINT is defined. */
418	#define PDMDEVINSINT_DECLARED
419	#define PDMUSBINSINT_DECLARED
420	#define PDMDRVINSINT_DECLARED
421	#define PDMCRITSECTINT_DECLARED
422	#define PDMCRITSECTRWINT_DECLARED
423	#define PDMTHREADINT_DECLARED
424	#ifdef ___VBox_pdm_h
425	# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
426	#endif
427	RT_C_DECLS_END
428	#include <VBox/vmm/pdm.h>
429	RT_C_DECLS_BEGIN
430
431	/**
432	* PDM Logical Unit.
433	*
434	* This typically the representation of a physical port on a
435	* device, like for instance the PS/2 keyboard port on the
436	* keyboard controller device. The LUNs are chained on the
437	* device the belong to (PDMDEVINSINT::pLunsR3).
438	*/
439	typedef struct PDMLUN
440	{
441	/** The LUN - The Logical Unit Number. */
442	RTUINT iLun;
443	/** Pointer to the next LUN. */
444	PPDMLUN pNext;
445	/** Pointer to the top driver in the driver chain. */
446	PPDMDRVINS pTop;
447	/** Pointer to the bottom driver in the driver chain. */
448	PPDMDRVINS pBottom;
449	/** Pointer to the device instance which the LUN belongs to.
450	* Either this is set or pUsbIns is set. Both is never set at the same time. */
451	PPDMDEVINS pDevIns;
452	/** Pointer to the USB device instance which the LUN belongs to. */
453	PPDMUSBINS pUsbIns;
454	/** Pointer to the device base interface. */
455	PPDMIBASE pBase;
456	/** Description of this LUN. */
457	const char *pszDesc;
458	} PDMLUN;
459
460
461	/**
462	* PDM Device.
463	*/
464	typedef struct PDMDEV
465	{
466	/** Pointer to the next device (R3 Ptr). */
467	R3PTRTYPE(PPDMDEV) pNext;
468	/** Device name length. (search optimization) */
469	RTUINT cchName;
470	/** Registration structure. */
471	R3PTRTYPE(const struct PDMDEVREG *) pReg;
472	/** Number of instances. */
473	uint32_t cInstances;
474	/** Pointer to chain of instances (R3 Ptr). */
475	PPDMDEVINSR3 pInstances;
476	/** The search path for raw-mode context modules (';' as separator). */
477	char *pszRCSearchPath;
478	/** The search path for ring-0 context modules (';' as separator). */
479	char *pszR0SearchPath;
480	} PDMDEV;
481
482
483	/**
484	* PDM USB Device.
485	*/
486	typedef struct PDMUSB
487	{
488	/** Pointer to the next device (R3 Ptr). */
489	R3PTRTYPE(PPDMUSB) pNext;
490	/** Device name length. (search optimization) */
491	RTUINT cchName;
492	/** Registration structure. */
493	R3PTRTYPE(const struct PDMUSBREG *) pReg;
494	/** Next instance number. */
495	uint32_t iNextInstance;
496	/** Pointer to chain of instances (R3 Ptr). */
497	R3PTRTYPE(PPDMUSBINS) pInstances;
498	} PDMUSB;
499
500
501	/**
502	* PDM Driver.
503	*/
504	typedef struct PDMDRV
505	{
506	/** Pointer to the next device. */
507	PPDMDRV pNext;
508	/** Registration structure. */
509	const struct PDMDRVREG * pReg;
510	/** Current number of instances. */
511	uint32_t cInstances;
512	/** The next instance number. */
513	uint32_t iNextInstance;
514	/** The search path for raw-mode context modules (';' as separator). */
515	char *pszRCSearchPath;
516	/** The search path for ring-0 context modules (';' as separator). */
517	char *pszR0SearchPath;
518	} PDMDRV;
519
520
521	/**
522	* PDM registered PIC device.
523	*/
524	typedef struct PDMPIC
525	{
526	/** Pointer to the PIC device instance - R3. */
527	PPDMDEVINSR3 pDevInsR3;
528	/** @copydoc PDMPICREG::pfnSetIrqR3 */
529	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
530	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
531	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
532
533	/** Pointer to the PIC device instance - R0. */
534	PPDMDEVINSR0 pDevInsR0;
535	/** @copydoc PDMPICREG::pfnSetIrqR3 */
536	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
537	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
538	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
539
540	/** Pointer to the PIC device instance - RC. */
541	PPDMDEVINSRC pDevInsRC;
542	/** @copydoc PDMPICREG::pfnSetIrqR3 */
543	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
544	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
545	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
546	/** Alignment padding. */
547	RTRCPTR RCPtrPadding;
548	} PDMPIC;
549
550
551	/**
552	* PDM registered APIC device.
553	*/
554	typedef struct PDMAPIC
555	{
556	/** Pointer to the APIC device instance - R3 Ptr. */
557	PPDMDEVINSR3 pDevInsR3;
558	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
559	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector,
560	uint32_t *pu32TagSrc));
561	/** @copydoc PDMAPICREG::pfnSetBaseMsrR3 */
562	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64Base));
563	/** @copydoc PDMAPICREG::pfnGetBaseMsrR3 */
564	DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
565	/** @copydoc PDMAPICREG::pfnSetTprR3 */
566	DECLR3CALLBACKMEMBER(void, pfnSetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
567	/** @copydoc PDMAPICREG::pfnGetTprR3 */
568	DECLR3CALLBACKMEMBER(uint8_t, pfnGetTprR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool pfPending, uint8_t pu8PendingIntr));
569	/** @copydoc PDMAPICREG::pfnWriteMsrR3 */
570	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
571	/** @copydoc PDMAPICREG::pfnReadMsrR3 */
572	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
573	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
574	DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t uDest, uint8_t uDestMode,
575	uint8_t uDeliveryMode, uint8_t uVector, uint8_t uPolarity,
576	uint8_t uTriggerMode, uint32_t uTagSrc));
577	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
578	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
579	int rcRZ));
580	/** @copydoc PDMAPICREG::pfnGetTimerFreqR3 */
581	DECLR3CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR3,(PPDMDEVINS pDevIns));
582
583	/** Pointer to the APIC device instance - R0 Ptr. */
584	PPDMDEVINSR0 pDevInsR0;
585	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
586	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector,
587	uint32_t *pu32TagSrc));
588	/** @copydoc PDMAPICREG::pfnSetBaseMsrR3 */
589	DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64Base));
590	/** @copydoc PDMAPICREG::pfnGetBaseMsrR3 */
591	DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseMsrR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
592	/** @copydoc PDMAPICREG::pfnSetTprR3 */
593	DECLR0CALLBACKMEMBER(void, pfnSetTprR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
594	/** @copydoc PDMAPICREG::pfnGetTprR3 */
595	DECLR0CALLBACKMEMBER(uint8_t, pfnGetTprR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool pfPending, uint8_t pu8PendingIntr));
596	/** @copydoc PDMAPICREG::pfnWriteMsrR3 */
597	DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
598	/** @copydoc PDMAPICREG::pfnReadMsrR3 */
599	DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
600	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
601	DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
602	uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
603	uint8_t u8TriggerMode, uint32_t uTagSrc));
604	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
605	DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
606	int rcRZ));
607	/** @copydoc PDMAPICREG::pfnGetTimerFreqR3 */
608	DECLR0CALLBACKMEMBER(uint64_t, pfnGetTimerFreqR0,(PPDMDEVINS pDevIns));
609
610	/** Pointer to the APIC device instance - RC Ptr. */
611	PPDMDEVINSRC pDevInsRC;
612	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
613	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t *pu8Vector,
614	uint32_t *pu32TagSrc));
615	/** @copydoc PDMAPICREG::pfnSetBaseMsrR3 */
616	DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnSetBaseMsrRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint64_t u64Base));
617	/** @copydoc PDMAPICREG::pfnGetBaseMsrR3 */
618	DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseMsrRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu));
619	/** @copydoc PDMAPICREG::pfnSetTprR3 */
620	DECLRCCALLBACKMEMBER(void, pfnSetTprRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Tpr));
621	/** @copydoc PDMAPICREG::pfnGetTprR3 */
622	DECLRCCALLBACKMEMBER(uint8_t, pfnGetTprRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, bool pfPending, uint8_t pu8PendingIntr));
623	/** @copydoc PDMAPICREG::pfnWriteMsrR3 */
624	DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnWriteMsrRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t u64Value));
625	/** @copydoc PDMAPICREG::pfnReadMsrR3 */
626	DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnReadMsrRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint32_t u32Reg, uint64_t *pu64Value));
627	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
628	DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
629	uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
630	uint8_t u8TriggerMode, uint32_t uTagSrc));
631	/** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
632	DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, PVMCPU pVCpu, uint8_t u8Pin, uint8_t u8Level,
633	int rcRZ));
634	/** @copydoc PDMAPICREG::pfnGetTimerFreqR3 */
635	DECLRCCALLBACKMEMBER(uint64_t, pfnGetTimerFreqRC,(PPDMDEVINS pDevIns));
636
637	uint8_t Alignment[4];
638	} PDMAPIC;
639
640
641	/**
642	* PDM registered I/O APIC device.
643	*/
644	typedef struct PDMIOAPIC
645	{
646	/** Pointer to the APIC device instance - R3 Ptr. */
647	PPDMDEVINSR3 pDevInsR3;
648	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
649	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
650	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
651	DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
652	/** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
653	DECLR3CALLBACKMEMBER(int, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
654
655	/** Pointer to the PIC device instance - R0. */
656	PPDMDEVINSR0 pDevInsR0;
657	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
658	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
659	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
660	DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
661	/** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
662	DECLR0CALLBACKMEMBER(int, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
663
664	/** Pointer to the APIC device instance - RC Ptr. */
665	PPDMDEVINSRC pDevInsRC;
666	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
667	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
668	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
669	DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
670	/** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
671	DECLRCCALLBACKMEMBER(int, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
672	} PDMIOAPIC;
673
674	/** Maximum number of PCI busses for a VM. */
675	#define PDM_PCI_BUSSES_MAX 8
676
677
678	#ifdef IN_RING3
679	/**
680	* PDM registered firmware device.
681	*/
682	typedef struct PDMFW
683	{
684	/** Pointer to the firmware device instance. */
685	PPDMDEVINSR3 pDevIns;
686	/** Copy of the registration structure. */
687	PDMFWREG Reg;
688	} PDMFW;
689	/** Pointer to a firmware instance. */
690	typedef PDMFW *PPDMFW;
691	#endif
692
693
694	/**
695	* PDM PCI Bus instance.
696	*/
697	typedef struct PDMPCIBUS
698	{
699	/** PCI bus number. */
700	RTUINT iBus;
701	RTUINT uPadding0; /*< Alignment padding./
702
703	/** Pointer to PCI Bus device instance. */
704	PPDMDEVINSR3 pDevInsR3;
705	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
706	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
707	/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
708	DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t fFlags,
709	uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
710	/** @copydoc PDMPCIBUSREG::pfnRegisterMsiR3 */
711	DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
712	/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
713	DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, RTGCPHYS cbRegion,
714	PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
715	/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
716	DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
717	PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
718	/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
719	DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
720
721	/** Pointer to the PIC device instance - R0. */
722	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
723	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
724	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
725
726	/** Pointer to PCI Bus device instance. */
727	PPDMDEVINSRC pDevInsRC;
728	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
729	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
730	} PDMPCIBUS;
731
732
733	#ifdef IN_RING3
734	/**
735	* PDM registered DMAC (DMA Controller) device.
736	*/
737	typedef struct PDMDMAC
738	{
739	/** Pointer to the DMAC device instance. */
740	PPDMDEVINSR3 pDevIns;
741	/** Copy of the registration structure. */
742	PDMDMACREG Reg;
743	} PDMDMAC;
744
745
746	/**
747	* PDM registered RTC (Real Time Clock) device.
748	*/
749	typedef struct PDMRTC
750	{
751	/** Pointer to the RTC device instance. */
752	PPDMDEVINSR3 pDevIns;
753	/** Copy of the registration structure. */
754	PDMRTCREG Reg;
755	} PDMRTC;
756
757	#endif /* IN_RING3 */
758
759	/**
760	* Module type.
761	*/
762	typedef enum PDMMODTYPE
763	{
764	/** Raw-mode (RC) context module. */
765	PDMMOD_TYPE_RC,
766	/** Ring-0 (host) context module. */
767	PDMMOD_TYPE_R0,
768	/** Ring-3 (host) context module. */
769	PDMMOD_TYPE_R3
770	} PDMMODTYPE;
771
772
773	/** The module name length including the terminator. */
774	#define PDMMOD_NAME_LEN 32
775
776	/**
777	* Loaded module instance.
778	*/
779	typedef struct PDMMOD
780	{
781	/** Module name. This is used for referring to
782	* the module internally, sort of like a handle. */
783	char szName[PDMMOD_NAME_LEN];
784	/** Module type. */
785	PDMMODTYPE eType;
786	/** Loader module handle. Not used for R0 modules. */
787	RTLDRMOD hLdrMod;
788	/** Loaded address.
789	* This is the 'handle' for R0 modules. */
790	RTUINTPTR ImageBase;
791	/** Old loaded address.
792	* This is used during relocation of GC modules. Not used for R0 modules. */
793	RTUINTPTR OldImageBase;
794	/** Where the R3 HC bits are stored.
795	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
796	void *pvBits;
797
798	/** Pointer to next module. */
799	struct PDMMOD *pNext;
800	/** Module filename. */
801	char szFilename[1];
802	} PDMMOD;
803	/** Pointer to loaded module instance. */
804	typedef PDMMOD *PPDMMOD;
805
806
807
808	/** Extra space in the free array. */
809	#define PDMQUEUE_FREE_SLACK 16
810
811	/**
812	* Queue type.
813	*/
814	typedef enum PDMQUEUETYPE
815	{
816	/** Device consumer. */
817	PDMQUEUETYPE_DEV = 1,
818	/** Driver consumer. */
819	PDMQUEUETYPE_DRV,
820	/** Internal consumer. */
821	PDMQUEUETYPE_INTERNAL,
822	/** External consumer. */
823	PDMQUEUETYPE_EXTERNAL
824	} PDMQUEUETYPE;
825
826	/** Pointer to a PDM Queue. */
827	typedef struct PDMQUEUE *PPDMQUEUE;
828
829	/**
830	* PDM Queue.
831	*/
832	typedef struct PDMQUEUE
833	{
834	/** Pointer to the next queue in the list. */
835	R3PTRTYPE(PPDMQUEUE) pNext;
836	/** Type specific data. */
837	union
838	{
839	/** PDMQUEUETYPE_DEV */
840	struct
841	{
842	/** Pointer to consumer function. */
843	R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
844	/** Pointer to the device instance owning the queue. */
845	R3PTRTYPE(PPDMDEVINS) pDevIns;
846	} Dev;
847	/** PDMQUEUETYPE_DRV */
848	struct
849	{
850	/** Pointer to consumer function. */
851	R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
852	/** Pointer to the driver instance owning the queue. */
853	R3PTRTYPE(PPDMDRVINS) pDrvIns;
854	} Drv;
855	/** PDMQUEUETYPE_INTERNAL */
856	struct
857	{
858	/** Pointer to consumer function. */
859	R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
860	} Int;
861	/** PDMQUEUETYPE_EXTERNAL */
862	struct
863	{
864	/** Pointer to consumer function. */
865	R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
866	/** Pointer to user argument. */
867	R3PTRTYPE(void *) pvUser;
868	} Ext;
869	} u;
870	/** Queue type. */
871	PDMQUEUETYPE enmType;
872	/** The interval between checking the queue for events.
873	* The realtime timer below is used to do the waiting.
874	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
875	uint32_t cMilliesInterval;
876	/** Interval timer. Only used if cMilliesInterval is non-zero. */
877	PTMTIMERR3 pTimer;
878	/** Pointer to the VM - R3. */
879	PVMR3 pVMR3;
880	/** LIFO of pending items - R3. */
881	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
882	/** Pointer to the VM - R0. */
883	PVMR0 pVMR0;
884	/** LIFO of pending items - R0. */
885	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
886	/** Pointer to the GC VM and indicator for GC enabled queue.
887	* If this is NULL, the queue cannot be used in GC.
888	*/
889	PVMRC pVMRC;
890	/** LIFO of pending items - GC. */
891	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
892
893	/** Item size (bytes). */
894	uint32_t cbItem;
895	/** Number of items in the queue. */
896	uint32_t cItems;
897	/** Index to the free head (where we insert). */
898	uint32_t volatile iFreeHead;
899	/** Index to the free tail (where we remove). */
900	uint32_t volatile iFreeTail;
901
902	/** Unique queue name. */
903	R3PTRTYPE(const char *) pszName;
904	#if HC_ARCH_BITS == 32
905	RTR3PTR Alignment1;
906	#endif
907	/** Stat: Times PDMQueueAlloc fails. */
908	STAMCOUNTER StatAllocFailures;
909	/** Stat: PDMQueueInsert calls. */
910	STAMCOUNTER StatInsert;
911	/** Stat: Queue flushes. */
912	STAMCOUNTER StatFlush;
913	/** Stat: Queue flushes with pending items left over. */
914	STAMCOUNTER StatFlushLeftovers;
915	#ifdef VBOX_WITH_STATISTICS
916	/** State: Profiling the flushing. */
917	STAMPROFILE StatFlushPrf;
918	/** State: Pending items. */
919	uint32_t volatile cStatPending;
920	uint32_t volatile cAlignment;
921	#endif
922
923	/** Array of pointers to free items. Variable size. */
924	struct PDMQUEUEFREEITEM
925	{
926	/** Pointer to the free item - HC Ptr. */
927	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
928	/** Pointer to the free item - HC Ptr. */
929	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
930	/** Pointer to the free item - GC Ptr. */
931	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
932	#if HC_ARCH_BITS == 64
933	RTRCPTR Alignment0;
934	#endif
935	} aFreeItems[1];
936	} PDMQUEUE;
937
938	/** @name PDM::fQueueFlushing
939	* @{ */
940	/** Used to make sure only one EMT will flush the queues.
941	* Set when an EMT is flushing queues, clear otherwise. */
942	#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
943	/** Indicating there are queues with items pending.
944	* This is make sure we don't miss inserts happening during flushing. The FF
945	* cannot be used for this since it has to be cleared immediately to prevent
946	* other EMTs from spinning. */
947	#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
948	/** @} */
949
950
951	/**
952	* Queue device helper task operation.
953	*/
954	typedef enum PDMDEVHLPTASKOP
955	{
956	/** The usual invalid 0 entry. */
957	PDMDEVHLPTASKOP_INVALID = 0,
958	/** ISASetIrq */
959	PDMDEVHLPTASKOP_ISA_SET_IRQ,
960	/** PCISetIrq */
961	PDMDEVHLPTASKOP_PCI_SET_IRQ,
962	/** PCISetIrq */
963	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
964	/** The usual 32-bit hack. */
965	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
966	} PDMDEVHLPTASKOP;
967
968	/**
969	* Queued Device Helper Task.
970	*/
971	typedef struct PDMDEVHLPTASK
972	{
973	/** The queue item core (don't touch). */
974	PDMQUEUEITEMCORE Core;
975	/** Pointer to the device instance (R3 Ptr). */
976	PPDMDEVINSR3 pDevInsR3;
977	/** This operation to perform. */
978	PDMDEVHLPTASKOP enmOp;
979	#if HC_ARCH_BITS == 64
980	uint32_t Alignment0;
981	#endif
982	/** Parameters to the operation. */
983	union PDMDEVHLPTASKPARAMS
984	{
985	/**
986	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
987	*/
988	struct PDMDEVHLPTASKISASETIRQ
989	{
990	/** The IRQ */
991	int iIrq;
992	/** The new level. */
993	int iLevel;
994	/** The IRQ tag and source. */
995	uint32_t uTagSrc;
996	} IsaSetIRQ, IoApicSetIRQ;
997
998	/**
999	* PDMDEVHLPTASKOP_PCI_SET_IRQ
1000	*/
1001	struct PDMDEVHLPTASKPCISETIRQ
1002	{
1003	/** Pointer to the PCI device (R3 Ptr). */
1004	R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
1005	/** The IRQ */
1006	int iIrq;
1007	/** The new level. */
1008	int iLevel;
1009	/** The IRQ tag and source. */
1010	uint32_t uTagSrc;
1011	} PciSetIRQ;
1012
1013	/** Expanding the structure. */
1014	uint64_t au64[3];
1015	} u;
1016	} PDMDEVHLPTASK;
1017	/** Pointer to a queued Device Helper Task. */
1018	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
1019	/** Pointer to a const queued Device Helper Task. */
1020	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
1021
1022
1023
1024	/**
1025	* An USB hub registration record.
1026	*/
1027	typedef struct PDMUSBHUB
1028	{
1029	/** The USB versions this hub support.
1030	* Note that 1.1 hubs can take on 2.0 devices. */
1031	uint32_t fVersions;
1032	/** The number of ports on the hub. */
1033	uint32_t cPorts;
1034	/** The number of available ports (0..cPorts). */
1035	uint32_t cAvailablePorts;
1036	/** The driver instance of the hub. */
1037	PPDMDRVINS pDrvIns;
1038	/** Copy of the to the registration structure. */
1039	PDMUSBHUBREG Reg;
1040
1041	/** Pointer to the next hub in the list. */
1042	struct PDMUSBHUB *pNext;
1043	} PDMUSBHUB;
1044
1045	/** Pointer to a const USB HUB registration record. */
1046	typedef const PDMUSBHUB *PCPDMUSBHUB;
1047
1048	/** Pointer to a PDM Async I/O template. */
1049	typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
1050
1051	/** Pointer to the main PDM Async completion endpoint class. */
1052	typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
1053
1054	/** Pointer to the global block cache structure. */
1055	typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
1056
1057	/**
1058	* PDM VMCPU Instance data.
1059	* Changes to this must checked against the padding of the pdm union in VMCPU!
1060	*/
1061	typedef struct PDMCPU
1062	{
1063	/** The number of entries in the apQueuedCritSectsLeaves table that's currently
1064	* in use. */
1065	uint32_t cQueuedCritSectLeaves;
1066	uint32_t uPadding0; /*< Alignment padding./
1067	/** Critical sections queued in RC/R0 because of contention preventing leave to
1068	* complete. (R3 Ptrs)
1069	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1070	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
1071
1072	/** The number of entries in the apQueuedCritSectRwExclLeaves table that's
1073	* currently in use. */
1074	uint32_t cQueuedCritSectRwExclLeaves;
1075	uint32_t uPadding1; /*< Alignment padding./
1076	/** Read/write critical sections queued in RC/R0 because of contention
1077	* preventing exclusive leave to complete. (R3 Ptrs)
1078	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1079	R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1080
1081	/** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1082	* currently in use. */
1083	uint32_t cQueuedCritSectRwShrdLeaves;
1084	uint32_t uPadding2; /*< Alignment padding./
1085	/** Read/write critical sections queued in RC/R0 because of contention
1086	* preventing shared leave to complete. (R3 Ptrs)
1087	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1088	R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1089	} PDMCPU;
1090
1091
1092	/**
1093	* PDM VM Instance data.
1094	* Changes to this must checked against the padding of the cfgm union in VM!
1095	*/
1096	typedef struct PDM
1097	{
1098	/** The PDM lock.
1099	* This is used to protect everything that deals with interrupts, i.e.
1100	* the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1101	PDMCRITSECT CritSect;
1102	/** The NOP critical section.
1103	* This is a dummy critical section that will not do any thread
1104	* serialization but instead let all threads enter immediately and
1105	* concurrently. */
1106	PDMCRITSECT NopCritSect;
1107
1108	/** List of registered devices. (FIFO) */
1109	R3PTRTYPE(PPDMDEV) pDevs;
1110	/** List of devices instances. (FIFO) */
1111	R3PTRTYPE(PPDMDEVINS) pDevInstances;
1112	/** List of registered USB devices. (FIFO) */
1113	R3PTRTYPE(PPDMUSB) pUsbDevs;
1114	/** List of USB devices instances. (FIFO) */
1115	R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1116	/** List of registered drivers. (FIFO) */
1117	R3PTRTYPE(PPDMDRV) pDrvs;
1118	/** The registered firmware device (can be NULL). */
1119	R3PTRTYPE(PPDMFW) pFirmware;
1120	/** PCI Buses. */
1121	PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1122	/** The register PIC device. */
1123	PDMPIC Pic;
1124	/** The registered APIC device. */
1125	PDMAPIC Apic;
1126	/** The registered I/O APIC device. */
1127	PDMIOAPIC IoApic;
1128	/** The registered DMAC device. */
1129	R3PTRTYPE(PPDMDMAC) pDmac;
1130	/** The registered RTC device. */
1131	R3PTRTYPE(PPDMRTC) pRtc;
1132	/** The registered USB HUBs. (FIFO) */
1133	R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1134
1135	/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1136	R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1137	/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1138	R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1139	/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1140	RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1141	/** Pointer to the queue which should be manually flushed - RC Ptr.
1142	* Only touched by EMT. */
1143	RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1144	/** Pointer to the queue which should be manually flushed - R0 Ptr.
1145	* Only touched by EMT. */
1146	R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1147	/** Bitmask controlling the queue flushing.
1148	* See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1149	uint32_t volatile fQueueFlushing;
1150
1151	/** The current IRQ tag (tracing purposes). */
1152	uint32_t volatile uIrqTag;
1153
1154	/** Pending reset flags (PDMVMRESET_F_XXX). */
1155	uint32_t volatile fResetFlags;
1156	/** Alignment padding. */
1157	uint32_t volatile u32Padding;
1158
1159	/** The tracing ID of the next device instance.
1160	*
1161	* @remarks We keep the device tracing ID seperate from the rest as these are
1162	* then more likely to end up with the same ID from one run to
1163	* another, making analysis somewhat easier. Drivers and USB devices
1164	* are more volatile and can be changed at runtime, thus these are much
1165	* less likely to remain stable, so just heap them all together. */
1166	uint32_t idTracingDev;
1167	/** The tracing ID of the next driver instance, USB device instance or other
1168	* PDM entity requiring an ID. */
1169	uint32_t idTracingOther;
1170
1171	/** @name VMM device heap
1172	* @{ */
1173	/** The heap size. */
1174	uint32_t cbVMMDevHeap;
1175	/** Free space. */
1176	uint32_t cbVMMDevHeapLeft;
1177	/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1178	RTR3PTR pvVMMDevHeap;
1179	/** Ring-3 mapping/unmapping notification callback for the user. */
1180	PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1181	/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1182	RTGCPHYS GCPhysVMMDevHeap;
1183	/** @} */
1184
1185	/** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1186	STAMCOUNTER StatQueuedCritSectLeaves;
1187	} PDM;
1188	AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1189	AssertCompileMemberAlignment(PDM, CritSect, 8);
1190	AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1191	/** Pointer to PDM VM instance data. */
1192	typedef PDM *PPDM;
1193
1194
1195
1196	/**
1197	* PDM data kept in the UVM.
1198	*/
1199	typedef struct PDMUSERPERVM
1200	{
1201	/** @todo move more stuff over here. */
1202
1203	/** Linked list of timer driven PDM queues.
1204	* Currently serialized by PDM::CritSect. */
1205	R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1206	/** Linked list of force action driven PDM queues.
1207	* Currently serialized by PDM::CritSect. */
1208	R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1209
1210	/** Lock protecting the lists below it. */
1211	RTCRITSECT ListCritSect;
1212	/** Pointer to list of loaded modules. */
1213	PPDMMOD pModules;
1214	/** List of initialized critical sections. (LIFO) */
1215	R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1216	/** List of initialized read/write critical sections. (LIFO) */
1217	R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1218	/** Head of the PDM Thread list. (singly linked) */
1219	R3PTRTYPE(PPDMTHREAD) pThreads;
1220	/** Tail of the PDM Thread list. (singly linked) */
1221	R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1222
1223	/** @name PDM Async Completion
1224	* @{ */
1225	/** Pointer to the array of supported endpoint classes. */
1226	PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1227	/** Head of the templates. Singly linked, protected by ListCritSect. */
1228	R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1229	/** @} */
1230
1231	/** Global block cache data. */
1232	R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1233	#ifdef VBOX_WITH_NETSHAPER
1234	/** Pointer to network shaper instance. */
1235	R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1236	#endif /* VBOX_WITH_NETSHAPER */
1237
1238	} PDMUSERPERVM;
1239	/** Pointer to the PDM data kept in the UVM. */
1240	typedef PDMUSERPERVM *PPDMUSERPERVM;
1241
1242
1243
1244	/*******************************************************************************
1245	* Global Variables *
1246	*******************************************************************************/
1247	#ifdef IN_RING3
1248	extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1249	extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1250	extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1251	extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1252	extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1253	extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1254	extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1255	extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1256	extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1257	extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1258	extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1259	extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1260	#endif
1261
1262
1263	/*******************************************************************************
1264	* Defined Constants And Macros *
1265	*******************************************************************************/
1266	/** @def PDMDEV_ASSERT_DEVINS
1267	* Asserts the validity of the device instance.
1268	*/
1269	#ifdef VBOX_STRICT
1270	# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1271	do { \
1272	AssertPtr(pDevIns); \
1273	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1274	Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1275	} while (0)
1276	#else
1277	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1278	#endif
1279
1280	/** @def PDMDRV_ASSERT_DRVINS
1281	* Asserts the validity of the driver instance.
1282	*/
1283	#ifdef VBOX_STRICT
1284	# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1285	do { \
1286	AssertPtr(pDrvIns); \
1287	Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1288	Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1289	} while (0)
1290	#else
1291	# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1292	#endif
1293
1294
1295	/*******************************************************************************
1296	* Internal Functions *
1297	*******************************************************************************/
1298	#ifdef IN_RING3
1299	bool pdmR3IsValidName(const char *pszName);
1300
1301	int pdmR3CritSectBothInitStats(PVM pVM);
1302	void pdmR3CritSectBothRelocate(PVM pVM);
1303	int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1304	int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1305	int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1306	const char *pszNameFmt, va_list va);
1307	int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1308	const char *pszNameFmt, ...);
1309	int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1310	const char *pszNameFmt, ...);
1311	int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1312	const char *pszNameFmt, va_list va);
1313	int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1314	const char *pszNameFmt, ...);
1315	int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1316	const char *pszNameFmt, ...);
1317
1318	int pdmR3DevInit(PVM pVM);
1319	int pdmR3DevInitComplete(PVM pVM);
1320	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1321	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1322	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1323
1324	int pdmR3UsbLoadModules(PVM pVM);
1325	int pdmR3UsbInstantiateDevices(PVM pVM);
1326	PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1327	int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1328	int pdmR3UsbVMInitComplete(PVM pVM);
1329
1330	int pdmR3DrvInit(PVM pVM);
1331	int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1332	PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1333	int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1334	void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1335	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1336
1337	int pdmR3LdrInitU(PUVM pUVM);
1338	void pdmR3LdrTermU(PUVM pUVM);
1339	char pdmR3FileR3(const char pszFile, bool fShared);
1340	int pdmR3LoadR3U(PUVM pUVM, const char pszFilename, const char pszName);
1341
1342	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1343
1344	int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1345	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1346	int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1347	PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1348	int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1349	PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1350	int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1351	int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1352	int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1353	void pdmR3ThreadDestroyAll(PVM pVM);
1354	int pdmR3ThreadResumeAll(PVM pVM);
1355	int pdmR3ThreadSuspendAll(PVM pVM);
1356
1357	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1358	int pdmR3AsyncCompletionInit(PVM pVM);
1359	int pdmR3AsyncCompletionTerm(PVM pVM);
1360	void pdmR3AsyncCompletionResume(PVM pVM);
1361	int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1362	int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1363	PFNPDMASYNCCOMPLETEDRV pfnCompleted, void pvTemplateUser, const char pszDesc);
1364	int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1365	int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1366	int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1367	int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1368	#endif
1369
1370	#ifdef VBOX_WITH_NETSHAPER
1371	int pdmR3NetShaperInit(PVM pVM);
1372	int pdmR3NetShaperTerm(PVM pVM);
1373	#endif
1374
1375	int pdmR3BlkCacheInit(PVM pVM);
1376	void pdmR3BlkCacheTerm(PVM pVM);
1377	int pdmR3BlkCacheResume(PVM pVM);
1378
1379	#endif /* IN_RING3 */
1380
1381	void pdmLock(PVM pVM);
1382	int pdmLockEx(PVM pVM, int rc);
1383	void pdmUnlock(PVM pVM);
1384
1385	#if defined(IN_RING3) \|\| defined(IN_RING0)
1386	void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1387	void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1388	#endif
1389
1390	/** @} */
1391
1392	RT_C_DECLS_END
1393
1394	#endif
1395

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source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 64374

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