VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 77922

Last change on this file since 77922 was 76585, checked in by vboxsync, 6 years ago

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1/* $Id: PDMInternal.h 76585 2019-01-01 06:31:29Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_PDMInternal_h
19#define VMM_INCLUDED_SRC_include_PDMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <VBox/types.h>
25#include <VBox/param.h>
26#include <VBox/vmm/cfgm.h>
27#include <VBox/vmm/stam.h>
28#include <VBox/vusb.h>
29#include <VBox/vmm/pdmasynccompletion.h>
30#ifdef VBOX_WITH_NETSHAPER
31# include <VBox/vmm/pdmnetshaper.h>
32#endif
33#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
34# include <VBox/vmm/pdmasynccompletion.h>
35#endif
36#include <VBox/vmm/pdmblkcache.h>
37#include <VBox/vmm/pdmcommon.h>
38#include <VBox/sup.h>
39#include <iprt/assert.h>
40#include <iprt/critsect.h>
41#ifdef IN_RING3
42# include <iprt/thread.h>
43#endif
44
45RT_C_DECLS_BEGIN
46
47
48/** @defgroup grp_pdm_int Internal
49 * @ingroup grp_pdm
50 * @internal
51 * @{
52 */
53
54/** @def PDM_WITH_R3R0_CRIT_SECT
55 * Enables or disabled ring-3/ring-0 critical sections. */
56#if defined(DOXYGEN_RUNNING) || 1
57# define PDM_WITH_R3R0_CRIT_SECT
58#endif
59
60/** @def PDMCRITSECT_STRICT
61 * Enables/disables PDM critsect strictness like deadlock detection. */
62#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
63 || defined(DOXYGEN_RUNNING)
64# define PDMCRITSECT_STRICT
65#endif
66
67/** @def PDMCRITSECT_STRICT
68 * Enables/disables PDM read/write critsect strictness like deadlock
69 * detection. */
70#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
71 || defined(DOXYGEN_RUNNING)
72# define PDMCRITSECTRW_STRICT
73#endif
74
75
76/*******************************************************************************
77* Structures and Typedefs *
78*******************************************************************************/
79
80/** Pointer to a PDM Device. */
81typedef struct PDMDEV *PPDMDEV;
82/** Pointer to a pointer to a PDM Device. */
83typedef PPDMDEV *PPPDMDEV;
84
85/** Pointer to a PDM USB Device. */
86typedef struct PDMUSB *PPDMUSB;
87/** Pointer to a pointer to a PDM USB Device. */
88typedef PPDMUSB *PPPDMUSB;
89
90/** Pointer to a PDM Driver. */
91typedef struct PDMDRV *PPDMDRV;
92/** Pointer to a pointer to a PDM Driver. */
93typedef PPDMDRV *PPPDMDRV;
94
95/** Pointer to a PDM Logical Unit. */
96typedef struct PDMLUN *PPDMLUN;
97/** Pointer to a pointer to a PDM Logical Unit. */
98typedef PPDMLUN *PPPDMLUN;
99
100/** Pointer to a PDM PCI Bus instance. */
101typedef struct PDMPCIBUS *PPDMPCIBUS;
102/** Pointer to a DMAC instance. */
103typedef struct PDMDMAC *PPDMDMAC;
104/** Pointer to a RTC instance. */
105typedef struct PDMRTC *PPDMRTC;
106
107/** Pointer to an USB HUB registration record. */
108typedef struct PDMUSBHUB *PPDMUSBHUB;
109
110/**
111 * Supported asynchronous completion endpoint classes.
112 */
113typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
114{
115 /** File class. */
116 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
117 /** Number of supported classes. */
118 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
119 /** 32bit hack. */
120 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
121} PDMASYNCCOMPLETIONEPCLASSTYPE;
122
123/**
124 * Private device instance data.
125 */
126typedef struct PDMDEVINSINT
127{
128 /** Pointer to the next instance (HC Ptr).
129 * (Head is pointed to by PDM::pDevInstances.) */
130 R3PTRTYPE(PPDMDEVINS) pNextR3;
131 /** Pointer to the next per device instance (HC Ptr).
132 * (Head is pointed to by PDMDEV::pInstances.) */
133 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
134 /** Pointer to device structure - HC Ptr. */
135 R3PTRTYPE(PPDMDEV) pDevR3;
136 /** Pointer to the list of logical units associated with the device. (FIFO) */
137 R3PTRTYPE(PPDMLUN) pLunsR3;
138 /** Pointer to the asynchronous notification callback set while in
139 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
140 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
141 /** Configuration handle to the instance node. */
142 R3PTRTYPE(PCFGMNODE) pCfgHandle;
143
144 /** R3 pointer to the VM this instance was created for. */
145 PVMR3 pVMR3;
146 /** Associated PCI device list head (first is default). (R3 ptr) */
147 R3PTRTYPE(PPDMPCIDEV) pHeadPciDevR3;
148
149 /** R0 pointer to the VM this instance was created for. */
150 PVMR0 pVMR0;
151 /** Associated PCI device list head (first is default). (R0 ptr) */
152 R0PTRTYPE(PPDMPCIDEV) pHeadPciDevR0;
153
154 /** RC pointer to the VM this instance was created for. */
155 PVMRC pVMRC;
156 /** Associated PCI device list head (first is default). (RC ptr) */
157 RCPTRTYPE(PPDMPCIDEV) pHeadPciDevRC;
158
159 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
160 uint32_t fIntFlags;
161 /** The last IRQ tag (for tracing it thru clearing). */
162 uint32_t uLastIrqTag;
163} PDMDEVINSINT;
164
165/** @name PDMDEVINSINT::fIntFlags
166 * @{ */
167/** Used by pdmR3Load to mark device instances it found in the saved state. */
168#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
169/** Indicates that the device hasn't been powered on or resumed.
170 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
171 * to make sure each device gets exactly one notification for each of those
172 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
173 * a failure (already resumed/powered-on devices are suspended).
174 * PDMR3PowerOff resets this flag once before going through the devices to make sure
175 * every device gets the power off notification even if it was suspended before with
176 * PDMR3Suspend.
177 */
178#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
179/** Indicates that the device has been reset already. Used by PDMR3Reset. */
180#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
181/** @} */
182
183
184/**
185 * Private USB device instance data.
186 */
187typedef struct PDMUSBINSINT
188{
189 /** The UUID of this instance. */
190 RTUUID Uuid;
191 /** Pointer to the next instance.
192 * (Head is pointed to by PDM::pUsbInstances.) */
193 R3PTRTYPE(PPDMUSBINS) pNext;
194 /** Pointer to the next per USB device instance.
195 * (Head is pointed to by PDMUSB::pInstances.) */
196 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
197
198 /** Pointer to device structure. */
199 R3PTRTYPE(PPDMUSB) pUsbDev;
200
201 /** Pointer to the VM this instance was created for. */
202 PVMR3 pVM;
203 /** Pointer to the list of logical units associated with the device. (FIFO) */
204 R3PTRTYPE(PPDMLUN) pLuns;
205 /** The per instance device configuration. */
206 R3PTRTYPE(PCFGMNODE) pCfg;
207 /** Same as pCfg if the configuration should be deleted when detaching the device. */
208 R3PTRTYPE(PCFGMNODE) pCfgDelete;
209 /** The global device configuration. */
210 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
211
212 /** Pointer to the USB hub this device is attached to.
213 * This is NULL if the device isn't connected to any HUB. */
214 R3PTRTYPE(PPDMUSBHUB) pHub;
215 /** The port number that we're connected to. */
216 uint32_t iPort;
217 /** Indicates that the USB device hasn't been powered on or resumed.
218 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
219 bool fVMSuspended;
220 /** Indicates that the USB device has been reset. */
221 bool fVMReset;
222 /** Pointer to the asynchronous notification callback set while in
223 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
224 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
225} PDMUSBINSINT;
226
227
228/**
229 * Private driver instance data.
230 */
231typedef struct PDMDRVINSINT
232{
233 /** Pointer to the driver instance above.
234 * This is NULL for the topmost drive. */
235 R3PTRTYPE(PPDMDRVINS) pUp;
236 /** Pointer to the driver instance below.
237 * This is NULL for the bottommost driver. */
238 R3PTRTYPE(PPDMDRVINS) pDown;
239 /** Pointer to the logical unit this driver chained on. */
240 R3PTRTYPE(PPDMLUN) pLun;
241 /** Pointer to driver structure from which this was instantiated. */
242 R3PTRTYPE(PPDMDRV) pDrv;
243 /** Pointer to the VM this instance was created for, ring-3 context. */
244 PVMR3 pVMR3;
245 /** Pointer to the VM this instance was created for, ring-0 context. */
246 PVMR0 pVMR0;
247 /** Pointer to the VM this instance was created for, raw-mode context. */
248 PVMRC pVMRC;
249 /** Flag indicating that the driver is being detached and destroyed.
250 * (Helps detect potential recursive detaching.) */
251 bool fDetaching;
252 /** Indicates that the driver hasn't been powered on or resumed.
253 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
254 bool fVMSuspended;
255 /** Indicates that the driver has been reset already. */
256 bool fVMReset;
257 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
258 bool fHyperHeap;
259 /** Pointer to the asynchronous notification callback set while in
260 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
261 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
262 /** Configuration handle to the instance node. */
263 R3PTRTYPE(PCFGMNODE) pCfgHandle;
264 /** Pointer to the ring-0 request handler function. */
265 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
266} PDMDRVINSINT;
267
268
269/**
270 * Private critical section data.
271 */
272typedef struct PDMCRITSECTINT
273{
274 /** The critical section core which is shared with IPRT.
275 * @note The semaphore is a SUPSEMEVENT. */
276 RTCRITSECT Core;
277 /** Pointer to the next critical section.
278 * This chain is used for relocating pVMRC and device cleanup. */
279 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
280 /** Owner identifier.
281 * This is pDevIns if the owner is a device. Similarly for a driver or service.
282 * PDMR3CritSectInit() sets this to point to the critsect itself. */
283 RTR3PTR pvKey;
284 /** Pointer to the VM - R3Ptr. */
285 PVMR3 pVMR3;
286 /** Pointer to the VM - R0Ptr. */
287 PVMR0 pVMR0;
288 /** Pointer to the VM - GCPtr. */
289 PVMRC pVMRC;
290 /** Set if this critical section is the automatically created default
291 * section of a device. */
292 bool fAutomaticDefaultCritsect;
293 /** Set if the critical section is used by a timer or similar.
294 * See PDMR3DevGetCritSect. */
295 bool fUsedByTimerOrSimilar;
296 /** Alignment padding. */
297 bool afPadding[2];
298 /** Support driver event semaphore that is scheduled to be signaled upon leaving
299 * the critical section. This is only for Ring-3 and Ring-0. */
300 SUPSEMEVENT hEventToSignal;
301 /** The lock name. */
302 R3PTRTYPE(const char *) pszName;
303 /** R0/RC lock contention. */
304 STAMCOUNTER StatContentionRZLock;
305 /** R0/RC unlock contention. */
306 STAMCOUNTER StatContentionRZUnlock;
307 /** R3 lock contention. */
308 STAMCOUNTER StatContentionR3;
309 /** Profiling the time the section is locked. */
310 STAMPROFILEADV StatLocked;
311} PDMCRITSECTINT;
312AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
313/** Pointer to private critical section data. */
314typedef PDMCRITSECTINT *PPDMCRITSECTINT;
315
316/** Indicates that the critical section is queued for unlock.
317 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
318#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
319
320
321/**
322 * Private critical section data.
323 */
324typedef struct PDMCRITSECTRWINT
325{
326 /** The read/write critical section core which is shared with IPRT.
327 * @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
328 RTCRITSECTRW Core;
329
330 /** Pointer to the next critical section.
331 * This chain is used for relocating pVMRC and device cleanup. */
332 R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
333 /** Owner identifier.
334 * This is pDevIns if the owner is a device. Similarly for a driver or service.
335 * PDMR3CritSectInit() sets this to point to the critsect itself. */
336 RTR3PTR pvKey;
337 /** Pointer to the VM - R3Ptr. */
338 PVMR3 pVMR3;
339 /** Pointer to the VM - R0Ptr. */
340 PVMR0 pVMR0;
341 /** Pointer to the VM - GCPtr. */
342 PVMRC pVMRC;
343#if HC_ARCH_BITS == 64
344 /** Alignment padding. */
345 RTRCPTR RCPtrPadding;
346#endif
347 /** The lock name. */
348 R3PTRTYPE(const char *) pszName;
349 /** R0/RC write lock contention. */
350 STAMCOUNTER StatContentionRZEnterExcl;
351 /** R0/RC write unlock contention. */
352 STAMCOUNTER StatContentionRZLeaveExcl;
353 /** R0/RC read lock contention. */
354 STAMCOUNTER StatContentionRZEnterShared;
355 /** R0/RC read unlock contention. */
356 STAMCOUNTER StatContentionRZLeaveShared;
357 /** R0/RC writes. */
358 STAMCOUNTER StatRZEnterExcl;
359 /** R0/RC reads. */
360 STAMCOUNTER StatRZEnterShared;
361 /** R3 write lock contention. */
362 STAMCOUNTER StatContentionR3EnterExcl;
363 /** R3 read lock contention. */
364 STAMCOUNTER StatContentionR3EnterShared;
365 /** R3 writes. */
366 STAMCOUNTER StatR3EnterExcl;
367 /** R3 reads. */
368 STAMCOUNTER StatR3EnterShared;
369 /** Profiling the time the section is write locked. */
370 STAMPROFILEADV StatWriteLocked;
371} PDMCRITSECTRWINT;
372AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
373AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
374/** Pointer to private critical section data. */
375typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
376
377
378
379/**
380 * The usual device/driver/internal/external stuff.
381 */
382typedef enum
383{
384 /** The usual invalid entry. */
385 PDMTHREADTYPE_INVALID = 0,
386 /** Device type. */
387 PDMTHREADTYPE_DEVICE,
388 /** USB Device type. */
389 PDMTHREADTYPE_USB,
390 /** Driver type. */
391 PDMTHREADTYPE_DRIVER,
392 /** Internal type. */
393 PDMTHREADTYPE_INTERNAL,
394 /** External type. */
395 PDMTHREADTYPE_EXTERNAL,
396 /** The usual 32-bit hack. */
397 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
398} PDMTHREADTYPE;
399
400
401/**
402 * The internal structure for the thread.
403 */
404typedef struct PDMTHREADINT
405{
406 /** The VM pointer. */
407 PVMR3 pVM;
408 /** The event semaphore the thread blocks on when not running. */
409 RTSEMEVENTMULTI BlockEvent;
410 /** The event semaphore the thread sleeps on while running. */
411 RTSEMEVENTMULTI SleepEvent;
412 /** Pointer to the next thread. */
413 R3PTRTYPE(struct PDMTHREAD *) pNext;
414 /** The thread type. */
415 PDMTHREADTYPE enmType;
416} PDMTHREADINT;
417
418
419
420/* Must be included after PDMDEVINSINT is defined. */
421#define PDMDEVINSINT_DECLARED
422#define PDMUSBINSINT_DECLARED
423#define PDMDRVINSINT_DECLARED
424#define PDMCRITSECTINT_DECLARED
425#define PDMCRITSECTRWINT_DECLARED
426#define PDMTHREADINT_DECLARED
427#ifdef ___VBox_pdm_h
428# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
429#endif
430RT_C_DECLS_END
431#include <VBox/vmm/pdm.h>
432RT_C_DECLS_BEGIN
433
434/**
435 * PDM Logical Unit.
436 *
437 * This typically the representation of a physical port on a
438 * device, like for instance the PS/2 keyboard port on the
439 * keyboard controller device. The LUNs are chained on the
440 * device the belong to (PDMDEVINSINT::pLunsR3).
441 */
442typedef struct PDMLUN
443{
444 /** The LUN - The Logical Unit Number. */
445 RTUINT iLun;
446 /** Pointer to the next LUN. */
447 PPDMLUN pNext;
448 /** Pointer to the top driver in the driver chain. */
449 PPDMDRVINS pTop;
450 /** Pointer to the bottom driver in the driver chain. */
451 PPDMDRVINS pBottom;
452 /** Pointer to the device instance which the LUN belongs to.
453 * Either this is set or pUsbIns is set. Both is never set at the same time. */
454 PPDMDEVINS pDevIns;
455 /** Pointer to the USB device instance which the LUN belongs to. */
456 PPDMUSBINS pUsbIns;
457 /** Pointer to the device base interface. */
458 PPDMIBASE pBase;
459 /** Description of this LUN. */
460 const char *pszDesc;
461} PDMLUN;
462
463
464/**
465 * PDM Device.
466 */
467typedef struct PDMDEV
468{
469 /** Pointer to the next device (R3 Ptr). */
470 R3PTRTYPE(PPDMDEV) pNext;
471 /** Device name length. (search optimization) */
472 RTUINT cchName;
473 /** Registration structure. */
474 R3PTRTYPE(const struct PDMDEVREG *) pReg;
475 /** Number of instances. */
476 uint32_t cInstances;
477 /** Pointer to chain of instances (R3 Ptr). */
478 PPDMDEVINSR3 pInstances;
479 /** The search path for raw-mode context modules (';' as separator). */
480 char *pszRCSearchPath;
481 /** The search path for ring-0 context modules (';' as separator). */
482 char *pszR0SearchPath;
483} PDMDEV;
484
485
486/**
487 * PDM USB Device.
488 */
489typedef struct PDMUSB
490{
491 /** Pointer to the next device (R3 Ptr). */
492 R3PTRTYPE(PPDMUSB) pNext;
493 /** Device name length. (search optimization) */
494 RTUINT cchName;
495 /** Registration structure. */
496 R3PTRTYPE(const struct PDMUSBREG *) pReg;
497 /** Next instance number. */
498 uint32_t iNextInstance;
499 /** Pointer to chain of instances (R3 Ptr). */
500 R3PTRTYPE(PPDMUSBINS) pInstances;
501} PDMUSB;
502
503
504/**
505 * PDM Driver.
506 */
507typedef struct PDMDRV
508{
509 /** Pointer to the next device. */
510 PPDMDRV pNext;
511 /** Registration structure. */
512 const struct PDMDRVREG * pReg;
513 /** Current number of instances. */
514 uint32_t cInstances;
515 /** The next instance number. */
516 uint32_t iNextInstance;
517 /** The search path for raw-mode context modules (';' as separator). */
518 char *pszRCSearchPath;
519 /** The search path for ring-0 context modules (';' as separator). */
520 char *pszR0SearchPath;
521} PDMDRV;
522
523
524/**
525 * PDM registered PIC device.
526 */
527typedef struct PDMPIC
528{
529 /** Pointer to the PIC device instance - R3. */
530 PPDMDEVINSR3 pDevInsR3;
531 /** @copydoc PDMPICREG::pfnSetIrqR3 */
532 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
533 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
534 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
535
536 /** Pointer to the PIC device instance - R0. */
537 PPDMDEVINSR0 pDevInsR0;
538 /** @copydoc PDMPICREG::pfnSetIrqR3 */
539 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
540 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
541 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
542
543 /** Pointer to the PIC device instance - RC. */
544 PPDMDEVINSRC pDevInsRC;
545 /** @copydoc PDMPICREG::pfnSetIrqR3 */
546 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
547 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
548 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
549 /** Alignment padding. */
550 RTRCPTR RCPtrPadding;
551} PDMPIC;
552
553
554/**
555 * PDM registered APIC device.
556 */
557typedef struct PDMAPIC
558{
559 /** Pointer to the APIC device instance - R3 Ptr. */
560 PPDMDEVINSR3 pDevInsR3;
561 /** Pointer to the APIC device instance - R0 Ptr. */
562 PPDMDEVINSR0 pDevInsR0;
563 /** Pointer to the APIC device instance - RC Ptr. */
564 PPDMDEVINSRC pDevInsRC;
565 uint8_t Alignment[4];
566} PDMAPIC;
567
568
569/**
570 * PDM registered I/O APIC device.
571 */
572typedef struct PDMIOAPIC
573{
574 /** Pointer to the APIC device instance - R3 Ptr. */
575 PPDMDEVINSR3 pDevInsR3;
576 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
577 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
578 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
579 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
580 /** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
581 DECLR3CALLBACKMEMBER(int, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
582
583 /** Pointer to the PIC device instance - R0. */
584 PPDMDEVINSR0 pDevInsR0;
585 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
586 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
587 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
588 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
589 /** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
590 DECLR0CALLBACKMEMBER(int, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
591
592 /** Pointer to the APIC device instance - RC Ptr. */
593 PPDMDEVINSRC pDevInsRC;
594 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
595 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
596 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
597 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
598 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
599 DECLRCCALLBACKMEMBER(int, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
600} PDMIOAPIC;
601
602/** Maximum number of PCI busses for a VM. */
603#define PDM_PCI_BUSSES_MAX 8
604
605
606#ifdef IN_RING3
607/**
608 * PDM registered firmware device.
609 */
610typedef struct PDMFW
611{
612 /** Pointer to the firmware device instance. */
613 PPDMDEVINSR3 pDevIns;
614 /** Copy of the registration structure. */
615 PDMFWREG Reg;
616} PDMFW;
617/** Pointer to a firmware instance. */
618typedef PDMFW *PPDMFW;
619#endif
620
621
622/**
623 * PDM PCI Bus instance.
624 */
625typedef struct PDMPCIBUS
626{
627 /** PCI bus number. */
628 RTUINT iBus;
629 RTUINT uPadding0; /**< Alignment padding.*/
630
631 /** Pointer to PCI Bus device instance. */
632 PPDMDEVINSR3 pDevInsR3;
633 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
634 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
635 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
636 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
637 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
638 /** @copydoc PDMPCIBUSREG::pfnRegisterMsiR3 */
639 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
640 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
641 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
642 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
643 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
644 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead,
645 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
646
647 /** Pointer to the PIC device instance - R0. */
648 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
649 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
650 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
651
652 /** Pointer to PCI Bus device instance. */
653 PPDMDEVINSRC pDevInsRC;
654 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
655 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
656} PDMPCIBUS;
657
658
659#ifdef IN_RING3
660/**
661 * PDM registered DMAC (DMA Controller) device.
662 */
663typedef struct PDMDMAC
664{
665 /** Pointer to the DMAC device instance. */
666 PPDMDEVINSR3 pDevIns;
667 /** Copy of the registration structure. */
668 PDMDMACREG Reg;
669} PDMDMAC;
670
671
672/**
673 * PDM registered RTC (Real Time Clock) device.
674 */
675typedef struct PDMRTC
676{
677 /** Pointer to the RTC device instance. */
678 PPDMDEVINSR3 pDevIns;
679 /** Copy of the registration structure. */
680 PDMRTCREG Reg;
681} PDMRTC;
682
683#endif /* IN_RING3 */
684
685/**
686 * Module type.
687 */
688typedef enum PDMMODTYPE
689{
690 /** Raw-mode (RC) context module. */
691 PDMMOD_TYPE_RC,
692 /** Ring-0 (host) context module. */
693 PDMMOD_TYPE_R0,
694 /** Ring-3 (host) context module. */
695 PDMMOD_TYPE_R3
696} PDMMODTYPE;
697
698
699/** The module name length including the terminator. */
700#define PDMMOD_NAME_LEN 32
701
702/**
703 * Loaded module instance.
704 */
705typedef struct PDMMOD
706{
707 /** Module name. This is used for referring to
708 * the module internally, sort of like a handle. */
709 char szName[PDMMOD_NAME_LEN];
710 /** Module type. */
711 PDMMODTYPE eType;
712 /** Loader module handle. Not used for R0 modules. */
713 RTLDRMOD hLdrMod;
714 /** Loaded address.
715 * This is the 'handle' for R0 modules. */
716 RTUINTPTR ImageBase;
717 /** Old loaded address.
718 * This is used during relocation of GC modules. Not used for R0 modules. */
719 RTUINTPTR OldImageBase;
720 /** Where the R3 HC bits are stored.
721 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
722 void *pvBits;
723
724 /** Pointer to next module. */
725 struct PDMMOD *pNext;
726 /** Module filename. */
727 char szFilename[1];
728} PDMMOD;
729/** Pointer to loaded module instance. */
730typedef PDMMOD *PPDMMOD;
731
732
733
734/** Extra space in the free array. */
735#define PDMQUEUE_FREE_SLACK 16
736
737/**
738 * Queue type.
739 */
740typedef enum PDMQUEUETYPE
741{
742 /** Device consumer. */
743 PDMQUEUETYPE_DEV = 1,
744 /** Driver consumer. */
745 PDMQUEUETYPE_DRV,
746 /** Internal consumer. */
747 PDMQUEUETYPE_INTERNAL,
748 /** External consumer. */
749 PDMQUEUETYPE_EXTERNAL
750} PDMQUEUETYPE;
751
752/** Pointer to a PDM Queue. */
753typedef struct PDMQUEUE *PPDMQUEUE;
754
755/**
756 * PDM Queue.
757 */
758typedef struct PDMQUEUE
759{
760 /** Pointer to the next queue in the list. */
761 R3PTRTYPE(PPDMQUEUE) pNext;
762 /** Type specific data. */
763 union
764 {
765 /** PDMQUEUETYPE_DEV */
766 struct
767 {
768 /** Pointer to consumer function. */
769 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
770 /** Pointer to the device instance owning the queue. */
771 R3PTRTYPE(PPDMDEVINS) pDevIns;
772 } Dev;
773 /** PDMQUEUETYPE_DRV */
774 struct
775 {
776 /** Pointer to consumer function. */
777 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
778 /** Pointer to the driver instance owning the queue. */
779 R3PTRTYPE(PPDMDRVINS) pDrvIns;
780 } Drv;
781 /** PDMQUEUETYPE_INTERNAL */
782 struct
783 {
784 /** Pointer to consumer function. */
785 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
786 } Int;
787 /** PDMQUEUETYPE_EXTERNAL */
788 struct
789 {
790 /** Pointer to consumer function. */
791 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
792 /** Pointer to user argument. */
793 R3PTRTYPE(void *) pvUser;
794 } Ext;
795 } u;
796 /** Queue type. */
797 PDMQUEUETYPE enmType;
798 /** The interval between checking the queue for events.
799 * The realtime timer below is used to do the waiting.
800 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
801 uint32_t cMilliesInterval;
802 /** Interval timer. Only used if cMilliesInterval is non-zero. */
803 PTMTIMERR3 pTimer;
804 /** Pointer to the VM - R3. */
805 PVMR3 pVMR3;
806 /** LIFO of pending items - R3. */
807 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
808 /** Pointer to the VM - R0. */
809 PVMR0 pVMR0;
810 /** LIFO of pending items - R0. */
811 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
812 /** Pointer to the GC VM and indicator for GC enabled queue.
813 * If this is NULL, the queue cannot be used in GC.
814 */
815 PVMRC pVMRC;
816 /** LIFO of pending items - GC. */
817 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
818
819 /** Item size (bytes). */
820 uint32_t cbItem;
821 /** Number of items in the queue. */
822 uint32_t cItems;
823 /** Index to the free head (where we insert). */
824 uint32_t volatile iFreeHead;
825 /** Index to the free tail (where we remove). */
826 uint32_t volatile iFreeTail;
827
828 /** Unique queue name. */
829 R3PTRTYPE(const char *) pszName;
830#if HC_ARCH_BITS == 32
831 RTR3PTR Alignment1;
832#endif
833 /** Stat: Times PDMQueueAlloc fails. */
834 STAMCOUNTER StatAllocFailures;
835 /** Stat: PDMQueueInsert calls. */
836 STAMCOUNTER StatInsert;
837 /** Stat: Queue flushes. */
838 STAMCOUNTER StatFlush;
839 /** Stat: Queue flushes with pending items left over. */
840 STAMCOUNTER StatFlushLeftovers;
841#ifdef VBOX_WITH_STATISTICS
842 /** State: Profiling the flushing. */
843 STAMPROFILE StatFlushPrf;
844 /** State: Pending items. */
845 uint32_t volatile cStatPending;
846 uint32_t volatile cAlignment;
847#endif
848
849 /** Array of pointers to free items. Variable size. */
850 struct PDMQUEUEFREEITEM
851 {
852 /** Pointer to the free item - HC Ptr. */
853 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
854 /** Pointer to the free item - HC Ptr. */
855 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
856 /** Pointer to the free item - GC Ptr. */
857 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
858#if HC_ARCH_BITS == 64
859 RTRCPTR Alignment0;
860#endif
861 } aFreeItems[1];
862} PDMQUEUE;
863
864/** @name PDM::fQueueFlushing
865 * @{ */
866/** Used to make sure only one EMT will flush the queues.
867 * Set when an EMT is flushing queues, clear otherwise. */
868#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
869/** Indicating there are queues with items pending.
870 * This is make sure we don't miss inserts happening during flushing. The FF
871 * cannot be used for this since it has to be cleared immediately to prevent
872 * other EMTs from spinning. */
873#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
874/** @} */
875
876
877/**
878 * Queue device helper task operation.
879 */
880typedef enum PDMDEVHLPTASKOP
881{
882 /** The usual invalid 0 entry. */
883 PDMDEVHLPTASKOP_INVALID = 0,
884 /** ISASetIrq */
885 PDMDEVHLPTASKOP_ISA_SET_IRQ,
886 /** PCISetIrq */
887 PDMDEVHLPTASKOP_PCI_SET_IRQ,
888 /** PCISetIrq */
889 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
890 /** The usual 32-bit hack. */
891 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
892} PDMDEVHLPTASKOP;
893
894/**
895 * Queued Device Helper Task.
896 */
897typedef struct PDMDEVHLPTASK
898{
899 /** The queue item core (don't touch). */
900 PDMQUEUEITEMCORE Core;
901 /** Pointer to the device instance (R3 Ptr). */
902 PPDMDEVINSR3 pDevInsR3;
903 /** This operation to perform. */
904 PDMDEVHLPTASKOP enmOp;
905#if HC_ARCH_BITS == 64
906 uint32_t Alignment0;
907#endif
908 /** Parameters to the operation. */
909 union PDMDEVHLPTASKPARAMS
910 {
911 /**
912 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
913 */
914 struct PDMDEVHLPTASKISASETIRQ
915 {
916 /** The IRQ */
917 int iIrq;
918 /** The new level. */
919 int iLevel;
920 /** The IRQ tag and source. */
921 uint32_t uTagSrc;
922 } IsaSetIRQ, IoApicSetIRQ;
923
924 /**
925 * PDMDEVHLPTASKOP_PCI_SET_IRQ
926 */
927 struct PDMDEVHLPTASKPCISETIRQ
928 {
929 /** Pointer to the PCI device (R3 Ptr). */
930 R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
931 /** The IRQ */
932 int iIrq;
933 /** The new level. */
934 int iLevel;
935 /** The IRQ tag and source. */
936 uint32_t uTagSrc;
937 } PciSetIRQ;
938
939 /** Expanding the structure. */
940 uint64_t au64[3];
941 } u;
942} PDMDEVHLPTASK;
943/** Pointer to a queued Device Helper Task. */
944typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
945/** Pointer to a const queued Device Helper Task. */
946typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
947
948
949
950/**
951 * An USB hub registration record.
952 */
953typedef struct PDMUSBHUB
954{
955 /** The USB versions this hub support.
956 * Note that 1.1 hubs can take on 2.0 devices. */
957 uint32_t fVersions;
958 /** The number of ports on the hub. */
959 uint32_t cPorts;
960 /** The number of available ports (0..cPorts). */
961 uint32_t cAvailablePorts;
962 /** The driver instance of the hub. */
963 PPDMDRVINS pDrvIns;
964 /** Copy of the to the registration structure. */
965 PDMUSBHUBREG Reg;
966
967 /** Pointer to the next hub in the list. */
968 struct PDMUSBHUB *pNext;
969} PDMUSBHUB;
970
971/** Pointer to a const USB HUB registration record. */
972typedef const PDMUSBHUB *PCPDMUSBHUB;
973
974/** Pointer to a PDM Async I/O template. */
975typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
976
977/** Pointer to the main PDM Async completion endpoint class. */
978typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
979
980/** Pointer to the global block cache structure. */
981typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
982
983/**
984 * PDM VMCPU Instance data.
985 * Changes to this must checked against the padding of the pdm union in VMCPU!
986 */
987typedef struct PDMCPU
988{
989 /** The number of entries in the apQueuedCritSectsLeaves table that's currently
990 * in use. */
991 uint32_t cQueuedCritSectLeaves;
992 uint32_t uPadding0; /**< Alignment padding.*/
993 /** Critical sections queued in RC/R0 because of contention preventing leave to
994 * complete. (R3 Ptrs)
995 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
996 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
997
998 /** The number of entries in the apQueuedCritSectRwExclLeaves table that's
999 * currently in use. */
1000 uint32_t cQueuedCritSectRwExclLeaves;
1001 uint32_t uPadding1; /**< Alignment padding.*/
1002 /** Read/write critical sections queued in RC/R0 because of contention
1003 * preventing exclusive leave to complete. (R3 Ptrs)
1004 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1005 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1006
1007 /** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1008 * currently in use. */
1009 uint32_t cQueuedCritSectRwShrdLeaves;
1010 uint32_t uPadding2; /**< Alignment padding.*/
1011 /** Read/write critical sections queued in RC/R0 because of contention
1012 * preventing shared leave to complete. (R3 Ptrs)
1013 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1014 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1015} PDMCPU;
1016
1017
1018/**
1019 * PDM VM Instance data.
1020 * Changes to this must checked against the padding of the cfgm union in VM!
1021 */
1022typedef struct PDM
1023{
1024 /** The PDM lock.
1025 * This is used to protect everything that deals with interrupts, i.e.
1026 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1027 PDMCRITSECT CritSect;
1028 /** The NOP critical section.
1029 * This is a dummy critical section that will not do any thread
1030 * serialization but instead let all threads enter immediately and
1031 * concurrently. */
1032 PDMCRITSECT NopCritSect;
1033
1034 /** List of registered devices. (FIFO) */
1035 R3PTRTYPE(PPDMDEV) pDevs;
1036 /** List of devices instances. (FIFO) */
1037 R3PTRTYPE(PPDMDEVINS) pDevInstances;
1038 /** List of registered USB devices. (FIFO) */
1039 R3PTRTYPE(PPDMUSB) pUsbDevs;
1040 /** List of USB devices instances. (FIFO) */
1041 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1042 /** List of registered drivers. (FIFO) */
1043 R3PTRTYPE(PPDMDRV) pDrvs;
1044 /** The registered firmware device (can be NULL). */
1045 R3PTRTYPE(PPDMFW) pFirmware;
1046 /** PCI Buses. */
1047 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1048 /** The register PIC device. */
1049 PDMPIC Pic;
1050 /** The registered APIC device. */
1051 PDMAPIC Apic;
1052 /** The registered I/O APIC device. */
1053 PDMIOAPIC IoApic;
1054 /** The registered DMAC device. */
1055 R3PTRTYPE(PPDMDMAC) pDmac;
1056 /** The registered RTC device. */
1057 R3PTRTYPE(PPDMRTC) pRtc;
1058 /** The registered USB HUBs. (FIFO) */
1059 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1060
1061 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1062 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1063 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1064 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1065 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1066 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1067 /** Pointer to the queue which should be manually flushed - RC Ptr.
1068 * Only touched by EMT. */
1069 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1070 /** Pointer to the queue which should be manually flushed - R0 Ptr.
1071 * Only touched by EMT. */
1072 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1073 /** Bitmask controlling the queue flushing.
1074 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1075 uint32_t volatile fQueueFlushing;
1076
1077 /** The current IRQ tag (tracing purposes). */
1078 uint32_t volatile uIrqTag;
1079
1080 /** Pending reset flags (PDMVMRESET_F_XXX). */
1081 uint32_t volatile fResetFlags;
1082 /** Alignment padding. */
1083 uint32_t volatile u32Padding;
1084
1085 /** The tracing ID of the next device instance.
1086 *
1087 * @remarks We keep the device tracing ID seperate from the rest as these are
1088 * then more likely to end up with the same ID from one run to
1089 * another, making analysis somewhat easier. Drivers and USB devices
1090 * are more volatile and can be changed at runtime, thus these are much
1091 * less likely to remain stable, so just heap them all together. */
1092 uint32_t idTracingDev;
1093 /** The tracing ID of the next driver instance, USB device instance or other
1094 * PDM entity requiring an ID. */
1095 uint32_t idTracingOther;
1096
1097 /** @name VMM device heap
1098 * @{ */
1099 /** The heap size. */
1100 uint32_t cbVMMDevHeap;
1101 /** Free space. */
1102 uint32_t cbVMMDevHeapLeft;
1103 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1104 RTR3PTR pvVMMDevHeap;
1105 /** Ring-3 mapping/unmapping notification callback for the user. */
1106 PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1107 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1108 RTGCPHYS GCPhysVMMDevHeap;
1109 /** @} */
1110
1111 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1112 STAMCOUNTER StatQueuedCritSectLeaves;
1113} PDM;
1114AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1115AssertCompileMemberAlignment(PDM, CritSect, 8);
1116AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1117/** Pointer to PDM VM instance data. */
1118typedef PDM *PPDM;
1119
1120
1121
1122/**
1123 * PDM data kept in the UVM.
1124 */
1125typedef struct PDMUSERPERVM
1126{
1127 /** @todo move more stuff over here. */
1128
1129 /** Linked list of timer driven PDM queues.
1130 * Currently serialized by PDM::CritSect. */
1131 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1132 /** Linked list of force action driven PDM queues.
1133 * Currently serialized by PDM::CritSect. */
1134 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1135
1136 /** Lock protecting the lists below it. */
1137 RTCRITSECT ListCritSect;
1138 /** Pointer to list of loaded modules. */
1139 PPDMMOD pModules;
1140 /** List of initialized critical sections. (LIFO) */
1141 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1142 /** List of initialized read/write critical sections. (LIFO) */
1143 R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1144 /** Head of the PDM Thread list. (singly linked) */
1145 R3PTRTYPE(PPDMTHREAD) pThreads;
1146 /** Tail of the PDM Thread list. (singly linked) */
1147 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1148
1149 /** @name PDM Async Completion
1150 * @{ */
1151 /** Pointer to the array of supported endpoint classes. */
1152 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1153 /** Head of the templates. Singly linked, protected by ListCritSect. */
1154 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1155 /** @} */
1156
1157 /** Global block cache data. */
1158 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1159#ifdef VBOX_WITH_NETSHAPER
1160 /** Pointer to network shaper instance. */
1161 R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1162#endif /* VBOX_WITH_NETSHAPER */
1163
1164} PDMUSERPERVM;
1165/** Pointer to the PDM data kept in the UVM. */
1166typedef PDMUSERPERVM *PPDMUSERPERVM;
1167
1168
1169
1170/*******************************************************************************
1171* Global Variables *
1172*******************************************************************************/
1173#ifdef IN_RING3
1174extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1175extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1176extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1177extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1178extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1179extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1180extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1181extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1182extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1183extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1184extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1185#endif
1186
1187
1188/*******************************************************************************
1189* Defined Constants And Macros *
1190*******************************************************************************/
1191/** @def PDMDEV_ASSERT_DEVINS
1192 * Asserts the validity of the device instance.
1193 */
1194#ifdef VBOX_STRICT
1195# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1196 do { \
1197 AssertPtr(pDevIns); \
1198 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1199 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1200 } while (0)
1201#else
1202# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1203#endif
1204
1205/** @def PDMDRV_ASSERT_DRVINS
1206 * Asserts the validity of the driver instance.
1207 */
1208#ifdef VBOX_STRICT
1209# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1210 do { \
1211 AssertPtr(pDrvIns); \
1212 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1213 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1214 } while (0)
1215#else
1216# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1217#endif
1218
1219
1220/*******************************************************************************
1221* Internal Functions *
1222*******************************************************************************/
1223#ifdef IN_RING3
1224bool pdmR3IsValidName(const char *pszName);
1225
1226int pdmR3CritSectBothInitStats(PVM pVM);
1227void pdmR3CritSectBothRelocate(PVM pVM);
1228int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1229int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1230int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1231 const char *pszNameFmt, va_list va);
1232int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1233 const char *pszNameFmt, ...);
1234int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1235 const char *pszNameFmt, ...);
1236int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1237 const char *pszNameFmt, va_list va);
1238int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1239 const char *pszNameFmt, ...);
1240int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1241 const char *pszNameFmt, ...);
1242
1243int pdmR3DevInit(PVM pVM);
1244int pdmR3DevInitComplete(PVM pVM);
1245PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1246int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1247DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1248
1249int pdmR3UsbLoadModules(PVM pVM);
1250int pdmR3UsbInstantiateDevices(PVM pVM);
1251PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1252int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1253int pdmR3UsbVMInitComplete(PVM pVM);
1254
1255int pdmR3DrvInit(PVM pVM);
1256int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1257 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1258int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1259void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1260PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1261
1262int pdmR3LdrInitU(PUVM pUVM);
1263void pdmR3LdrTermU(PUVM pUVM);
1264char *pdmR3FileR3(const char *pszFile, bool fShared);
1265int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1266
1267void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1268
1269int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1270 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1271int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1272 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1273int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1274 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1275int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1276int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1277int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1278void pdmR3ThreadDestroyAll(PVM pVM);
1279int pdmR3ThreadResumeAll(PVM pVM);
1280int pdmR3ThreadSuspendAll(PVM pVM);
1281
1282#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1283int pdmR3AsyncCompletionInit(PVM pVM);
1284int pdmR3AsyncCompletionTerm(PVM pVM);
1285void pdmR3AsyncCompletionResume(PVM pVM);
1286int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1287int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1288 PFNPDMASYNCCOMPLETEDRV pfnCompleted, void *pvTemplateUser, const char *pszDesc);
1289int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1290int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1291int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1292int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1293#endif
1294
1295#ifdef VBOX_WITH_NETSHAPER
1296int pdmR3NetShaperInit(PVM pVM);
1297int pdmR3NetShaperTerm(PVM pVM);
1298#endif
1299
1300int pdmR3BlkCacheInit(PVM pVM);
1301void pdmR3BlkCacheTerm(PVM pVM);
1302int pdmR3BlkCacheResume(PVM pVM);
1303
1304#endif /* IN_RING3 */
1305
1306void pdmLock(PVM pVM);
1307int pdmLockEx(PVM pVM, int rc);
1308void pdmUnlock(PVM pVM);
1309
1310#if defined(IN_RING3) || defined(IN_RING0)
1311void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1312void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1313#endif
1314
1315/** @} */
1316
1317RT_C_DECLS_END
1318
1319#endif /* !VMM_INCLUDED_SRC_include_PDMInternal_h */
1320
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