VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 82671

Last change on this file since 82671 was 82067, checked in by vboxsync, 5 years ago

PDM: Doxygen fix. bugref:9218
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1/* $Id: PDMInternal.h 82067 2019-11-21 09:01:45Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_PDMInternal_h
19#define VMM_INCLUDED_SRC_include_PDMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <VBox/types.h>
25#include <VBox/param.h>
26#include <VBox/vmm/cfgm.h>
27#include <VBox/vmm/stam.h>
28#include <VBox/vusb.h>
29#include <VBox/vmm/pdmasynccompletion.h>
30#ifdef VBOX_WITH_NETSHAPER
31# include <VBox/vmm/pdmnetshaper.h>
32#endif
33#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
34# include <VBox/vmm/pdmasynccompletion.h>
35#endif
36#include <VBox/vmm/pdmblkcache.h>
37#include <VBox/vmm/pdmcommon.h>
38#include <VBox/vmm/pdmtask.h>
39#include <VBox/sup.h>
40#include <iprt/assert.h>
41#include <iprt/critsect.h>
42#ifdef IN_RING3
43# include <iprt/thread.h>
44#endif
45
46RT_C_DECLS_BEGIN
47
48
49/** @defgroup grp_pdm_int Internal
50 * @ingroup grp_pdm
51 * @internal
52 * @{
53 */
54
55/** @def PDM_WITH_R3R0_CRIT_SECT
56 * Enables or disabled ring-3/ring-0 critical sections. */
57#if defined(DOXYGEN_RUNNING) || 1
58# define PDM_WITH_R3R0_CRIT_SECT
59#endif
60
61/** @def PDMCRITSECT_STRICT
62 * Enables/disables PDM critsect strictness like deadlock detection. */
63#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
64 || defined(DOXYGEN_RUNNING)
65# define PDMCRITSECT_STRICT
66#endif
67
68/** @def PDMCRITSECT_STRICT
69 * Enables/disables PDM read/write critsect strictness like deadlock
70 * detection. */
71#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
72 || defined(DOXYGEN_RUNNING)
73# define PDMCRITSECTRW_STRICT
74#endif
75
76/** The maximum device instance (total) size, ring-0/raw-mode capable devices. */
77#define PDM_MAX_DEVICE_INSTANCE_SIZE _4M
78/** The maximum device instance (total) size, ring-3 only devices. */
79#define PDM_MAX_DEVICE_INSTANCE_SIZE_R3 _8M
80
81
82
83/*******************************************************************************
84* Structures and Typedefs *
85*******************************************************************************/
86
87/** Pointer to a PDM Device. */
88typedef struct PDMDEV *PPDMDEV;
89/** Pointer to a pointer to a PDM Device. */
90typedef PPDMDEV *PPPDMDEV;
91
92/** Pointer to a PDM USB Device. */
93typedef struct PDMUSB *PPDMUSB;
94/** Pointer to a pointer to a PDM USB Device. */
95typedef PPDMUSB *PPPDMUSB;
96
97/** Pointer to a PDM Driver. */
98typedef struct PDMDRV *PPDMDRV;
99/** Pointer to a pointer to a PDM Driver. */
100typedef PPDMDRV *PPPDMDRV;
101
102/** Pointer to a PDM Logical Unit. */
103typedef struct PDMLUN *PPDMLUN;
104/** Pointer to a pointer to a PDM Logical Unit. */
105typedef PPDMLUN *PPPDMLUN;
106
107/** Pointer to a PDM PCI Bus instance. */
108typedef struct PDMPCIBUS *PPDMPCIBUS;
109/** Pointer to a DMAC instance. */
110typedef struct PDMDMAC *PPDMDMAC;
111/** Pointer to a RTC instance. */
112typedef struct PDMRTC *PPDMRTC;
113
114/** Pointer to an USB HUB registration record. */
115typedef struct PDMUSBHUB *PPDMUSBHUB;
116
117/**
118 * Supported asynchronous completion endpoint classes.
119 */
120typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
121{
122 /** File class. */
123 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
124 /** Number of supported classes. */
125 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
126 /** 32bit hack. */
127 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
128} PDMASYNCCOMPLETIONEPCLASSTYPE;
129
130/**
131 * Private device instance data, ring-3.
132 */
133typedef struct PDMDEVINSINTR3
134{
135 /** Pointer to the next instance.
136 * (Head is pointed to by PDM::pDevInstances.) */
137 R3PTRTYPE(PPDMDEVINS) pNextR3;
138 /** Pointer to the next per device instance.
139 * (Head is pointed to by PDMDEV::pInstances.) */
140 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
141 /** Pointer to device structure. */
142 R3PTRTYPE(PPDMDEV) pDevR3;
143 /** Pointer to the list of logical units associated with the device. (FIFO) */
144 R3PTRTYPE(PPDMLUN) pLunsR3;
145 /** Pointer to the asynchronous notification callback set while in
146 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
147 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
148 /** Configuration handle to the instance node. */
149 R3PTRTYPE(PCFGMNODE) pCfgHandle;
150
151 /** R3 pointer to the VM this instance was created for. */
152 PVMR3 pVMR3;
153
154 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
155 uint32_t fIntFlags;
156 /** The last IRQ tag (for tracing it thru clearing). */
157 uint32_t uLastIrqTag;
158 /** The ring-0 device index (for making ring-0 calls). */
159 uint32_t idxR0Device;
160} PDMDEVINSINTR3;
161
162
163/**
164 * Private device instance data, ring-0.
165 */
166typedef struct PDMDEVINSINTR0
167{
168 /** Pointer to the VM this instance was created for. */
169 R0PTRTYPE(PGVM) pGVM;
170 /** Pointer to device structure. */
171 R0PTRTYPE(struct PDMDEVREGR0 const *) pRegR0;
172 /** The ring-0 module reference. */
173 RTR0PTR hMod;
174 /** Pointer to the ring-0 mapping of the ring-3 internal data (for uLastIrqTag). */
175 R0PTRTYPE(PDMDEVINSINTR3 *) pIntR3R0;
176 /** Pointer to the ring-0 mapping of the ring-3 instance (for idTracing). */
177 R0PTRTYPE(struct PDMDEVINSR3 *) pInsR3R0;
178 /** The device instance memory. */
179 RTR0MEMOBJ hMemObj;
180 /** The ring-3 mapping object. */
181 RTR0MEMOBJ hMapObj;
182 /** Index into PDMR0PERVM::apDevInstances. */
183 uint32_t idxR0Device;
184} PDMDEVINSINTR0;
185
186
187/**
188 * Private device instance data, raw-mode
189 */
190typedef struct PDMDEVINSINTRC
191{
192 /** Pointer to the VM this instance was created for. */
193 RGPTRTYPE(PVM) pVMRC;
194} PDMDEVINSINTRC;
195
196
197/**
198 * Private device instance data.
199 */
200typedef struct PDMDEVINSINT
201{
202 /** Pointer to the next instance (HC Ptr).
203 * (Head is pointed to by PDM::pDevInstances.) */
204 R3PTRTYPE(PPDMDEVINS) pNextR3;
205 /** Pointer to the next per device instance (HC Ptr).
206 * (Head is pointed to by PDMDEV::pInstances.) */
207 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
208 /** Pointer to device structure - HC Ptr. */
209 R3PTRTYPE(PPDMDEV) pDevR3;
210 /** Pointer to the list of logical units associated with the device. (FIFO) */
211 R3PTRTYPE(PPDMLUN) pLunsR3;
212 /** Pointer to the asynchronous notification callback set while in
213 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
214 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
215 /** Configuration handle to the instance node. */
216 R3PTRTYPE(PCFGMNODE) pCfgHandle;
217
218 /** R3 pointer to the VM this instance was created for. */
219 PVMR3 pVMR3;
220
221 /** R0 pointer to the VM this instance was created for. */
222 R0PTRTYPE(PVMCC) pVMR0;
223
224 /** RC pointer to the VM this instance was created for. */
225 PVMRC pVMRC;
226
227 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
228 uint32_t fIntFlags;
229 /** The last IRQ tag (for tracing it thru clearing). */
230 uint32_t uLastIrqTag;
231} PDMDEVINSINT;
232
233/** @name PDMDEVINSINT::fIntFlags
234 * @{ */
235/** Used by pdmR3Load to mark device instances it found in the saved state. */
236#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
237/** Indicates that the device hasn't been powered on or resumed.
238 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
239 * to make sure each device gets exactly one notification for each of those
240 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
241 * a failure (already resumed/powered-on devices are suspended).
242 * PDMR3PowerOff resets this flag once before going through the devices to make sure
243 * every device gets the power off notification even if it was suspended before with
244 * PDMR3Suspend.
245 */
246#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
247/** Indicates that the device has been reset already. Used by PDMR3Reset. */
248#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
249#define PDMDEVINSINT_FLAGS_R0_ENABLED RT_BIT_32(3)
250#define PDMDEVINSINT_FLAGS_RC_ENABLED RT_BIT_32(4)
251/** Set if we've called the ring-0 constructor. */
252#define PDMDEVINSINT_FLAGS_R0_CONTRUCT RT_BIT_32(5)
253/** Set if using non-default critical section. */
254#define PDMDEVINSINT_FLAGS_CHANGED_CRITSECT RT_BIT_32(6)
255/** @} */
256
257
258/**
259 * Private USB device instance data.
260 */
261typedef struct PDMUSBINSINT
262{
263 /** The UUID of this instance. */
264 RTUUID Uuid;
265 /** Pointer to the next instance.
266 * (Head is pointed to by PDM::pUsbInstances.) */
267 R3PTRTYPE(PPDMUSBINS) pNext;
268 /** Pointer to the next per USB device instance.
269 * (Head is pointed to by PDMUSB::pInstances.) */
270 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
271
272 /** Pointer to device structure. */
273 R3PTRTYPE(PPDMUSB) pUsbDev;
274
275 /** Pointer to the VM this instance was created for. */
276 PVMR3 pVM;
277 /** Pointer to the list of logical units associated with the device. (FIFO) */
278 R3PTRTYPE(PPDMLUN) pLuns;
279 /** The per instance device configuration. */
280 R3PTRTYPE(PCFGMNODE) pCfg;
281 /** Same as pCfg if the configuration should be deleted when detaching the device. */
282 R3PTRTYPE(PCFGMNODE) pCfgDelete;
283 /** The global device configuration. */
284 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
285
286 /** Pointer to the USB hub this device is attached to.
287 * This is NULL if the device isn't connected to any HUB. */
288 R3PTRTYPE(PPDMUSBHUB) pHub;
289 /** The port number that we're connected to. */
290 uint32_t iPort;
291 /** Indicates that the USB device hasn't been powered on or resumed.
292 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
293 bool fVMSuspended;
294 /** Indicates that the USB device has been reset. */
295 bool fVMReset;
296 /** Pointer to the asynchronous notification callback set while in
297 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
298 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
299} PDMUSBINSINT;
300
301
302/**
303 * Private driver instance data.
304 */
305typedef struct PDMDRVINSINT
306{
307 /** Pointer to the driver instance above.
308 * This is NULL for the topmost drive. */
309 R3PTRTYPE(PPDMDRVINS) pUp;
310 /** Pointer to the driver instance below.
311 * This is NULL for the bottommost driver. */
312 R3PTRTYPE(PPDMDRVINS) pDown;
313 /** Pointer to the logical unit this driver chained on. */
314 R3PTRTYPE(PPDMLUN) pLun;
315 /** Pointer to driver structure from which this was instantiated. */
316 R3PTRTYPE(PPDMDRV) pDrv;
317 /** Pointer to the VM this instance was created for, ring-3 context. */
318 PVMR3 pVMR3;
319 /** Pointer to the VM this instance was created for, ring-0 context. */
320 R0PTRTYPE(PVMCC) pVMR0;
321 /** Pointer to the VM this instance was created for, raw-mode context. */
322 PVMRC pVMRC;
323 /** Flag indicating that the driver is being detached and destroyed.
324 * (Helps detect potential recursive detaching.) */
325 bool fDetaching;
326 /** Indicates that the driver hasn't been powered on or resumed.
327 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
328 bool fVMSuspended;
329 /** Indicates that the driver has been reset already. */
330 bool fVMReset;
331 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
332 bool fHyperHeap;
333 /** Pointer to the asynchronous notification callback set while in
334 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
335 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
336 /** Configuration handle to the instance node. */
337 R3PTRTYPE(PCFGMNODE) pCfgHandle;
338 /** Pointer to the ring-0 request handler function. */
339 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
340} PDMDRVINSINT;
341
342
343/**
344 * Private critical section data.
345 */
346typedef struct PDMCRITSECTINT
347{
348 /** The critical section core which is shared with IPRT.
349 * @note The semaphore is a SUPSEMEVENT. */
350 RTCRITSECT Core;
351 /** Pointer to the next critical section.
352 * This chain is used for relocating pVMRC and device cleanup. */
353 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
354 /** Owner identifier.
355 * This is pDevIns if the owner is a device. Similarly for a driver or service.
356 * PDMR3CritSectInit() sets this to point to the critsect itself. */
357 RTR3PTR pvKey;
358 /** Pointer to the VM - R3Ptr. */
359 PVMR3 pVMR3;
360 /** Pointer to the VM - R0Ptr. */
361 R0PTRTYPE(PVMCC) pVMR0;
362 /** Pointer to the VM - GCPtr. */
363 PVMRC pVMRC;
364 /** Set if this critical section is the automatically created default
365 * section of a device. */
366 bool fAutomaticDefaultCritsect;
367 /** Set if the critical section is used by a timer or similar.
368 * See PDMR3DevGetCritSect. */
369 bool fUsedByTimerOrSimilar;
370 /** Alignment padding. */
371 bool afPadding[2];
372 /** Support driver event semaphore that is scheduled to be signaled upon leaving
373 * the critical section. This is only for Ring-3 and Ring-0. */
374 SUPSEMEVENT hEventToSignal;
375 /** The lock name. */
376 R3PTRTYPE(const char *) pszName;
377 /** R0/RC lock contention. */
378 STAMCOUNTER StatContentionRZLock;
379 /** R0/RC unlock contention. */
380 STAMCOUNTER StatContentionRZUnlock;
381 /** R3 lock contention. */
382 STAMCOUNTER StatContentionR3;
383 /** Profiling the time the section is locked. */
384 STAMPROFILEADV StatLocked;
385} PDMCRITSECTINT;
386AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
387/** Pointer to private critical section data. */
388typedef PDMCRITSECTINT *PPDMCRITSECTINT;
389
390/** Indicates that the critical section is queued for unlock.
391 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
392#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
393
394
395/**
396 * Private critical section data.
397 */
398typedef struct PDMCRITSECTRWINT
399{
400 /** The read/write critical section core which is shared with IPRT.
401 * @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
402 RTCRITSECTRW Core;
403
404 /** Pointer to the next critical section.
405 * This chain is used for relocating pVMRC and device cleanup. */
406 R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
407 /** Owner identifier.
408 * This is pDevIns if the owner is a device. Similarly for a driver or service.
409 * PDMR3CritSectInit() sets this to point to the critsect itself. */
410 RTR3PTR pvKey;
411 /** Pointer to the VM - R3Ptr. */
412 PVMR3 pVMR3;
413 /** Pointer to the VM - R0Ptr. */
414 R0PTRTYPE(PVMCC) pVMR0;
415 /** Pointer to the VM - GCPtr. */
416 PVMRC pVMRC;
417#if HC_ARCH_BITS == 64
418 /** Alignment padding. */
419 RTRCPTR RCPtrPadding;
420#endif
421 /** The lock name. */
422 R3PTRTYPE(const char *) pszName;
423 /** R0/RC write lock contention. */
424 STAMCOUNTER StatContentionRZEnterExcl;
425 /** R0/RC write unlock contention. */
426 STAMCOUNTER StatContentionRZLeaveExcl;
427 /** R0/RC read lock contention. */
428 STAMCOUNTER StatContentionRZEnterShared;
429 /** R0/RC read unlock contention. */
430 STAMCOUNTER StatContentionRZLeaveShared;
431 /** R0/RC writes. */
432 STAMCOUNTER StatRZEnterExcl;
433 /** R0/RC reads. */
434 STAMCOUNTER StatRZEnterShared;
435 /** R3 write lock contention. */
436 STAMCOUNTER StatContentionR3EnterExcl;
437 /** R3 read lock contention. */
438 STAMCOUNTER StatContentionR3EnterShared;
439 /** R3 writes. */
440 STAMCOUNTER StatR3EnterExcl;
441 /** R3 reads. */
442 STAMCOUNTER StatR3EnterShared;
443 /** Profiling the time the section is write locked. */
444 STAMPROFILEADV StatWriteLocked;
445} PDMCRITSECTRWINT;
446AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
447AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
448/** Pointer to private critical section data. */
449typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
450
451
452
453/**
454 * The usual device/driver/internal/external stuff.
455 */
456typedef enum
457{
458 /** The usual invalid entry. */
459 PDMTHREADTYPE_INVALID = 0,
460 /** Device type. */
461 PDMTHREADTYPE_DEVICE,
462 /** USB Device type. */
463 PDMTHREADTYPE_USB,
464 /** Driver type. */
465 PDMTHREADTYPE_DRIVER,
466 /** Internal type. */
467 PDMTHREADTYPE_INTERNAL,
468 /** External type. */
469 PDMTHREADTYPE_EXTERNAL,
470 /** The usual 32-bit hack. */
471 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
472} PDMTHREADTYPE;
473
474
475/**
476 * The internal structure for the thread.
477 */
478typedef struct PDMTHREADINT
479{
480 /** The VM pointer. */
481 PVMR3 pVM;
482 /** The event semaphore the thread blocks on when not running. */
483 RTSEMEVENTMULTI BlockEvent;
484 /** The event semaphore the thread sleeps on while running. */
485 RTSEMEVENTMULTI SleepEvent;
486 /** Pointer to the next thread. */
487 R3PTRTYPE(struct PDMTHREAD *) pNext;
488 /** The thread type. */
489 PDMTHREADTYPE enmType;
490} PDMTHREADINT;
491
492
493
494/* Must be included after PDMDEVINSINT is defined. */
495#define PDMDEVINSINT_DECLARED
496#define PDMUSBINSINT_DECLARED
497#define PDMDRVINSINT_DECLARED
498#define PDMCRITSECTINT_DECLARED
499#define PDMCRITSECTRWINT_DECLARED
500#define PDMTHREADINT_DECLARED
501#ifdef ___VBox_pdm_h
502# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
503#endif
504RT_C_DECLS_END
505#include <VBox/vmm/pdm.h>
506RT_C_DECLS_BEGIN
507
508/**
509 * PDM Logical Unit.
510 *
511 * This typically the representation of a physical port on a
512 * device, like for instance the PS/2 keyboard port on the
513 * keyboard controller device. The LUNs are chained on the
514 * device they belong to (PDMDEVINSINT::pLunsR3).
515 */
516typedef struct PDMLUN
517{
518 /** The LUN - The Logical Unit Number. */
519 RTUINT iLun;
520 /** Pointer to the next LUN. */
521 PPDMLUN pNext;
522 /** Pointer to the top driver in the driver chain. */
523 PPDMDRVINS pTop;
524 /** Pointer to the bottom driver in the driver chain. */
525 PPDMDRVINS pBottom;
526 /** Pointer to the device instance which the LUN belongs to.
527 * Either this is set or pUsbIns is set. Both is never set at the same time. */
528 PPDMDEVINS pDevIns;
529 /** Pointer to the USB device instance which the LUN belongs to. */
530 PPDMUSBINS pUsbIns;
531 /** Pointer to the device base interface. */
532 PPDMIBASE pBase;
533 /** Description of this LUN. */
534 const char *pszDesc;
535} PDMLUN;
536
537
538/**
539 * PDM Device, ring-3.
540 */
541typedef struct PDMDEV
542{
543 /** Pointer to the next device (R3 Ptr). */
544 R3PTRTYPE(PPDMDEV) pNext;
545 /** Device name length. (search optimization) */
546 uint32_t cchName;
547 /** Registration structure. */
548 R3PTRTYPE(const struct PDMDEVREGR3 *) pReg;
549 /** Number of instances. */
550 uint32_t cInstances;
551 /** Pointer to chain of instances (R3 Ptr). */
552 PPDMDEVINSR3 pInstances;
553 /** The search path for raw-mode context modules (';' as separator). */
554 char *pszRCSearchPath;
555 /** The search path for ring-0 context modules (';' as separator). */
556 char *pszR0SearchPath;
557} PDMDEV;
558
559
560#if 0
561/**
562 * PDM Device, ring-0.
563 */
564typedef struct PDMDEVR0
565{
566 /** Pointer to the next device. */
567 R0PTRTYPE(PPDMDEVR0) pNext;
568 /** Device name length. (search optimization) */
569 uint32_t cchName;
570 /** Registration structure. */
571 R3PTRTYPE(const struct PDMDEVREGR0 *) pReg;
572 /** Number of instances. */
573 uint32_t cInstances;
574 /** Pointer to chain of instances. */
575 PPDMDEVINSR0 pInstances;
576} PDMDEVR0;
577#endif
578
579
580/**
581 * PDM USB Device.
582 */
583typedef struct PDMUSB
584{
585 /** Pointer to the next device (R3 Ptr). */
586 R3PTRTYPE(PPDMUSB) pNext;
587 /** Device name length. (search optimization) */
588 RTUINT cchName;
589 /** Registration structure. */
590 R3PTRTYPE(const struct PDMUSBREG *) pReg;
591 /** Next instance number. */
592 uint32_t iNextInstance;
593 /** Pointer to chain of instances (R3 Ptr). */
594 R3PTRTYPE(PPDMUSBINS) pInstances;
595} PDMUSB;
596
597
598/**
599 * PDM Driver.
600 */
601typedef struct PDMDRV
602{
603 /** Pointer to the next device. */
604 PPDMDRV pNext;
605 /** Registration structure. */
606 const struct PDMDRVREG * pReg;
607 /** Current number of instances. */
608 uint32_t cInstances;
609 /** The next instance number. */
610 uint32_t iNextInstance;
611 /** The search path for raw-mode context modules (';' as separator). */
612 char *pszRCSearchPath;
613 /** The search path for ring-0 context modules (';' as separator). */
614 char *pszR0SearchPath;
615} PDMDRV;
616
617
618/**
619 * PDM registered PIC device.
620 */
621typedef struct PDMPIC
622{
623 /** Pointer to the PIC device instance - R3. */
624 PPDMDEVINSR3 pDevInsR3;
625 /** @copydoc PDMPICREG::pfnSetIrq */
626 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
627 /** @copydoc PDMPICREG::pfnGetInterrupt */
628 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
629
630 /** Pointer to the PIC device instance - R0. */
631 PPDMDEVINSR0 pDevInsR0;
632 /** @copydoc PDMPICREG::pfnSetIrq */
633 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
634 /** @copydoc PDMPICREG::pfnGetInterrupt */
635 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
636
637 /** Pointer to the PIC device instance - RC. */
638 PPDMDEVINSRC pDevInsRC;
639 /** @copydoc PDMPICREG::pfnSetIrq */
640 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
641 /** @copydoc PDMPICREG::pfnGetInterrupt */
642 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
643 /** Alignment padding. */
644 RTRCPTR RCPtrPadding;
645} PDMPIC;
646
647
648/**
649 * PDM registered APIC device.
650 */
651typedef struct PDMAPIC
652{
653 /** Pointer to the APIC device instance - R3 Ptr. */
654 PPDMDEVINSR3 pDevInsR3;
655 /** Pointer to the APIC device instance - R0 Ptr. */
656 PPDMDEVINSR0 pDevInsR0;
657 /** Pointer to the APIC device instance - RC Ptr. */
658 PPDMDEVINSRC pDevInsRC;
659 uint8_t Alignment[4];
660} PDMAPIC;
661
662
663/**
664 * PDM registered I/O APIC device.
665 */
666typedef struct PDMIOAPIC
667{
668 /** Pointer to the APIC device instance - R3 Ptr. */
669 PPDMDEVINSR3 pDevInsR3;
670 /** @copydoc PDMIOAPICREG::pfnSetIrq */
671 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
672 /** @copydoc PDMIOAPICREG::pfnSendMsi */
673 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
674 /** @copydoc PDMIOAPICREG::pfnSetEoi */
675 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
676
677 /** Pointer to the PIC device instance - R0. */
678 PPDMDEVINSR0 pDevInsR0;
679 /** @copydoc PDMIOAPICREG::pfnSetIrq */
680 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
681 /** @copydoc PDMIOAPICREG::pfnSendMsi */
682 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
683 /** @copydoc PDMIOAPICREG::pfnSetEoi */
684 DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
685
686 /** Pointer to the APIC device instance - RC Ptr. */
687 PPDMDEVINSRC pDevInsRC;
688 /** @copydoc PDMIOAPICREG::pfnSetIrq */
689 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
690 /** @copydoc PDMIOAPICREG::pfnSendMsi */
691 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
692 /** @copydoc PDMIOAPICREG::pfnSendMsi */
693 DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
694} PDMIOAPIC;
695
696/** Maximum number of PCI busses for a VM. */
697#define PDM_PCI_BUSSES_MAX 8
698
699
700#ifdef IN_RING3
701/**
702 * PDM registered firmware device.
703 */
704typedef struct PDMFW
705{
706 /** Pointer to the firmware device instance. */
707 PPDMDEVINSR3 pDevIns;
708 /** Copy of the registration structure. */
709 PDMFWREG Reg;
710} PDMFW;
711/** Pointer to a firmware instance. */
712typedef PDMFW *PPDMFW;
713#endif
714
715
716/**
717 * PDM PCI bus instance.
718 */
719typedef struct PDMPCIBUS
720{
721 /** PCI bus number. */
722 uint32_t iBus;
723 uint32_t uPadding0; /**< Alignment padding.*/
724
725 /** Pointer to PCI bus device instance. */
726 PPDMDEVINSR3 pDevInsR3;
727 /** @copydoc PDMPCIBUSREGR3::pfnSetIrqR3 */
728 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
729
730 /** @copydoc PDMPCIBUSREGR3::pfnRegisterR3 */
731 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
732 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
733 /** @copydoc PDMPCIBUSREGR3::pfnRegisterMsiR3 */
734 DECLR3CALLBACKMEMBER(int, pfnRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
735 /** @copydoc PDMPCIBUSREGR3::pfnIORegionRegisterR3 */
736 DECLR3CALLBACKMEMBER(int, pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
737 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
738 uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback));
739 /** @copydoc PDMPCIBUSREGR3::pfnInterceptConfigAccesses */
740 DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
741 PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
742 /** @copydoc PDMPCIBUSREGR3::pfnConfigWrite */
743 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
744 uint32_t uAddress, unsigned cb, uint32_t u32Value));
745 /** @copydoc PDMPCIBUSREGR3::pfnConfigRead */
746 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
747 uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
748} PDMPCIBUS;
749
750
751/**
752 * Ring-0 PDM PCI bus instance data.
753 */
754typedef struct PDMPCIBUSR0
755{
756 /** PCI bus number. */
757 uint32_t iBus;
758 uint32_t uPadding0; /**< Alignment padding.*/
759 /** Pointer to PCI bus device instance. */
760 PPDMDEVINSR0 pDevInsR0;
761 /** @copydoc PDMPCIBUSREGR0::pfnSetIrq */
762 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
763} PDMPCIBUSR0;
764/** Pointer to the ring-0 PCI bus data. */
765typedef PDMPCIBUSR0 *PPDMPCIBUSR0;
766
767#ifdef IN_RING3
768/**
769 * PDM registered DMAC (DMA Controller) device.
770 */
771typedef struct PDMDMAC
772{
773 /** Pointer to the DMAC device instance. */
774 PPDMDEVINSR3 pDevIns;
775 /** Copy of the registration structure. */
776 PDMDMACREG Reg;
777} PDMDMAC;
778
779
780/**
781 * PDM registered RTC (Real Time Clock) device.
782 */
783typedef struct PDMRTC
784{
785 /** Pointer to the RTC device instance. */
786 PPDMDEVINSR3 pDevIns;
787 /** Copy of the registration structure. */
788 PDMRTCREG Reg;
789} PDMRTC;
790
791#endif /* IN_RING3 */
792
793/**
794 * Module type.
795 */
796typedef enum PDMMODTYPE
797{
798 /** Raw-mode (RC) context module. */
799 PDMMOD_TYPE_RC,
800 /** Ring-0 (host) context module. */
801 PDMMOD_TYPE_R0,
802 /** Ring-3 (host) context module. */
803 PDMMOD_TYPE_R3
804} PDMMODTYPE;
805
806
807/** The module name length including the terminator. */
808#define PDMMOD_NAME_LEN 32
809
810/**
811 * Loaded module instance.
812 */
813typedef struct PDMMOD
814{
815 /** Module name. This is used for referring to
816 * the module internally, sort of like a handle. */
817 char szName[PDMMOD_NAME_LEN];
818 /** Module type. */
819 PDMMODTYPE eType;
820 /** Loader module handle. Not used for R0 modules. */
821 RTLDRMOD hLdrMod;
822 /** Loaded address.
823 * This is the 'handle' for R0 modules. */
824 RTUINTPTR ImageBase;
825 /** Old loaded address.
826 * This is used during relocation of GC modules. Not used for R0 modules. */
827 RTUINTPTR OldImageBase;
828 /** Where the R3 HC bits are stored.
829 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
830 void *pvBits;
831
832 /** Pointer to next module. */
833 struct PDMMOD *pNext;
834 /** Module filename. */
835 char szFilename[1];
836} PDMMOD;
837/** Pointer to loaded module instance. */
838typedef PDMMOD *PPDMMOD;
839
840
841
842/** Extra space in the free array. */
843#define PDMQUEUE_FREE_SLACK 16
844
845/**
846 * Queue type.
847 */
848typedef enum PDMQUEUETYPE
849{
850 /** Device consumer. */
851 PDMQUEUETYPE_DEV = 1,
852 /** Driver consumer. */
853 PDMQUEUETYPE_DRV,
854 /** Internal consumer. */
855 PDMQUEUETYPE_INTERNAL,
856 /** External consumer. */
857 PDMQUEUETYPE_EXTERNAL
858} PDMQUEUETYPE;
859
860/** Pointer to a PDM Queue. */
861typedef struct PDMQUEUE *PPDMQUEUE;
862
863/**
864 * PDM Queue.
865 */
866typedef struct PDMQUEUE
867{
868 /** Pointer to the next queue in the list. */
869 R3PTRTYPE(PPDMQUEUE) pNext;
870 /** Type specific data. */
871 union
872 {
873 /** PDMQUEUETYPE_DEV */
874 struct
875 {
876 /** Pointer to consumer function. */
877 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
878 /** Pointer to the device instance owning the queue. */
879 R3PTRTYPE(PPDMDEVINS) pDevIns;
880 } Dev;
881 /** PDMQUEUETYPE_DRV */
882 struct
883 {
884 /** Pointer to consumer function. */
885 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
886 /** Pointer to the driver instance owning the queue. */
887 R3PTRTYPE(PPDMDRVINS) pDrvIns;
888 } Drv;
889 /** PDMQUEUETYPE_INTERNAL */
890 struct
891 {
892 /** Pointer to consumer function. */
893 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
894 } Int;
895 /** PDMQUEUETYPE_EXTERNAL */
896 struct
897 {
898 /** Pointer to consumer function. */
899 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
900 /** Pointer to user argument. */
901 R3PTRTYPE(void *) pvUser;
902 } Ext;
903 } u;
904 /** Queue type. */
905 PDMQUEUETYPE enmType;
906 /** The interval between checking the queue for events.
907 * The realtime timer below is used to do the waiting.
908 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
909 uint32_t cMilliesInterval;
910 /** Interval timer. Only used if cMilliesInterval is non-zero. */
911 PTMTIMERR3 pTimer;
912 /** Pointer to the VM - R3. */
913 PVMR3 pVMR3;
914 /** LIFO of pending items - R3. */
915 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
916 /** Pointer to the VM - R0. */
917 PVMR0 pVMR0;
918 /** LIFO of pending items - R0. */
919 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
920 /** Pointer to the GC VM and indicator for GC enabled queue.
921 * If this is NULL, the queue cannot be used in GC.
922 */
923 PVMRC pVMRC;
924 /** LIFO of pending items - GC. */
925 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
926
927 /** Item size (bytes). */
928 uint32_t cbItem;
929 /** Number of items in the queue. */
930 uint32_t cItems;
931 /** Index to the free head (where we insert). */
932 uint32_t volatile iFreeHead;
933 /** Index to the free tail (where we remove). */
934 uint32_t volatile iFreeTail;
935
936 /** Unique queue name. */
937 R3PTRTYPE(const char *) pszName;
938#if HC_ARCH_BITS == 32
939 RTR3PTR Alignment1;
940#endif
941 /** Stat: Times PDMQueueAlloc fails. */
942 STAMCOUNTER StatAllocFailures;
943 /** Stat: PDMQueueInsert calls. */
944 STAMCOUNTER StatInsert;
945 /** Stat: Queue flushes. */
946 STAMCOUNTER StatFlush;
947 /** Stat: Queue flushes with pending items left over. */
948 STAMCOUNTER StatFlushLeftovers;
949#ifdef VBOX_WITH_STATISTICS
950 /** State: Profiling the flushing. */
951 STAMPROFILE StatFlushPrf;
952 /** State: Pending items. */
953 uint32_t volatile cStatPending;
954 uint32_t volatile cAlignment;
955#endif
956
957 /** Array of pointers to free items. Variable size. */
958 struct PDMQUEUEFREEITEM
959 {
960 /** Pointer to the free item - HC Ptr. */
961 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
962 /** Pointer to the free item - HC Ptr. */
963 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
964 /** Pointer to the free item - GC Ptr. */
965 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
966#if HC_ARCH_BITS == 64
967 RTRCPTR Alignment0;
968#endif
969 } aFreeItems[1];
970} PDMQUEUE;
971
972/** @name PDM::fQueueFlushing
973 * @{ */
974/** Used to make sure only one EMT will flush the queues.
975 * Set when an EMT is flushing queues, clear otherwise. */
976#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
977/** Indicating there are queues with items pending.
978 * This is make sure we don't miss inserts happening during flushing. The FF
979 * cannot be used for this since it has to be cleared immediately to prevent
980 * other EMTs from spinning. */
981#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
982/** @} */
983
984
985/** @name PDM task structures.
986 * @{ */
987
988/**
989 * A asynchronous user mode task.
990 */
991typedef struct PDMTASK
992{
993 /** Task owner type. */
994 PDMTASKTYPE volatile enmType;
995 /** Queue flags. */
996 uint32_t volatile fFlags;
997 /** User argument for the callback. */
998 R3PTRTYPE(void *) volatile pvUser;
999 /** The callback (will be cast according to enmType before callout). */
1000 R3PTRTYPE(PFNRT) volatile pfnCallback;
1001 /** The owner identifier. */
1002 R3PTRTYPE(void *) volatile pvOwner;
1003 /** Task name. */
1004 R3PTRTYPE(const char *) pszName;
1005 /** Number of times already triggered when PDMTaskTrigger was called. */
1006 uint32_t volatile cAlreadyTrigged;
1007 /** Number of runs. */
1008 uint32_t cRuns;
1009} PDMTASK;
1010/** Pointer to a PDM task. */
1011typedef PDMTASK *PPDMTASK;
1012
1013/**
1014 * A task set.
1015 *
1016 * This is served by one task executor thread.
1017 */
1018typedef struct PDMTASKSET
1019{
1020 /** Magic value (PDMTASKSET_MAGIC). */
1021 uint32_t u32Magic;
1022 /** Set if this task set works for ring-0 and raw-mode. */
1023 bool fRZEnabled;
1024 /** Number of allocated taks. */
1025 uint8_t volatile cAllocated;
1026 /** Base handle value for this set. */
1027 uint16_t uHandleBase;
1028 /** The task executor thread. */
1029 R3PTRTYPE(RTTHREAD) hThread;
1030 /** Event semaphore for waking up the thread when fRZEnabled is set. */
1031 SUPSEMEVENT hEventR0;
1032 /** Event semaphore for waking up the thread when fRZEnabled is clear. */
1033 R3PTRTYPE(RTSEMEVENT) hEventR3;
1034 /** The VM pointer. */
1035 PVM pVM;
1036 /** Padding so fTriggered is in its own cacheline. */
1037 uint64_t au64Padding2[3];
1038
1039 /** Bitmask of triggered tasks. */
1040 uint64_t volatile fTriggered;
1041 /** Shutdown thread indicator. */
1042 bool volatile fShutdown;
1043 /** Padding. */
1044 bool volatile afPadding3[3];
1045 /** Task currently running, UINT32_MAX if idle. */
1046 uint32_t volatile idxRunning;
1047 /** Padding so fTriggered and fShutdown are in their own cacheline. */
1048 uint64_t volatile au64Padding3[6];
1049
1050 /** The individual tasks. (Unallocated tasks have NULL pvOwner.) */
1051 PDMTASK aTasks[64];
1052} PDMTASKSET;
1053AssertCompileMemberAlignment(PDMTASKSET, fTriggered, 64);
1054AssertCompileMemberAlignment(PDMTASKSET, aTasks, 64);
1055/** Magic value for PDMTASKSET::u32Magic. */
1056#define PDMTASKSET_MAGIC UINT32_C(0x19320314)
1057/** Pointer to a task set. */
1058typedef PDMTASKSET *PPDMTASKSET;
1059
1060/** @} */
1061
1062
1063/**
1064 * Queue device helper task operation.
1065 */
1066typedef enum PDMDEVHLPTASKOP
1067{
1068 /** The usual invalid 0 entry. */
1069 PDMDEVHLPTASKOP_INVALID = 0,
1070 /** ISASetIrq */
1071 PDMDEVHLPTASKOP_ISA_SET_IRQ,
1072 /** PCISetIrq */
1073 PDMDEVHLPTASKOP_PCI_SET_IRQ,
1074 /** PCISetIrq */
1075 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
1076 /** The usual 32-bit hack. */
1077 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
1078} PDMDEVHLPTASKOP;
1079
1080/**
1081 * Queued Device Helper Task.
1082 */
1083typedef struct PDMDEVHLPTASK
1084{
1085 /** The queue item core (don't touch). */
1086 PDMQUEUEITEMCORE Core;
1087 /** Pointer to the device instance (R3 Ptr). */
1088 PPDMDEVINSR3 pDevInsR3;
1089 /** This operation to perform. */
1090 PDMDEVHLPTASKOP enmOp;
1091#if HC_ARCH_BITS == 64
1092 uint32_t Alignment0;
1093#endif
1094 /** Parameters to the operation. */
1095 union PDMDEVHLPTASKPARAMS
1096 {
1097 /**
1098 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
1099 */
1100 struct PDMDEVHLPTASKISASETIRQ
1101 {
1102 /** The IRQ */
1103 int iIrq;
1104 /** The new level. */
1105 int iLevel;
1106 /** The IRQ tag and source. */
1107 uint32_t uTagSrc;
1108 } IsaSetIRQ, IoApicSetIRQ;
1109
1110 /**
1111 * PDMDEVHLPTASKOP_PCI_SET_IRQ
1112 */
1113 struct PDMDEVHLPTASKPCISETIRQ
1114 {
1115 /** Pointer to the PCI device (R3 Ptr). */
1116 R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
1117 /** The IRQ */
1118 int iIrq;
1119 /** The new level. */
1120 int iLevel;
1121 /** The IRQ tag and source. */
1122 uint32_t uTagSrc;
1123 } PciSetIRQ;
1124
1125 /** Expanding the structure. */
1126 uint64_t au64[3];
1127 } u;
1128} PDMDEVHLPTASK;
1129/** Pointer to a queued Device Helper Task. */
1130typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
1131/** Pointer to a const queued Device Helper Task. */
1132typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
1133
1134
1135
1136/**
1137 * An USB hub registration record.
1138 */
1139typedef struct PDMUSBHUB
1140{
1141 /** The USB versions this hub support.
1142 * Note that 1.1 hubs can take on 2.0 devices. */
1143 uint32_t fVersions;
1144 /** The number of ports on the hub. */
1145 uint32_t cPorts;
1146 /** The number of available ports (0..cPorts). */
1147 uint32_t cAvailablePorts;
1148 /** The driver instance of the hub. */
1149 PPDMDRVINS pDrvIns;
1150 /** Copy of the to the registration structure. */
1151 PDMUSBHUBREG Reg;
1152
1153 /** Pointer to the next hub in the list. */
1154 struct PDMUSBHUB *pNext;
1155} PDMUSBHUB;
1156
1157/** Pointer to a const USB HUB registration record. */
1158typedef const PDMUSBHUB *PCPDMUSBHUB;
1159
1160/** Pointer to a PDM Async I/O template. */
1161typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
1162
1163/** Pointer to the main PDM Async completion endpoint class. */
1164typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
1165
1166/** Pointer to the global block cache structure. */
1167typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
1168
1169/**
1170 * PDM VMCPU Instance data.
1171 * Changes to this must checked against the padding of the pdm union in VMCPU!
1172 */
1173typedef struct PDMCPU
1174{
1175 /** The number of entries in the apQueuedCritSectsLeaves table that's currently
1176 * in use. */
1177 uint32_t cQueuedCritSectLeaves;
1178 uint32_t uPadding0; /**< Alignment padding.*/
1179 /** Critical sections queued in RC/R0 because of contention preventing leave to
1180 * complete. (R3 Ptrs)
1181 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1182 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
1183
1184 /** The number of entries in the apQueuedCritSectRwExclLeaves table that's
1185 * currently in use. */
1186 uint32_t cQueuedCritSectRwExclLeaves;
1187 uint32_t uPadding1; /**< Alignment padding.*/
1188 /** Read/write critical sections queued in RC/R0 because of contention
1189 * preventing exclusive leave to complete. (R3 Ptrs)
1190 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1191 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1192
1193 /** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1194 * currently in use. */
1195 uint32_t cQueuedCritSectRwShrdLeaves;
1196 uint32_t uPadding2; /**< Alignment padding.*/
1197 /** Read/write critical sections queued in RC/R0 because of contention
1198 * preventing shared leave to complete. (R3 Ptrs)
1199 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1200 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1201} PDMCPU;
1202
1203
1204/**
1205 * PDM VM Instance data.
1206 * Changes to this must checked against the padding of the cfgm union in VM!
1207 */
1208typedef struct PDM
1209{
1210 /** The PDM lock.
1211 * This is used to protect everything that deals with interrupts, i.e.
1212 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1213 PDMCRITSECT CritSect;
1214 /** The NOP critical section.
1215 * This is a dummy critical section that will not do any thread
1216 * serialization but instead let all threads enter immediately and
1217 * concurrently. */
1218 PDMCRITSECT NopCritSect;
1219
1220 /** The ring-0 capable task sets (max 128). */
1221 PDMTASKSET aTaskSets[2];
1222 /** Pointer to task sets (max 512). */
1223 R3PTRTYPE(PPDMTASKSET) apTaskSets[8];
1224
1225 /** PCI Buses. */
1226 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1227 /** The register PIC device. */
1228 PDMPIC Pic;
1229 /** The registered APIC device. */
1230 PDMAPIC Apic;
1231 /** The registered I/O APIC device. */
1232 PDMIOAPIC IoApic;
1233 /** The registered HPET device. */
1234 PPDMDEVINSR3 pHpet;
1235
1236 /** List of registered devices. (FIFO) */
1237 R3PTRTYPE(PPDMDEV) pDevs;
1238 /** List of devices instances. (FIFO) */
1239 R3PTRTYPE(PPDMDEVINS) pDevInstances;
1240 /** List of registered USB devices. (FIFO) */
1241 R3PTRTYPE(PPDMUSB) pUsbDevs;
1242 /** List of USB devices instances. (FIFO) */
1243 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1244 /** List of registered drivers. (FIFO) */
1245 R3PTRTYPE(PPDMDRV) pDrvs;
1246 /** The registered firmware device (can be NULL). */
1247 R3PTRTYPE(PPDMFW) pFirmware;
1248 /** The registered DMAC device. */
1249 R3PTRTYPE(PPDMDMAC) pDmac;
1250 /** The registered RTC device. */
1251 R3PTRTYPE(PPDMRTC) pRtc;
1252 /** The registered USB HUBs. (FIFO) */
1253 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1254
1255 /** @name Queues
1256 * @{ */
1257 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1258 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1259 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1260 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1261 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1262 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1263 /** Pointer to the queue which should be manually flushed - RC Ptr.
1264 * Only touched by EMT. */
1265 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1266 /** Pointer to the queue which should be manually flushed - R0 Ptr.
1267 * Only touched by EMT. */
1268 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1269 /** Bitmask controlling the queue flushing.
1270 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1271 uint32_t volatile fQueueFlushing;
1272 /** @} */
1273
1274 /** The current IRQ tag (tracing purposes). */
1275 uint32_t volatile uIrqTag;
1276
1277 /** Pending reset flags (PDMVMRESET_F_XXX). */
1278 uint32_t volatile fResetFlags;
1279
1280 /** Set by pdmR3LoadExec for use in assertions. */
1281 bool fStateLoaded;
1282 /** Alignment padding. */
1283 bool afPadding[3];
1284
1285 /** The tracing ID of the next device instance.
1286 *
1287 * @remarks We keep the device tracing ID seperate from the rest as these are
1288 * then more likely to end up with the same ID from one run to
1289 * another, making analysis somewhat easier. Drivers and USB devices
1290 * are more volatile and can be changed at runtime, thus these are much
1291 * less likely to remain stable, so just heap them all together. */
1292 uint32_t idTracingDev;
1293 /** The tracing ID of the next driver instance, USB device instance or other
1294 * PDM entity requiring an ID. */
1295 uint32_t idTracingOther;
1296
1297 /** @name VMM device heap
1298 * @{ */
1299 /** The heap size. */
1300 uint32_t cbVMMDevHeap;
1301 /** Free space. */
1302 uint32_t cbVMMDevHeapLeft;
1303 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1304 RTR3PTR pvVMMDevHeap;
1305 /** Ring-3 mapping/unmapping notification callback for the user. */
1306 PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1307 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1308 RTGCPHYS GCPhysVMMDevHeap;
1309 /** @} */
1310
1311 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1312 STAMCOUNTER StatQueuedCritSectLeaves;
1313} PDM;
1314AssertCompileMemberAlignment(PDM, CritSect, 8);
1315AssertCompileMemberAlignment(PDM, aTaskSets, 64);
1316AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1317AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1318/** Pointer to PDM VM instance data. */
1319typedef PDM *PPDM;
1320
1321
1322/**
1323 * PDM data kept in the ring-0 GVM.
1324 */
1325typedef struct PDMR0PERVM
1326{
1327 /** PCI Buses, ring-0 data. */
1328 PDMPCIBUSR0 aPciBuses[PDM_PCI_BUSSES_MAX];
1329 /** Number of valid ring-0 device instances (apDevInstances). */
1330 uint32_t cDevInstances;
1331 uint32_t u32Padding;
1332 /** Pointer to ring-0 device instances. */
1333 R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[190];
1334} PDMR0PERVM;
1335
1336
1337/**
1338 * PDM data kept in the UVM.
1339 */
1340typedef struct PDMUSERPERVM
1341{
1342 /** @todo move more stuff over here. */
1343
1344 /** Linked list of timer driven PDM queues.
1345 * Currently serialized by PDM::CritSect. */
1346 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1347 /** Linked list of force action driven PDM queues.
1348 * Currently serialized by PDM::CritSect. */
1349 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1350
1351 /** Lock protecting the lists below it. */
1352 RTCRITSECT ListCritSect;
1353 /** Pointer to list of loaded modules. */
1354 PPDMMOD pModules;
1355 /** List of initialized critical sections. (LIFO) */
1356 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1357 /** List of initialized read/write critical sections. (LIFO) */
1358 R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1359 /** Head of the PDM Thread list. (singly linked) */
1360 R3PTRTYPE(PPDMTHREAD) pThreads;
1361 /** Tail of the PDM Thread list. (singly linked) */
1362 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1363
1364 /** @name PDM Async Completion
1365 * @{ */
1366 /** Pointer to the array of supported endpoint classes. */
1367 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1368 /** Head of the templates. Singly linked, protected by ListCritSect. */
1369 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1370 /** @} */
1371
1372 /** Global block cache data. */
1373 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1374#ifdef VBOX_WITH_NETSHAPER
1375 /** Pointer to network shaper instance. */
1376 R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1377#endif /* VBOX_WITH_NETSHAPER */
1378
1379} PDMUSERPERVM;
1380/** Pointer to the PDM data kept in the UVM. */
1381typedef PDMUSERPERVM *PPDMUSERPERVM;
1382
1383
1384
1385/*******************************************************************************
1386* Global Variables *
1387*******************************************************************************/
1388#ifdef IN_RING3
1389extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1390extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1391extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1392extern const PDMPICHLP g_pdmR3DevPicHlp;
1393extern const PDMIOAPICHLP g_pdmR3DevIoApicHlp;
1394extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1395extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1396extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1397extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1398extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1399extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1400#endif
1401
1402
1403/*******************************************************************************
1404* Defined Constants And Macros *
1405*******************************************************************************/
1406/** @def PDMDEV_ASSERT_DEVINS
1407 * Asserts the validity of the device instance.
1408 */
1409#ifdef VBOX_STRICT
1410# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1411 do { \
1412 AssertPtr(pDevIns); \
1413 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1414 Assert(pDevIns->CTX_SUFF(pvInstanceDataFor) == (void *)&pDevIns->achInstanceData[0]); \
1415 } while (0)
1416#else
1417# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1418#endif
1419
1420/** @def PDMDRV_ASSERT_DRVINS
1421 * Asserts the validity of the driver instance.
1422 */
1423#ifdef VBOX_STRICT
1424# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1425 do { \
1426 AssertPtr(pDrvIns); \
1427 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1428 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1429 } while (0)
1430#else
1431# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1432#endif
1433
1434
1435/*******************************************************************************
1436* Internal Functions *
1437*******************************************************************************/
1438#ifdef IN_RING3
1439bool pdmR3IsValidName(const char *pszName);
1440
1441int pdmR3CritSectBothInitStats(PVM pVM);
1442void pdmR3CritSectBothRelocate(PVM pVM);
1443int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1444int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1445int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1446 const char *pszNameFmt, va_list va);
1447int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1448 const char *pszNameFmt, ...);
1449int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1450 const char *pszNameFmt, ...);
1451int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1452 const char *pszNameFmt, va_list va);
1453int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1454 const char *pszNameFmt, ...);
1455int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1456 const char *pszNameFmt, ...);
1457
1458int pdmR3DevInit(PVM pVM);
1459int pdmR3DevInitComplete(PVM pVM);
1460PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1461int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1462DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1463
1464int pdmR3UsbLoadModules(PVM pVM);
1465int pdmR3UsbInstantiateDevices(PVM pVM);
1466PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1467int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1468int pdmR3UsbVMInitComplete(PVM pVM);
1469
1470int pdmR3DrvInit(PVM pVM);
1471int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1472 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1473int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1474void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1475PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1476
1477int pdmR3LdrInitU(PUVM pUVM);
1478void pdmR3LdrTermU(PUVM pUVM);
1479char *pdmR3FileR3(const char *pszFile, bool fShared);
1480int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1481
1482void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1483
1484int pdmR3TaskInit(PVM pVM);
1485void pdmR3TaskTerm(PVM pVM);
1486
1487int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1488 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1489int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1490 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1491int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1492 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1493int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1494int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1495int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1496void pdmR3ThreadDestroyAll(PVM pVM);
1497int pdmR3ThreadResumeAll(PVM pVM);
1498int pdmR3ThreadSuspendAll(PVM pVM);
1499
1500#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1501int pdmR3AsyncCompletionInit(PVM pVM);
1502int pdmR3AsyncCompletionTerm(PVM pVM);
1503void pdmR3AsyncCompletionResume(PVM pVM);
1504int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1505int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1506 PFNPDMASYNCCOMPLETEDRV pfnCompleted, void *pvTemplateUser, const char *pszDesc);
1507int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1508int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1509int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1510int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1511#endif
1512
1513#ifdef VBOX_WITH_NETSHAPER
1514int pdmR3NetShaperInit(PVM pVM);
1515int pdmR3NetShaperTerm(PVM pVM);
1516#endif
1517
1518int pdmR3BlkCacheInit(PVM pVM);
1519void pdmR3BlkCacheTerm(PVM pVM);
1520int pdmR3BlkCacheResume(PVM pVM);
1521
1522#endif /* IN_RING3 */
1523
1524void pdmLock(PVMCC pVM);
1525int pdmLockEx(PVMCC pVM, int rc);
1526void pdmUnlock(PVMCC pVM);
1527
1528#if defined(IN_RING3) || defined(IN_RING0)
1529void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1530void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1531#endif
1532
1533/** @} */
1534
1535RT_C_DECLS_END
1536
1537#endif /* !VMM_INCLUDED_SRC_include_PDMInternal_h */
1538
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