PDMInternal.h@ 89924

Last change on this file since 89924 was 89621, checked in by vboxsync, 4 years ago
Intel IOMMU: bugref:9967 Comment.
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1	/* $Id: PDMInternal.h 89621 2021-06-11 08:53:55Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef VMM_INCLUDED_SRC_include_PDMInternal_h
19	#define VMM_INCLUDED_SRC_include_PDMInternal_h
20	#ifndef RT_WITHOUT_PRAGMA_ONCE
21	# pragma once
22	#endif
23
24	#include <VBox/types.h>
25	#include <VBox/param.h>
26	#include <VBox/vmm/cfgm.h>
27	#include <VBox/vmm/stam.h>
28	#include <VBox/vusb.h>
29	#include <VBox/vmm/iom.h>
30	#include <VBox/vmm/pdmasynccompletion.h>
31	#ifdef VBOX_WITH_NETSHAPER
32	# include <VBox/vmm/pdmnetshaper.h>
33	#endif
34	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
35	# include <VBox/vmm/pdmasynccompletion.h>
36	#endif
37	#include <VBox/vmm/pdmblkcache.h>
38	#include <VBox/vmm/pdmcommon.h>
39	#include <VBox/vmm/pdmtask.h>
40	#include <VBox/sup.h>
41	#include <VBox/msi.h>
42	#include <iprt/assert.h>
43	#include <iprt/critsect.h>
44	#ifdef IN_RING3
45	# include <iprt/thread.h>
46	#endif
47
48	RT_C_DECLS_BEGIN
49
50
51	/** @defgroup grp_pdm_int Internal
52	* @ingroup grp_pdm
53	* @internal
54	* @{
55	*/
56
57	/** @def PDM_WITH_R3R0_CRIT_SECT
58	* Enables or disabled ring-3/ring-0 critical sections. */
59	#if defined(DOXYGEN_RUNNING) \|\| 1
60	# define PDM_WITH_R3R0_CRIT_SECT
61	#endif
62
63	/** @def PDMCRITSECT_STRICT
64	* Enables/disables PDM critsect strictness like deadlock detection. */
65	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
66	\|\| defined(DOXYGEN_RUNNING)
67	# define PDMCRITSECT_STRICT
68	#endif
69
70	/** @def PDMCRITSECT_STRICT
71	* Enables/disables PDM read/write critsect strictness like deadlock
72	* detection. */
73	#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
74	\|\| defined(DOXYGEN_RUNNING)
75	# define PDMCRITSECTRW_STRICT
76	#endif
77
78	/** The maximum device instance (total) size, ring-0/raw-mode capable devices. */
79	#define PDM_MAX_DEVICE_INSTANCE_SIZE _4M
80	/** The maximum device instance (total) size, ring-3 only devices. */
81	#define PDM_MAX_DEVICE_INSTANCE_SIZE_R3 _8M
82	/** The maximum size for the DBGF tracing tracking structure allocated for each device. */
83	#define PDM_MAX_DEVICE_DBGF_TRACING_TRACK PAGE_SIZE
84
85
86
87	/*******************************************************************************
88	* Structures and Typedefs *
89	*******************************************************************************/
90
91	/** Pointer to a PDM Device. */
92	typedef struct PDMDEV *PPDMDEV;
93	/** Pointer to a pointer to a PDM Device. */
94	typedef PPDMDEV *PPPDMDEV;
95
96	/** Pointer to a PDM USB Device. */
97	typedef struct PDMUSB *PPDMUSB;
98	/** Pointer to a pointer to a PDM USB Device. */
99	typedef PPDMUSB *PPPDMUSB;
100
101	/** Pointer to a PDM Driver. */
102	typedef struct PDMDRV *PPDMDRV;
103	/** Pointer to a pointer to a PDM Driver. */
104	typedef PPDMDRV *PPPDMDRV;
105
106	/** Pointer to a PDM Logical Unit. */
107	typedef struct PDMLUN *PPDMLUN;
108	/** Pointer to a pointer to a PDM Logical Unit. */
109	typedef PPDMLUN *PPPDMLUN;
110
111	/** Pointer to a DMAC instance. */
112	typedef struct PDMDMAC *PPDMDMAC;
113	/** Pointer to a RTC instance. */
114	typedef struct PDMRTC *PPDMRTC;
115
116	/** Pointer to an USB HUB registration record. */
117	typedef struct PDMUSBHUB *PPDMUSBHUB;
118
119	/**
120	* Supported asynchronous completion endpoint classes.
121	*/
122	typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
123	{
124	/** File class. */
125	PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
126	/** Number of supported classes. */
127	PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
128	/** 32bit hack. */
129	PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
130	} PDMASYNCCOMPLETIONEPCLASSTYPE;
131
132
133	/**
134	* MMIO/IO port registration tracking structure for DBGF tracing.
135	*/
136	typedef struct PDMDEVINSDBGFTRACK
137	{
138	/** Flag whether this tracks a IO port or MMIO registration. */
139	bool fMmio;
140	/** Opaque user data passed during registration. */
141	void *pvUser;
142	/** Type dependent data. */
143	union
144	{
145	/** I/O port registration. */
146	struct
147	{
148	/** IOM I/O port handle. */
149	IOMIOPORTHANDLE hIoPorts;
150	/** Original OUT handler of the device. */
151	PFNIOMIOPORTNEWOUT pfnOut;
152	/** Original IN handler of the device. */
153	PFNIOMIOPORTNEWIN pfnIn;
154	/** Original string OUT handler of the device. */
155	PFNIOMIOPORTNEWOUTSTRING pfnOutStr;
156	/** Original string IN handler of the device. */
157	PFNIOMIOPORTNEWINSTRING pfnInStr;
158	} IoPort;
159	/** MMIO registration. */
160	struct
161	{
162	/** IOM MMIO region handle. */
163	IOMMMIOHANDLE hMmioRegion;
164	/** Original MMIO write handler of the device. */
165	PFNIOMMMIONEWWRITE pfnWrite;
166	/** Original MMIO read handler of the device. */
167	PFNIOMMMIONEWREAD pfnRead;
168	/** Original MMIO fill handler of the device. */
169	PFNIOMMMIONEWFILL pfnFill;
170	} Mmio;
171	} u;
172	} PDMDEVINSDBGFTRACK;
173	/** Pointer to a MMIO/IO port registration tracking structure. */
174	typedef PDMDEVINSDBGFTRACK *PPDMDEVINSDBGFTRACK;
175	/** Pointer to a const MMIO/IO port registration tracking structure. */
176	typedef const PDMDEVINSDBGFTRACK *PCPDMDEVINSDBGFTRACK;
177
178
179	/**
180	* Private device instance data, ring-3.
181	*/
182	typedef struct PDMDEVINSINTR3
183	{
184	/** Pointer to the next instance.
185	* (Head is pointed to by PDM::pDevInstances.) */
186	R3PTRTYPE(PPDMDEVINS) pNextR3;
187	/** Pointer to the next per device instance.
188	* (Head is pointed to by PDMDEV::pInstances.) */
189	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
190	/** Pointer to device structure. */
191	R3PTRTYPE(PPDMDEV) pDevR3;
192	/** Pointer to the list of logical units associated with the device. (FIFO) */
193	R3PTRTYPE(PPDMLUN) pLunsR3;
194	/** Pointer to the asynchronous notification callback set while in
195	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
196	R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
197	/** Configuration handle to the instance node. */
198	R3PTRTYPE(PCFGMNODE) pCfgHandle;
199
200	/** R3 pointer to the VM this instance was created for. */
201	PVMR3 pVMR3;
202	/** DBGF trace event source handle if tracing is configured. */
203	DBGFTRACEREVTSRC hDbgfTraceEvtSrc;
204	/** Pointer to the base of the page containing the DBGF tracing tracking structures. */
205	PPDMDEVINSDBGFTRACK paDbgfTraceTrack;
206	/** Index of the next entry to use for tracking. */
207	uint32_t idxDbgfTraceTrackNext;
208	/** Maximum number of records fitting into the single page. */
209	uint32_t cDbgfTraceTrackMax;
210
211	/** Flags, see PDMDEVINSINT_FLAGS_XXX. */
212	uint32_t fIntFlags;
213	/** The last IRQ tag (for tracing it thru clearing). */
214	uint32_t uLastIrqTag;
215	/** The ring-0 device index (for making ring-0 calls). */
216	uint32_t idxR0Device;
217	} PDMDEVINSINTR3;
218
219
220	/**
221	* Private device instance data, ring-0.
222	*/
223	typedef struct PDMDEVINSINTR0
224	{
225	/** Pointer to the VM this instance was created for. */
226	R0PTRTYPE(PGVM) pGVM;
227	/** Pointer to device structure. */
228	R0PTRTYPE(struct PDMDEVREGR0 const *) pRegR0;
229	/** The ring-0 module reference. */
230	RTR0PTR hMod;
231	/** Pointer to the ring-0 mapping of the ring-3 internal data (for uLastIrqTag). */
232	R0PTRTYPE(PDMDEVINSINTR3 *) pIntR3R0;
233	/** Pointer to the ring-0 mapping of the ring-3 instance (for idTracing). */
234	R0PTRTYPE(struct PDMDEVINSR3 *) pInsR3R0;
235	/** DBGF trace event source handle if tracing is configured. */
236	DBGFTRACEREVTSRC hDbgfTraceEvtSrc;
237	/** The device instance memory. */
238	RTR0MEMOBJ hMemObj;
239	/** The ring-3 mapping object. */
240	RTR0MEMOBJ hMapObj;
241	/** The page memory object for tracking MMIO and I/O port registrations when tracing is configured. */
242	RTR0MEMOBJ hDbgfTraceObj;
243	/** Pointer to the base of the page containing the DBGF tracing tracking structures. */
244	PPDMDEVINSDBGFTRACK paDbgfTraceTrack;
245	/** Index of the next entry to use for tracking. */
246	uint32_t idxDbgfTraceTrackNext;
247	/** Maximum number of records fitting into the single page. */
248	uint32_t cDbgfTraceTrackMax;
249	/** Index into PDMR0PERVM::apDevInstances. */
250	uint32_t idxR0Device;
251	} PDMDEVINSINTR0;
252
253
254	/**
255	* Private device instance data, raw-mode
256	*/
257	typedef struct PDMDEVINSINTRC
258	{
259	/** Pointer to the VM this instance was created for. */
260	RGPTRTYPE(PVM) pVMRC;
261	} PDMDEVINSINTRC;
262
263
264	/**
265	* Private device instance data.
266	*/
267	typedef struct PDMDEVINSINT
268	{
269	/** Pointer to the next instance (HC Ptr).
270	* (Head is pointed to by PDM::pDevInstances.) */
271	R3PTRTYPE(PPDMDEVINS) pNextR3;
272	/** Pointer to the next per device instance (HC Ptr).
273	* (Head is pointed to by PDMDEV::pInstances.) */
274	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
275	/** Pointer to device structure - HC Ptr. */
276	R3PTRTYPE(PPDMDEV) pDevR3;
277	/** Pointer to the list of logical units associated with the device. (FIFO) */
278	R3PTRTYPE(PPDMLUN) pLunsR3;
279	/** Pointer to the asynchronous notification callback set while in
280	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
281	R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
282	/** Configuration handle to the instance node. */
283	R3PTRTYPE(PCFGMNODE) pCfgHandle;
284
285	/** R3 pointer to the VM this instance was created for. */
286	PVMR3 pVMR3;
287
288	/** R0 pointer to the VM this instance was created for. */
289	R0PTRTYPE(PVMCC) pVMR0;
290
291	/** RC pointer to the VM this instance was created for. */
292	PVMRC pVMRC;
293
294	/** Flags, see PDMDEVINSINT_FLAGS_XXX. */
295	uint32_t fIntFlags;
296	/** The last IRQ tag (for tracing it thru clearing). */
297	uint32_t uLastIrqTag;
298	} PDMDEVINSINT;
299
300	/** @name PDMDEVINSINT::fIntFlags
301	* @{ */
302	/** Used by pdmR3Load to mark device instances it found in the saved state. */
303	#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
304	/** Indicates that the device hasn't been powered on or resumed.
305	* This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
306	* to make sure each device gets exactly one notification for each of those
307	* events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
308	* a failure (already resumed/powered-on devices are suspended).
309	* PDMR3PowerOff resets this flag once before going through the devices to make sure
310	* every device gets the power off notification even if it was suspended before with
311	* PDMR3Suspend.
312	*/
313	#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
314	/** Indicates that the device has been reset already. Used by PDMR3Reset. */
315	#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
316	#define PDMDEVINSINT_FLAGS_R0_ENABLED RT_BIT_32(3)
317	#define PDMDEVINSINT_FLAGS_RC_ENABLED RT_BIT_32(4)
318	/** Set if we've called the ring-0 constructor. */
319	#define PDMDEVINSINT_FLAGS_R0_CONTRUCT RT_BIT_32(5)
320	/** Set if using non-default critical section. */
321	#define PDMDEVINSINT_FLAGS_CHANGED_CRITSECT RT_BIT_32(6)
322	/** @} */
323
324
325	/**
326	* Private USB device instance data.
327	*/
328	typedef struct PDMUSBINSINT
329	{
330	/** The UUID of this instance. */
331	RTUUID Uuid;
332	/** Pointer to the next instance.
333	* (Head is pointed to by PDM::pUsbInstances.) */
334	R3PTRTYPE(PPDMUSBINS) pNext;
335	/** Pointer to the next per USB device instance.
336	* (Head is pointed to by PDMUSB::pInstances.) */
337	R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
338
339	/** Pointer to device structure. */
340	R3PTRTYPE(PPDMUSB) pUsbDev;
341
342	/** Pointer to the VM this instance was created for. */
343	PVMR3 pVM;
344	/** Pointer to the list of logical units associated with the device. (FIFO) */
345	R3PTRTYPE(PPDMLUN) pLuns;
346	/** The per instance device configuration. */
347	R3PTRTYPE(PCFGMNODE) pCfg;
348	/** Same as pCfg if the configuration should be deleted when detaching the device. */
349	R3PTRTYPE(PCFGMNODE) pCfgDelete;
350	/** The global device configuration. */
351	R3PTRTYPE(PCFGMNODE) pCfgGlobal;
352
353	/** Pointer to the USB hub this device is attached to.
354	* This is NULL if the device isn't connected to any HUB. */
355	R3PTRTYPE(PPDMUSBHUB) pHub;
356	/** The port number that we're connected to. */
357	uint32_t iPort;
358	/** Indicates that the USB device hasn't been powered on or resumed.
359	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
360	bool fVMSuspended;
361	/** Indicates that the USB device has been reset. */
362	bool fVMReset;
363	/** Pointer to the asynchronous notification callback set while in
364	* FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
365	R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
366	} PDMUSBINSINT;
367
368
369	/**
370	* Private driver instance data.
371	*/
372	typedef struct PDMDRVINSINT
373	{
374	/** Pointer to the driver instance above.
375	* This is NULL for the topmost drive. */
376	R3PTRTYPE(PPDMDRVINS) pUp;
377	/** Pointer to the driver instance below.
378	* This is NULL for the bottommost driver. */
379	R3PTRTYPE(PPDMDRVINS) pDown;
380	/** Pointer to the logical unit this driver chained on. */
381	R3PTRTYPE(PPDMLUN) pLun;
382	/** Pointer to driver structure from which this was instantiated. */
383	R3PTRTYPE(PPDMDRV) pDrv;
384	/** Pointer to the VM this instance was created for, ring-3 context. */
385	PVMR3 pVMR3;
386	/** Pointer to the VM this instance was created for, ring-0 context. */
387	R0PTRTYPE(PVMCC) pVMR0;
388	/** Pointer to the VM this instance was created for, raw-mode context. */
389	PVMRC pVMRC;
390	/** Flag indicating that the driver is being detached and destroyed.
391	* (Helps detect potential recursive detaching.) */
392	bool fDetaching;
393	/** Indicates that the driver hasn't been powered on or resumed.
394	* See PDMDEVINSINT_FLAGS_SUSPENDED. */
395	bool fVMSuspended;
396	/** Indicates that the driver has been reset already. */
397	bool fVMReset;
398	/** Set if allocated on the hyper heap, false if on the ring-3 heap. */
399	bool fHyperHeap;
400	/** Pointer to the asynchronous notification callback set while in
401	* PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
402	R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
403	/** Configuration handle to the instance node. */
404	R3PTRTYPE(PCFGMNODE) pCfgHandle;
405	/** Pointer to the ring-0 request handler function. */
406	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
407	} PDMDRVINSINT;
408
409
410	/**
411	* Private critical section data.
412	*/
413	typedef struct PDMCRITSECTINT
414	{
415	/** The critical section core which is shared with IPRT.
416	* @note The semaphore is a SUPSEMEVENT. */
417	RTCRITSECT Core;
418	/** Pointer to the next critical section.
419	* This chain is used for relocating pVMRC and device cleanup. */
420	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
421	/** Owner identifier.
422	* This is pDevIns if the owner is a device. Similarly for a driver or service.
423	* PDMR3CritSectInit() sets this to point to the critsect itself. */
424	RTR3PTR pvKey;
425	/** Pointer to the VM - R3Ptr. */
426	PVMR3 pVMR3;
427	/** Pointer to the VM - R0Ptr. */
428	R0PTRTYPE(PVMCC) pVMR0;
429	/** Pointer to the VM - GCPtr. */
430	PVMRC pVMRC;
431	/** Set if this critical section is the automatically created default
432	* section of a device. */
433	bool fAutomaticDefaultCritsect;
434	/** Set if the critical section is used by a timer or similar.
435	* See PDMR3DevGetCritSect. */
436	bool fUsedByTimerOrSimilar;
437	/** Alignment padding. */
438	bool afPadding[2];
439	/** Support driver event semaphore that is scheduled to be signaled upon leaving
440	* the critical section. This is only for Ring-3 and Ring-0. */
441	SUPSEMEVENT hEventToSignal;
442	/** The lock name. */
443	R3PTRTYPE(const char *) pszName;
444	/** R0/RC lock contention. */
445	STAMCOUNTER StatContentionRZLock;
446	/** R0/RC unlock contention. */
447	STAMCOUNTER StatContentionRZUnlock;
448	/** R3 lock contention. */
449	STAMCOUNTER StatContentionR3;
450	/** Profiling the time the section is locked. */
451	STAMPROFILEADV StatLocked;
452	} PDMCRITSECTINT;
453	AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
454	/** Pointer to private critical section data. */
455	typedef PDMCRITSECTINT *PPDMCRITSECTINT;
456
457	/** Indicates that the critical section is queued for unlock.
458	* PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
459	#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
460
461
462	/**
463	* Private critical section data.
464	*/
465	typedef struct PDMCRITSECTRWINT
466	{
467	/** The read/write critical section core which is shared with IPRT.
468	* @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
469	RTCRITSECTRW Core;
470
471	/** Pointer to the next critical section.
472	* This chain is used for relocating pVMRC and device cleanup. */
473	R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
474	/** Owner identifier.
475	* This is pDevIns if the owner is a device. Similarly for a driver or service.
476	* PDMR3CritSectInit() sets this to point to the critsect itself. */
477	RTR3PTR pvKey;
478	/** Pointer to the VM - R3Ptr. */
479	PVMR3 pVMR3;
480	/** Pointer to the VM - R0Ptr. */
481	R0PTRTYPE(PVMCC) pVMR0;
482	/** Pointer to the VM - GCPtr. */
483	PVMRC pVMRC;
484	#if HC_ARCH_BITS == 64
485	/** Alignment padding. */
486	RTRCPTR RCPtrPadding;
487	#endif
488	/** The lock name. */
489	R3PTRTYPE(const char *) pszName;
490	/** R0/RC write lock contention. */
491	STAMCOUNTER StatContentionRZEnterExcl;
492	/** R0/RC write unlock contention. */
493	STAMCOUNTER StatContentionRZLeaveExcl;
494	/** R0/RC read lock contention. */
495	STAMCOUNTER StatContentionRZEnterShared;
496	/** R0/RC read unlock contention. */
497	STAMCOUNTER StatContentionRZLeaveShared;
498	/** R0/RC writes. */
499	STAMCOUNTER StatRZEnterExcl;
500	/** R0/RC reads. */
501	STAMCOUNTER StatRZEnterShared;
502	/** R3 write lock contention. */
503	STAMCOUNTER StatContentionR3EnterExcl;
504	/** R3 read lock contention. */
505	STAMCOUNTER StatContentionR3EnterShared;
506	/** R3 writes. */
507	STAMCOUNTER StatR3EnterExcl;
508	/** R3 reads. */
509	STAMCOUNTER StatR3EnterShared;
510	/** Profiling the time the section is write locked. */
511	STAMPROFILEADV StatWriteLocked;
512	} PDMCRITSECTRWINT;
513	AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
514	AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
515	/** Pointer to private critical section data. */
516	typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
517
518
519
520	/**
521	* The usual device/driver/internal/external stuff.
522	*/
523	typedef enum
524	{
525	/** The usual invalid entry. */
526	PDMTHREADTYPE_INVALID = 0,
527	/** Device type. */
528	PDMTHREADTYPE_DEVICE,
529	/** USB Device type. */
530	PDMTHREADTYPE_USB,
531	/** Driver type. */
532	PDMTHREADTYPE_DRIVER,
533	/** Internal type. */
534	PDMTHREADTYPE_INTERNAL,
535	/** External type. */
536	PDMTHREADTYPE_EXTERNAL,
537	/** The usual 32-bit hack. */
538	PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
539	} PDMTHREADTYPE;
540
541
542	/**
543	* The internal structure for the thread.
544	*/
545	typedef struct PDMTHREADINT
546	{
547	/** The VM pointer. */
548	PVMR3 pVM;
549	/** The event semaphore the thread blocks on when not running. */
550	RTSEMEVENTMULTI BlockEvent;
551	/** The event semaphore the thread sleeps on while running. */
552	RTSEMEVENTMULTI SleepEvent;
553	/** Pointer to the next thread. */
554	R3PTRTYPE(struct PDMTHREAD *) pNext;
555	/** The thread type. */
556	PDMTHREADTYPE enmType;
557	} PDMTHREADINT;
558
559
560
561	/* Must be included after PDMDEVINSINT is defined. */
562	#define PDMDEVINSINT_DECLARED
563	#define PDMUSBINSINT_DECLARED
564	#define PDMDRVINSINT_DECLARED
565	#define PDMCRITSECTINT_DECLARED
566	#define PDMCRITSECTRWINT_DECLARED
567	#define PDMTHREADINT_DECLARED
568	#ifdef ___VBox_pdm_h
569	# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
570	#endif
571	RT_C_DECLS_END
572	#include <VBox/vmm/pdm.h>
573	RT_C_DECLS_BEGIN
574
575	/**
576	* PDM Logical Unit.
577	*
578	* This typically the representation of a physical port on a
579	* device, like for instance the PS/2 keyboard port on the
580	* keyboard controller device. The LUNs are chained on the
581	* device they belong to (PDMDEVINSINT::pLunsR3).
582	*/
583	typedef struct PDMLUN
584	{
585	/** The LUN - The Logical Unit Number. */
586	RTUINT iLun;
587	/** Pointer to the next LUN. */
588	PPDMLUN pNext;
589	/** Pointer to the top driver in the driver chain. */
590	PPDMDRVINS pTop;
591	/** Pointer to the bottom driver in the driver chain. */
592	PPDMDRVINS pBottom;
593	/** Pointer to the device instance which the LUN belongs to.
594	* Either this is set or pUsbIns is set. Both is never set at the same time. */
595	PPDMDEVINS pDevIns;
596	/** Pointer to the USB device instance which the LUN belongs to. */
597	PPDMUSBINS pUsbIns;
598	/** Pointer to the device base interface. */
599	PPDMIBASE pBase;
600	/** Description of this LUN. */
601	const char *pszDesc;
602	} PDMLUN;
603
604
605	/**
606	* PDM Device, ring-3.
607	*/
608	typedef struct PDMDEV
609	{
610	/** Pointer to the next device (R3 Ptr). */
611	R3PTRTYPE(PPDMDEV) pNext;
612	/** Device name length. (search optimization) */
613	uint32_t cchName;
614	/** Registration structure. */
615	R3PTRTYPE(const struct PDMDEVREGR3 *) pReg;
616	/** Number of instances. */
617	uint32_t cInstances;
618	/** Pointer to chain of instances (R3 Ptr). */
619	PPDMDEVINSR3 pInstances;
620	/** The search path for raw-mode context modules (';' as separator). */
621	char *pszRCSearchPath;
622	/** The search path for ring-0 context modules (';' as separator). */
623	char *pszR0SearchPath;
624	} PDMDEV;
625
626
627	#if 0
628	/**
629	* PDM Device, ring-0.
630	*/
631	typedef struct PDMDEVR0
632	{
633	/** Pointer to the next device. */
634	R0PTRTYPE(PPDMDEVR0) pNext;
635	/** Device name length. (search optimization) */
636	uint32_t cchName;
637	/** Registration structure. */
638	R3PTRTYPE(const struct PDMDEVREGR0 *) pReg;
639	/** Number of instances. */
640	uint32_t cInstances;
641	/** Pointer to chain of instances. */
642	PPDMDEVINSR0 pInstances;
643	} PDMDEVR0;
644	#endif
645
646
647	/**
648	* PDM USB Device.
649	*/
650	typedef struct PDMUSB
651	{
652	/** Pointer to the next device (R3 Ptr). */
653	R3PTRTYPE(PPDMUSB) pNext;
654	/** Device name length. (search optimization) */
655	RTUINT cchName;
656	/** Registration structure. */
657	R3PTRTYPE(const struct PDMUSBREG *) pReg;
658	/** Next instance number. */
659	uint32_t iNextInstance;
660	/** Pointer to chain of instances (R3 Ptr). */
661	R3PTRTYPE(PPDMUSBINS) pInstances;
662	} PDMUSB;
663
664
665	/**
666	* PDM Driver.
667	*/
668	typedef struct PDMDRV
669	{
670	/** Pointer to the next device. */
671	PPDMDRV pNext;
672	/** Registration structure. */
673	const struct PDMDRVREG * pReg;
674	/** Current number of instances. */
675	uint32_t cInstances;
676	/** The next instance number. */
677	uint32_t iNextInstance;
678	/** The search path for raw-mode context modules (';' as separator). */
679	char *pszRCSearchPath;
680	/** The search path for ring-0 context modules (';' as separator). */
681	char *pszR0SearchPath;
682	} PDMDRV;
683
684
685	/**
686	* PDM IOMMU, shared ring-3.
687	*/
688	typedef struct PDMIOMMUR3
689	{
690	/** IOMMU index. */
691	uint32_t idxIommu;
692	uint32_t uPadding0; /*< Alignment padding./
693
694	/** Pointer to the IOMMU device instance - R3. */
695	PPDMDEVINSR3 pDevInsR3;
696	/** @copydoc PDMIOMMUREGR3::pfnMemAccess */
697	DECLR3CALLBACKMEMBER(int, pfnMemAccess,(PPDMDEVINS pDevIns, uint16_t idDevice, uint64_t uIova, size_t cbIova,
698	uint32_t fFlags, PRTGCPHYS pGCPhysSpa, size_t *pcbContig));
699	/** @copydoc PDMIOMMUREGR3::pfnMemBulkAccess */
700	DECLR3CALLBACKMEMBER(int, pfnMemBulkAccess,(PPDMDEVINS pDevIns, uint16_t idDevice, size_t cIovas, uint64_t const *pauIovas,
701	uint32_t fFlags, PRTGCPHYS paGCPhysSpa));
702	/** @copydoc PDMIOMMUREGR3::pfnMsiRemap */
703	DECLR3CALLBACKMEMBER(int, pfnMsiRemap,(PPDMDEVINS pDevIns, uint16_t idDevice, PCMSIMSG pMsiIn, PMSIMSG pMsiOut));
704	} PDMIOMMUR3;
705	/** Pointer to a PDM IOMMU instance. */
706	typedef PDMIOMMUR3 *PPDMIOMMUR3;
707	/** Pointer to a const PDM IOMMU instance. */
708	typedef const PDMIOMMUR3 *PCPDMIOMMUR3;
709
710
711	/**
712	* PDM IOMMU, ring-0.
713	*/
714	typedef struct PDMIOMMUR0
715	{
716	/** IOMMU index. */
717	uint32_t idxIommu;
718	uint32_t uPadding0; /*< Alignment padding./
719
720	/** Pointer to IOMMU device instance. */
721	PPDMDEVINSR0 pDevInsR0;
722	/** @copydoc PDMIOMMUREGR3::pfnMemAccess */
723	DECLR0CALLBACKMEMBER(int, pfnMemAccess,(PPDMDEVINS pDevIns, uint16_t idDevice, uint64_t uIova, size_t cbIova,
724	uint32_t fFlags, PRTGCPHYS pGCPhysSpa, size_t *pcbContig));
725	/** @copydoc PDMIOMMUREGR3::pfnMemBulkAccess */
726	DECLR0CALLBACKMEMBER(int, pfnMemBulkAccess,(PPDMDEVINS pDevIns, uint16_t idDevice, size_t cIovas, uint64_t const *pauIovas,
727	uint32_t fFlags, PRTGCPHYS paGCPhysSpa));
728	/** @copydoc PDMIOMMUREGR3::pfnMsiRemap */
729	DECLR0CALLBACKMEMBER(int, pfnMsiRemap,(PPDMDEVINS pDevIns, uint16_t idDevice, PCMSIMSG pMsiIn, PMSIMSG pMsiOut));
730	} PDMIOMMUR0;
731	/** Pointer to a ring-0 IOMMU data. */
732	typedef PDMIOMMUR0 *PPDMIOMMUR0;
733	/** Pointer to a const ring-0 IOMMU data. */
734	typedef const PDMIOMMUR0 *PCPDMIOMMUR0;
735
736	/** Pointer to a PDM IOMMU for the current context. */
737	#ifdef IN_RING3
738	typedef PPDMIOMMUR3 PPDMIOMMU;
739	#else
740	typedef PPDMIOMMUR0 PPDMIOMMU;
741	#endif
742
743
744	/**
745	* PDM registered PIC device.
746	*/
747	typedef struct PDMPIC
748	{
749	/** Pointer to the PIC device instance - R3. */
750	PPDMDEVINSR3 pDevInsR3;
751	/** @copydoc PDMPICREG::pfnSetIrq */
752	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
753	/** @copydoc PDMPICREG::pfnGetInterrupt */
754	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
755
756	/** Pointer to the PIC device instance - R0. */
757	PPDMDEVINSR0 pDevInsR0;
758	/** @copydoc PDMPICREG::pfnSetIrq */
759	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
760	/** @copydoc PDMPICREG::pfnGetInterrupt */
761	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
762
763	/** Pointer to the PIC device instance - RC. */
764	PPDMDEVINSRC pDevInsRC;
765	/** @copydoc PDMPICREG::pfnSetIrq */
766	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
767	/** @copydoc PDMPICREG::pfnGetInterrupt */
768	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
769	/** Alignment padding. */
770	RTRCPTR RCPtrPadding;
771	} PDMPIC;
772
773
774	/**
775	* PDM registered APIC device.
776	*/
777	typedef struct PDMAPIC
778	{
779	/** Pointer to the APIC device instance - R3 Ptr. */
780	PPDMDEVINSR3 pDevInsR3;
781	/** Pointer to the APIC device instance - R0 Ptr. */
782	PPDMDEVINSR0 pDevInsR0;
783	/** Pointer to the APIC device instance - RC Ptr. */
784	PPDMDEVINSRC pDevInsRC;
785	uint8_t Alignment[4];
786	} PDMAPIC;
787
788
789	/**
790	* PDM registered I/O APIC device.
791	*/
792	typedef struct PDMIOAPIC
793	{
794	/** Pointer to the I/O APIC device instance - R3 Ptr. */
795	PPDMDEVINSR3 pDevInsR3;
796	/** @copydoc PDMIOAPICREG::pfnSetIrq */
797	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, int iIrq, int iLevel, uint32_t uTagSrc));
798	/** @copydoc PDMIOAPICREG::pfnSendMsi */
799	DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc));
800	/** @copydoc PDMIOAPICREG::pfnSetEoi */
801	DECLR3CALLBACKMEMBER(void, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
802
803	/** Pointer to the I/O APIC device instance - R0. */
804	PPDMDEVINSR0 pDevInsR0;
805	/** @copydoc PDMIOAPICREG::pfnSetIrq */
806	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, int iIrq, int iLevel, uint32_t uTagSrc));
807	/** @copydoc PDMIOAPICREG::pfnSendMsi */
808	DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc));
809	/** @copydoc PDMIOAPICREG::pfnSetEoi */
810	DECLR0CALLBACKMEMBER(void, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
811
812	/** Pointer to the I/O APIC device instance - RC Ptr. */
813	PPDMDEVINSRC pDevInsRC;
814	/** @copydoc PDMIOAPICREG::pfnSetIrq */
815	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, int iIrq, int iLevel, uint32_t uTagSrc));
816	/** @copydoc PDMIOAPICREG::pfnSendMsi */
817	DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc));
818	/** @copydoc PDMIOAPICREG::pfnSendMsi */
819	DECLRCCALLBACKMEMBER(void, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
820	} PDMIOAPIC;
821	/** Pointer to a PDM IOAPIC instance. */
822	typedef PDMIOAPIC *PPDMIOAPIC;
823	/** Pointer to a const PDM IOAPIC instance. */
824	typedef PDMIOAPIC const *PCPDMIOAPIC;
825
826	/** Maximum number of PCI busses for a VM. */
827	#define PDM_PCI_BUSSES_MAX 8
828	/** Maximum number of IOMMUs (at most one per PCI bus). */
829	#define PDM_IOMMUS_MAX PDM_PCI_BUSSES_MAX
830
831
832	#ifdef IN_RING3
833	/**
834	* PDM registered firmware device.
835	*/
836	typedef struct PDMFW
837	{
838	/** Pointer to the firmware device instance. */
839	PPDMDEVINSR3 pDevIns;
840	/** Copy of the registration structure. */
841	PDMFWREG Reg;
842	} PDMFW;
843	/** Pointer to a firmware instance. */
844	typedef PDMFW *PPDMFW;
845	#endif
846
847
848	/**
849	* PDM PCI bus instance.
850	*/
851	typedef struct PDMPCIBUS
852	{
853	/** PCI bus number. */
854	uint32_t iBus;
855	uint32_t uPadding0; /*< Alignment padding./
856
857	/** Pointer to PCI bus device instance. */
858	PPDMDEVINSR3 pDevInsR3;
859	/** @copydoc PDMPCIBUSREGR3::pfnSetIrqR3 */
860	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
861
862	/** @copydoc PDMPCIBUSREGR3::pfnRegisterR3 */
863	DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
864	uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
865	/** @copydoc PDMPCIBUSREGR3::pfnRegisterMsiR3 */
866	DECLR3CALLBACKMEMBER(int, pfnRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
867	/** @copydoc PDMPCIBUSREGR3::pfnIORegionRegisterR3 */
868	DECLR3CALLBACKMEMBER(int, pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
869	RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
870	uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback));
871	/** @copydoc PDMPCIBUSREGR3::pfnInterceptConfigAccesses */
872	DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
873	PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
874	/** @copydoc PDMPCIBUSREGR3::pfnConfigWrite */
875	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
876	uint32_t uAddress, unsigned cb, uint32_t u32Value));
877	/** @copydoc PDMPCIBUSREGR3::pfnConfigRead */
878	DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
879	uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
880	} PDMPCIBUS;
881	/** Pointer to a PDM PCI Bus instance. */
882	typedef PDMPCIBUS *PPDMPCIBUS;
883	/** Pointer to a const PDM PCI Bus instance. */
884	typedef const PDMPCIBUS *PCPDMPCIBUS;
885
886
887	/**
888	* Ring-0 PDM PCI bus instance data.
889	*/
890	typedef struct PDMPCIBUSR0
891	{
892	/** PCI bus number. */
893	uint32_t iBus;
894	uint32_t uPadding0; /*< Alignment padding./
895	/** Pointer to PCI bus device instance. */
896	PPDMDEVINSR0 pDevInsR0;
897	/** @copydoc PDMPCIBUSREGR0::pfnSetIrq */
898	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
899	} PDMPCIBUSR0;
900	/** Pointer to the ring-0 PCI bus data. */
901	typedef PDMPCIBUSR0 *PPDMPCIBUSR0;
902	/** Pointer to the const ring-0 PCI bus data. */
903	typedef const PDMPCIBUSR0 *PCPDMPCIBUSR0;
904
905
906	#ifdef IN_RING3
907	/**
908	* PDM registered DMAC (DMA Controller) device.
909	*/
910	typedef struct PDMDMAC
911	{
912	/** Pointer to the DMAC device instance. */
913	PPDMDEVINSR3 pDevIns;
914	/** Copy of the registration structure. */
915	PDMDMACREG Reg;
916	} PDMDMAC;
917
918
919	/**
920	* PDM registered RTC (Real Time Clock) device.
921	*/
922	typedef struct PDMRTC
923	{
924	/** Pointer to the RTC device instance. */
925	PPDMDEVINSR3 pDevIns;
926	/** Copy of the registration structure. */
927	PDMRTCREG Reg;
928	} PDMRTC;
929
930	#endif /* IN_RING3 */
931
932	/**
933	* Module type.
934	*/
935	typedef enum PDMMODTYPE
936	{
937	/** Raw-mode (RC) context module. */
938	PDMMOD_TYPE_RC,
939	/** Ring-0 (host) context module. */
940	PDMMOD_TYPE_R0,
941	/** Ring-3 (host) context module. */
942	PDMMOD_TYPE_R3
943	} PDMMODTYPE;
944
945
946	/** The module name length including the terminator. */
947	#define PDMMOD_NAME_LEN 32
948
949	/**
950	* Loaded module instance.
951	*/
952	typedef struct PDMMOD
953	{
954	/** Module name. This is used for referring to
955	* the module internally, sort of like a handle. */
956	char szName[PDMMOD_NAME_LEN];
957	/** Module type. */
958	PDMMODTYPE eType;
959	/** Loader module handle. Not used for R0 modules. */
960	RTLDRMOD hLdrMod;
961	/** Loaded address.
962	* This is the 'handle' for R0 modules. */
963	RTUINTPTR ImageBase;
964	/** Old loaded address.
965	* This is used during relocation of GC modules. Not used for R0 modules. */
966	RTUINTPTR OldImageBase;
967	/** Where the R3 HC bits are stored.
968	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
969	void *pvBits;
970
971	/** Pointer to next module. */
972	struct PDMMOD *pNext;
973	/** Module filename. */
974	char szFilename[1];
975	} PDMMOD;
976	/** Pointer to loaded module instance. */
977	typedef PDMMOD *PPDMMOD;
978
979
980
981	/** Extra space in the free array. */
982	#define PDMQUEUE_FREE_SLACK 16
983
984	/**
985	* Queue type.
986	*/
987	typedef enum PDMQUEUETYPE
988	{
989	/** Device consumer. */
990	PDMQUEUETYPE_DEV = 1,
991	/** Driver consumer. */
992	PDMQUEUETYPE_DRV,
993	/** Internal consumer. */
994	PDMQUEUETYPE_INTERNAL,
995	/** External consumer. */
996	PDMQUEUETYPE_EXTERNAL
997	} PDMQUEUETYPE;
998
999	/** Pointer to a PDM Queue. */
1000	typedef struct PDMQUEUE *PPDMQUEUE;
1001
1002	/**
1003	* PDM Queue.
1004	*/
1005	typedef struct PDMQUEUE
1006	{
1007	/** Pointer to the next queue in the list. */
1008	R3PTRTYPE(PPDMQUEUE) pNext;
1009	/** Type specific data. */
1010	union
1011	{
1012	/** PDMQUEUETYPE_DEV */
1013	struct
1014	{
1015	/** Pointer to consumer function. */
1016	R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
1017	/** Pointer to the device instance owning the queue. */
1018	R3PTRTYPE(PPDMDEVINS) pDevIns;
1019	} Dev;
1020	/** PDMQUEUETYPE_DRV */
1021	struct
1022	{
1023	/** Pointer to consumer function. */
1024	R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
1025	/** Pointer to the driver instance owning the queue. */
1026	R3PTRTYPE(PPDMDRVINS) pDrvIns;
1027	} Drv;
1028	/** PDMQUEUETYPE_INTERNAL */
1029	struct
1030	{
1031	/** Pointer to consumer function. */
1032	R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
1033	} Int;
1034	/** PDMQUEUETYPE_EXTERNAL */
1035	struct
1036	{
1037	/** Pointer to consumer function. */
1038	R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
1039	/** Pointer to user argument. */
1040	R3PTRTYPE(void *) pvUser;
1041	} Ext;
1042	} u;
1043	/** Queue type. */
1044	PDMQUEUETYPE enmType;
1045	/** The interval between checking the queue for events.
1046	* The realtime timer below is used to do the waiting.
1047	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
1048	uint32_t cMilliesInterval;
1049	/** Interval timer. Only used if cMilliesInterval is non-zero. */
1050	TMTIMERHANDLE hTimer;
1051	/** Pointer to the VM - R3. */
1052	PVMR3 pVMR3;
1053	/** LIFO of pending items - R3. */
1054	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
1055	/** Pointer to the VM - R0. */
1056	PVMR0 pVMR0;
1057	/** LIFO of pending items - R0. */
1058	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
1059	/** Pointer to the GC VM and indicator for GC enabled queue.
1060	* If this is NULL, the queue cannot be used in GC.
1061	*/
1062	PVMRC pVMRC;
1063	/** LIFO of pending items - GC. */
1064	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
1065
1066	/** Item size (bytes). */
1067	uint32_t cbItem;
1068	/** Number of items in the queue. */
1069	uint32_t cItems;
1070	/** Index to the free head (where we insert). */
1071	uint32_t volatile iFreeHead;
1072	/** Index to the free tail (where we remove). */
1073	uint32_t volatile iFreeTail;
1074
1075	/** Unique queue name. */
1076	R3PTRTYPE(const char *) pszName;
1077	#if HC_ARCH_BITS == 32
1078	RTR3PTR Alignment1;
1079	#endif
1080	/** Stat: Times PDMQueueAlloc fails. */
1081	STAMCOUNTER StatAllocFailures;
1082	/** Stat: PDMQueueInsert calls. */
1083	STAMCOUNTER StatInsert;
1084	/** Stat: Queue flushes. */
1085	STAMCOUNTER StatFlush;
1086	/** Stat: Queue flushes with pending items left over. */
1087	STAMCOUNTER StatFlushLeftovers;
1088	#ifdef VBOX_WITH_STATISTICS
1089	/** State: Profiling the flushing. */
1090	STAMPROFILE StatFlushPrf;
1091	/** State: Pending items. */
1092	uint32_t volatile cStatPending;
1093	uint32_t volatile cAlignment;
1094	#endif
1095
1096	/** Array of pointers to free items. Variable size. */
1097	struct PDMQUEUEFREEITEM
1098	{
1099	/** Pointer to the free item - HC Ptr. */
1100	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
1101	/** Pointer to the free item - HC Ptr. */
1102	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
1103	/** Pointer to the free item - GC Ptr. */
1104	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
1105	#if HC_ARCH_BITS == 64
1106	RTRCPTR Alignment0;
1107	#endif
1108	} aFreeItems[1];
1109	} PDMQUEUE;
1110
1111	/** @name PDM::fQueueFlushing
1112	* @{ */
1113	/** Used to make sure only one EMT will flush the queues.
1114	* Set when an EMT is flushing queues, clear otherwise. */
1115	#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
1116	/** Indicating there are queues with items pending.
1117	* This is make sure we don't miss inserts happening during flushing. The FF
1118	* cannot be used for this since it has to be cleared immediately to prevent
1119	* other EMTs from spinning. */
1120	#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
1121	/** @} */
1122
1123
1124	/** @name PDM task structures.
1125	* @{ */
1126
1127	/**
1128	* A asynchronous user mode task.
1129	*/
1130	typedef struct PDMTASK
1131	{
1132	/** Task owner type. */
1133	PDMTASKTYPE volatile enmType;
1134	/** Queue flags. */
1135	uint32_t volatile fFlags;
1136	/** User argument for the callback. */
1137	R3PTRTYPE(void *) volatile pvUser;
1138	/** The callback (will be cast according to enmType before callout). */
1139	R3PTRTYPE(PFNRT) volatile pfnCallback;
1140	/** The owner identifier. */
1141	R3PTRTYPE(void *) volatile pvOwner;
1142	/** Task name. */
1143	R3PTRTYPE(const char *) pszName;
1144	/** Number of times already triggered when PDMTaskTrigger was called. */
1145	uint32_t volatile cAlreadyTrigged;
1146	/** Number of runs. */
1147	uint32_t cRuns;
1148	} PDMTASK;
1149	/** Pointer to a PDM task. */
1150	typedef PDMTASK *PPDMTASK;
1151
1152	/**
1153	* A task set.
1154	*
1155	* This is served by one task executor thread.
1156	*/
1157	typedef struct PDMTASKSET
1158	{
1159	/** Magic value (PDMTASKSET_MAGIC). */
1160	uint32_t u32Magic;
1161	/** Set if this task set works for ring-0 and raw-mode. */
1162	bool fRZEnabled;
1163	/** Number of allocated taks. */
1164	uint8_t volatile cAllocated;
1165	/** Base handle value for this set. */
1166	uint16_t uHandleBase;
1167	/** The task executor thread. */
1168	R3PTRTYPE(RTTHREAD) hThread;
1169	/** Event semaphore for waking up the thread when fRZEnabled is set. */
1170	SUPSEMEVENT hEventR0;
1171	/** Event semaphore for waking up the thread when fRZEnabled is clear. */
1172	R3PTRTYPE(RTSEMEVENT) hEventR3;
1173	/** The VM pointer. */
1174	PVM pVM;
1175	/** Padding so fTriggered is in its own cacheline. */
1176	uint64_t au64Padding2[3];
1177
1178	/** Bitmask of triggered tasks. */
1179	uint64_t volatile fTriggered;
1180	/** Shutdown thread indicator. */
1181	bool volatile fShutdown;
1182	/** Padding. */
1183	bool volatile afPadding3[3];
1184	/** Task currently running, UINT32_MAX if idle. */
1185	uint32_t volatile idxRunning;
1186	/** Padding so fTriggered and fShutdown are in their own cacheline. */
1187	uint64_t volatile au64Padding3[6];
1188
1189	/** The individual tasks. (Unallocated tasks have NULL pvOwner.) */
1190	PDMTASK aTasks[64];
1191	} PDMTASKSET;
1192	AssertCompileMemberAlignment(PDMTASKSET, fTriggered, 64);
1193	AssertCompileMemberAlignment(PDMTASKSET, aTasks, 64);
1194	/** Magic value for PDMTASKSET::u32Magic. */
1195	#define PDMTASKSET_MAGIC UINT32_C(0x19320314)
1196	/** Pointer to a task set. */
1197	typedef PDMTASKSET *PPDMTASKSET;
1198
1199	/** @} */
1200
1201
1202	/**
1203	* Queue device helper task operation.
1204	*/
1205	typedef enum PDMDEVHLPTASKOP
1206	{
1207	/** The usual invalid 0 entry. */
1208	PDMDEVHLPTASKOP_INVALID = 0,
1209	/** IsaSetIrq, IoApicSetIrq */
1210	PDMDEVHLPTASKOP_ISA_SET_IRQ,
1211	/** PciSetIrq */
1212	PDMDEVHLPTASKOP_PCI_SET_IRQ,
1213	/** PciSetIrq */
1214	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
1215	/** IoApicSendMsi */
1216	PDMDEVHLPTASKOP_IOAPIC_SEND_MSI,
1217	/** IoApicSettEoi */
1218	PDMDEVHLPTASKOP_IOAPIC_SET_EOI,
1219	/** The usual 32-bit hack. */
1220	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
1221	} PDMDEVHLPTASKOP;
1222
1223	/**
1224	* Queued Device Helper Task.
1225	*/
1226	typedef struct PDMDEVHLPTASK
1227	{
1228	/** The queue item core (don't touch). */
1229	PDMQUEUEITEMCORE Core;
1230	/** Pointer to the device instance (R3 Ptr). */
1231	PPDMDEVINSR3 pDevInsR3;
1232	/** This operation to perform. */
1233	PDMDEVHLPTASKOP enmOp;
1234	#if HC_ARCH_BITS == 64
1235	uint32_t Alignment0;
1236	#endif
1237	/** Parameters to the operation. */
1238	union PDMDEVHLPTASKPARAMS
1239	{
1240	/**
1241	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
1242	*/
1243	struct PDMDEVHLPTASKISASETIRQ
1244	{
1245	/** The bus:device:function of the device initiating the IRQ. Can be NIL_PCIBDF. */
1246	PCIBDF uBusDevFn;
1247	/** The IRQ */
1248	int iIrq;
1249	/** The new level. */
1250	int iLevel;
1251	/** The IRQ tag and source. */
1252	uint32_t uTagSrc;
1253	} IsaSetIrq, IoApicSetIrq;
1254
1255	/**
1256	* PDMDEVHLPTASKOP_PCI_SET_IRQ
1257	*/
1258	struct PDMDEVHLPTASKPCISETIRQ
1259	{
1260	/** Pointer to the PCI device (R3 Ptr). */
1261	R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
1262	/** The IRQ */
1263	int iIrq;
1264	/** The new level. */
1265	int iLevel;
1266	/** The IRQ tag and source. */
1267	uint32_t uTagSrc;
1268	} PciSetIrq;
1269
1270	/**
1271	* PDMDEVHLPTASKOP_IOAPIC_SEND_MSI
1272	*/
1273	struct PDMDEVHLPTASKIOAPICSENDMSI
1274	{
1275	/** The bus:device:function of the device sending the MSI. */
1276	PCIBDF uBusDevFn;
1277	/** The MSI. */
1278	MSIMSG Msi;
1279	/** The IRQ tag and source. */
1280	uint32_t uTagSrc;
1281	} IoApicSendMsi;
1282
1283	/**
1284	* PDMDEVHLPTASKOP_IOAPIC_SET_EOI
1285	*/
1286	struct PDMDEVHLPTASKIOAPICSETEOI
1287	{
1288	/** The vector corresponding to the EOI. */
1289	uint8_t uVector;
1290	} IoApicSetEoi;
1291
1292	/** Expanding the structure. */
1293	uint64_t au64[3];
1294	} u;
1295	} PDMDEVHLPTASK;
1296	/** Pointer to a queued Device Helper Task. */
1297	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
1298	/** Pointer to a const queued Device Helper Task. */
1299	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
1300
1301
1302
1303	/**
1304	* An USB hub registration record.
1305	*/
1306	typedef struct PDMUSBHUB
1307	{
1308	/** The USB versions this hub support.
1309	* Note that 1.1 hubs can take on 2.0 devices. */
1310	uint32_t fVersions;
1311	/** The number of ports on the hub. */
1312	uint32_t cPorts;
1313	/** The number of available ports (0..cPorts). */
1314	uint32_t cAvailablePorts;
1315	/** The driver instance of the hub. */
1316	PPDMDRVINS pDrvIns;
1317	/** Copy of the to the registration structure. */
1318	PDMUSBHUBREG Reg;
1319
1320	/** Pointer to the next hub in the list. */
1321	struct PDMUSBHUB *pNext;
1322	} PDMUSBHUB;
1323
1324	/** Pointer to a const USB HUB registration record. */
1325	typedef const PDMUSBHUB *PCPDMUSBHUB;
1326
1327	/** Pointer to a PDM Async I/O template. */
1328	typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
1329
1330	/** Pointer to the main PDM Async completion endpoint class. */
1331	typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
1332
1333	/** Pointer to the global block cache structure. */
1334	typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
1335
1336	/**
1337	* PDM VMCPU Instance data.
1338	* Changes to this must checked against the padding of the pdm union in VMCPU!
1339	*/
1340	typedef struct PDMCPU
1341	{
1342	/** The number of entries in the apQueuedCritSectsLeaves table that's currently
1343	* in use. */
1344	uint32_t cQueuedCritSectLeaves;
1345	uint32_t uPadding0; /*< Alignment padding./
1346	/** Critical sections queued in RC/R0 because of contention preventing leave to
1347	* complete. (R3 Ptrs)
1348	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1349	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
1350
1351	/** The number of entries in the apQueuedCritSectRwExclLeaves table that's
1352	* currently in use. */
1353	uint32_t cQueuedCritSectRwExclLeaves;
1354	uint32_t uPadding1; /*< Alignment padding./
1355	/** Read/write critical sections queued in RC/R0 because of contention
1356	* preventing exclusive leave to complete. (R3 Ptrs)
1357	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1358	R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1359
1360	/** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1361	* currently in use. */
1362	uint32_t cQueuedCritSectRwShrdLeaves;
1363	uint32_t uPadding2; /*< Alignment padding./
1364	/** Read/write critical sections queued in RC/R0 because of contention
1365	* preventing shared leave to complete. (R3 Ptrs)
1366	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1367	R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1368	} PDMCPU;
1369
1370
1371	/**
1372	* PDM VM Instance data.
1373	* Changes to this must checked against the padding of the cfgm union in VM!
1374	*/
1375	typedef struct PDM
1376	{
1377	/** The PDM lock.
1378	* This is used to protect everything that deals with interrupts, i.e.
1379	* the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1380	PDMCRITSECT CritSect;
1381	/** The NOP critical section.
1382	* This is a dummy critical section that will not do any thread
1383	* serialization but instead let all threads enter immediately and
1384	* concurrently. */
1385	PDMCRITSECT NopCritSect;
1386
1387	/** The ring-0 capable task sets (max 128). */
1388	PDMTASKSET aTaskSets[2];
1389	/** Pointer to task sets (max 512). */
1390	R3PTRTYPE(PPDMTASKSET) apTaskSets[8];
1391
1392	/** PCI Buses. */
1393	PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1394	/** IOMMU devices. */
1395	PDMIOMMUR3 aIommus[PDM_IOMMUS_MAX];
1396	/** The register PIC device. */
1397	PDMPIC Pic;
1398	/** The registered APIC device. */
1399	PDMAPIC Apic;
1400	/** The registered I/O APIC device. */
1401	PDMIOAPIC IoApic;
1402	/** The registered HPET device. */
1403	PPDMDEVINSR3 pHpet;
1404
1405	/** List of registered devices. (FIFO) */
1406	R3PTRTYPE(PPDMDEV) pDevs;
1407	/** List of devices instances. (FIFO) */
1408	R3PTRTYPE(PPDMDEVINS) pDevInstances;
1409	/** List of registered USB devices. (FIFO) */
1410	R3PTRTYPE(PPDMUSB) pUsbDevs;
1411	/** List of USB devices instances. (FIFO) */
1412	R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1413	/** List of registered drivers. (FIFO) */
1414	R3PTRTYPE(PPDMDRV) pDrvs;
1415	/** The registered firmware device (can be NULL). */
1416	R3PTRTYPE(PPDMFW) pFirmware;
1417	/** The registered DMAC device. */
1418	R3PTRTYPE(PPDMDMAC) pDmac;
1419	/** The registered RTC device. */
1420	R3PTRTYPE(PPDMRTC) pRtc;
1421	/** The registered USB HUBs. (FIFO) */
1422	R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1423
1424	/** @name Queues
1425	* @{ */
1426	/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1427	R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1428	/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1429	R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1430	/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1431	RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1432	/** Pointer to the queue which should be manually flushed - RC Ptr.
1433	* Only touched by EMT. */
1434	RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1435	/** Pointer to the queue which should be manually flushed - R0 Ptr.
1436	* Only touched by EMT. */
1437	R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1438	/** Bitmask controlling the queue flushing.
1439	* See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1440	uint32_t volatile fQueueFlushing;
1441	/** @} */
1442
1443	/** The current IRQ tag (tracing purposes). */
1444	uint32_t volatile uIrqTag;
1445
1446	/** Pending reset flags (PDMVMRESET_F_XXX). */
1447	uint32_t volatile fResetFlags;
1448
1449	/** Set by pdmR3LoadExec for use in assertions. */
1450	bool fStateLoaded;
1451	/** Alignment padding. */
1452	bool afPadding[3];
1453
1454	/** The tracing ID of the next device instance.
1455	*
1456	* @remarks We keep the device tracing ID seperate from the rest as these are
1457	* then more likely to end up with the same ID from one run to
1458	* another, making analysis somewhat easier. Drivers and USB devices
1459	* are more volatile and can be changed at runtime, thus these are much
1460	* less likely to remain stable, so just heap them all together. */
1461	uint32_t idTracingDev;
1462	/** The tracing ID of the next driver instance, USB device instance or other
1463	* PDM entity requiring an ID. */
1464	uint32_t idTracingOther;
1465
1466	/** @name VMM device heap
1467	* @{ */
1468	/** The heap size. */
1469	uint32_t cbVMMDevHeap;
1470	/** Free space. */
1471	uint32_t cbVMMDevHeapLeft;
1472	/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1473	RTR3PTR pvVMMDevHeap;
1474	/** Ring-3 mapping/unmapping notification callback for the user. */
1475	PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1476	/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1477	RTGCPHYS GCPhysVMMDevHeap;
1478	/** @} */
1479
1480	/** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1481	STAMCOUNTER StatQueuedCritSectLeaves;
1482	} PDM;
1483	AssertCompileMemberAlignment(PDM, CritSect, 8);
1484	AssertCompileMemberAlignment(PDM, aTaskSets, 64);
1485	AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1486	AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1487	/** Pointer to PDM VM instance data. */
1488	typedef PDM *PPDM;
1489
1490
1491	/**
1492	* PDM data kept in the ring-0 GVM.
1493	*/
1494	typedef struct PDMR0PERVM
1495	{
1496	/** PCI Buses, ring-0 data. */
1497	PDMPCIBUSR0 aPciBuses[PDM_PCI_BUSSES_MAX];
1498	/** IOMMUs, ring-0 data. */
1499	PDMIOMMUR0 aIommus[PDM_IOMMUS_MAX];
1500	/** Number of valid ring-0 device instances (apDevInstances). */
1501	uint32_t cDevInstances;
1502	uint32_t u32Padding;
1503	/** Pointer to ring-0 device instances. */
1504	R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[190];
1505	} PDMR0PERVM;
1506
1507
1508	/**
1509	* PDM data kept in the UVM.
1510	*/
1511	typedef struct PDMUSERPERVM
1512	{
1513	/** @todo move more stuff over here. */
1514
1515	/** Linked list of timer driven PDM queues.
1516	* Currently serialized by PDM::CritSect. */
1517	R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1518	/** Linked list of force action driven PDM queues.
1519	* Currently serialized by PDM::CritSect. */
1520	R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1521
1522	/** Lock protecting the lists below it. */
1523	RTCRITSECT ListCritSect;
1524	/** Pointer to list of loaded modules. */
1525	PPDMMOD pModules;
1526	/** List of initialized critical sections. (LIFO) */
1527	R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1528	/** List of initialized read/write critical sections. (LIFO) */
1529	R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1530	/** Head of the PDM Thread list. (singly linked) */
1531	R3PTRTYPE(PPDMTHREAD) pThreads;
1532	/** Tail of the PDM Thread list. (singly linked) */
1533	R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1534
1535	/** @name PDM Async Completion
1536	* @{ */
1537	/** Pointer to the array of supported endpoint classes. */
1538	PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1539	/** Head of the templates. Singly linked, protected by ListCritSect. */
1540	R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1541	/** @} */
1542
1543	/** Global block cache data. */
1544	R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1545	#ifdef VBOX_WITH_NETSHAPER
1546	/** Pointer to network shaper instance. */
1547	R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1548	#endif /* VBOX_WITH_NETSHAPER */
1549
1550	} PDMUSERPERVM;
1551	/** Pointer to the PDM data kept in the UVM. */
1552	typedef PDMUSERPERVM *PPDMUSERPERVM;
1553
1554
1555
1556	/*******************************************************************************
1557	* Global Variables *
1558	*******************************************************************************/
1559	#ifdef IN_RING3
1560	extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1561	extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1562	# ifdef VBOX_WITH_DBGF_TRACING
1563	extern const PDMDEVHLPR3 g_pdmR3DevHlpTracing;
1564	# endif
1565	extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1566	extern const PDMPICHLP g_pdmR3DevPicHlp;
1567	extern const PDMIOAPICHLP g_pdmR3DevIoApicHlp;
1568	extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1569	extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1570	extern const PDMIOMMUHLPR3 g_pdmR3DevIommuHlp;
1571	extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1572	extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1573	extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1574	extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1575	#endif
1576
1577
1578	/*******************************************************************************
1579	* Defined Constants And Macros *
1580	*******************************************************************************/
1581	/** @def PDMDEV_ASSERT_DEVINS
1582	* Asserts the validity of the device instance.
1583	*/
1584	#ifdef VBOX_STRICT
1585	# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1586	do { \
1587	AssertPtr(pDevIns); \
1588	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1589	Assert(pDevIns->CTX_SUFF(pvInstanceDataFor) == (void *)&pDevIns->achInstanceData[0]); \
1590	} while (0)
1591	#else
1592	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1593	#endif
1594
1595	/** @def PDMDRV_ASSERT_DRVINS
1596	* Asserts the validity of the driver instance.
1597	*/
1598	#ifdef VBOX_STRICT
1599	# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1600	do { \
1601	AssertPtr(pDrvIns); \
1602	Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1603	Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1604	} while (0)
1605	#else
1606	# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1607	#endif
1608
1609
1610	/*******************************************************************************
1611	* Internal Functions *
1612	*******************************************************************************/
1613	#ifdef IN_RING3
1614	bool pdmR3IsValidName(const char *pszName);
1615
1616	int pdmR3CritSectBothInitStats(PVM pVM);
1617	void pdmR3CritSectBothRelocate(PVM pVM);
1618	int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1619	int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1620	int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1621	const char *pszNameFmt, va_list va);
1622	int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1623	const char *pszNameFmt, ...);
1624	int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1625	const char *pszNameFmt, ...);
1626	int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1627	const char *pszNameFmt, va_list va);
1628	int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1629	const char *pszNameFmt, ...);
1630	int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1631	const char *pszNameFmt, ...);
1632
1633	int pdmR3DevInit(PVM pVM);
1634	int pdmR3DevInitComplete(PVM pVM);
1635	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1636	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1637	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1638
1639	int pdmR3UsbLoadModules(PVM pVM);
1640	int pdmR3UsbInstantiateDevices(PVM pVM);
1641	PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1642	int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1643	int pdmR3UsbVMInitComplete(PVM pVM);
1644
1645	int pdmR3DrvInit(PVM pVM);
1646	int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1647	PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1648	int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1649	void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1650	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1651
1652	int pdmR3LdrInitU(PUVM pUVM);
1653	void pdmR3LdrTermU(PUVM pUVM, bool fFinal);
1654	char pdmR3FileR3(const char pszFile, bool fShared);
1655	int pdmR3LoadR3U(PUVM pUVM, const char pszFilename, const char pszName);
1656
1657	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1658
1659	int pdmR3TaskInit(PVM pVM);
1660	void pdmR3TaskTerm(PVM pVM);
1661
1662	int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1663	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1664	int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1665	PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1666	int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1667	PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1668	int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1669	int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1670	int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1671	void pdmR3ThreadDestroyAll(PVM pVM);
1672	int pdmR3ThreadResumeAll(PVM pVM);
1673	int pdmR3ThreadSuspendAll(PVM pVM);
1674
1675	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1676	int pdmR3AsyncCompletionInit(PVM pVM);
1677	int pdmR3AsyncCompletionTerm(PVM pVM);
1678	void pdmR3AsyncCompletionResume(PVM pVM);
1679	int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1680	int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1681	PFNPDMASYNCCOMPLETEDRV pfnCompleted, void pvTemplateUser, const char pszDesc);
1682	int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1683	int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1684	int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1685	int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1686	#endif
1687
1688	#ifdef VBOX_WITH_NETSHAPER
1689	int pdmR3NetShaperInit(PVM pVM);
1690	int pdmR3NetShaperTerm(PVM pVM);
1691	#endif
1692
1693	int pdmR3BlkCacheInit(PVM pVM);
1694	void pdmR3BlkCacheTerm(PVM pVM);
1695	int pdmR3BlkCacheResume(PVM pVM);
1696
1697	#endif /* IN_RING3 */
1698
1699	void pdmLock(PVMCC pVM);
1700	int pdmLockEx(PVMCC pVM, int rc);
1701	void pdmUnlock(PVMCC pVM);
1702	bool pdmLockIsOwner(PCVMCC pVM);
1703
1704	#if defined(VBOX_WITH_IOMMU_AMD) \|\| defined(VBOX_WITH_IOMMU_INTEL)
1705	bool pdmIommuIsPresent(PPDMDEVINS pDevIns);
1706	int pdmIommuMsiRemap(PPDMDEVINS pDevIns, uint16_t idDevice, PCMSIMSG pMsiIn, PMSIMSG pMsiOut);
1707	int pdmIommuMemAccessRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags);
1708	int pdmIommuMemAccessWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags);
1709	# ifdef IN_RING3
1710	int pdmR3IommuMemAccessReadCCPtr(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock);
1711	int pdmR3IommuMemAccessWriteCCPtr(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock);
1712	int pdmR3IommuMemAccessBulkReadCCPtr(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t cPages, PCRTGCPHYS paGCPhysPages, uint32_t fFlags, const void **papvPages, PPGMPAGEMAPLOCK paLocks);
1713	int pdmR3IommuMemAccessBulkWriteCCPtr(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t cPages, PCRTGCPHYS paGCPhysPages, uint32_t fFlags, void **papvPages, PPGMPAGEMAPLOCK paLocks);
1714	# endif
1715	#endif
1716
1717	#if defined(IN_RING3) \|\| defined(IN_RING0)
1718	void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1719	void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1720	#endif
1721
1722	#ifdef IN_RING0
1723	DECLHIDDEN(bool) pdmR0IsaSetIrq(PGVM pGVM, int iIrq, int iLevel, uint32_t uTagSrc);
1724	#endif
1725
1726	#ifdef VBOX_WITH_DBGF_TRACING
1727	# ifdef IN_RING3
1728	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_IoPortCreateEx(PPDMDEVINS pDevIns, RTIOPORT cPorts, uint32_t fFlags, PPDMPCIDEV pPciDev,
1729	uint32_t iPciRegion, PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
1730	PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr, RTR3PTR pvUser,
1731	const char *pszDesc, PCIOMIOPORTDESC paExtDescs, PIOMIOPORTHANDLE phIoPorts);
1732	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_IoPortMap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT Port);
1733	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_IoPortUnmap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts);
1734	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_MmioCreateEx(PPDMDEVINS pDevIns, RTGCPHYS cbRegion,
1735	uint32_t fFlags, PPDMPCIDEV pPciDev, uint32_t iPciRegion,
1736	PFNIOMMMIONEWWRITE pfnWrite, PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill,
1737	void pvUser, const char pszDesc, PIOMMMIOHANDLE phRegion);
1738	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_MmioMap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS GCPhys);
1739	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_MmioUnmap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion);
1740	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags);
1741	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags);
1742	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags);
1743	DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags);
1744	DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel);
1745	DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel);
1746	DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
1747	DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
1748	# elif defined(IN_RING0)
1749	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_IoPortSetUpContextEx(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts,
1750	PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
1751	PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr,
1752	void *pvUser);
1753	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_MmioSetUpContextEx(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIONEWWRITE pfnWrite,
1754	PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill, void *pvUser);
1755	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags);
1756	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags);
1757	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags);
1758	DECL_HIDDEN_CALLBACK(int) pdmR0DevHlpTracing_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags);
1759	DECL_HIDDEN_CALLBACK(void) pdmR0DevHlpTracing_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel);
1760	DECL_HIDDEN_CALLBACK(void) pdmR0DevHlpTracing_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel);
1761	DECL_HIDDEN_CALLBACK(void) pdmR0DevHlpTracing_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
1762	DECL_HIDDEN_CALLBACK(void) pdmR0DevHlpTracing_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
1763	# else
1764	# error "Invalid environment selected"
1765	# endif
1766	#endif
1767
1768
1769	/** @} */
1770
1771	RT_C_DECLS_END
1772
1773	#endif /* !VMM_INCLUDED_SRC_include_PDMInternal_h */
1774

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source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 89924

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