VirtualBox

source: vbox/trunk/src/VBox/VMM/testcase/tstCompiler.cpp@ 34796

Last change on this file since 34796 was 32036, checked in by vboxsync, 14 years ago

Removed X86_PTE_PAE_PG_MASK, renamed X86_PTE_PAE_PG_MASK_FULL to X86_PTE_PAE_PG_MASK.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 6.8 KB
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1/* $Id: tstCompiler.cpp 32036 2010-08-27 10:14:39Z vboxsync $ */
2/** @file
3 * Testing how the compiler deals with various things.
4 *
5 * This is testcase requires manual inspection and might not be very useful
6 * in non-optimized compiler modes.
7 */
8
9/*
10 * Copyright (C) 2006-2007 Oracle Corporation
11 *
12 * This file is part of VirtualBox Open Source Edition (OSE), as
13 * available from http://www.virtualbox.org. This file is free software;
14 * you can redistribute it and/or modify it under the terms of the GNU
15 * General Public License (GPL) as published by the Free Software
16 * Foundation, in version 2 as it comes in the "COPYING" file of the
17 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
18 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
19 */
20
21
22/*******************************************************************************
23* Header Files *
24*******************************************************************************/
25#include <VBox/dis.h>
26#include <VBox/disopcode.h>
27#include <iprt/stream.h>
28#include <iprt/err.h>
29#include <VBox/x86.h>
30#include <iprt/string.h>
31#include <iprt/message.h>
32#include <iprt/initterm.h>
33
34#if 1
35
36/**
37 * PAE page table entry.
38 */
39#ifdef __GNUC__
40__extension__ /* Makes it shut up about the 40 bit uint64_t field. */
41#endif
42typedef struct X86PTEPAEBITS64
43{
44 /** Flags whether(=1) or not the page is present. */
45 uint64_t u1Present : 1;
46 /** Read(=0) / Write(=1) flag. */
47 uint64_t u1Write : 1;
48 /** User(=1) / Supervisor(=0) flag. */
49 uint64_t u1User : 1;
50 /** Write Thru flag. If PAT enabled, bit 0 of the index. */
51 uint64_t u1WriteThru : 1;
52 /** Cache disabled flag. If PAT enabled, bit 1 of the index. */
53 uint64_t u1CacheDisable : 1;
54 /** Accessed flag.
55 * Indicates that the page have been read or written to. */
56 uint64_t u1Accessed : 1;
57 /** Dirty flag.
58 * Indicates that the page have been written to. */
59 uint64_t u1Dirty : 1;
60 /** Reserved / If PAT enabled, bit 2 of the index. */
61 uint64_t u1PAT : 1;
62 /** Global flag. (Ignored in all but final level.) */
63 uint64_t u1Global : 1;
64 /** Available for use to system software. */
65 uint64_t u3Available : 3;
66 /** Physical Page number of the next level. */
67 uint64_t u40PageNo : 40;
68 /** MBZ bits */
69 uint64_t u11Reserved : 11;
70 /** No Execute flag. */
71 uint64_t u1NoExecute : 1;
72} X86PTEPAEBITS64;
73/** Pointer to a page table entry. */
74typedef X86PTEPAEBITS64 *PX86PTEPAEBITS64;
75
76/**
77 * PAE Page table entry.
78 */
79typedef union X86PTEPAE64
80{
81 /** Bit field view. */
82 X86PTEPAEBITS64 n;
83 /** Unsigned integer view */
84 X86PGPAEUINT u;
85 /** 32-bit view. */
86 uint32_t au32[2];
87 /** 16-bit view. */
88 uint16_t au16[4];
89 /** 8-bit view. */
90 uint8_t au8[8];
91} X86PTEPAE64;
92/** Pointer to a PAE page table entry. */
93typedef X86PTEPAE64 *PX86PTEPAE64;
94/** @} */
95
96#else /* use current (uint32_t based) PAE structures */
97
98#define X86PTEPAE64 X86PTEPAE
99#define PX86PTEPAE64 PX86PTEPAE
100
101#endif
102
103
104void SetPresent(PX86PTE pPte)
105{
106 pPte->n.u1Present = 1;
107}
108
109
110void SetPresent64(PX86PTEPAE64 pPte)
111{
112 pPte->n.u1Present = 1;
113}
114
115
116void SetWriteDirtyAccessed(PX86PTE pPte)
117{
118 pPte->n.u1Write = 1;
119 pPte->n.u1Dirty = 1;
120 pPte->n.u1Accessed = 1;
121}
122
123
124void SetWriteDirtyAccessed64(PX86PTEPAE64 pPte)
125{
126 pPte->n.u1Write = 1;
127 pPte->n.u1Dirty = 1;
128 pPte->n.u1Accessed = 1;
129}
130
131
132void SetWriteDirtyAccessedClearAVL(PX86PTE pPte)
133{
134 pPte->n.u1Write = 1;
135 pPte->n.u1Dirty = 1;
136 pPte->n.u1Accessed = 1;
137 pPte->u &= ~RT_BIT(10);
138}
139
140
141void SetWriteDirtyAccessedClearAVL64(PX86PTEPAE64 pPte)
142{
143 pPte->n.u1Write = 1;
144 pPte->n.u1Dirty = 1;
145 pPte->n.u1Accessed = 1;
146 pPte->u &= ~RT_BIT(10); /* bad, but serves as demonstration. */
147}
148
149
150bool Test3232(X86PTEPAE Pte)
151{
152 return !!(Pte.u & RT_BIT(10));
153}
154
155
156bool Test3264(X86PTEPAE Pte)
157{
158 return !!(Pte.u & RT_BIT_64(10));
159}
160
161
162bool Test6432(X86PTEPAE64 Pte)
163{
164 return !!(Pte.u & RT_BIT(10));
165}
166
167
168bool Test6464(X86PTEPAE64 Pte)
169{
170 return !!(Pte.u & RT_BIT_64(10));
171}
172
173
174void Mix6432Consts(PX86PTEPAE64 pPteDst, PX86PTEPAE64 pPteSrc)
175{
176 pPteDst->u = pPteSrc->u & ~(X86_PTE_PAE_PG_MASK | X86_PTE_AVL_MASK | X86_PTE_PAT | X86_PTE_PCD | X86_PTE_PWT);
177}
178
179
180void Mix32Var64Const64Data(PX86PTEPAE64 pPteDst, uint32_t fMask, uint32_t fFlags)
181{
182 pPteDst->u = (pPteDst->u & (fMask | X86_PTE_PAE_PG_MASK)) | (fFlags & ~X86_PTE_PAE_PG_MASK);
183}
184
185
186X86PTE Return32BitStruct(PX86PTE paPT)
187{
188 return paPT[10];
189}
190
191
192X86PTEPAE64 Return64BitStruct(PX86PTEPAE64 paPT)
193{
194 return paPT[10];
195}
196
197
198static void DisasFunction(const char *pszName, PFNRT pv)
199{
200 RTPrintf("tstBitFields: Disassembly of %s:\n", pszName);
201 RTUINTPTR uCur = (uintptr_t)pv;
202 RTUINTPTR uCurMax = uCur + 256;
203 DISCPUSTATE Cpu;
204
205 memset(&Cpu, 0, sizeof(Cpu));
206 Cpu.mode = CPUMODE_32BIT;
207 do
208 {
209 char sz[256];
210 uint32_t cbInstr = 0;
211 if (RT_SUCCESS(DISInstr(&Cpu, uCur, 0, &cbInstr, sz)))
212 {
213 RTPrintf("tstBitFields: %s", sz);
214 uCur += cbInstr;
215 }
216 else
217 {
218 RTPrintf("tstBitFields: %p: %02x - DISInstr failed!\n", uCur, *(uint8_t *)(uintptr_t)uCur);
219 uCur += 1;
220 }
221 } while (Cpu.pCurInstr->opcode != OP_RETN || uCur > uCurMax);
222}
223
224
225int main()
226{
227 int rc = RTR3Init();
228 if (RT_FAILURE(rc))
229 return RTMsgInitFailure(rc);
230
231 RTPrintf("tstBitFields: This testcase requires manual inspection of the output!\n"
232 "\n"
233 "tstBitFields: The compiler must be able to combine operations when\n"
234 "tstBitFields: optimizing, if not we're screwed.\n"
235 "\n");
236 DisasFunction("SetPresent", (PFNRT)&SetPresent);
237 RTPrintf("\n");
238 DisasFunction("SetPresent64", (PFNRT)&SetPresent64);
239 RTPrintf("\n");
240 DisasFunction("SetWriteDirtyAccessed", (PFNRT)&SetWriteDirtyAccessed);
241 RTPrintf("\n");
242 DisasFunction("SetWriteDirtyAccessed64", (PFNRT)&SetWriteDirtyAccessed64);
243 RTPrintf("\n");
244 DisasFunction("SetWriteDirtyAccessedClearAVL", (PFNRT)&SetWriteDirtyAccessedClearAVL);
245 RTPrintf("\n");
246 DisasFunction("SetWriteDirtyAccessedClearAVL64", (PFNRT)&SetWriteDirtyAccessedClearAVL64);
247 RTPrintf("\n");
248 DisasFunction("Test3232", (PFNRT)&Test3232);
249 DisasFunction("Test3264", (PFNRT)&Test3264);
250 DisasFunction("Test6432", (PFNRT)&Test6432);
251 DisasFunction("Test6464", (PFNRT)&Test6464);
252 RTPrintf("\n");
253 DisasFunction("Mix6432Consts", (PFNRT)&Mix6432Consts);
254 RTPrintf("\n");
255 DisasFunction("Mix32Var64Const64Data", (PFNRT)&Mix32Var64Const64Data);
256 RTPrintf("\n");
257 DisasFunction("Return32BitStruct", (PFNRT)&Return32BitStruct);
258 RTPrintf("\n");
259 DisasFunction("Return64BitStruct", (PFNRT)&Return64BitStruct);
260 return 0;
261}
262
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