| 1 | /* $Id: tstIEMCheckMc.cpp 39402 2011-11-23 16:25:04Z vboxsync $ */
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| 2 | /** @file
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| 3 | * IEM Testcase - Check the "Microcode".
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2011 Oracle Corporation
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| 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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| 18 | /*******************************************************************************
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| 19 | * Header Files *
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| 20 | *******************************************************************************/
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| 21 | #include <iprt/assert.h>
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| 22 | #include <iprt/rand.h>
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| 23 | #include <iprt/test.h>
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| 24 |
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| 25 | #include <VBox/types.h>
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| 26 | #include <VBox/err.h>
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| 27 | #include "../include/IEMInternal.h"
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| 28 |
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| 29 |
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| 30 | /*******************************************************************************
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| 31 | * Global Variables *
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| 32 | *******************************************************************************/
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| 33 | bool volatile g_fRandom;
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| 34 | uint8_t volatile g_bRandom;
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| 35 |
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| 36 |
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| 37 | /** For hacks. */
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| 38 | #define TST_IEM_CHECK_MC
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| 39 |
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| 40 | #define CHK_TYPE(a_ExpectedType, a_Param) \
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| 41 | do { a_ExpectedType const * pCheckType = &(a_Param); NOREF(pCheckType); } while (0)
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| 42 | #define CHK_PTYPE(a_ExpectedType, a_Param) \
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| 43 | do { a_ExpectedType pCheckType = (a_Param); NOREF(pCheckType); } while (0)
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| 44 |
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| 45 | #define CHK_CONST(a_ExpectedType, a_Const) \
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| 46 | do { \
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| 47 | AssertCompile(((a_Const) >> 1) == ((a_Const) >> 1)); \
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| 48 | AssertCompile((a_ExpectedType)(a_Const) == (a_Const)); \
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| 49 | } while (0)
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| 50 |
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| 51 | #define CHK_SINGLE_BIT(a_ExpectedType, a_fBitMask) \
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| 52 | do { \
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| 53 | CHK_CONST(a_ExpectedType, a_fBitMask); \
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| 54 | AssertCompile(RT_IS_POWER_OF_TWO(a_fBitMask)); \
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| 55 | } while (0)
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| 56 |
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| 57 | #define CHK_GCPTR(a_EffAddr) \
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| 58 | CHK_TYPE(RTGCPTR, a_EffAddr)
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| 59 |
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| 60 | #define CHK_SEG_IDX(a_iSeg) \
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| 61 | do { \
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| 62 | uint8_t iMySeg = (a_iSeg); NOREF(iMySeg); /** @todo const or variable. grr. */ \
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| 63 | } while (0)
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| 64 |
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| 65 |
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| 66 | /** @name Other stubs.
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| 67 | * @{ */
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| 68 |
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| 69 | typedef VBOXSTRICTRC (* PFNIEMOP)(PIEMCPU pIemCpu);
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| 70 | #define FNIEMOP_DEF(a_Name) \
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| 71 | static VBOXSTRICTRC a_Name(PIEMCPU pIemCpu) RT_NO_THROW
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| 72 | #define FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) \
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| 73 | static VBOXSTRICTRC a_Name(PIEMCPU pIemCpu, a_Type0 a_Name0) RT_NO_THROW
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| 74 | #define FNIEMOP_DEF_2(a_Name, a_Type0, a_Name0, a_Type1, a_Name1) \
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| 75 | static VBOXSTRICTRC a_Name(PIEMCPU pIemCpu, a_Type0 a_Name0, a_Type1 a_Name1) RT_NO_THROW
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| 76 |
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| 77 | #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: return VERR_IPE_NOT_REACHED_DEFAULT_CASE
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| 78 |
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| 79 | #define IEM_OPCODE_GET_NEXT_U8(a_pu8) do { *(a_pu8) = g_bRandom; CHK_PTYPE(uint8_t *, a_pu8); } while (0)
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| 80 | #define IEM_OPCODE_GET_NEXT_U16(a_pu16) do { *(a_pu16) = g_bRandom; CHK_PTYPE(uint16_t *, a_pu16); } while (0)
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| 81 | #define IEM_OPCODE_GET_NEXT_U16_ZX_U32(a_pu32) do { *(a_pu32) = g_bRandom; CHK_PTYPE(uint32_t *, a_pu32); } while (0)
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| 82 | #define IEM_OPCODE_GET_NEXT_U16_ZX_U64(a_pu64) do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
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| 83 | #define IEM_OPCODE_GET_NEXT_U32(a_pu32) do { *(a_pu32) = g_bRandom; CHK_PTYPE(uint32_t *, a_pu32); } while (0)
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| 84 | #define IEM_OPCODE_GET_NEXT_U32_ZX_U64(a_pu64) do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
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| 85 | #define IEM_OPCODE_GET_NEXT_S32_SX_U64(a_pu64) do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
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| 86 | #define IEM_OPCODE_GET_NEXT_U64(a_pu64) do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
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| 87 | #define IEM_OPCODE_GET_NEXT_S8(a_pi8) do { *(a_pi8) = g_bRandom; CHK_PTYPE(int8_t *, a_pi8); } while (0)
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| 88 | #define IEM_OPCODE_GET_NEXT_S16(a_pi16) do { *(a_pi16) = g_bRandom; CHK_PTYPE(int16_t *, a_pi16); } while (0)
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| 89 | #define IEM_OPCODE_GET_NEXT_S32(a_pi32) do { *(a_pi32) = g_bRandom; CHK_PTYPE(int32_t *, a_pi32); } while (0)
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| 90 | #define IEMOP_HLP_NO_LOCK_PREFIX() do { } while (0)
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| 91 | #define IEMOP_HLP_NO_64BIT() do { } while (0)
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| 92 | #define IEMOP_HLP_DEFAULT_64BIT_OP_SIZE() do { } while (0)
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| 93 | #define IEMOP_RAISE_DIVIDE_ERROR() VERR_TRPM_ACTIVE_TRAP
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| 94 | #define IEMOP_RAISE_INVALID_OPCODE() VERR_TRPM_ACTIVE_TRAP
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| 95 | #define IEMOP_RAISE_INVALID_LOCK_PREFIX() VERR_TRPM_ACTIVE_TRAP
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| 96 | #define IEMOP_MNEMONIC(a_szMnemonic) do { } while (0)
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| 97 | #define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps) do { } while (0)
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| 98 | #define FNIEMOP_STUB(a_Name) \
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| 99 | FNIEMOP_DEF(a_Name) { return VERR_NOT_IMPLEMENTED; } \
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| 100 | typedef int ignore_semicolon
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| 101 | #define FNIEMOP_STUB_1(a_Name, a_Type0, a_Name0) \
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| 102 | FNIEMOP_DEF_1(a_Name, a_Type0, a_Name0) { return VERR_NOT_IMPLEMENTED; } \
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| 103 | typedef int ignore_semicolon
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| 104 |
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| 105 |
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| 106 | #define FNIEMOP_CALL(a_pfn) (a_pfn)(pIemCpu)
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| 107 | #define FNIEMOP_CALL_1(a_pfn, a0) (a_pfn)(pIemCpu, a0)
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| 108 | #define FNIEMOP_CALL_2(a_pfn, a0, a1) (a_pfn)(pIemCpu, a0, a1)
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| 109 |
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| 110 | #define IEM_IS_REAL_OR_V86_MODE(a_pIemCpu) (g_fRandom)
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| 111 | #define IEM_IS_LONG_MODE(a_pIemCpu) (g_fRandom)
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| 112 | #define IEM_IS_REAL_MODE(a_pIemCpu) (g_fRandom)
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| 113 | #define IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(a_fEcx) (g_fRandom)
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| 114 | #define IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(a_fEdx) (g_fRandom)
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| 115 |
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| 116 | #define iemRecalEffOpSize(a_pIemCpu) do { } while (0)
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| 117 |
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| 118 | IEMOPBINSIZES g_iemAImpl_add;
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| 119 | IEMOPBINSIZES g_iemAImpl_adc;
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| 120 | IEMOPBINSIZES g_iemAImpl_sub;
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| 121 | IEMOPBINSIZES g_iemAImpl_sbb;
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| 122 | IEMOPBINSIZES g_iemAImpl_or;
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| 123 | IEMOPBINSIZES g_iemAImpl_xor;
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| 124 | IEMOPBINSIZES g_iemAImpl_and;
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| 125 | IEMOPBINSIZES g_iemAImpl_cmp;
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| 126 | IEMOPBINSIZES g_iemAImpl_test;
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| 127 | IEMOPBINSIZES g_iemAImpl_bt;
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| 128 | IEMOPBINSIZES g_iemAImpl_btc;
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| 129 | IEMOPBINSIZES g_iemAImpl_btr;
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| 130 | IEMOPBINSIZES g_iemAImpl_bts;
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| 131 | IEMOPBINSIZES g_iemAImpl_bsf;
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| 132 | IEMOPBINSIZES g_iemAImpl_bsr;
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| 133 | IEMOPBINSIZES g_iemAImpl_imul_two;
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| 134 | PCIEMOPBINSIZES g_apIemImplGrp1[8];
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| 135 | IEMOPUNARYSIZES g_iemAImpl_inc;
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| 136 | IEMOPUNARYSIZES g_iemAImpl_dec;
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| 137 | IEMOPUNARYSIZES g_iemAImpl_neg;
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| 138 | IEMOPUNARYSIZES g_iemAImpl_not;
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| 139 | IEMOPSHIFTSIZES g_iemAImpl_rol;
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| 140 | IEMOPSHIFTSIZES g_iemAImpl_ror;
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| 141 | IEMOPSHIFTSIZES g_iemAImpl_rcl;
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| 142 | IEMOPSHIFTSIZES g_iemAImpl_rcr;
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| 143 | IEMOPSHIFTSIZES g_iemAImpl_shl;
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| 144 | IEMOPSHIFTSIZES g_iemAImpl_shr;
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| 145 | IEMOPSHIFTSIZES g_iemAImpl_sar;
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| 146 | IEMOPMULDIVSIZES g_iemAImpl_mul;
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| 147 | IEMOPMULDIVSIZES g_iemAImpl_imul;
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| 148 | IEMOPMULDIVSIZES g_iemAImpl_div;
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| 149 | IEMOPMULDIVSIZES g_iemAImpl_idiv;
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| 150 | IEMOPSHIFTDBLSIZES g_iemAImpl_shld;
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| 151 | IEMOPSHIFTDBLSIZES g_iemAImpl_shrd;
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| 152 |
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| 153 |
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| 154 | #define iemAImpl_idiv_u8 ((PFNIEMAIMPLMULDIVU8)0)
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| 155 | #define iemAImpl_div_u8 ((PFNIEMAIMPLMULDIVU8)0)
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| 156 | #define iemAImpl_imul_u8 ((PFNIEMAIMPLMULDIVU8)0)
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| 157 | #define iemAImpl_mul_u8 ((PFNIEMAIMPLMULDIVU8)0)
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| 158 |
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| 159 | /** @} */
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| 160 |
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| 161 |
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| 162 | #define IEM_REPEAT_0(a_Callback, a_User) do { } while (0)
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| 163 | #define IEM_REPEAT_1(a_Callback, a_User) a_Callback##_CALLBACK(0, a_User)
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| 164 | #define IEM_REPEAT_2(a_Callback, a_User) IEM_REPEAT_1(a_Callback, a_User); a_Callback##_CALLBACK(1, a_User)
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| 165 | #define IEM_REPEAT_3(a_Callback, a_User) IEM_REPEAT_2(a_Callback, a_User); a_Callback##_CALLBACK(2, a_User)
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| 166 | #define IEM_REPEAT_4(a_Callback, a_User) IEM_REPEAT_3(a_Callback, a_User); a_Callback##_CALLBACK(3, a_User)
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| 167 | #define IEM_REPEAT_5(a_Callback, a_User) IEM_REPEAT_4(a_Callback, a_User); a_Callback##_CALLBACK(4, a_User)
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| 168 | #define IEM_REPEAT_6(a_Callback, a_User) IEM_REPEAT_5(a_Callback, a_User); a_Callback##_CALLBACK(5, a_User)
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| 169 | #define IEM_REPEAT_7(a_Callback, a_User) IEM_REPEAT_6(a_Callback, a_User); a_Callback##_CALLBACK(6, a_User)
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| 170 | #define IEM_REPEAT_8(a_Callback, a_User) IEM_REPEAT_7(a_Callback, a_User); a_Callback##_CALLBACK(7, a_User)
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| 171 | #define IEM_REPEAT_9(a_Callback, a_User) IEM_REPEAT_8(a_Callback, a_User); a_Callback##_CALLBACK(8, a_User)
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| 172 | #define IEM_REPEAT(a_cTimes, a_Callback, a_User) RT_CONCAT(IEM_REPEAT_,a_cTimes)(a_Callback, a_User)
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| 173 |
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| 174 |
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| 175 |
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| 176 | /** @name Microcode test stubs
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| 177 | * @{ */
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| 178 |
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| 179 | #define IEM_ARG_CHECK_CALLBACK(a_idx, a_User) int RT_CONCAT(iArgCheck_,a_idx); NOREF(RT_CONCAT(iArgCheck_,a_idx))
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| 180 | #define IEM_MC_BEGIN(a_cArgs, a_cLocals) \
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| 181 | { \
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| 182 | const uint8_t cArgs = (a_cArgs); NOREF(cArgs); \
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| 183 | const uint8_t cLocals = (a_cArgs); NOREF(cLocals); \
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| 184 | IEM_REPEAT(a_cArgs, IEM_ARG_CHECK, 0); \
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| 185 |
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| 186 | #define IEM_MC_END() \
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| 187 | }
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| 188 |
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| 189 | #define IEM_MC_PAUSE() do {} while (0)
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| 190 | #define IEM_MC_CONTINUE() do {} while (0)
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| 191 | #define IEM_MC_ADVANCE_RIP() do {} while (0)
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| 192 | #define IEM_MC_REL_JMP_S8(a_i8) CHK_TYPE(int8_t, a_i8)
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| 193 | #define IEM_MC_REL_JMP_S16(a_i16) CHK_TYPE(int16_t, a_i16)
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| 194 | #define IEM_MC_REL_JMP_S32(a_i32) CHK_TYPE(int32_t, a_i32)
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| 195 | #define IEM_MC_SET_RIP_U16(a_u16NewIP) CHK_TYPE(uint16_t, a_u16NewIP)
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| 196 | #define IEM_MC_SET_RIP_U32(a_u32NewIP) CHK_TYPE(uint32_t, a_u32NewIP)
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| 197 | #define IEM_MC_SET_RIP_U64(a_u64NewIP) CHK_TYPE(uint64_t, a_u64NewIP)
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| 198 | #define IEM_MC_RAISE_DIVIDE_ERROR() return VERR_TRPM_ACTIVE_TRAP
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| 199 | #define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() do {} while (0)
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| 200 | #define IEM_MC_MAYBE_RAISE_FPU_XCPT() do {} while (0)
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| 201 | #define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() do {} while (0)
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| 202 |
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| 203 | #define IEM_MC_LOCAL(a_Type, a_Name) \
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| 204 | a_Type a_Name; NOREF(a_Name)
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| 205 | #define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) \
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| 206 | a_Type const a_Name = (a_Value); \
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| 207 | NOREF(a_Name)
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| 208 | #define IEM_MC_REF_LOCAL(a_pRefArg, a_Local) \
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| 209 | (a_pRefArg) = &(a_Local)
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| 210 |
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| 211 | #define IEM_MC_ARG(a_Type, a_Name, a_iArg) \
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| 212 | RT_CONCAT(iArgCheck_,a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
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| 213 | int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); NOREF(RT_CONCAT3(iArgCheck_,a_iArg,a_Name)); \
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| 214 | AssertCompile((a_iArg) < cArgs); \
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| 215 | a_Type a_Name; \
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| 216 | NOREF(a_Name)
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| 217 | #define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) \
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| 218 | RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
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| 219 | int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); NOREF(RT_CONCAT3(iArgCheck_,a_iArg,a_Name)); \
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| 220 | AssertCompile((a_iArg) < cArgs); \
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| 221 | a_Type const a_Name = (a_Value); \
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| 222 | NOREF(a_Name)
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| 223 | #define IEM_MC_ARG_LOCAL_EFLAGS(a_pName, a_Name, a_iArg) \
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| 224 | RT_CONCAT(iArgCheck_, a_iArg) = 1; NOREF(RT_CONCAT(iArgCheck_,a_iArg)); \
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| 225 | int RT_CONCAT3(iArgCheck_,a_iArg,a_Name); NOREF(RT_CONCAT3(iArgCheck_,a_iArg,a_Name)); \
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| 226 | AssertCompile((a_iArg) < cArgs); \
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| 227 | uint32_t a_Name; \
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| 228 | uint32_t *a_pName = &a_Name; \
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| 229 | NOREF(a_pName)
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| 230 |
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| 231 | #define IEM_MC_COMMIT_EFLAGS(a_EFlags) CHK_TYPE(uint32_t, a_EFlags)
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| 232 | #define IEM_MC_ASSIGN(a_VarOrArg, a_CVariableOrConst) (a_VarOrArg) = (0)
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| 233 | #define IEM_MC_ASSIGN_TO_SMALLER IEM_MC_ASSIGN
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| 234 |
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| 235 | #define IEM_MC_FETCH_GREG_U8(a_u8Dst, a_iGReg) do { (a_u8Dst) = 0; CHK_TYPE(uint8_t, a_u8Dst); } while (0)
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| 236 | #define IEM_MC_FETCH_GREG_U8_ZX_U16(a_u16Dst, a_iGReg) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 237 | #define IEM_MC_FETCH_GREG_U8_ZX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 238 | #define IEM_MC_FETCH_GREG_U8_ZX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 239 | #define IEM_MC_FETCH_GREG_U8_SX_U16(a_u16Dst, a_iGReg) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 240 | #define IEM_MC_FETCH_GREG_U8_SX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 241 | #define IEM_MC_FETCH_GREG_U8_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 242 | #define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 243 | #define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 244 | #define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 245 | #define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 246 | #define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 247 | #define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 248 | #define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 249 | #define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 250 | #define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 251 | #define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64
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| 252 | #define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 253 | #define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 254 | #define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 255 | #define IEM_MC_FETCH_CR0_U16(a_u16Dst) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 256 | #define IEM_MC_FETCH_CR0_U32(a_u32Dst) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 257 | #define IEM_MC_FETCH_CR0_U64(a_u64Dst) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 258 | #define IEM_MC_FETCH_EFLAGS(a_EFlags) do { (a_EFlags) = 0; CHK_TYPE(uint32_t, a_EFlags); } while (0)
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| 259 | #define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { (a_EFlags) = 0; CHK_TYPE(uint8_t, a_EFlags); } while (0)
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| 260 | #define IEM_MC_FETCH_FSW(a_u16Fsw) do { (a_u16Fsw) = 0; CHK_TYPE(uint16_t, a_u16Fsw); } while (0)
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| 261 | #define IEM_MC_STORE_GREG_U8(a_iGReg, a_u8Value) do { CHK_TYPE(uint8_t, a_u8Value); } while (0)
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| 262 | #define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) do { CHK_TYPE(uint16_t, a_u16Value); } while (0)
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| 263 | #define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) do { } while (0)
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| 264 | #define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) do { } while (0)
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| 265 | #define IEM_MC_STORE_GREG_U8_CONST(a_iGReg, a_u8C) do { AssertCompile((uint8_t )(a_u8C) == (a_u8C) ); } while (0)
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| 266 | #define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16C) do { AssertCompile((uint16_t)(a_u16C) == (a_u16C)); } while (0)
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| 267 | #define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32C) do { AssertCompile((uint32_t)(a_u32C) == (a_u32C)); } while (0)
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| 268 | #define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u64C) do { AssertCompile((uint64_t)(a_u64C) == (a_u64C)); } while (0)
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| 269 | #define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) do { } while (0)
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| 270 | #define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg) do { (a_pu8Dst) = (uint8_t *)((uintptr_t)0); CHK_PTYPE(uint8_t *, a_pu8Dst); } while (0)
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| 271 | #define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) do { (a_pu16Dst) = (uint16_t *)((uintptr_t)0); CHK_PTYPE(uint16_t *, a_pu16Dst); } while (0)
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| 272 | #define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) do { (a_pu32Dst) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pu32Dst); } while (0)
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| 273 | #define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) do { (a_pu64Dst) = (uint64_t *)((uintptr_t)0); CHK_PTYPE(uint64_t *, a_pu64Dst); } while (0)
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| 274 | #define IEM_MC_REF_EFLAGS(a_pEFlags) do { (a_pEFlags) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pEFlags); } while (0)
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| 275 |
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| 276 | #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0)
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| 277 | #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0)
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| 278 | #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0)
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| 279 | #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0)
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| 280 | #define IEM_MC_SUB_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0)
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| 281 | #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0)
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| 282 | #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0)
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| 283 | #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0)
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| 284 |
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| 285 | #define IEM_MC_AND_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0)
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| 286 | #define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0)
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| 287 | #define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0)
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| 288 | #define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0)
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| 289 | #define IEM_MC_OR_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0)
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| 290 | #define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0)
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| 291 | #define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0)
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| 292 | #define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0)
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| 293 |
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| 294 | #ifdef _MSC_VER
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| 295 | #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u8Value) += 1; /*CHK_CONST(uint8_t, a_u8Value); */ } while (0)
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| 296 | #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u16Value) += 1; /*CHK_CONST(uint16_t, a_u16Value);*/ } while (0)
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| 297 | #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { (a_u32Value) += 1; /*CHK_CONST(uint32_t, a_u32Value);*/ } while (0)
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| 298 | #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { (a_u64Value) += 1; /*CHK_CONST(uint64_t, a_u64Value);*/ } while (0)
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| 299 | #else
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| 300 | #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u8Value) += 1; CHK_CONST(uint8_t, a_u8Value); } while (0)
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| 301 | #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u16Value) += 1; CHK_CONST(uint16_t, a_u16Value); } while (0)
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| 302 | #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { (a_u32Value) += 1; CHK_CONST(uint32_t, a_u32Value); } while (0)
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| 303 | #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { (a_u64Value) += 1; CHK_CONST(uint64_t, a_u64Value); } while (0)
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| 304 | #endif
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| 305 | #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); CHK_GCPTR(a_EffAddr); } while (0)
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| 306 | #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); CHK_GCPTR(a_EffAddr); } while (0)
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| 307 | #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) do { (a_EffAddr) += (a_i64); CHK_GCPTR(a_EffAddr); } while (0)
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| 308 | #define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) &= (a_u8Mask); CHK_TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); } while (0)
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| 309 | #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) &= (a_u16Mask); CHK_TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); } while (0)
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| 310 | #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); } while (0)
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| 311 | #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) do { (a_u64Local) &= (a_u64Mask); CHK_TYPE(uint64_t, a_u64Local); CHK_CONST(uint64_t, a_u64Mask); } while (0)
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| 312 | #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) do { (a_u16Arg) &= (a_u16Mask); CHK_TYPE(uint16_t, a_u16Arg); CHK_CONST(uint16_t, a_u16Mask); } while (0)
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| 313 | #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) do { (a_u32Arg) &= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Arg); CHK_CONST(uint32_t, a_u32Mask); } while (0)
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| 314 | #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) do { (a_u64Arg) &= (a_u64Mask); CHK_TYPE(uint64_t, a_u64Arg); CHK_CONST(uint64_t, a_u64Mask); } while (0)
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| 315 | #define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) do { (a_u8Local) |= (a_u8Mask); CHK_TYPE(uint8_t, a_u8Local); CHK_CONST(uint8_t, a_u8Mask); } while (0)
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| 316 | #define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); } while (0)
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| 317 | #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) >>= (a_cShift); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 318 | #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) >>= (a_cShift); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 319 | #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) >>= (a_cShift); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 320 | #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) <<= (a_cShift); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 321 | #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) <<= (a_cShift); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 322 | #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) <<= (a_cShift); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); } while (0)
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| 323 | #define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Local); } while (0)
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| 324 | #define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) do { (a_u32Local) |= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Local); } while (0)
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| 325 | #define IEM_MC_SET_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); } while (0)
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| 326 | #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); } while (0)
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| 327 | #define IEM_MC_FLIP_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); } while (0)
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| 328 |
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| 329 | #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 330 | #define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) do { CHK_TYPE(uint16_t, a_GCPtrMem16); } while (0)
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| 331 | #define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) do { CHK_TYPE(uint32_t, a_GCPtrMem32); } while (0)
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| 332 | #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 333 | #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 334 | #define IEM_MC_FETCH_MEM_S32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 335 | #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 336 |
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| 337 | #define IEM_MC_FETCH_MEM_U8_DISP(a_u8Dst, a_iSeg, a_GCPtrMem, a_offDisp) \
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| 338 | do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint8_t, a_u8Dst); } while (0)
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| 339 | #define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) \
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| 340 | do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint16_t, a_u16Dst); } while (0)
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| 341 | #define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) \
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| 342 | do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint32_t, a_u32Dst); } while (0)
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| 343 | #define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) \
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| 344 | do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_offDisp); CHK_TYPE(uint64_t, a_u64Dst); } while (0)
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| 345 |
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| 346 | #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 347 | #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 348 | #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 349 | #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 350 | #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 351 | #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 352 | #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 353 | #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 354 | #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 355 | #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 356 | #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 357 | #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0)
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| 358 | #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(uint8_t, a_u8Value); CHK_SEG_IDX(a_iSeg); } while (0)
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| 359 | #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(uint16_t, a_u16Value); } while (0)
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| 360 | #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(uint32_t, a_u32Value); } while (0)
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| 361 | #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) do { CHK_GCPTR(a_GCPtrMem); CHK_TYPE(uint64_t, a_u64Value); } while (0)
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| 362 | #define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) do { CHK_GCPTR(a_GCPtrMem); CHK_CONST(uint8_t, a_u8C); } while (0)
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| 363 |
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| 364 | #define IEM_MC_PUSH_U16(a_u16Value) do {} while (0)
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| 365 | #define IEM_MC_PUSH_U32(a_u32Value) do {} while (0)
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| 366 | #define IEM_MC_PUSH_U64(a_u64Value) do {} while (0)
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| 367 | #define IEM_MC_POP_U16(a_pu16Value) do {} while (0)
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| 368 | #define IEM_MC_POP_U32(a_pu32Value) do {} while (0)
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| 369 | #define IEM_MC_POP_U64(a_pu64Value) do {} while (0)
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| 370 | #define IEM_MC_MEM_MAP(a_pMem, a_fAccess, a_iSeg, a_GCPtrMem, a_iArg) do { NOREF(a_fAccess); } while (0)
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| 371 | #define IEM_MC_MEM_MAP_EX(a_pvMem, a_fAccess, a_cbMem, a_iSeg, a_GCPtrMem, a_iArg) do {} while (0)
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| 372 | #define IEM_MC_MEM_COMMIT_AND_UNMAP(a_pvMem, a_fAccess) do {} while (0)
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| 373 | #define IEM_MC_CALC_RM_EFF_ADDR(a_GCPtrEff, bRm) do { (a_GCPtrEff) = 0; CHK_GCPTR(a_GCPtrEff); } while (0)
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| 374 | #define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) do {} while (0)
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| 375 | #define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) do {} while (0)
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| 376 | #define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) do {} while (0)
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| 377 | #define IEM_MC_CALL_AIMPL_4(a_rc, a_pfn, a0, a1, a2, a3) do { (a_rc) = VINF_SUCCESS; } while (0)
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| 378 | #define IEM_MC_CALL_CIMPL_0(a_pfnCImpl) return VINF_SUCCESS
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| 379 | #define IEM_MC_CALL_CIMPL_1(a_pfnCImpl, a0) return VINF_SUCCESS
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| 380 | #define IEM_MC_CALL_CIMPL_2(a_pfnCImpl, a0, a1) return VINF_SUCCESS
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| 381 | #define IEM_MC_CALL_CIMPL_3(a_pfnCImpl, a0, a1, a2) return VINF_SUCCESS
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| 382 | #define IEM_MC_CALL_CIMPL_5(a_pfnCImpl, a0, a1, a2, a3, a4) return VINF_SUCCESS
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| 383 | #define IEM_MC_DEFER_TO_CIMPL_0(a_pfnCImpl) (VINF_SUCCESS)
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| 384 | #define IEM_MC_DEFER_TO_CIMPL_1(a_pfnCImpl, a0) (VINF_SUCCESS)
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| 385 | #define IEM_MC_DEFER_TO_CIMPL_2(a_pfnCImpl, a0, a1) (VINF_SUCCESS)
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| 386 | #define IEM_MC_DEFER_TO_CIMPL_3(a_pfnCImpl, a0, a1, a2) (VINF_SUCCESS)
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| 387 |
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| 388 | #define IEM_MC_IF_EFL_BIT_SET(a_fBit) if (g_fRandom) {
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| 389 | #define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) if (g_fRandom) {
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| 390 | #define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) if (g_fRandom) {
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| 391 | #define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) if (g_fRandom) {
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| 392 | #define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) if (g_fRandom) {
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| 393 | #define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) if (g_fRandom) {
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| 394 | #define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) if (g_fRandom) {
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| 395 | #define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) if (g_fRandom) {
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| 396 | #define IEM_MC_IF_CX_IS_NZ() if (g_fRandom) {
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| 397 | #define IEM_MC_IF_ECX_IS_NZ() if (g_fRandom) {
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| 398 | #define IEM_MC_IF_RCX_IS_NZ() if (g_fRandom) {
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| 399 | #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET(a_fBit) if (g_fRandom) {
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| 400 | #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET(a_fBit) if (g_fRandom) {
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| 401 | #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET(a_fBit) if (g_fRandom) {
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| 402 | #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) if (g_fRandom) {
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| 403 | #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) if (g_fRandom) {
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| 404 | #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) if (g_fRandom) {
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| 405 | #define IEM_MC_IF_LOCAL_IS_Z(a_Local) if ((a_Local) == 0) {
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| 406 | #define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) if (g_fRandom) {
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| 407 | #define IEM_MC_ELSE() } else {
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| 408 | #define IEM_MC_ENDIF() } do {} while (0)
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| 409 |
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| 410 | /** @} */
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| 411 |
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| 412 | #include "../VMMAll/IEMAllInstructions.cpp.h"
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| 413 |
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| 414 |
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| 415 |
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| 416 | /**
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| 417 | * Formalities...
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| 418 | */
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| 419 | int main()
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| 420 | {
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| 421 | RTTEST hTest;
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| 422 | RTEXITCODE rcExit = RTTestInitAndCreate("tstIEMCheckMc", &hTest);
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| 423 | if (rcExit == RTEXITCODE_SUCCESS)
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| 424 | {
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| 425 | RTTestBanner(hTest);
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| 426 | RTTestPrintf(hTest, RTTESTLVL_ALWAYS, "(this is only a compile test.)");
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| 427 | rcExit = RTTestSummaryAndDestroy(hTest);
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| 428 | }
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| 429 | return rcExit;
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| 430 | }
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