| 1 | ; $Id: tstX86-1A.asm 36768 2011-04-20 18:33:29Z vboxsync $
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| 2 | ;; @file
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| 3 | ; X86 instruction set testcase #1.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2011 Oracle Corporation
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| 8 | ;
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| 9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | ; available from http://www.virtualbox.org. This file is free software;
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| 11 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 12 | ; General Public License (GPL) as published by the Free Software
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| 13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | ;
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| 17 |
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| 18 |
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| 19 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 20 | ; Header Files ;
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| 21 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 22 | %include "iprt/asmdefs.mac"
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| 23 | %include "VBox/x86.mac"
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| 24 |
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| 25 | ;; @todo Move this to a header?
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| 26 | struc TRAPINFO
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| 27 | .uTrapPC RTCCPTR_RES 1
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| 28 | .uResumePC RTCCPTR_RES 1
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| 29 | .u8TrapNo resb 1
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| 30 | .cbInstr resb 1
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| 31 | .au8Padding resb (RTCCPTR_CB*2 - 2)
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| 32 | endstruc
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| 33 |
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| 34 |
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| 35 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 36 | ; Global Variables ;
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| 37 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 38 | BEGINDATA
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| 39 | extern NAME(g_pbEfPage)
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| 40 |
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| 41 | g_szAlpha:
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| 42 | db "abcdefghijklmnopqrstuvwxyz", 0
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| 43 | g_szAlpha_end:
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| 44 | %define g_cchAlpha (g_szAlpha_end - g_szAlpha)
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| 45 | db 0, 0, 0,
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| 46 |
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| 47 | ;;
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| 48 | ; The last global data item. We build this as we write the code.
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| 49 | GLOBALNAME g_aTrapInfo
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| 50 |
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| 51 |
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| 52 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 53 | ; Defined Constants And Macros ;
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| 54 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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| 55 | %define X86_XCPT_GP 13
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| 56 | %define X86_XCPT_PF 14
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| 57 |
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| 58 | ;;
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| 59 | ; Macro for recording a trapping instruction (simple).
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| 60 | ;
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| 61 | ; @param 1 The trap number.
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| 62 | ; @param 2+ The instruction which should trap.
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| 63 | %macro ShouldTrap 2+
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| 64 | ..trap:
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| 65 | %2
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| 66 | ..trap_end:
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| 67 | mov eax, __LINE__
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| 68 | jmp .failed
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| 69 | BEGINDATA
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| 70 | ..trapinfo: istruc TRAPINFO
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| 71 | at TRAPINFO.uTrapPC, RTCCPTR_DEF ..trap
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| 72 | at TRAPINFO.uResumePC, RTCCPTR_DEF ..resume
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| 73 | at TRAPINFO.u8TrapNo, db %1
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| 74 | at TRAPINFO.cbInstr, db (..trap_end - ..trap)
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| 75 | iend
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| 76 | BEGINCODE
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| 77 | ..resume:
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| 78 | %endmacro
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| 79 |
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| 80 |
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| 81 |
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| 82 | BEGINCODE
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| 83 |
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| 84 | ;;
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| 85 | ; Loads all general registers except xBP and xSP with unique values.
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| 86 | ;
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| 87 | x861_LoadUniqueRegValues:
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| 88 | %ifdef RT_ARCH_AMD64
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| 89 | mov rax, 00000000000000000h
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| 90 | mov rcx, 01111111111111111h
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| 91 | mov rdx, 02222222222222222h
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| 92 | mov rbx, 03333333333333333h
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| 93 | mov rsi, 06666666666666666h
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| 94 | mov rdi, 07777777777777777h
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| 95 | mov r8, 08888888888888888h
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| 96 | mov r9, 09999999999999999h
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| 97 | mov r10, 0aaaaaaaaaaaaaaaah
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| 98 | mov r11, 0bbbbbbbbbbbbbbbbh
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| 99 | mov r12, 0cccccccccccccccch
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| 100 | mov r13, 0ddddddddddddddddh
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| 101 | mov r14, 0eeeeeeeeeeeeeeeeh
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| 102 | mov r15, 0ffffffffffffffffh
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| 103 | %else
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| 104 | mov eax, 000000000h
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| 105 | mov ecx, 011111111h
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| 106 | mov edx, 022222222h
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| 107 | mov ebx, 033333333h
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| 108 | mov esi, 066666666h
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| 109 | mov edi, 077777777h
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| 110 | %endif
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| 111 | ret
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| 112 | ; end x861_LoadUniqueRegValues
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| 113 |
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| 114 |
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| 115 | ;;
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| 116 | ; Clears all general registers except xBP and xSP.
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| 117 | ;
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| 118 | x861_ClearRegisters:
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| 119 | xor eax, eax
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| 120 | xor ebx, ebx
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| 121 | xor ecx, ecx
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| 122 | xor edx, edx
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| 123 | xor esi, esi
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| 124 | xor edi, edi
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| 125 | %ifdef RT_ARCH_AMD64
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| 126 | xor r8, r8
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| 127 | xor r9, r9
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| 128 | xor r10, r10
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| 129 | xor r11, r11
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| 130 | xor r12, r12
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| 131 | xor r13, r13
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| 132 | xor r14, r14
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| 133 | xor r15, r15
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| 134 | %endif
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| 135 | ret
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| 136 | ; x861_ClearRegisters
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| 137 |
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| 138 |
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| 139 | BEGINPROC x861_Test1
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| 140 | push xBP
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| 141 | mov xBP, xSP
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| 142 | pushf
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| 143 | push xBX
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| 144 | push xCX
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| 145 | push xDX
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| 146 | push xSI
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| 147 | push xDI
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| 148 | %ifdef RT_ARCH_AMD64
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| 149 | push r8
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| 150 | push r9
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| 151 | push r10
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| 152 | push r11
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| 153 | push r12
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| 154 | push r13
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| 155 | push r14
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| 156 | push r15
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| 157 | %endif
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| 158 |
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| 159 | ;
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| 160 | ; Odd push behavior
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| 161 | ;
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| 162 | %ifdef RT_ARCH_X86
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| 163 | ; upper word of a 'push cs' is cleared.
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| 164 | mov eax, __LINE__
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| 165 | mov dword [esp - 4], 0f0f0f0fh
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| 166 | push cs
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| 167 | pop ecx
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| 168 | mov bx, cs
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| 169 | and ebx, 0000ffffh
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| 170 | cmp ecx, ebx
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| 171 | jne .failed
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| 172 |
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| 173 | ; upper word of a 'push ds' is cleared.
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| 174 | mov eax, __LINE__
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| 175 | mov dword [esp - 4], 0f0f0f0fh
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| 176 | push ds
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| 177 | pop ecx
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| 178 | mov bx, ds
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| 179 | and ebx, 0000ffffh
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| 180 | cmp ecx, ebx
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| 181 | jne .failed
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| 182 |
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| 183 | ; upper word of a 'push es' is cleared.
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| 184 | mov eax, __LINE__
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| 185 | mov dword [esp - 4], 0f0f0f0fh
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| 186 | push es
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| 187 | pop ecx
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| 188 | mov bx, es
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| 189 | and ebx, 0000ffffh
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| 190 | cmp ecx, ebx
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| 191 | jne .failed
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| 192 | %endif ; RT_ARCH_X86
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| 193 |
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| 194 | ; The upper part of a 'push fs' is cleared.
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| 195 | mov eax, __LINE__
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| 196 | xor ecx, ecx
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| 197 | not xCX
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| 198 | push xCX
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| 199 | pop xCX
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| 200 | push fs
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| 201 | pop xCX
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| 202 | mov bx, fs
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| 203 | and ebx, 0000ffffh
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| 204 | cmp xCX, xBX
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| 205 | jne .failed
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| 206 |
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| 207 | ; The upper part of a 'push gs' is cleared.
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| 208 | mov eax, __LINE__
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| 209 | xor ecx, ecx
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| 210 | not xCX
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| 211 | push xCX
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| 212 | pop xCX
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| 213 | push gs
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| 214 | pop xCX
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| 215 | mov bx, gs
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| 216 | and ebx, 0000ffffh
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| 217 | cmp xCX, xBX
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| 218 | jne .failed
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| 219 |
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| 220 | %ifdef RT_ARCH_AMD64
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| 221 | ; REX.B works with 'push r64'.
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| 222 | call x861_LoadUniqueRegValues
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| 223 | mov eax, __LINE__
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| 224 | push rcx
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| 225 | pop rdx
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| 226 | cmp rdx, rcx
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| 227 | jne .failed
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| 228 |
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| 229 | call x861_LoadUniqueRegValues
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| 230 | mov eax, __LINE__
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| 231 | db 041h ; REX.B
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| 232 | push rcx
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| 233 | pop rdx
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| 234 | cmp rdx, r9
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| 235 | jne .failed
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| 236 |
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| 237 | call x861_LoadUniqueRegValues
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| 238 | mov eax, __LINE__
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| 239 | db 042h ; REX.X
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| 240 | push rcx
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| 241 | pop rdx
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| 242 | cmp rdx, rcx
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| 243 | jne .failed
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| 244 |
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| 245 | call x861_LoadUniqueRegValues
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| 246 | mov eax, __LINE__
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| 247 | db 044h ; REX.R
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| 248 | push rcx
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| 249 | pop rdx
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| 250 | cmp rdx, rcx
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| 251 | jne .failed
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| 252 |
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| 253 | call x861_LoadUniqueRegValues
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| 254 | mov eax, __LINE__
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| 255 | db 048h ; REX.W
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| 256 | push rcx
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| 257 | pop rdx
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| 258 | cmp rdx, rcx
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| 259 | jne .failed
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| 260 |
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| 261 | call x861_LoadUniqueRegValues
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| 262 | mov eax, __LINE__
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| 263 | db 04fh ; REX.*
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| 264 | push rcx
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| 265 | pop rdx
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| 266 | cmp rdx, r9
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| 267 | jne .failed
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| 268 | %endif
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| 269 |
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| 270 | ;
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| 271 | ; Zero extening when moving from a segreg as well as memory access sizes.
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| 272 | ;
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| 273 | call x861_LoadUniqueRegValues
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| 274 | mov eax, __LINE__
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| 275 | mov ecx, ds
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| 276 | shr xCX, 16
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| 277 | cmp xCX, 0
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| 278 | jnz .failed
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| 279 |
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| 280 | %ifdef RT_ARCH_AMD64
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| 281 | call x861_LoadUniqueRegValues
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| 282 | mov eax, __LINE__
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| 283 | mov rcx, ds
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| 284 | shr rcx, 16
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| 285 | cmp rcx, 0
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| 286 | jnz .failed
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| 287 | %endif
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| 288 |
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| 289 | call x861_LoadUniqueRegValues
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| 290 | mov eax, __LINE__
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| 291 | mov xDX, xCX
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| 292 | mov cx, ds
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| 293 | shr xCX, 16
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| 294 | shr xDX, 16
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| 295 | cmp xCX, xDX
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| 296 | jnz .failed
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| 297 |
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| 298 | ; Loading is always a word access.
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| 299 | mov eax, __LINE__
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| 300 | mov xDI, [NAME(g_pbEfPage)]
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| 301 | lea xDI, [xDI + 0x1000 - 2]
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| 302 | mov xDX, es
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| 303 | mov [xDI], dx
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| 304 | mov es, [xDI] ; should not crash
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| 305 |
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| 306 | ; Saving is always a word access.
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| 307 | mov eax, __LINE__
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| 308 | mov xDI, [NAME(g_pbEfPage)]
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| 309 | mov dword [xDI + 0x1000 - 4], -1
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| 310 | mov [xDI + 0x1000 - 2], ss ; Should not crash.
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| 311 | mov bx, ss
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| 312 | mov cx, [xDI + 0x1000 - 2]
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| 313 | cmp cx, bx
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| 314 | jne .failed
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| 315 |
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| 316 | %ifdef RT_ARCH_AMD64
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| 317 | ; Check that the rex.R and rex.W bits don't have any influence over a memory write.
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| 318 | call x861_ClearRegisters
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| 319 | mov eax, __LINE__
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| 320 | mov xDI, [NAME(g_pbEfPage)]
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| 321 | mov dword [xDI + 0x1000 - 4], -1
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| 322 | db 04ah
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| 323 | mov [xDI + 0x1000 - 2], ss ; Should not crash.
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| 324 | mov bx, ss
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| 325 | mov cx, [xDI + 0x1000 - 2]
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| 326 | cmp cx, bx
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| 327 | jne .failed
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| 328 | %endif
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| 329 |
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| 330 |
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| 331 | ;
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| 332 | ; Check what happens when both string prefixes are used.
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| 333 | ;
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| 334 | cld
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| 335 | mov dx, ds
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| 336 | mov es, dx
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| 337 |
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| 338 | ; check that repne scasb (al=0) behaves like expected.
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| 339 | mov xDI, g_szAlpha
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| 340 | xor eax, eax ; find the end
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| 341 | mov ecx, g_cchAlpha + 1
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| 342 | repne scasb
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| 343 | cmp ecx, 1
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| 344 | mov eax, __LINE__
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| 345 | jne .failed
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| 346 |
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| 347 | ; check that repe scasb (al=0) behaves like expected.
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| 348 | mov xDI, g_szAlpha
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| 349 | xor eax, eax ; find the end
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| 350 | mov ecx, g_cchAlpha + 1
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| 351 | repe scasb
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| 352 | cmp ecx, g_cchAlpha
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| 353 | mov eax, __LINE__
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| 354 | jne .failed
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| 355 |
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| 356 | ; repne is last, it wins.
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| 357 | mov xDI, g_szAlpha
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| 358 | xor eax, eax ; find the end
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| 359 | mov ecx, g_cchAlpha + 1
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| 360 | db 0f3h ; repe - ignored
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| 361 | db 0f2h ; repne
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| 362 | scasb
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| 363 | cmp ecx, 1
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| 364 | mov eax, __LINE__
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| 365 | jne .failed
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| 366 |
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| 367 | ; repe is last, it wins.
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| 368 | mov xDI, g_szAlpha
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| 369 | xor eax, eax ; find the end
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| 370 | mov ecx, g_cchAlpha + 1
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| 371 | db 0f2h ; repne - ignored
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| 372 | db 0f3h ; repe
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| 373 | scasb
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| 374 | cmp ecx, g_cchAlpha
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| 375 | mov eax, __LINE__
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| 376 | jne .failed
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| 377 |
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| 378 | ;
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| 379 | ; Check if stosb works with both prefixes.
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| 380 | ;
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| 381 | cld
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| 382 | mov dx, ds
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| 383 | mov es, dx
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| 384 | mov xDI, [NAME(g_pbEfPage)]
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| 385 | xor eax, eax
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| 386 | mov ecx, 01000h
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| 387 | rep stosb
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| 388 |
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| 389 | mov xDI, [NAME(g_pbEfPage)]
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| 390 | mov ecx, 4
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| 391 | mov eax, 0ffh
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| 392 | db 0f2h ; repne
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| 393 | stosb
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| 394 | mov eax, __LINE__
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| 395 | cmp ecx, 0
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| 396 | jne .failed
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| 397 | mov eax, __LINE__
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| 398 | mov xDI, [NAME(g_pbEfPage)]
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| 399 | cmp dword [xDI], 0ffffffffh
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| 400 | jne .failed
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| 401 | cmp dword [xDI+4], 0
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| 402 | jne .failed
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| 403 |
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| 404 | mov xDI, [NAME(g_pbEfPage)]
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| 405 | mov ecx, 4
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| 406 | mov eax, 0feh
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| 407 | db 0f3h ; repe
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| 408 | stosb
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| 409 | mov eax, __LINE__
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| 410 | cmp ecx, 0
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| 411 | jne .failed
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| 412 | mov eax, __LINE__
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| 413 | mov xDI, [NAME(g_pbEfPage)]
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| 414 | cmp dword [xDI], 0fefefefeh
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| 415 | jne .failed
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| 416 | cmp dword [xDI+4], 0
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| 417 | jne .failed
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| 418 |
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| 419 | ;
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| 420 | ; String operations shouldn't crash because of an invalid address if rCX is 0.
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| 421 | ;
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| 422 | mov eax, __LINE__
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| 423 | cld
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| 424 | mov dx, ds
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| 425 | mov es, dx
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| 426 | mov xDI, [NAME(g_pbEfPage)]
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| 427 | xor xCX, xCX
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| 428 | rep stosb ; no trap
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| 429 |
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| 430 | ;
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| 431 | ; INS/OUTS will trap in ring-3 even when rCX is 0. (ASSUMES IOPL < 3)
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| 432 | ;
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| 433 | mov eax, __LINE__
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| 434 | cld
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| 435 | mov dx, ss
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| 436 | mov ss, dx
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| 437 | mov xDI, xSP
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| 438 | xor xCX, xCX
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| 439 | ShouldTrap X86_XCPT_GP, rep insb
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| 440 |
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| 441 |
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| 442 |
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| 443 | .success:
|
|---|
| 444 | xor eax, eax
|
|---|
| 445 | .return:
|
|---|
| 446 | %ifdef RT_ARCH_AMD64
|
|---|
| 447 | pop r15
|
|---|
| 448 | pop r14
|
|---|
| 449 | pop r13
|
|---|
| 450 | pop r12
|
|---|
| 451 | pop r11
|
|---|
| 452 | pop r10
|
|---|
| 453 | pop r9
|
|---|
| 454 | pop r8
|
|---|
| 455 | %endif
|
|---|
| 456 | pop xDI
|
|---|
| 457 | pop xSI
|
|---|
| 458 | pop xDX
|
|---|
| 459 | pop xCX
|
|---|
| 460 | pop xBX
|
|---|
| 461 | popf
|
|---|
| 462 | leave
|
|---|
| 463 | ret
|
|---|
| 464 |
|
|---|
| 465 | .failed2:
|
|---|
| 466 | mov eax, -1
|
|---|
| 467 | .failed:
|
|---|
| 468 | jmp .return
|
|---|
| 469 | ENDPROC x861_Test1
|
|---|
| 470 |
|
|---|
| 471 |
|
|---|
| 472 | ;;
|
|---|
| 473 | ; Terminate the trap info array with a NIL entry.
|
|---|
| 474 | BEGINDATA
|
|---|
| 475 | GLOBALNAME g_aTrapInfoEnd
|
|---|
| 476 | istruc TRAPINFO
|
|---|
| 477 | at TRAPINFO.uTrapPC, RTCCPTR_DEF 0
|
|---|
| 478 | at TRAPINFO.uResumePC, RTCCPTR_DEF 0
|
|---|
| 479 | at TRAPINFO.u8TrapNo, db 0
|
|---|
| 480 | at TRAPINFO.cbInstr, db 0
|
|---|
| 481 | iend
|
|---|
| 482 |
|
|---|
