VBoxCpuReport-arm.cpp@ 109020

Last change on this file since 109020 was 109020, checked in by vboxsync, 4 weeks ago
VMM,SUP,VBoxCpuReport: Port of VBoxCpuReport to ARM. jiraref:VBP-1598
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1	/* $Id: VBoxCpuReport-arm.cpp 109020 2025-04-17 23:37:08Z vboxsync $ */
2	/** @file
3	* VBoxCpuReport - Produces the basis for a CPU DB entry, x86 specifics.
4	*/
5
6	/*
7	* Copyright (C) 2013-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#include <iprt/ctype.h>
33	#include <iprt/message.h>
34	#include <iprt/mem.h>
35	#include <iprt/string.h>
36	#include <iprt/sort.h>
37
38	#include <VBox/err.h>
39	#include <VBox/vmm/cpum.h>
40	#include <VBox/sup.h>
41
42	#include "VBoxCpuReport.h"
43
44
45	/*********************************************************************************************************************************
46	* Structures and Typedefs *
47	*********************************************************************************************************************************/
48	typedef struct PARTNUMINFO
49	{
50	uint32_t uPartNum;
51	CPUMMICROARCH enmMicroarch;
52	const char *pszName;
53	const char *pszFullName;
54	} PARTNUMINFO;
55
56
57	/*********************************************************************************************************************************
58	* Global Variables *
59	*********************************************************************************************************************************/
60	static uint32_t g_cSysRegVals = 0;
61	static SUPARMSYSREGVAL g_aSysRegVals[4096];
62
63	/** ARM CPU info by part number. */
64	static PARTNUMINFO const g_aPartNumDbArm[] =
65	{
66	{ 0xfff, kCpumMicroarch_Unknown, "TODO", "TODO" },
67	};
68
69	/** Broadcom CPU info by part number. */
70	static PARTNUMINFO const g_aPartNumDbBroadcom[] =
71	{
72	{ 0xfff, kCpumMicroarch_Unknown, "TODO", "TODO" },
73	};
74
75	/** Qualcomm CPU info by part number. */
76	static PARTNUMINFO const g_aPartNumDbQualcomm[] =
77	{
78	{ 0xfff, kCpumMicroarch_Unknown, "TODO", "TODO" },
79	};
80
81	/** Apple CPU info by part number. */
82	static PARTNUMINFO const g_aPartNumDbApple[] =
83	{
84	{ 0x022, kCpumMicroarch_Apple_M1, "Apple M1", "Apple M1 (Icestorm)" },
85	{ 0x023, kCpumMicroarch_Apple_M1, "Apple M1", "Apple M1 (Firestorm)" },
86	{ 0x024, kCpumMicroarch_Apple_M1, "Apple M1 Pro", "Apple M1 Pro (Icestorm)" },
87	{ 0x025, kCpumMicroarch_Apple_M1, "Apple M1 Pro", "Apple M1 Pro (Firestorm)" },
88	{ 0x028, kCpumMicroarch_Apple_M1, "Apple M1 Max", "Apple M1 Max (Icestorm)" },
89	{ 0x029, kCpumMicroarch_Apple_M1, "Apple M1 Max", "Apple M1 Max (Firestorm)" },
90	{ 0x032, kCpumMicroarch_Apple_M2, "Apple M2", "Apple M2 (Blizzard)" },
91	{ 0x033, kCpumMicroarch_Apple_M2, "Apple M2", "Apple M2 (Avalanche)" },
92	{ 0x034, kCpumMicroarch_Apple_M2, "Apple M2 Pro", "Apple M2 Pro (Blizzard)" },
93	{ 0x035, kCpumMicroarch_Apple_M2, "Apple M2 Pro", "Apple M2 Pro (Avalanche)" },
94	{ 0x038, kCpumMicroarch_Apple_M2, "Apple M2 Max", "Apple M2 Max (Blizzard)" },
95	{ 0x039, kCpumMicroarch_Apple_M2, "Apple M2 Max", "Apple M2 Max (Avalanche)" },
96	};
97
98	/** Ampere CPU info by part number. */
99	static PARTNUMINFO const g_aPartNumDbAmpere[] =
100	{
101	{ 0xfff, kCpumMicroarch_Unknown, "TODO", "TODO" },
102	};
103
104
105	/** Looks up a register value in g_aSysRegVals. */
106	static uint64_t getSysRegVal(uint32_t idReg, uint64_t uNotFoundValue = 0)
107	{
108	for (uint32_t i = 0; i < g_cSysRegVals; i++)
109	if (g_aSysRegVals[i].idReg == idReg)
110	return g_aSysRegVals[i].uValue;
111	return uNotFoundValue;
112	}
113
114
115	/**
116	* Translates system register ID to a string, returning NULL if we can't.
117	*/
118	static const char *sysRegNoToName(uint32_t idReg)
119	{
120	switch (idReg)
121	{
122	/* The stuff here is copied from SUPDrv.cpp and trimmed down to the reads: */
123	#define READ_SYS_REG_NAMED(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2, a_SysRegName) \
124	case ARMV8_AARCH64_SYSREG_ID_CREATE(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2): return #a_SysRegName
125	#define READ_SYS_REG__TODO(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2, a_SysRegName) \
126	case ARMV8_AARCH64_SYSREG_ID_CREATE(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2): return #a_SysRegName
127	#define READ_SYS_REG_UNDEF(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2) \
128	case ARMV8_AARCH64_SYSREG_ID_CREATE(a_Op0, a_Op1, a_CRn, a_CRm, a_Op2): return NULL
129
130	READ_SYS_REG_NAMED(3, 0, 0, 0, 0, MIDR_EL1);
131	READ_SYS_REG_NAMED(3, 0, 0, 0, 5, MPIDR_EL1);
132	READ_SYS_REG_NAMED(3, 0, 0, 0, 6, REVIDR_EL1);
133	READ_SYS_REG__TODO(3, 1, 0, 0, 0, CCSIDR_EL1);
134	READ_SYS_REG__TODO(3, 1, 0, 0, 1, CLIDR_EL1);
135	READ_SYS_REG__TODO(3, 1, 0, 0, 7, AIDR_EL1);
136	READ_SYS_REG_NAMED(3, 3, 0, 0, 7, DCZID_EL0);
137	READ_SYS_REG_NAMED(3, 3,14, 0, 0, CNTFRQ_EL0);
138
139
140	READ_SYS_REG_NAMED(3, 0, 0, 4, 0, ID_AA64PFR0_EL1);
141	READ_SYS_REG_NAMED(3, 0, 0, 4, 1, ID_AA64PFR1_EL1);
142	READ_SYS_REG_UNDEF(3, 0, 0, 4, 2);
143	READ_SYS_REG_UNDEF(3, 0, 0, 4, 3);
144	READ_SYS_REG_NAMED(3, 0, 0, 4, 4, ID_AA64ZFR0_EL1);
145	READ_SYS_REG_NAMED(3, 0, 0, 4, 5, ID_AA64SMFR0_EL1);
146	READ_SYS_REG_UNDEF(3, 0, 0, 4, 6);
147	READ_SYS_REG_UNDEF(3, 0, 0, 4, 7);
148
149	READ_SYS_REG_NAMED(3, 0, 0, 5, 0, ID_AA64DFR0_EL1);
150	READ_SYS_REG_NAMED(3, 0, 0, 5, 1, ID_AA64DFR1_EL1);
151	READ_SYS_REG_UNDEF(3, 0, 0, 5, 2);
152	READ_SYS_REG_UNDEF(3, 0, 0, 5, 3);
153	READ_SYS_REG_NAMED(3, 0, 0, 5, 4, ID_AA64AFR0_EL1);
154	READ_SYS_REG_NAMED(3, 0, 0, 5, 5, ID_AA64AFR1_EL1);
155	READ_SYS_REG_UNDEF(3, 0, 0, 5, 6);
156	READ_SYS_REG_UNDEF(3, 0, 0, 5, 7);
157
158	READ_SYS_REG_NAMED(3, 0, 0, 6, 0, ID_AA64ISAR0_EL1);
159	READ_SYS_REG_NAMED(3, 0, 0, 6, 1, ID_AA64ISAR1_EL1);
160	READ_SYS_REG_NAMED(3, 0, 0, 6, 2, ID_AA64ISAR2_EL1);
161	READ_SYS_REG__TODO(3, 0, 0, 6, 3, ID_AA64ISAR3_EL1);
162	READ_SYS_REG_UNDEF(3, 0, 0, 6, 4);
163	READ_SYS_REG_UNDEF(3, 0, 0, 6, 5);
164	READ_SYS_REG_UNDEF(3, 0, 0, 6, 6);
165	READ_SYS_REG_UNDEF(3, 0, 0, 6, 7);
166
167	READ_SYS_REG_NAMED(3, 0, 0, 7, 0, ID_AA64MMFR0_EL1);
168	READ_SYS_REG_NAMED(3, 0, 0, 7, 1, ID_AA64MMFR1_EL1);
169	READ_SYS_REG_NAMED(3, 0, 0, 7, 2, ID_AA64MMFR2_EL1);
170	READ_SYS_REG__TODO(3, 0, 0, 7, 3, ID_AA64MMFR3_EL1);
171	READ_SYS_REG__TODO(3, 0, 0, 7, 4, ID_AA64MMFR4_EL1);
172	READ_SYS_REG_UNDEF(3, 0, 0, 7, 5);
173	READ_SYS_REG_UNDEF(3, 0, 0, 7, 6);
174	READ_SYS_REG_UNDEF(3, 0, 0, 7, 7);
175
176	READ_SYS_REG_NAMED(3, 0, 0, 1, 0, ID_PFR0_EL1);
177	READ_SYS_REG_NAMED(3, 0, 0, 1, 1, ID_PFR1_EL1);
178
179	READ_SYS_REG_NAMED(3, 0, 0, 1, 2, ID_DFR0_EL1);
180
181	READ_SYS_REG_NAMED(3, 0, 0, 1, 3, ID_AFR0_EL1);
182
183	READ_SYS_REG_NAMED(3, 0, 0, 1, 4, ID_MMFR0_EL1);
184	READ_SYS_REG_NAMED(3, 0, 0, 1, 5, ID_MMFR1_EL1);
185	READ_SYS_REG_NAMED(3, 0, 0, 1, 6, ID_MMFR2_EL1);
186	READ_SYS_REG_NAMED(3, 0, 0, 1, 7, ID_MMFR3_EL1);
187
188	READ_SYS_REG_NAMED(3, 0, 0, 2, 0, ID_ISAR0_EL1);
189	READ_SYS_REG_NAMED(3, 0, 0, 2, 1, ID_ISAR1_EL1);
190	READ_SYS_REG_NAMED(3, 0, 0, 2, 2, ID_ISAR2_EL1);
191	READ_SYS_REG_NAMED(3, 0, 0, 2, 3, ID_ISAR3_EL1);
192	READ_SYS_REG_NAMED(3, 0, 0, 2, 4, ID_ISAR4_EL1);
193	READ_SYS_REG_NAMED(3, 0, 0, 2, 5, ID_ISAR5_EL1);
194
195	READ_SYS_REG_NAMED(3, 0, 0, 2, 6, ID_MMFR4_EL1);
196
197	READ_SYS_REG_NAMED(3, 0, 0, 2, 7, ID_ISAR6_EL1);
198
199	READ_SYS_REG_NAMED(3, 0, 0, 3, 0, MVFR0_EL1);
200	READ_SYS_REG_NAMED(3, 0, 0, 3, 1, MVFR1_EL1);
201	READ_SYS_REG_NAMED(3, 0, 0, 3, 2, MVFR2_EL1);
202
203	READ_SYS_REG_NAMED(3, 0, 0, 3, 4, ID_PFR2_EL1);
204
205	READ_SYS_REG_NAMED(3, 0, 0, 3, 5, ID_DFR1_EL1);
206
207	READ_SYS_REG_NAMED(3, 0, 0, 3, 6, ID_MMFR5_EL1);
208
209	READ_SYS_REG__TODO(3, 1, 0, 0, 2, CCSIDR2_EL1); /?/
210
211	READ_SYS_REG_NAMED(3, 0, 5, 3, 0, ERRIDR_EL1);
212
213	READ_SYS_REG__TODO(3, 1, 0, 0, 4, GMID_EL1);
214
215	READ_SYS_REG__TODO(3, 0, 10, 4, 4, MPAMIDR_EL1);
216	READ_SYS_REG__TODO(3, 0, 10, 4, 5, MPAMBWIDR_EL1);
217
218	READ_SYS_REG__TODO(3, 0, 9, 10, 7, PMBIDR_EL1);
219	READ_SYS_REG__TODO(3, 0, 9, 8, 7, PMSIDR_EL1);
220
221	READ_SYS_REG__TODO(3, 0, 9, 11, 7, TRBIDR_EL1);
222
223	READ_SYS_REG__TODO(2, 1, 0, 8, 7, TRCIDR0); /?/
224	READ_SYS_REG__TODO(2, 1, 0, 9, 7, TRCIDR1);
225	READ_SYS_REG__TODO(2, 1, 0,10, 7, TRCIDR2);
226	READ_SYS_REG__TODO(2, 1, 0,11, 7, TRCIDR3);
227	READ_SYS_REG__TODO(2, 1, 0,12, 7, TRCIDR4);
228	READ_SYS_REG__TODO(2, 1, 0,13, 7, TRCIDR5);
229	READ_SYS_REG__TODO(2, 1, 0,14, 7, TRCIDR6);
230	READ_SYS_REG__TODO(2, 1, 0,15, 7, TRCIDR7);
231	READ_SYS_REG__TODO(2, 1, 0, 0, 6, TRCIDR8);
232	READ_SYS_REG__TODO(2, 1, 0, 1, 6, TRCIDR9);
233	READ_SYS_REG__TODO(2, 1, 0, 2, 6, TRCIDR10);
234	READ_SYS_REG__TODO(2, 1, 0, 3, 6, TRCIDR11);
235	READ_SYS_REG__TODO(2, 1, 0, 4, 6, TRCIDR12);
236	READ_SYS_REG__TODO(2, 1, 0, 5, 6, TRCIDR13);
237
238	#undef READ_SYS_REG_NAMED
239	#undef READ_SYS_REG__TODO
240	#undef READ_SYS_REG_UNDEF
241	}
242	return NULL;
243	}
244
245
246	/** @callback_impl{FNRTSORTCMP} */
247	static DECLCALLBACK(int) sysRegValSortCmp(void const pvElement1, void const pvElement2, void *pvUser)
248	{
249	RT_NOREF(pvUser);
250	PCSUPARMSYSREGVAL const pElm1 = (PCSUPARMSYSREGVAL)pvElement1;
251	PCSUPARMSYSREGVAL const pElm2 = (PCSUPARMSYSREGVAL)pvElement2;
252	return pElm1->idReg < pElm2->idReg ? -1 : pElm1->idReg > pElm2->idReg ? 1 : 0;
253	}
254
255
256	/**
257	* Populates g_aSysRegVals and g_cSysRegVals
258	*/
259	static int populateSystemRegisters(void)
260	{
261	/*
262	* First try using the support driver.
263	*/
264	int rc = SUPR3Init(NULL);
265	if (RT_SUCCESS(rc))
266	{
267	uint32_t cRegAvailable = 0;
268	rc = SUPR3ArmQuerySysRegs(SUP_ARM_SYS_REG_F_INC_ZERO_REG_VAL \| SUP_ARM_SYS_REG_F_EXTENDED,
269	RT_ELEMENTS(g_aSysRegVals), &g_cSysRegVals, &cRegAvailable, g_aSysRegVals);
270	vbCpuRepDebug("SUPR3ArmQuerySysRegs -> %Rrc (%u/%u regs)\n", rc, g_cSysRegVals, cRegAvailable);
271	if (RT_FAILURE(rc))
272	return RTMsgErrorRc(rc, "SUPR3ArmQuerySysRegs failed: %Rrc", rc);
273	if (cRegAvailable > g_cSysRegVals)
274	return RTMsgErrorRc(rc,
275	"SUPR3ArmQuerySysRegs claims there are %u more registers availble.\n"
276	"Increase size of g_aSysRegVals to at least %u entries and retry!",
277	cRegAvailable - g_cSysRegVals, cRegAvailable);
278	RTSortShell(g_aSysRegVals, g_cSysRegVals, sizeof(g_aSysRegVals[0]), sysRegValSortCmp, NULL);
279	return rc;
280	}
281	return RTMsgErrorRc(rc, "Unable to initialize the support library (%Rrc).", rc);
282	//vbCpuRepDebug("warning: Unable to initialize the support library (%Rrc).\n", rc);
283	/** @todo On Linux we can query the registers exposed to ring-3... */
284	}
285
286
287	/**
288	* Populate the system register array and output it.
289	*/
290	static int produceSysRegArray(const char pszNameC, const char pszCpuDesc)
291	{
292	RT_NOREF(pszNameC, pszCpuDesc);
293
294	/* Output the array. */
295	vbCpuRepPrintf("\n"
296	"/*\n"
297	" * System Register Values for %s.\n"
298	" */\n"
299	"static SUPARMSYSREGVAL const g_aSysRegVals_%s[] =\n"
300	"{\n",
301	pszCpuDesc, pszNameC);
302	for (uint32_t i = 0; i < g_cSysRegVals; i++)
303	{
304	uint32_t const idReg = g_aSysRegVals[i].idReg;
305	uint32_t const uOp0 = ARMV8_AARCH64_SYSREG_OP0_GET(idReg);
306	uint32_t const uOp1 = ARMV8_AARCH64_SYSREG_OP1_GET(idReg);
307	uint32_t const uCRn = ARMV8_AARCH64_SYSREG_CRN_GET(idReg);
308	uint32_t const uCRm = ARMV8_AARCH64_SYSREG_CRM_GET(idReg);
309	uint32_t const uOp2 = ARMV8_AARCH64_SYSREG_OP2_GET(idReg);
310	const char * const pszNm = sysRegNoToName(idReg);
311
312	vbCpuRepPrintf(" { UINT64_C(%#018RX64), ARMV8_AARCH64_SYSREG_ID_CREATE(%u, %u,%2u,%2u, %u), %#x },%s%s%s\n",
313	g_aSysRegVals[i].uValue, uOp0, uOp1, uCRn, uCRm, uOp2, g_aSysRegVals[i].fFlags,
314	pszNm ? " /* " : "", pszNm, pszNm ? " */" : "");
315	}
316	vbCpuRepPrintf("};\n"
317	"\n");
318	return VINF_SUCCESS;
319	}
320
321
322	int produceCpuReport(void)
323	{
324	/*
325	* Figure out the processor name via the host OS and command line first...
326	*/
327	char szDetectedCpuName[256] = {0};
328	int rc = RTMpGetDescription(NIL_RTCPUID, szDetectedCpuName, sizeof(szDetectedCpuName));
329	if (RT_SUCCESS(rc))
330	vbCpuRepDebug("szDetectedCpuName: %s\n", szDetectedCpuName);
331	if (RT_FAILURE(rc) \|\| strcmp(szDetectedCpuName, "Unknown") == 0)
332	szDetectedCpuName[0] = '\0';
333
334	const char *pszCpuName = g_pszCpuNameOverride ? g_pszCpuNameOverride : RTStrStrip(szDetectedCpuName);
335	if (strlen(pszCpuName) >= sizeof(szDetectedCpuName))
336	return RTMsgErrorRc(VERR_FILENAME_TOO_LONG, "CPU name is too long: %zu chars, max %zu: %s",
337	strlen(pszCpuName), sizeof(szDetectedCpuName) - 1, pszCpuName);
338
339	/*
340	* Get the system registers first so we can try identify the CPU.
341	*/
342	rc = populateSystemRegisters();
343	if (RT_FAILURE(rc))
344	return rc;
345
346	/*
347	* Now that we've got the ID register values, figure out the vendor,
348	* microarch, cpu name and description..
349	*/
350	uint64_t const uMIdReg = getSysRegVal(ARMV8_AARCH64_SYSREG_MIDR_EL1);
351
352	uint8_t const bImplementer = (uint8_t)(uMIdReg >> 24);
353	uint8_t const bRevision = (uint8_t)(uMIdReg & 0x7);
354	uint16_t const uPartNum = (uint16_t)((uMIdReg >> 4) & 0xfff);
355
356	/** @todo move this to CPUM or IPRT... */
357	CPUMCPUVENDOR enmVendor;
358	const char *pszVendor;
359	PARTNUMINFO const *paPartNums;
360	size_t cPartNums;
361	switch (bImplementer)
362	{
363	case 0x41:
364	enmVendor = CPUMCPUVENDOR_ARM;
365	pszVendor = "ARM";
366	paPartNums = g_aPartNumDbArm;
367	cPartNums = RT_ELEMENTS(g_aPartNumDbArm);
368	break;
369
370	case 0x42:
371	enmVendor = CPUMCPUVENDOR_BROADCOM;
372	pszVendor = "Broadcom";
373	paPartNums = g_aPartNumDbBroadcom;
374	cPartNums = RT_ELEMENTS(g_aPartNumDbBroadcom);
375	break;
376
377	case 0x51:
378	enmVendor = CPUMCPUVENDOR_QUALCOMM;
379	pszVendor = "Qualcomm";
380	paPartNums = g_aPartNumDbQualcomm;
381	cPartNums = RT_ELEMENTS(g_aPartNumDbQualcomm);
382	break;
383
384	case 0x61:
385	enmVendor = CPUMCPUVENDOR_APPLE;
386	pszVendor = "Apple";
387	paPartNums = g_aPartNumDbApple;
388	cPartNums = RT_ELEMENTS(g_aPartNumDbApple);
389	break;
390
391	case 0xc0:
392	enmVendor = CPUMCPUVENDOR_AMPERE;
393	pszVendor = "Ampere";
394	paPartNums = g_aPartNumDbAmpere;
395	cPartNums = RT_ELEMENTS(g_aPartNumDbAmpere);
396	break;
397
398	default:
399	return RTMsgErrorRc(VERR_UNSUPPORTED_CPU, "Unknown ARM implementer: %#x (%s)", bImplementer, pszCpuName);
400	}
401
402	/* Look up the part number in the vendor table: */
403	const char *pszCpuDesc = NULL;
404	CPUMMICROARCH enmMicroarch = kCpumMicroarch_Invalid;
405	for (size_t i = 0; i < cPartNums; i++)
406	if (paPartNums[i].uPartNum == uPartNum)
407	{
408	enmMicroarch = paPartNums[i].enmMicroarch;
409	pszCpuDesc = paPartNums[i].pszFullName;
410	if (!g_pszCpuNameOverride)
411	pszCpuName = paPartNums[i].pszName;
412	break;
413	}
414	if (enmMicroarch == kCpumMicroarch_Invalid)
415	return RTMsgErrorRc(VERR_UNSUPPORTED_CPU, "%s part number not found: %#x (%s)", pszVendor, uPartNum, pszCpuName);
416
417	/*
418	* Sanitize the name.
419	*/
420	char szName[sizeof(szDetectedCpuName)];
421	size_t offSrc = 0;
422	size_t offDst = 0;
423	for (;;)
424	{
425	char ch = pszCpuName[offSrc++];
426	if (!RT_C_IS_SPACE(ch))
427	szName[offDst++] = ch;
428	else
429	{
430	while (RT_C_IS_SPACE((ch = pszCpuName[offSrc])))
431	offSrc++;
432	if (offDst > 0 && ch != '\0')
433	szName[offDst++] = ' ';
434	}
435	if (!ch)
436	break;
437	}
438	RTStrPurgeEncoding(szName);
439	pszCpuName = szName;
440	vbCpuRepDebug("Name: %s\n", pszCpuName);
441
442	/*
443	* Make it C/C++ acceptable.
444	*/
445	static const char s_szNamePrefix[] = "ARM_";
446	char szNameC[sizeof(s_szNamePrefix) + sizeof(szDetectedCpuName)];
447	strcpy(szNameC, s_szNamePrefix);
448	/** @todo Move to common function... */
449	offDst = sizeof(s_szNamePrefix) - 1;
450	offSrc = 0;
451	for (;;)
452	{
453	char ch = pszCpuName[offSrc++];
454	if (!RT_C_IS_ALNUM(ch) && ch != '_' && ch != '\0')
455	ch = '_';
456	if (ch == '_' && offDst > 0 && szNameC[offDst - 1] == '_')
457	offDst--;
458	szNameC[offDst++] = ch;
459	if (!ch)
460	break;
461	}
462	while (offDst > 1 && szNameC[offDst - 1] == '_')
463	szNameC[--offDst] = '\0';
464
465	vbCpuRepDebug("NameC: %s\n", szNameC);
466
467	/*
468	* Print a file header, if we're not outputting to stdout (assumption being
469	* that stdout is used while hacking the reporter and too much output is
470	* unwanted).
471	*/
472	if (g_pReportOut)
473	vbCpuRepFileHdr(pszCpuName, szNameC);
474
475	/*
476	* Produce the array of system (id) register values.
477	*/
478	rc = produceSysRegArray(szNameC, pszCpuDesc);
479	if (RT_FAILURE(rc))
480	return rc;
481
482	/*
483	* Emit the database entry.
484	*/
485	vbCpuRepPrintf("\n"
486	"/**\n"
487	" * Database entry for %s.\n"
488	" */\n"
489	"static CPUMDBENTRYARM const g_Entry_%s = \n"
490	"{\n"
491	" {\n"
492	" /.pszName = / \"%s\",\n"
493	" /.pszFullName = / \"%s\",\n"
494	" /.enmVendor = / CPUMCPUVENDOR_%s,\n"
495	" /.enmMicroarch = / kCpumMicroarch_%s,\n"
496	" /.fFlags = / 0,\n"
497	" },\n"
498	" /.bImplementer = / %#04x,\n"
499	" /.bRevision = / %#04x,\n"
500	" /.uPartNum = / %#04x,\n"
501	" /.cSysRegVals = / ZERO_ALONE(RT_ELEMENTS(g_aSysRegVals_%s)),\n"
502	" /.paSysRegVals = / NULL_ALONE(g_aSysRegVals_%s),\n"
503	"};\n"
504	"\n"
505	"#endif /* !VBOX_CPUDB_%s_h */\n"
506	"\n",
507	pszCpuDesc,
508	szNameC,
509	pszCpuName,
510	pszCpuDesc,
511	CPUMCpuVendorName(enmVendor),
512	CPUMMicroarchName(enmMicroarch),
513	bImplementer,
514	bRevision,
515	uPartNum,
516	szNameC,
517	szNameC,
518	szNameC);
519
520	return VINF_SUCCESS;
521	}
522

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source: vbox/trunk/src/VBox/VMM/tools/VBoxCpuReport-arm.cpp@ 109020

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