VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bootsector2-cpu-hidden-regs-1.asm@ 78210

Last change on this file since 78210 was 76553, checked in by vboxsync, 6 years ago

scm --update-copyright-year

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 8.0 KB
Line 
1; $Id: bootsector2-cpu-hidden-regs-1.asm 76553 2019-01-01 01:45:53Z vboxsync $
2;; @file
3; Bootsector that shows/tests the content of hidden CPU registers.
4;
5; Requires VMMDevTesting. Enable it via VBoxManage:
6; VBoxManage setextradata bs-cpu-hidden-regs-1 VBoxInternal/Devices/VMMDev/0/Config/TestingEnabled 1
7
8;
9; Copyright (C) 2007-2019 Oracle Corporation
10;
11; This file is part of VirtualBox Open Source Edition (OSE), as
12; available from http://www.virtualbox.org. This file is free software;
13; you can redistribute it and/or modify it under the terms of the GNU
14; General Public License (GPL) as published by the Free Software
15; Foundation, in version 2 as it comes in the "COPYING" file of the
16; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18;
19; The contents of this file may alternatively be used under the terms
20; of the Common Development and Distribution License Version 1.0
21; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
22; VirtualBox OSE distribution, in which case the provisions of the
23; CDDL are applicable instead of those of the GPL.
24;
25; You may elect to license modified versions of this file under the
26; terms and conditions of either the GPL or the CDDL or both.
27;
28
29
30%include "iprt/asmdefs.mac"
31%include "iprt/x86.mac"
32%include "VBox/VMMDevTesting.mac"
33
34;
35; Include and execute the init code.
36;
37 %define BS2_INIT_RM
38 %define BS2_INC_PE16
39 %define BS2_INC_PE32
40 %define BS2_INC_PP32
41 %define BS2_INC_LM64
42 %define BS2_WITH_TRAPS
43 %define BS2_WITH_MANUAL_LTR
44 %include "bootsector2-common-init-code.mac"
45
46
47;
48; The benchmark driver
49;
50BEGINPROC main
51 ;
52 ; Test prologue.
53 ;
54 mov ax, .s_szTstName
55 call TestInit_r86
56 call Bs2EnableA20_r86
57 call Bs2PanicIfVMMDevTestingIsMissing_r86
58
59 call reportPostBiosValues
60 call rmTests
61 call doTests_rm_pe32
62 call doTests_rm_pp32
63 call doTests_rm_lm64
64
65 ;
66 ; We're done.
67 ;
68 call TestTerm_r86
69 call Bs2Panic
70
71.s_szTstName:
72 db 'tstCpuHidRegs', 0
73ENDPROC main
74
75
76;
77; Reports the values of interesting hidden registers as we start the test, i.e.
78; right after the BIOS completed.
79;
80BEGINPROC reportPostBiosValues
81 push ax
82 push bx
83 mov ax, .s_szTstInitial
84 call TestSub_r86
85
86 mov ax, .s_szzStart
87 call TestValueRegSZZ_rm
88
89.done
90 pop bx
91 pop ax
92 ret
93
94.s_szzStart:
95 db 'BIOS - ldtr:ldtr', 0;
96 db 'BIOS - ldtr_base:ldtr_base', 0;
97 db 'BIOS - ldtr_limit:ldtr_lim', 0;
98 db 'BIOS - ldtr_attr:ldtr_attr', 0;
99 db 'BIOS - tr:tr', 0;
100 db 'BIOS - tr_base:tr_base', 0;
101 db 'BIOS - tr_limit:tr_lim', 0;
102 db 'BIOS - tr_attr:tr_attr', 0;
103 db 'BIOS - cs:cs', 0;
104 db 'BIOS - cs_base:cs_base', 0;
105 db 'BIOS - cs_limit:cs_lim', 0;
106 db 'BIOS - cs_attr:cs_attr', 0;
107 db 'BIOS - ss:ss', 0;
108 db 'BIOS - ss_base:ss_base', 0;
109 db 'BIOS - ss_limit:ss_lim', 0;
110 db 'BIOS - ss_attr:ss_attr', 0;
111 db 'BIOS - ds:ds', 0;
112 db 'BIOS - ds_base:ds_base', 0;
113 db 'BIOS - ds_limit:ds_lim', 0;
114 db 'BIOS - ds_attr:ds_attr', 0;
115 db 0,0,0,0 ; terminator
116.s_szTstInitial:
117 db 'Post BIOS Values', 0
118ENDPROC reportPostBiosValues
119
120
121;
122; Reports the values of interesting hidden registers as we start the test, i.e.
123; right after the BIOS completed.
124;
125BEGINPROC rmTests
126 push eax
127 push ebx
128 pushfd
129 cli
130
131 mov ax, .s_szTstRM
132 call TestSub_r86
133
134 ; Check if CS changes when leaving protected mode.
135 mov ax, .s_szzRMPre
136 call TestValueRegSZZ_rm
137 mov byte [cs:.s_dwDummy], 1
138 call Bs2EnterMode_rm_pe32
139BITS 32
140 mov eax, .s_szzProt32
141 call TestValueRegSZZ_pe32
142 ; mov word [cs:.s_dwDummy], 2 - this shall GP(CS).
143 call Bs2ExitMode_pe32
144BITS 16
145 mov ax, .s_szzRMPost
146 call TestValueRegSZZ_rm
147 mov dword [cs:.s_dwDummy], 3
148
149 ;
150 ; What happens if we make CS32 execute-only and return to real-mode.
151 ;
152 mov byte [cs:.s_dwDummy], 1
153 call Bs2EnterMode_rm_pe16
154 jmp BS2_SEL_CS16_EO:.loaded_cs16_eo
155.loaded_cs16_eo:
156 mov eax, .s_szzProtEO
157 call TestValueRegSZZ_pe16
158 ; mov ax, word [cs:.s_dwDummy] - this shall GP(CS).
159 ; mov word [cs:.s_dwDummy], 2 - this shall GP(CS).
160
161 ; Leave real-mode ourselves.
162 mov eax, cr0
163 and eax, ~X86_CR0_PE
164 mov cr0, eax
165
166 ; All but cs gets reloaded.
167 xor ax, ax
168 mov ss, ax
169 mov ds, ax
170 mov es, ax
171 mov fs, ax
172 mov gs, ax
173
174 ; Display CS and do a test.
175 mov ax, .s_szzRMEO
176 call TestValueRegSZZ_rm
177
178 mov ax, [cs:.s_dwDummy] ; works on intel
179 mov dword [cs:.s_dwDummy], 3 ; ditto
180
181 jmp far 0000:.load_rm_cs
182.load_rm_cs:
183 ; Display CS to check that it remained unchanged.
184 mov ax, .s_szzRMEO2
185 call TestValueRegSZZ_rm
186
187 ; Cleanup everything properly.
188 call Bs2EnterMode_rm_pe32
189BITS 32
190 call Bs2ExitMode_pe32
191BITS 16
192
193 popfd
194 pop ebx
195 pop eax
196 ret
197
198.s_dwDummy:
199 dd 0
200.s_szzRMPre:
201 db 'RM Pre - cs:cs', 0;
202 db 'RM Pre - cs_base:cs_base', 0;
203 db 'RM Pre - cs_limit:cs_lim', 0;
204 db 'RM Pre - cs_attr:cs_attr', 0;
205 db 0,0,0,0 ; terminator
206.s_szzProt32:
207 db 'Prot32 - cs:cs', 0;
208 db 'Prot32 - cs_base:cs_base', 0;
209 db 'Prot32 - cs_limit:cs_lim', 0;
210 db 'Prot32 - cs_attr:cs_attr', 0;
211 db 0,0,0,0 ; terminator
212.s_szzRMPost:
213 db 'RM Post - cs:cs', 0;
214 db 'RM Post - cs_base:cs_base', 0;
215 db 'RM Post - cs_limit:cs_lim', 0;
216 db 'RM Post - cs_attr:cs_attr', 0;
217 db 0,0,0,0 ; terminator
218.s_szzProtEO:
219 db 'Prot 16 EO,L-1,NA - cs:cs', 0;
220 db 'Prot 16 EO,L-1,NA - cs_base:cs_base', 0;
221 db 'Prot 16 EO,L-1,NA - cs_limit:cs_lim', 0;
222 db 'Prot 16 EO,L-1,NA - cs_attr:cs_attr', 0;
223 db 0,0,0,0 ; terminator
224.s_szzRMEO:
225 db 'RM Post EO,L-1,NA - cs:cs', 0;
226 db 'RM Post EO,L-1,NA - cs_base:cs_base', 0;
227 db 'RM Post EO,L-1,NA - cs_limit:cs_lim', 0;
228 db 'RM Post EO,L-1,NA - cs_attr:cs_attr', 0;
229 db 0,0,0,0 ; terminator
230.s_szzRMEO2:
231 db 'RM CS(0) EO,L-1 - cs:cs', 0;
232 db 'RM CS(0) EO,L-1 - cs_base:cs_base', 0;
233 db 'RM CS(0) EO,L-1 - cs_limit:cs_lim', 0;
234 db 'RM CS(0) EO,L-1 - cs_attr:cs_attr', 0;
235 db 0,0,0,0 ; terminator
236.s_szTstRM:
237 db 'Real Mode Test', 0
238ENDPROC rmTests
239
240
241
242;
243; Instantiate the template code.
244;
245%include "bootsector2-template-footer.mac" ; reset the initial environemnt.
246
247%define TMPL_RM
248%include "bootsector2-cpu-hidden-regs-1-template.mac"
249;%define TMPL_CMN_V86
250;%include "bootsector2-cpu-hidden-regs-1-template.mac"
251%define TMPL_PE16
252%include "bootsector2-cpu-hidden-regs-1-template.mac"
253%define TMPL_PE32
254%include "bootsector2-cpu-hidden-regs-1-template.mac"
255;%define TMPL_PP16
256;%include "bootsector2-cpu-hidden-regs-1-template.mac"
257%define TMPL_PP32
258%include "bootsector2-cpu-hidden-regs-1-template.mac"
259;%define TMPL_PAE16
260;%include "bootsector2-cpu-hidden-regs-1-template.mac"
261;%define TMPL_PAE32
262;%include "bootsector2-cpu-hidden-regs-1-template.mac"
263;%define TMPL_LM16
264;%include "bootsector2-cpu-hidden-regs-1-template.mac"
265;%define TMPL_LM32
266;%include "bootsector2-cpu-hidden-regs-1-template.mac"
267%define TMPL_LM64
268%include "bootsector2-cpu-hidden-regs-1-template.mac"
269
270
271;
272; End sections and image.
273;
274%include "bootsector2-common-end.mac"
275
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette