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source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac@ 66174

Last change on this file since 66174 was 65396, checked in by vboxsync, 8 years ago

bs3-cpu-basic-2-pf: Added testcase for access bit and instruction raising exception.

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1; $Id: bs3-cpu-basic-2-template.mac 65396 2017-01-20 20:07:35Z vboxsync $
2;; @file
3; BS3Kit - bs3-cpu-basic-2 assembly template.
4;
5
6;
7; Copyright (C) 2007-2016 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17; The contents of this file may alternatively be used under the terms
18; of the Common Development and Distribution License Version 1.0
19; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20; VirtualBox OSE distribution, in which case the provisions of the
21; CDDL are applicable instead of those of the GPL.
22;
23; You may elect to license modified versions of this file under the
24; terms and conditions of either the GPL or the CDDL or both.
25;
26
27
28;*********************************************************************************************************************************
29;* Header Files *
30;*********************************************************************************************************************************
31%include "bs3kit-template-header.mac" ; setup environment
32
33
34;*********************************************************************************************************************************
35;* External Symbols *
36;*********************************************************************************************************************************
37TMPL_BEGIN_TEXT
38
39
40;
41; Test code snippets containing code which differs between 16-bit, 32-bit
42; and 64-bit CPUs modes.
43;
44%ifdef BS3_INSTANTIATING_CMN
45
46;
47; SIDT
48;
49BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_bx_ud2, BS3_PBC_NEAR
50 sidt [xBX]
51.again: ud2
52 jmp .again
53AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_bx_ud2) == 3)
54BS3_PROC_END_CMN bs3CpuBasic2_sidt_bx_ud2
55
56BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_bx_ud2, BS3_PBC_NEAR
57 db X86_OP_PRF_SIZE_OP
58 sidt [xBX]
59.again: ud2
60 jmp .again
61AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_bx_ud2) == 4)
62BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_bx_ud2
63
64 %if TMPL_BITS == 64
65BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_rexw_bx_ud2, BS3_PBC_NEAR
66 db X86_OP_REX_W
67 sidt [xBX]
68.again: ud2
69 jmp .again
70AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_rexw_bx_ud2) == 4)
71BS3_PROC_END_CMN bs3CpuBasic2_sidt_rexw_bx_ud2
72
73BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2, BS3_PBC_NEAR
74 db X86_OP_PRF_SIZE_OP
75 db X86_OP_REX_W
76 sidt [xBX]
77.again: ud2
78 jmp .again
79AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_rexw_bx_ud2) == 5)
80BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2
81 %endif
82
83 %if TMPL_BITS != 64
84BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_ss_bx_ud2, BS3_PBC_NEAR
85 sidt [ss:xBX]
86.again: ud2
87 jmp .again
88AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_ss_bx_ud2) == 4)
89BS3_PROC_END_CMN bs3CpuBasic2_sidt_ss_bx_ud2
90
91BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2, BS3_PBC_NEAR
92 db X86_OP_PRF_SIZE_OP
93 sidt [ss:xBX]
94.again: ud2
95 jmp .again
96AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_ss_bx_ud2) == 5)
97BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2
98 %endif
99
100
101;
102; SGDT
103;
104BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_bx_ud2, BS3_PBC_NEAR
105 sgdt [xBX]
106.again: ud2
107 jmp .again
108AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_bx_ud2) == 3)
109BS3_PROC_END_CMN bs3CpuBasic2_sgdt_bx_ud2
110
111BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2, BS3_PBC_NEAR
112 db X86_OP_PRF_SIZE_OP
113 sgdt [xBX]
114.again: ud2
115 jmp .again
116AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_bx_ud2) == 4)
117BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2
118
119 %if TMPL_BITS == 64
120BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2, BS3_PBC_NEAR
121 db X86_OP_REX_W
122 sgdt [xBX]
123.again: ud2
124 jmp .again
125AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_rexw_bx_ud2) == 4)
126BS3_PROC_END_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2
127
128BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2, BS3_PBC_NEAR
129 db X86_OP_PRF_SIZE_OP
130 db X86_OP_REX_W
131 sgdt [xBX]
132.again: ud2
133 jmp .again
134AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2) == 5)
135BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2
136 %endif
137
138 %if TMPL_BITS != 64
139BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_ss_bx_ud2, BS3_PBC_NEAR
140 sgdt [ss:xBX]
141.again: ud2
142 jmp .again
143AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_ss_bx_ud2) == 4)
144BS3_PROC_END_CMN bs3CpuBasic2_sgdt_ss_bx_ud2
145
146BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2, BS3_PBC_NEAR
147 db X86_OP_PRF_SIZE_OP
148 sgdt [ss:xBX]
149.again: ud2
150 jmp .again
151AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_ss_bx_ud2) == 5)
152BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2
153 %endif
154
155
156;
157; LIDT
158;
159BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
160 lidt [xBX]
161 sidt [BS3_NOT_64BIT(es:) xDI]
162 lidt [BS3_NOT_64BIT(es:) xSI]
163.again:
164 ud2
165 jmp .again
166AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11))
167BS3_PROC_END_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2
168
169BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
170 db X86_OP_PRF_SIZE_OP
171 lidt [xBX]
172 sidt [BS3_NOT_64BIT(es:) xDI]
173 lidt [BS3_NOT_64BIT(es:) xSI]
174.again:
175 ud2
176 jmp .again
177AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12))
178BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2
179
180%if TMPL_BITS == 16
181BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
182 db X86_OP_PRF_SIZE_OP
183 lidt [xBX]
184 jmp dword BS3_SEL_R0_CS32:.in_32bit wrt FLAT
185 BS3_SET_BITS 32
186.in_32bit:
187 sidt [es:edi]
188 lidt [es:esi]
189 jmp dword BS3_SEL_R0_CS16:.again wrt CGROUP16
190 BS3_SET_BITS 16
191.again:
192 ud2
193 jmp .again
194AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2) == 27)
195BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2
196%endif
197
198 %if TMPL_BITS == 64
199BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
200 db X86_OP_REX_W
201 lidt [xBX]
202 sidt [xDI]
203 lidt [xSI]
204.again:
205 ud2
206 jmp .again
207AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 10)
208BS3_PROC_END_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2
209
210BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
211 db X86_OP_PRF_SIZE_OP
212 db X86_OP_REX_W
213 lidt [xBX]
214 sidt [xDI]
215 lidt [xSI]
216.again:
217 ud2
218 jmp .again
219AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 11)
220BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2
221 %endif
222
223 %if TMPL_BITS != 64
224BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
225 lidt [ss:xBX]
226 sidt [BS3_NOT_64BIT(es:) xDI]
227 lidt [BS3_NOT_64BIT(es:) xSI]
228.again:
229 ud2
230 jmp .again
231AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2) == 12)
232BS3_PROC_END_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2
233
234BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
235 db X86_OP_PRF_SIZE_OP
236 lidt [ss:xBX]
237 sidt [BS3_NOT_64BIT(es:) xDI]
238 lidt [BS3_NOT_64BIT(es:) xSI]
239.again:
240 ud2
241 jmp .again
242AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2) == 13)
243BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2
244 %endif
245
246
247;
248; LGDT
249;
250BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
251 lgdt [xBX]
252 sgdt [BS3_NOT_64BIT(es:) xDI]
253 lgdt [BS3_NOT_64BIT(es:) xSI]
254.again:
255 ud2
256 jmp .again
257AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11))
258BS3_PROC_END_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2
259
260BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
261 db X86_OP_PRF_SIZE_OP
262 lgdt [xBX]
263 sgdt [BS3_NOT_64BIT(es:) xDI]
264 lgdt [BS3_NOT_64BIT(es:) xSI]
265.again:
266 ud2
267 jmp .again
268AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12))
269BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2
270
271 %if TMPL_BITS == 64
272BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
273 db X86_OP_REX_W
274 lgdt [xBX]
275 sgdt [xDI]
276 lgdt [xSI]
277.again:
278 ud2
279 jmp .again
280AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 10)
281BS3_PROC_END_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
282
283BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
284 db X86_OP_PRF_SIZE_OP
285 db X86_OP_REX_W
286 lgdt [xBX]
287 sgdt [xDI]
288 lgdt [xSI]
289.again:
290 ud2
291 jmp .again
292AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 11)
293BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
294 %endif
295
296 %if TMPL_BITS != 64
297BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
298 lgdt [ss:xBX]
299 sgdt [BS3_NOT_64BIT(es:) xDI]
300 lgdt [BS3_NOT_64BIT(es:) xSI]
301.again:
302 ud2
303 jmp .again
304AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 12)
305BS3_PROC_END_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2
306
307BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
308 db X86_OP_PRF_SIZE_OP
309 lgdt [ss:xBX]
310 sgdt [BS3_NOT_64BIT(es:) xDI]
311 lgdt [BS3_NOT_64BIT(es:) xSI]
312.again:
313 ud2
314 jmp .again
315AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 13)
316BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2
317 %endif
318
319;
320; #PF
321;
322
323; For testing read access.
324BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2, BS3_PBC_NEAR
325 mov xAX, [xBX]
326.again: ud2
327 jmp .again
328AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
329BS3_PROC_END_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2
330
331
332; For testing write access.
333BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2, BS3_PBC_NEAR
334 mov [xBX], xAX
335.again: ud2
336 jmp .again
337AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
338BS3_PROC_END_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2
339
340
341; For testing read+write access.
342BS3_PROC_BEGIN_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2, BS3_PBC_NEAR
343 xchg [xBX], xAX
344.again: ud2
345 jmp .again
346AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
347BS3_PROC_END_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2
348
349
350; Another read+write access test.
351BS3_PROC_BEGIN_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2, BS3_PBC_NEAR
352 cmpxchg [xBX], xCX
353.again: ud2
354 jmp .again
355AssertCompile(.again - BS3_LAST_LABEL == 3 + (TMPL_BITS == 64))
356BS3_PROC_END_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2
357
358
359; For testing read access from an aborted instruction: DIV by zero
360BS3_PROC_BEGIN_CMN bs3CpuBasic2_div_ds_bx__ud2, BS3_PBC_NEAR
361 div xPRE [xBX]
362.again: ud2
363 jmp .again
364AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
365BS3_PROC_END_CMN bs3CpuBasic2_div_ds_bx__ud2
366
367
368; Two memory operands: push [mem]
369BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ds_bx__ud2, BS3_PBC_NEAR
370 push xPRE [xBX]
371.again: ud2
372 jmp .again
373AssertCompile(.again - BS3_LAST_LABEL == 2)
374BS3_PROC_END_CMN bs3CpuBasic2_push_ds_bx__ud2
375
376; Two memory operands: pop [mem]
377BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2, BS3_PBC_NEAR
378 push xAX
379 pop xPRE [xBX]
380.again: ud2
381 jmp .again
382AssertCompile(.again - BS3_LAST_LABEL == 3)
383BS3_PROC_END_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2
384
385; Two memory operands: call [mem]
386BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ds_bx__ud2, BS3_PBC_NEAR
387 call xPRE [xBX]
388.again: ud2
389 jmp .again
390AssertCompile(.again - BS3_LAST_LABEL == 2)
391BS3_PROC_END_CMN bs3CpuBasic2_call_ds_bx__ud2
392
393; For testing #GP vs #PF write
394BS3_PROC_BEGIN_CMN bs3CpuBasic2_insb__ud2, BS3_PBC_NEAR
395 insb
396.again: ud2
397 jmp .again
398AssertCompile(.again - BS3_LAST_LABEL == 1)
399BS3_PROC_END_CMN bs3CpuBasic2_insb__ud2
400
401
402%endif ; BS3_INSTANTIATING_CMN
403
404%include "bs3kit-template-footer.mac" ; reset environment
405
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