bs3-cpu-basic-2-template.mac@ 97505

Last change on this file since 97505 was 97505, checked in by vboxsync, 2 years ago
ValKit/bs3-cpu-basic-2: Added some more tests of far jumps. bugref:9898
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1	; $Id: bs3-cpu-basic-2-template.mac 97505 2022-11-11 10:44:02Z vboxsync $
2	;; @file
3	; BS3Kit - bs3-cpu-basic-2 assembly template.
4	;
5
6	;
7	; Copyright (C) 2007-2022 Oracle and/or its affiliates.
8	;
9	; This file is part of VirtualBox base platform packages, as
10	; available from https://www.virtualbox.org.
11	;
12	; This program is free software; you can redistribute it and/or
13	; modify it under the terms of the GNU General Public License
14	; as published by the Free Software Foundation, in version 3 of the
15	; License.
16	;
17	; This program is distributed in the hope that it will be useful, but
18	; WITHOUT ANY WARRANTY; without even the implied warranty of
19	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	; General Public License for more details.
21	;
22	; You should have received a copy of the GNU General Public License
23	; along with this program; if not, see <https://www.gnu.org/licenses>.
24	;
25	; The contents of this file may alternatively be used under the terms
26	; of the Common Development and Distribution License Version 1.0
27	; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28	; in the VirtualBox distribution, in which case the provisions of the
29	; CDDL are applicable instead of those of the GPL.
30	;
31	; You may elect to license modified versions of this file under the
32	; terms and conditions of either the GPL or the CDDL or both.
33	;
34	; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35	;
36
37
38	;*********************************************************************************************************************************
39	;* Header Files *
40	;*********************************************************************************************************************************
41	%include "bs3kit-template-header.mac" ; setup environment
42
43
44	;*********************************************************************************************************************************
45	;* Defined Constants And Macros *
46	;*********************************************************************************************************************************
47	%ifndef BS3_CPUBAS2_UD_OFF_DEFINED
48	%define BS3_CPUBAS2_UD_OFF_DEFINED
49	%macro BS3_CPUBAS2_UD_OFF 1
50	BS3_GLOBAL_NAME_EX BS3_CMN_NM(%1) %+ _offUD, , 1
51	db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
52	%endmacro
53	%endif
54
55	%undef BS3_CPUBAS2_REF_LABLE_VIA_CS
56	%if TMPL_BITS == 16
57	%define BS3_CPUBAS2_REF_LABLE_VIA_CS(a_Label) cs:a_Label
58	%elif TMPL_BITS == 32
59	%define BS3_CPUBAS2_REF_LABLE_VIA_CS(a_Label) cs:a_Label wrt FLAT
60	%elif TMPL_BITS == 64
61	%define BS3_CPUBAS2_REF_LABLE_VIA_CS(a_Label) a_Label wrt FLAT
62	%else
63	%error TMPL_BITS
64	%endif
65
66
67	;*********************************************************************************************************************************
68	;* External Symbols *
69	;*********************************************************************************************************************************
70	TMPL_BEGIN_TEXT
71
72
73
74	;
75	; Test code snippets containing code which differs between 16-bit, 32-bit
76	; and 64-bit CPUs modes.
77	;
78	%ifdef BS3_INSTANTIATING_CMN
79
80	;
81	; SIDT
82	;
83	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_bx_ud2
84	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_bx_ud2, BS3_PBC_NEAR
85	sidt [xBX]
86	.again: ud2
87	jmp .again
88	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_bx_ud2) == 3)
89	BS3_PROC_END_CMN bs3CpuBasic2_sidt_bx_ud2
90
91	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_opsize_bx_ud2
92	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_bx_ud2, BS3_PBC_NEAR
93	db X86_OP_PRF_SIZE_OP
94	sidt [xBX]
95	.again: ud2
96	jmp .again
97	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_bx_ud2) == 4)
98	BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_bx_ud2
99
100	%if TMPL_BITS == 64
101	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_rexw_bx_ud2
102	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_rexw_bx_ud2, BS3_PBC_NEAR
103	db X86_OP_REX_W
104	sidt [xBX]
105	.again: ud2
106	jmp .again
107	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_rexw_bx_ud2) == 4)
108	BS3_PROC_END_CMN bs3CpuBasic2_sidt_rexw_bx_ud2
109
110	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_opsize_rexw_bx_ud2
111	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2, BS3_PBC_NEAR
112	db X86_OP_PRF_SIZE_OP
113	db X86_OP_REX_W
114	sidt [xBX]
115	.again: ud2
116	jmp .again
117	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_rexw_bx_ud2) == 5)
118	BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_rexw_bx_ud2
119	%endif
120
121	%if TMPL_BITS != 64
122	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_ss_bx_ud2
123	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_ss_bx_ud2, BS3_PBC_NEAR
124	sidt [ss:xBX]
125	.again: ud2
126	jmp .again
127	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_ss_bx_ud2) == 4)
128	BS3_PROC_END_CMN bs3CpuBasic2_sidt_ss_bx_ud2
129
130	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sidt_opsize_ss_bx_ud2
131	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2, BS3_PBC_NEAR
132	db X86_OP_PRF_SIZE_OP
133	sidt [ss:xBX]
134	.again: ud2
135	jmp .again
136	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sidt_opsize_ss_bx_ud2) == 5)
137	BS3_PROC_END_CMN bs3CpuBasic2_sidt_opsize_ss_bx_ud2
138	%endif
139
140
141	;
142	; SGDT
143	;
144	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_bx_ud2
145	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_bx_ud2, BS3_PBC_NEAR
146	sgdt [xBX]
147	.again: ud2
148	jmp .again
149	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_bx_ud2) == 3)
150	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_bx_ud2
151
152	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_opsize_bx_ud2
153	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2, BS3_PBC_NEAR
154	db X86_OP_PRF_SIZE_OP
155	sgdt [xBX]
156	.again: ud2
157	jmp .again
158	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_bx_ud2) == 4)
159	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_bx_ud2
160
161	%if TMPL_BITS == 64
162	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_rexw_bx_ud2
163	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2, BS3_PBC_NEAR
164	db X86_OP_REX_W
165	sgdt [xBX]
166	.again: ud2
167	jmp .again
168	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_rexw_bx_ud2) == 4)
169	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_rexw_bx_ud2
170
171	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2
172	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2, BS3_PBC_NEAR
173	db X86_OP_PRF_SIZE_OP
174	db X86_OP_REX_W
175	sgdt [xBX]
176	.again: ud2
177	jmp .again
178	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2) == 5)
179	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_rexw_bx_ud2
180	%endif
181
182	%if TMPL_BITS != 64
183	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_ss_bx_ud2
184	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_ss_bx_ud2, BS3_PBC_NEAR
185	sgdt [ss:xBX]
186	.again: ud2
187	jmp .again
188	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_ss_bx_ud2) == 4)
189	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_ss_bx_ud2
190
191	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_sgdt_opsize_ss_bx_ud2
192	BS3_PROC_BEGIN_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2, BS3_PBC_NEAR
193	db X86_OP_PRF_SIZE_OP
194	sgdt [ss:xBX]
195	.again: ud2
196	jmp .again
197	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_sgdt_opsize_ss_bx_ud2) == 5)
198	BS3_PROC_END_CMN bs3CpuBasic2_sgdt_opsize_ss_bx_ud2
199	%endif
200
201
202	;
203	; LIDT
204	;
205	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2
206	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
207	lidt [xBX]
208	sidt [BS3_NOT_64BIT(es:) xDI]
209	lidt [BS3_NOT_64BIT(es:) xSI]
210	.again:
211	ud2
212	jmp .again
213	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11))
214	BS3_PROC_END_CMN bs3CpuBasic2_lidt_bx__sidt_es_di__lidt_es_si__ud2
215
216	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2
217	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
218	db X86_OP_PRF_SIZE_OP
219	lidt [xBX]
220	sidt [BS3_NOT_64BIT(es:) xDI]
221	lidt [BS3_NOT_64BIT(es:) xSI]
222	.again:
223	ud2
224	jmp .again
225	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12))
226	BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt_es_di__lidt_es_si__ud2
227
228	%if TMPL_BITS == 16
229	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2
230	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
231	db X86_OP_PRF_SIZE_OP
232	lidt [xBX]
233	jmp dword BS3_SEL_R0_CS32:.in_32bit wrt FLAT
234	BS3_SET_BITS 32
235	.in_32bit:
236	sidt [es:edi]
237	lidt [es:esi]
238	jmp dword BS3_SEL_R0_CS16:.again wrt CGROUP16
239	BS3_SET_BITS 16
240	.again:
241	ud2
242	jmp .again
243	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2) == 27)
244	BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_bx__sidt32_es_di__lidt_es_si__ud2
245	%endif
246
247	%if TMPL_BITS == 64
248	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2
249	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
250	db X86_OP_REX_W
251	lidt [xBX]
252	sidt [xDI]
253	lidt [xSI]
254	.again:
255	ud2
256	jmp .again
257	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 10)
258	BS3_PROC_END_CMN bs3CpuBasic2_lidt_rexw_bx__sidt_es_di__lidt_es_si__ud2
259
260	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2
261	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
262	db X86_OP_PRF_SIZE_OP
263	db X86_OP_REX_W
264	lidt [xBX]
265	sidt [xDI]
266	lidt [xSI]
267	.again:
268	ud2
269	jmp .again
270	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2) == 11)
271	BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_rexw_bx__sidt_es_di__lidt_es_si__ud2
272	%endif
273
274	%if TMPL_BITS != 64
275	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2
276	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
277	lidt [ss:xBX]
278	sidt [BS3_NOT_64BIT(es:) xDI]
279	lidt [BS3_NOT_64BIT(es:) xSI]
280	.again:
281	ud2
282	jmp .again
283	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2) == 12)
284	BS3_PROC_END_CMN bs3CpuBasic2_lidt_ss_bx__sidt_es_di__lidt_es_si__ud2
285
286	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2
287	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2, BS3_PBC_NEAR
288	db X86_OP_PRF_SIZE_OP
289	lidt [ss:xBX]
290	sidt [BS3_NOT_64BIT(es:) xDI]
291	lidt [BS3_NOT_64BIT(es:) xSI]
292	.again:
293	ud2
294	jmp .again
295	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2) == 13)
296	BS3_PROC_END_CMN bs3CpuBasic2_lidt_opsize_ss_bx__sidt_es_di__lidt_es_si__ud2
297	%endif
298
299
300	;
301	; LGDT
302	;
303	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2
304	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
305	lgdt [xBX]
306	sgdt [BS3_NOT_64BIT(es:) xDI]
307	lgdt [BS3_NOT_64BIT(es:) xSI]
308	.again:
309	ud2
310	jmp .again
311	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(9,11))
312	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_bx__sgdt_es_di__lgdt_es_si__ud2
313
314	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2
315	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
316	db X86_OP_PRF_SIZE_OP
317	lgdt [xBX]
318	sgdt [BS3_NOT_64BIT(es:) xDI]
319	lgdt [BS3_NOT_64BIT(es:) xSI]
320	.again:
321	ud2
322	jmp .again
323	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2) == BS3_IF_64BIT_OTHERWISE(10,12))
324	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_bx__sgdt_es_di__lgdt_es_si__ud2
325
326	%if TMPL_BITS == 64
327	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
328	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
329	db X86_OP_REX_W
330	lgdt [xBX]
331	sgdt [xDI]
332	lgdt [xSI]
333	.again:
334	ud2
335	jmp .again
336	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 10)
337	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
338
339	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
340	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
341	db X86_OP_PRF_SIZE_OP
342	db X86_OP_REX_W
343	lgdt [xBX]
344	sgdt [xDI]
345	lgdt [xSI]
346	.again:
347	ud2
348	jmp .again
349	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2) == 11)
350	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_rexw_bx__sgdt_es_di__lgdt_es_si__ud2
351	%endif
352
353	%if TMPL_BITS != 64
354	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2
355	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
356	lgdt [ss:xBX]
357	sgdt [BS3_NOT_64BIT(es:) xDI]
358	lgdt [BS3_NOT_64BIT(es:) xSI]
359	.again:
360	ud2
361	jmp .again
362	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 12)
363	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_ss_bx__sgdt_es_di__lgdt_es_si__ud2
364
365	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2
366	BS3_PROC_BEGIN_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2, BS3_PBC_NEAR
367	db X86_OP_PRF_SIZE_OP
368	lgdt [ss:xBX]
369	sgdt [BS3_NOT_64BIT(es:) xDI]
370	lgdt [BS3_NOT_64BIT(es:) xSI]
371	.again:
372	ud2
373	jmp .again
374	AssertCompile(.again - BS3_CMN_NM(bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2) == 13)
375	BS3_PROC_END_CMN bs3CpuBasic2_lgdt_opsize_ss_bx__sgdt_es_di__lgdt_es_si__ud2
376	%endif ; TMPL_BITS != 64
377
378	;
379	; #PF & #AC
380	;
381
382	; For testing read access.
383	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_mov_ax_ds_bx__ud2
384	BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2, BS3_PBC_NEAR
385	mov xAX, [xBX]
386	.again: ud2
387	jmp .again
388	AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
389	BS3_PROC_END_CMN bs3CpuBasic2_mov_ax_ds_bx__ud2
390
391
392	; For testing write access.
393	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_mov_ds_bx_ax__ud2
394	BS3_PROC_BEGIN_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2, BS3_PBC_NEAR
395	mov [xBX], xAX
396	.again: ud2
397	jmp .again
398	AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
399	BS3_PROC_END_CMN bs3CpuBasic2_mov_ds_bx_ax__ud2
400
401
402	; For testing read+write access.
403	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_xchg_ds_bx_ax__ud2
404	BS3_PROC_BEGIN_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2, BS3_PBC_NEAR
405	xchg [xBX], xAX
406	.again: ud2
407	jmp .again
408	AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
409	BS3_PROC_END_CMN bs3CpuBasic2_xchg_ds_bx_ax__ud2
410
411
412	; Another read+write access test.
413	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2
414	BS3_PROC_BEGIN_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2, BS3_PBC_NEAR
415	cmpxchg [xBX], xCX
416	.again: ud2
417	jmp .again
418	AssertCompile(.again - BS3_LAST_LABEL == 3 + (TMPL_BITS == 64))
419	BS3_PROC_END_CMN bs3CpuBasic2_cmpxchg_ds_bx_cx__ud2
420
421
422	; For testing read access from an aborted instruction: DIV by zero
423	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_div_ds_bx__ud2
424	BS3_PROC_BEGIN_CMN bs3CpuBasic2_div_ds_bx__ud2, BS3_PBC_NEAR
425	div xPRE [xBX]
426	.again: ud2
427	jmp .again
428	AssertCompile(.again - BS3_LAST_LABEL == 2 + (TMPL_BITS == 64))
429	BS3_PROC_END_CMN bs3CpuBasic2_div_ds_bx__ud2
430
431	; For testing FLD m80 alignment (#AC).
432	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_fninit_fld_ds_bx__ud2
433	BS3_PROC_BEGIN_CMN bs3CpuBasic2_fninit_fld_ds_bx__ud2, BS3_PBC_NEAR
434	fninit ; make sure to not trigger a stack overflow.
435	.actual_test_instruction:
436	fld tword [xBX]
437	.again: ud2
438	jmp .again
439	AssertCompile(.actual_test_instruction - BS3_LAST_LABEL == 2)
440	BS3_PROC_END_CMN bs3CpuBasic2_fninit_fld_ds_bx__ud2
441
442	; For testing FBLD m80 alignment (#AC).
443	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_fninit_fbld_ds_bx__ud2
444	BS3_PROC_BEGIN_CMN bs3CpuBasic2_fninit_fbld_ds_bx__ud2, BS3_PBC_NEAR
445	fninit ; make sure to not trigger a stack overflow.
446	.actual_test_instruction:
447	fbld tword [xBX]
448	.again: ud2
449	jmp .again
450	AssertCompile(.actual_test_instruction - BS3_LAST_LABEL == 2)
451	BS3_PROC_END_CMN bs3CpuBasic2_fninit_fbld_ds_bx__ud2
452
453	; For testing FST m80 alignment (#AC).
454	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_fninit_fldz_fstp_ds_bx__ud2
455	BS3_PROC_BEGIN_CMN bs3CpuBasic2_fninit_fldz_fstp_ds_bx__ud2, BS3_PBC_NEAR
456	fninit ; make sure to not trigger a stack overflow.
457	fldz ; make sure we've got something to store
458	.actual_test_instruction:
459	fstp tword [xBX]
460	.again: ud2
461	jmp .again
462	AssertCompile(.actual_test_instruction - BS3_LAST_LABEL == 4)
463	BS3_PROC_END_CMN bs3CpuBasic2_fninit_fldz_fstp_ds_bx__ud2
464
465	; For testing FXSAVE alignment (#AC/#GP).
466	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_fxsave_ds_bx__ud2
467	BS3_PROC_BEGIN_CMN bs3CpuBasic2_fxsave_ds_bx__ud2, BS3_PBC_NEAR
468	fxsave [xBX]
469	.again: ud2
470	jmp .again
471	BS3_PROC_END_CMN bs3CpuBasic2_fxsave_ds_bx__ud2
472
473
474	; Two memory operands: push [mem]
475	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_push_ds_bx__ud2
476	BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ds_bx__ud2, BS3_PBC_NEAR
477	push xPRE [xBX]
478	.again: ud2
479	jmp .again
480	AssertCompile(.again - BS3_LAST_LABEL == 2)
481	BS3_PROC_END_CMN bs3CpuBasic2_push_ds_bx__ud2
482
483	; Two memory operands: pop [mem]
484	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_push_ax__pop_ds_bx__ud2
485	BS3_PROC_BEGIN_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2, BS3_PBC_NEAR
486	push xAX
487	pop xPRE [xBX]
488	.again: ud2
489	jmp .again
490	AssertCompile(.again - BS3_LAST_LABEL == 3)
491	BS3_PROC_END_CMN bs3CpuBasic2_push_ax__pop_ds_bx__ud2
492
493	; Two memory operands: call [mem]
494	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ds_bx__ud2
495	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ds_bx__ud2, BS3_PBC_NEAR
496	call xPRE [xBX]
497	.again: ud2
498	jmp .again
499	AssertCompile(.again - BS3_LAST_LABEL == 2)
500	BS3_PROC_END_CMN bs3CpuBasic2_call_ds_bx__ud2
501
502	; For testing #GP vs #PF write
503	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_insb__ud2
504	BS3_PROC_BEGIN_CMN bs3CpuBasic2_insb__ud2, BS3_PBC_NEAR
505	insb
506	.again: ud2
507	jmp .again
508	AssertCompile(.again - BS3_LAST_LABEL == 1)
509	BS3_PROC_END_CMN bs3CpuBasic2_insb__ud2
510
511
512	;*********************************************************************************************************************************
513	;* Non-far JMP & CALL Tests (simple ones). *
514	;*********************************************************************************************************************************
515
516	; jmp rel8 (forwards)
517	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb__ud2
518	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb__ud2, BS3_PBC_NEAR
519	jmp short .again
520	.post_jmp:
521	times 7 int3
522	.again: ud2
523	int3
524	jmp .again
525	AssertCompile(.post_jmp - BS3_LAST_LABEL == 2)
526	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jb__ud2
527
528
529	; jmp rel8 (backwards)
530	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jb_back__ud2),.again), function, 2
531	ud2
532	times 7 int3
533	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb_back__ud2
534	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb_back__ud2, BS3_PBC_NEAR
535	jmp short .again
536	.post_jmp:
537	int3
538	AssertCompile(.post_jmp - BS3_LAST_LABEL == 2)
539	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jb_back__ud2
540
541
542	; jmp rel16 (forwards)
543	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv__ud2
544	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv__ud2, BS3_PBC_NEAR
545	jmp near .again
546	.post_jmp:
547	times 9 int3
548	.again: ud2
549	int3
550	jmp .again
551	%if TMPL_BITS == 16
552	AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
553	%else
554	AssertCompile(.post_jmp - BS3_LAST_LABEL == 5)
555	%endif
556	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jv__ud2
557
558
559	; jmp rel16 (backwards)
560	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_back__ud2),.again), function, 2
561	ud2
562	times 6 int3
563	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_back__ud2
564	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_back__ud2, BS3_PBC_NEAR
565	jmp near .again
566	.post_jmp:
567	int3
568	%if TMPL_BITS == 16
569	AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
570	%else
571	AssertCompile(.post_jmp - BS3_LAST_LABEL == 5)
572	%endif
573	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jv_back__ud2
574
575
576	; jmp [indirect]
577	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_mem__ud2
578	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_mem__ud2, BS3_PBC_NEAR
579	%if TMPL_BITS == 16
580	jmp [word cs:.npAgain]
581	%elif TMPL_BITS == 32
582	jmp [dword cs:.npAgain]
583	%else
584	jmp [.npAgain]
585	%endif
586	.post_jmp:
587	times 9 int3
588	.npAgain:
589	%if TMPL_BITS == 16
590	dw BS3_TEXT16_WRT(.again)
591	%else
592	dd .again wrt FLAT
593	%if TMPL_BITS == 64
594	dd 0
595	%endif
596	%endif
597	.again: ud2
598	int3
599	jmp .again
600	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_mem__ud2
601
602	; jmp [xAX]
603	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_xAX__ud2
604	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_xAX__ud2, BS3_PBC_NEAR
605	jmp xAX
606	.post_jmp:
607	times 17 int3
608	.again: ud2
609	int3
610	jmp .again
611	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_xAX__ud2
612
613	; jmp [xDI]
614	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_xDI__ud2
615	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_xDI__ud2, BS3_PBC_NEAR
616	jmp xDI
617	.post_jmp:
618	times 17 int3
619	.again: ud2
620	int3
621	jmp .again
622	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_xDI__ud2
623
624	%if TMPL_BITS == 64
625	; jmp [xAX]
626	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_r9__ud2
627	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_r9__ud2, BS3_PBC_NEAR
628	jmp r9
629	.post_jmp:
630	times 17 int3
631	.again: ud2
632	int3
633	jmp .again
634	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_r9__ud2
635	%endif
636
637
638	; call rel16/32 (forwards)
639	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_jv__ud2
640	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_jv__ud2, BS3_PBC_NEAR
641	call near .again
642	.post_call:
643	times 9 int3
644	.again: ud2
645	int3
646	jmp .again
647	%if TMPL_BITS == 16
648	AssertCompile(.post_call - BS3_LAST_LABEL == 3)
649	%else
650	AssertCompile(.post_call - BS3_LAST_LABEL == 5)
651	%endif
652	BS3_PROC_END_CMN bs3CpuBasic2_call_jv__ud2
653
654	; call rel16/32 (backwards)
655	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_call_jv_back__ud2),.again), function, 2
656	ud2
657	times 6 int3
658	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_jv_back__ud2
659	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_jv_back__ud2, BS3_PBC_NEAR
660	call near .again
661	.post_call:
662	int3
663	%if TMPL_BITS == 16
664	AssertCompile(.post_call - BS3_LAST_LABEL == 3)
665	%else
666	AssertCompile(.post_call - BS3_LAST_LABEL == 5)
667	%endif
668	BS3_PROC_END_CMN bs3CpuBasic2_call_jv_back__ud2
669
670	; call [indirect]
671	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_mem__ud2
672	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_mem__ud2, BS3_PBC_NEAR
673	%if TMPL_BITS == 16
674	call [word cs:.npAgain]
675	%elif TMPL_BITS == 32
676	call [dword cs:.npAgain]
677	%else
678	call [.npAgain]
679	%endif
680	.post_call:
681	times 9 int3
682	.npAgain:
683	%if TMPL_BITS == 16
684	dw BS3_TEXT16_WRT(.again)
685	%else
686	dd .again wrt FLAT
687	%if TMPL_BITS == 64
688	dd 0
689	%endif
690	%endif
691	.again: ud2
692	int3
693	jmp .again
694	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_mem__ud2
695
696	; call [xAX]
697	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_xAX__ud2
698	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_xAX__ud2, BS3_PBC_NEAR
699	call xAX
700	.post_call:
701	times 17 int3
702	.again: ud2
703	int3
704	jmp .again
705	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_xAX__ud2
706
707	; call [xDI]
708	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_xDI__ud2
709	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_xDI__ud2, BS3_PBC_NEAR
710	call xDI
711	.post_call:
712	times 17 int3
713	.again: ud2
714	int3
715	jmp .again
716	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_xDI__ud2
717
718	%if TMPL_BITS == 64
719	; call [xAX]
720	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_r9__ud2
721	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_r9__ud2, BS3_PBC_NEAR
722	call r9
723	.post_call:
724	times 17 int3
725	.again: ud2
726	int3
727	jmp .again
728	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_r9__ud2
729	%endif
730
731
732	;
733	; When applying opsize, we need to put this in the 16-bit text segment to
734	; better control where we end up in 32-bit and 64-bit mode.
735	;
736	; Try keep the code out of the IVT and BIOS data area. This unfortunately
737	; requires manual padding here.
738	;
739	BS3_BEGIN_TEXT16
740	BS3_SET_BITS TMPL_BITS
741	%if TMPL_BITS == 32
742	align 0x100, int3 ; Currently takes us up to 0x400 (max align value is 0x100)
743	times 0x200 int3 ; Brings us up to 0x600.
744	%endif
745
746	BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuBasic2_jmp_opsize_begin), , 1
747
748
749	; jmp rel8 (forwards) with opsize override.
750	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb_opsize__ud2
751	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb_opsize__ud2, BS3_PBC_NEAR
752	db 66h
753	jmp short .again
754	.post_jmp:
755	times 8 int3
756	.again: ud2
757	int3
758	jmp .again
759	AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
760	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jb_opsize__ud2
761
762
763	; jmp rel8 (backwards) with opsize override.
764	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jb_opsize_back__ud2),.again), function, 2
765	ud2
766	times 19 int3
767	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb_opsize_back__ud2
768	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb_opsize_back__ud2, BS3_PBC_NEAR
769	db 66h
770	jmp short .again
771	.post_jmp:
772	int3
773	AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
774	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jb_opsize_back__ud2
775
776
777	; jmp rel16 (forwards) with opsize override.
778	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_opsize__ud2
779	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_opsize__ud2, BS3_PBC_NEAR
780	db 66h, 0e9h ; o32 jmp near .again
781	%if TMPL_BITS != 32
782	dd 11
783	%else
784	dw 11
785	%endif
786	.post_jmp:
787	times 11 int3
788	.again: ud2
789	int3
790	jmp .again
791	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jv_opsize__ud2
792
793
794	; jmp rel16 (backwards) with opsize override.
795	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again), function, 2
796	ud2
797	times 19 int3
798	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_opsize_back__ud2
799	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_opsize_back__ud2, BS3_PBC_NEAR
800	%if TMPL_BITS != 32
801	db 66h, 0e9h ; o32 jmp near .again
802	dd RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again) - .post_jmp
803	%else
804	db 66h, 0e9h ; o16 jmp near .again
805	dw RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again) - .post_jmp
806	%endif
807	.post_jmp:
808	int3
809	BS3_PROC_END_CMN bs3CpuBasic2_jmp_jv_opsize_back__ud2
810
811
812	BS3_GLOBAL_NAME_EX BS3_CMN_NM(bs3CpuBasic2_jmp_opsize_end), , 1
813	int3
814
815	; jmp [indirect]
816	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_mem_opsize__ud2
817	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_mem_opsize__ud2, BS3_PBC_NEAR
818	db 66h
819	%if TMPL_BITS == 16
820	jmp [word cs:.npAgain]
821	%elif TMPL_BITS == 32
822	jmp [dword cs:.npAgain wrt FLAT]
823	%else
824	jmp [.npAgain wrt FLAT]
825	%endif
826	.post_jmp:
827	times 9 int3
828	.npAgain:
829	%if TMPL_BITS == 16
830	dw BS3_TEXT16_WRT(.again)
831	dw 0
832	%else
833	dw .again wrt CGROUP16
834	dw 0faceh, 0f00dh, 07777h ; non-canonical address
835	%endif
836	.again: ud2
837	int3
838	jmp .again
839	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_mem_opsize__ud2
840
841	%if TMPL_BITS == 64
842	; jmp [indirect] - 64-bit intel version
843	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_mem_opsize__ud2__intel
844	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_mem_opsize__ud2__intel, BS3_PBC_NEAR
845	db 66h
846	jmp [.npAgain wrt FLAT]
847	.post_jmp:
848	times 8 int3
849	.npAgain:
850	dd .again wrt FLAT
851	dd 0
852	.again: ud2
853	int3
854	jmp .again
855	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_mem_opsize__ud2__intel
856	%endif
857
858	; jmp [xAX]
859	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_ind_xAX_opsize__ud2
860	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_ind_xAX_opsize__ud2, BS3_PBC_NEAR
861	db 66h
862	jmp xAX
863	.post_jmp:
864	times 8 int3
865	.again: ud2
866	int3
867	jmp .again
868	BS3_PROC_END_CMN bs3CpuBasic2_jmp_ind_xAX_opsize__ud2
869
870
871	; call rel16/32 (forwards) with opsize override.
872	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_jv_opsize__ud2
873	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_jv_opsize__ud2, BS3_PBC_NEAR
874	db 66h, 0e8h ; o32 jmp near .again
875	%if TMPL_BITS != 32
876	dd 12
877	%else
878	dw 12
879	%endif
880	.post_call:
881	times 12 int3
882	.again: ud2
883	int3
884	jmp .again
885	BS3_PROC_END_CMN bs3CpuBasic2_call_jv_opsize__ud2
886
887
888	; call rel16/32 (backwards) with opsize override.
889	BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_call_jv_opsize_back__ud2),.again), function, 2
890	ud2
891	times 19 int3
892	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_jv_opsize_back__ud2
893	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_jv_opsize_back__ud2, BS3_PBC_NEAR
894	%if TMPL_BITS != 32
895	db 66h, 0e8h ; o32 call near .again
896	dd RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_call_jv_opsize_back__ud2),.again) - .post_call
897	%else
898	db 66h, 0e8h ; o16 call near .again
899	dw RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_call_jv_opsize_back__ud2),.again) - .post_call
900	%endif
901	.post_call:
902	int3
903	BS3_PROC_END_CMN bs3CpuBasic2_call_jv_opsize_back__ud2
904
905	; call [indirect]
906	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_mem_opsize__ud2
907	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_mem_opsize__ud2, BS3_PBC_NEAR
908	db 66h
909	%if TMPL_BITS == 16
910	call [word cs:.npAgain]
911	%elif TMPL_BITS == 32
912	call [dword cs:.npAgain wrt FLAT]
913	%else
914	call [.npAgain wrt FLAT]
915	%endif
916	.post_call:
917	times 9 int3
918	.npAgain:
919	%if TMPL_BITS == 16
920	dw BS3_TEXT16_WRT(.again)
921	dw 0
922	%else
923	dw .again wrt CGROUP16
924	dw 0faceh, 0f00dh, 07777h ; non-canonical address
925	%endif
926	.again: ud2
927	int3
928	jmp .again
929	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_mem_opsize__ud2
930
931	%if TMPL_BITS == 64
932	; call [indirect] - 64-bit intel version
933	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_mem_opsize__ud2__intel
934	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_mem_opsize__ud2__intel, BS3_PBC_NEAR
935	db 66h
936	call [.npAgain wrt FLAT]
937	.post_call:
938	times 8 int3
939	.npAgain:
940	dd .again wrt FLAT
941	dd 0
942	.again: ud2
943	int3
944	jmp .again
945	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_mem_opsize__ud2__intel
946	%endif
947
948	; call [xAX]
949	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_call_ind_xAX_opsize__ud2
950	BS3_PROC_BEGIN_CMN bs3CpuBasic2_call_ind_xAX_opsize__ud2, BS3_PBC_NEAR
951	db 66h
952	call xAX
953	.post_call:
954	times 8 int3
955	.again: ud2
956	int3
957	jmp .again
958	BS3_PROC_END_CMN bs3CpuBasic2_call_ind_xAX_opsize__ud2
959
960
961
962	;*********************************************************************************************************************************
963	;* FAR JMP ABS *
964	;*********************************************************************************************************************************
965
966	%if TMPL_BITS == 16
967	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_rm__ud2
968	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_rm__ud2, BS3_PBC_NEAR
969	db 0eah
970	dw .again wrt CGROUP16
971	dw BS3_SEL_TEXT16
972	.post_jmp:
973	times 2 int3
974	.again: ud2
975	int3
976	jmp .again
977	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_rm__ud2
978	%endif
979
980	%if TMPL_BITS != 64
981
982	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_same_r0__ud2
983	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_same_r0__ud2, BS3_PBC_NEAR
984	db 0eah
985	%if TMPL_BITS == 16
986	dw .again wrt CGROUP16
987	dw BS3_SEL_R0_CS16
988	%else
989	dd .again wrt FLAT
990	dw BS3_SEL_R0_CS32
991	%endif
992	.post_jmp:
993	times 7 int3
994	.again: ud2
995	int3
996	jmp .again
997	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_same_r0__ud2
998
999	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_same_r1__ud2
1000	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_same_r1__ud2, BS3_PBC_NEAR
1001	db 0eah ; inter privilege jmp -> #GP(dst-cs)
1002	%if TMPL_BITS == 16
1003	dw .again wrt CGROUP16
1004	dw BS3_SEL_R1_CS16 \| 1
1005	%else
1006	dd .again wrt FLAT
1007	dw BS3_SEL_R1_CS32 \| 1
1008	%endif
1009	.again: ud2
1010	jmp .again
1011	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_same_r1__ud2
1012
1013	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_same_r2__ud2
1014	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_same_r2__ud2, BS3_PBC_NEAR
1015	db 0eah ; inter privilege jmp -> #GP(dst-cs)
1016	%if TMPL_BITS == 16
1017	dw .again wrt CGROUP16
1018	dw BS3_SEL_R2_CS16 \| 2
1019	%else
1020	dd .again wrt FLAT
1021	dw BS3_SEL_R2_CS32 \| 2
1022	%endif
1023	.again: ud2
1024	jmp .again
1025	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_same_r2__ud2
1026
1027	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_same_r3__ud2
1028	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_same_r3__ud2, BS3_PBC_NEAR
1029	db 0eah ; inter privilege jmp -> #GP(dst-cs)
1030	%if TMPL_BITS == 16
1031	dw .again wrt CGROUP16
1032	dw BS3_SEL_R3_CS16 \| 3
1033	%else
1034	dd .again wrt FLAT
1035	dw BS3_SEL_R3_CS32 \| 3
1036	%endif
1037	.again: ud2
1038	jmp .again
1039	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_same_r3__ud2
1040
1041	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_opsize_flipbit_r0__ud2
1042	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_opsize_flipbit_r0__ud2, BS3_PBC_NEAR
1043	db 066h, 0eah
1044	%if TMPL_BITS == 32
1045	dw .again wrt CGROUP16
1046	dw BS3_SEL_R0_CS16
1047	%else
1048	dd .again wrt FLAT
1049	dw BS3_SEL_R0_CS32
1050	%endif
1051	times 4 int3
1052	.again: ud2
1053	jmp .again
1054	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_opsize_flipbit_r0__ud2
1055
1056	; Do a jmp to BS3_SEL_R0_CS64. Except for when we're in long mode, this will
1057	; result in a 16-bit CS with zero base and 4G limit.
1058	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_r0_cs64__ud2
1059	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_r0_cs64__ud2, BS3_PBC_NEAR
1060	%if TMPL_BITS == 16
1061	db 066h
1062	%endif
1063	db 0eah
1064	dd .jmp_target wrt FLAT
1065	dw BS3_SEL_R0_CS64
1066	times 8 int3
1067	.jmp_target:
1068	salc ; #UD in 64-bit mode
1069	.again: ud2
1070	jmp .again
1071	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_r0_cs64__ud2
1072
1073	; Variation of the previous with a CS16 copy that has the L bit set, emulating
1074	; pre-AMD64 software using the L bit for other stuff. (Don't run in long mode
1075	; w/o copying the 3 bytes to the 0xxxxh memory range.)
1076	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_ptr_r0_cs16l__ud2
1077	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_ptr_r0_cs16l__ud2, BS3_PBC_NEAR
1078	%if TMPL_BITS != 16
1079	db 066h
1080	%endif
1081	db 0eah
1082	dw .jmp_target wrt CGROUP16
1083	dw BS3_SEL_SPARE_00 ; ASSUMES this is set up as CGROUP16 but with L=1.
1084	times 3 int3
1085	.jmp_target:
1086	salc ; #UD in 64-bit mode
1087	.again: ud2
1088	jmp .again
1089	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_ptr_r0_cs16l__ud2
1090
1091	%endif ; TMPL_BITS != 64
1092
1093
1094
1095	;*********************************************************************************************************************************
1096	;* FAR CALL ABS *
1097	;*********************************************************************************************************************************
1098
1099	%if TMPL_BITS == 16
1100	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_rm__ud2
1101	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_rm__ud2, BS3_PBC_NEAR
1102	db 09ah
1103	dw .again wrt CGROUP16
1104	dw BS3_SEL_TEXT16
1105	.post_call:
1106	times 2 int3
1107	.again: ud2
1108	int3
1109	jmp .again
1110	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_rm__ud2
1111	%endif
1112
1113	%if TMPL_BITS != 64
1114
1115	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_same_r0__ud2
1116	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_same_r0__ud2, BS3_PBC_NEAR
1117	db 09ah
1118	%if TMPL_BITS == 16
1119	dw .again wrt CGROUP16
1120	dw BS3_SEL_R0_CS16
1121	%else
1122	dd .again wrt FLAT
1123	dw BS3_SEL_R0_CS32
1124	%endif
1125	.post_call:
1126	times 7 int3
1127	.again: ud2
1128	int3
1129	jmp .again
1130	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_same_r0__ud2
1131
1132	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_same_r1__ud2
1133	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_same_r1__ud2, BS3_PBC_NEAR
1134	db 09ah
1135	%if TMPL_BITS == 16
1136	dw .again wrt CGROUP16
1137	dw BS3_SEL_R1_CS16 \| 1
1138	%else
1139	dd .again wrt FLAT
1140	dw BS3_SEL_R1_CS32 \| 1
1141	%endif
1142	.again: ud2
1143	jmp .again
1144	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_same_r1__ud2
1145
1146	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_same_r2__ud2
1147	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_same_r2__ud2, BS3_PBC_NEAR
1148	db 09ah
1149	%if TMPL_BITS == 16
1150	dw .again wrt CGROUP16
1151	dw BS3_SEL_R2_CS16 \| 2
1152	%else
1153	dd .again wrt FLAT
1154	dw BS3_SEL_R2_CS32 \| 2
1155	%endif
1156	.again: ud2
1157	jmp .again
1158	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_same_r2__ud2
1159
1160	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_same_r3__ud2
1161	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_same_r3__ud2, BS3_PBC_NEAR
1162	db 09ah
1163	%if TMPL_BITS == 16
1164	dw .again wrt CGROUP16
1165	dw BS3_SEL_R3_CS16 \| 3
1166	%else
1167	dd .again wrt FLAT
1168	dw BS3_SEL_R3_CS32 \| 3
1169	%endif
1170	.again: ud2
1171	jmp .again
1172	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_same_r3__ud2
1173
1174	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_opsize_flipbit_r0__ud2
1175	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_opsize_flipbit_r0__ud2, BS3_PBC_NEAR
1176	db 066h, 09ah
1177	%if TMPL_BITS == 32
1178	dw .again wrt CGROUP16
1179	dw BS3_SEL_R0_CS16
1180	%else
1181	dd .again wrt FLAT
1182	dw BS3_SEL_R0_CS32
1183	%endif
1184	times 4 int3
1185	.again: ud2
1186	jmp .again
1187	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_opsize_flipbit_r0__ud2
1188
1189	; Do a call to BS3_SEL_R0_CS64. Except for when we're in long mode, this will
1190	; result in a 16-bit CS with zero base and 4G limit.
1191	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_r0_cs64__ud2
1192	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_r0_cs64__ud2, BS3_PBC_NEAR
1193	%if TMPL_BITS == 16
1194	db 066h
1195	%endif
1196	db 09ah
1197	dd .call_target wrt FLAT
1198	dw BS3_SEL_R0_CS64
1199	times 8 int3
1200	.call_target:
1201	salc ; #UD in 64-bit mode
1202	.again: ud2
1203	jmp .again
1204	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_r0_cs64__ud2
1205
1206	; Variation of the previous with a CS16 copy that has the L bit set, emulating
1207	; pre-AMD64 software using the L bit for other stuff. (Don't run in long mode
1208	; w/o copying the 3 bytes to the 0xxxxh memory range.)
1209	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_callf_ptr_r0_cs16l__ud2
1210	BS3_PROC_BEGIN_CMN bs3CpuBasic2_callf_ptr_r0_cs16l__ud2, BS3_PBC_NEAR
1211	%if TMPL_BITS != 16
1212	db 066h
1213	%endif
1214	db 09ah
1215	dw .call_target wrt CGROUP16
1216	dw BS3_SEL_SPARE_00 ; ASSUMES this is set up as CGROUP16 but with L=1.
1217	times 3 int3
1218	.call_target:
1219	salc ; #UD in 64-bit mode
1220	.again: ud2
1221	jmp .again
1222	BS3_PROC_END_CMN bs3CpuBasic2_callf_ptr_r0_cs16l__ud2
1223
1224	%endif ; TMPL_BITS != 64
1225
1226
1227	;*********************************************************************************************************************************
1228	;* INDIRECT FAR JMP *
1229	;*********************************************************************************************************************************
1230
1231	%if TMPL_BITS == 16
1232	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_rm__ud2
1233	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_rm__ud2, BS3_PBC_NEAR
1234	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1235	int3
1236	.fpfn:
1237	dw .again wrt CGROUP16
1238	dw BS3_SEL_TEXT16
1239	.post_jmp:
1240	times 2 int3
1241	.again: ud2
1242	int3
1243	jmp .again
1244	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_rm__ud2
1245	%endif
1246
1247
1248	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_same_r0__ud2
1249	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_same_r0__ud2, BS3_PBC_NEAR
1250	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1251	.fpfn:
1252	%if TMPL_BITS == 16
1253	dw .again wrt CGROUP16
1254	dw BS3_SEL_R0_CS16
1255	%elif TMPL_BITS == 32
1256	dd .again wrt FLAT
1257	dw BS3_SEL_R0_CS32
1258	%else
1259	dd .again wrt FLAT, 0fffff000h
1260	dw BS3_SEL_R0_CS64
1261	%endif
1262	.post_jmp:
1263	times 7 int3
1264	.again: ud2
1265	int3
1266	jmp .again
1267	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_same_r0__ud2
1268
1269	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_same_r1__ud2
1270	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_same_r1__ud2, BS3_PBC_NEAR
1271	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1272	.fpfn:
1273	%if TMPL_BITS == 16
1274	dw .again wrt CGROUP16
1275	dw BS3_SEL_R1_CS16 \| 1
1276	%elif TMPL_BITS == 32
1277	dd .again wrt FLAT
1278	dw BS3_SEL_R1_CS32 \| 1
1279	%else
1280	dd .again wrt FLAT, 0fffff000h
1281	dw BS3_SEL_R1_CS64 \| 1
1282	%endif
1283	.again: ud2
1284	jmp .again
1285	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_same_r1__ud2
1286
1287	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_same_r2__ud2
1288	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_same_r2__ud2, BS3_PBC_NEAR
1289	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1290	.fpfn:
1291	%if TMPL_BITS == 16
1292	dw .again wrt CGROUP16
1293	dw BS3_SEL_R2_CS16 \| 2
1294	%elif TMPL_BITS == 32
1295	dd .again wrt FLAT
1296	dw BS3_SEL_R2_CS32 \| 2
1297	%else
1298	dd .again wrt FLAT, 0fffff000h
1299	dw BS3_SEL_R2_CS64 \| 2
1300	%endif
1301	.again: ud2
1302	jmp .again
1303	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_same_r2__ud2
1304
1305	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_same_r3__ud2
1306	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_same_r3__ud2, BS3_PBC_NEAR
1307	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1308	.fpfn:
1309	%if TMPL_BITS == 16
1310	dw .again wrt CGROUP16
1311	dw BS3_SEL_R3_CS16 \| 3
1312	%elif TMPL_BITS == 32
1313	dd .again wrt FLAT
1314	dw BS3_SEL_R3_CS32 \| 3
1315	%else
1316	dd .again wrt FLAT, 0fffff000h
1317	dw BS3_SEL_R3_CS64 \| 3
1318	%endif
1319	.again: ud2
1320	jmp .again
1321	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_same_r3__ud2
1322
1323	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_r0_cs16__ud2
1324	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_r0_cs16__ud2, BS3_PBC_NEAR
1325	%if TMPL_BITS != 16
1326	db 66h
1327	%endif
1328	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1329	.fpfn:
1330	%if TMPL_BITS != 64
1331	dw .again wrt CGROUP16
1332	%else
1333	dd .again wrt CGROUP16, 0
1334	%endif
1335	dw BS3_SEL_R0_CS16
1336	times 4 int3
1337	.again: ud2
1338	jmp .again
1339	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_r0_cs16__ud2
1340
1341	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_r0_cs32__ud2
1342	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_r0_cs32__ud2, BS3_PBC_NEAR
1343	%if TMPL_BITS == 16
1344	db 66h
1345	%endif
1346	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1347	.fpfn:
1348	%if TMPL_BITS != 64
1349	dd .again wrt FLAT
1350	%else
1351	dd .again wrt FLAT, 0
1352	%endif
1353	dw BS3_SEL_R0_CS32
1354	times 4 int3
1355	.again: ud2
1356	jmp .again
1357	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_r0_cs32__ud2
1358
1359	; Do a jmp to BS3_SEL_R0_CS64. Except for when we're in long mode, this will
1360	; result in a 16-bit CS with zero base and 4G limit.
1361	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_r0_cs64__ud2
1362	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_r0_cs64__ud2, BS3_PBC_NEAR
1363	%if TMPL_BITS == 16
1364	db 066h
1365	%endif
1366	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1367	.fpfn:
1368	dd .jmp_target wrt FLAT
1369	%if TMPL_BITS == 64
1370	dd 0fffff000h
1371	%endif
1372	dw BS3_SEL_R0_CS64
1373	times 8 int3
1374	.jmp_target:
1375	%if TMPL_BITS != 64
1376	salc ; #UD in 64-bit mode
1377	%endif
1378	.again: ud2
1379	jmp .again
1380	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_r0_cs64__ud2
1381
1382	; Variation of the previous with a CS16 copy that has the L bit set, emulating
1383	; pre-AMD64 software using the L bit for other stuff. (Don't run _c16/32 in
1384	; long mode w/o copying the 3 bytes to the 0xxxxh memory range.)
1385	; The _c64 version will test that the base is ignored.
1386	BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmpf_mem_r0_cs16l__ud2
1387	BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmpf_mem_r0_cs16l__ud2, BS3_PBC_NEAR
1388	%if TMPL_BITS != 16
1389	db 066h
1390	%endif
1391	jmp far [BS3_CPUBAS2_REF_LABLE_VIA_CS(.fpfn)]
1392	.fpfn:
1393	%if TMPL_BITS != 64
1394	dw .jmp_target wrt CGROUP16
1395	%else
1396	dd .jmp_target wrt FLAT, 0fffff000h
1397	%endif
1398	dw BS3_SEL_SPARE_00 ; ASSUMES this is set up as CGROUP16 but with L=1.
1399	times 3 int3
1400	.jmp_target:
1401	%if TMPL_BITS != 64
1402	salc ; #UD in 64-bit mode
1403	%endif
1404	.again: ud2
1405	jmp .again
1406	BS3_PROC_END_CMN bs3CpuBasic2_jmpf_mem_r0_cs16l__ud2
1407
1408
1409
1410	%endif ; BS3_INSTANTIATING_CMN
1411
1412	%include "bs3kit-template-footer.mac" ; reset environment
1413

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